CN103400800B - Bosch lithographic method - Google Patents
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- CN103400800B CN103400800B CN201310354670.9A CN201310354670A CN103400800B CN 103400800 B CN103400800 B CN 103400800B CN 201310354670 A CN201310354670 A CN 201310354670A CN 103400800 B CN103400800 B CN 103400800B
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Abstract
A kind of Bosch lithographic method, comprising: fixed substrate, to the pedestal in reaction chamber, is formed with the mask layer with opening on the substrate; Carry out etch step, pass into etching gas, apply source radio frequency power source to reaction chamber to maintain the plasma concentration in reaction chamber, the first bias power source that simultaneously applies, to described pedestal, forms etched hole along substrate described in opening etched portions; Carry out deposition step, pass into deposition gases, the second bias power source that applies is to described pedestal, and at sidewall surfaces and the mask layer surface deposition formation polymer of etched hole, the frequency in the second bias power source is greater than the frequency in the first bias power source; Repeat etch step and deposition step, until form through hole in described substrate.Bosch lithographic method of the present invention, while guarantee etch rate, stability is higher.
Description
Technical field
The present invention relates to field of semiconductor fabrication, particularly a kind of Bosch lithographic method.
Background technology
Along with semiconductor technology development, the characteristic size of current semiconductor device has become very little, wish that the quantity increasing semiconductor device in the encapsulating structure of two dimension becomes more and more difficult, therefore three-dimension packaging becomes a kind of method that effectively can improve chip integration.Current three-dimension packaging comprises based on chip-stacked (the Die Stacking) of gold thread bonding, encapsulation stacking (Package Stacking) and the three-dimensional (3D) based on silicon through hole (Through Silicon Via, TSV) stacking.Wherein, the three-dimensional stacked technology of silicon through hole is utilized to have following three advantages: (1) High Density Integration; (2) shorten the length of electrical interconnection significantly, thus the problems such as the signal delay appeared in two-dimentional system level chip (SOC) technology can be solved well; (3) utilize silicon through hole technology, the chip (as radio frequency, internal memory, logic, MEMS etc.) with difference in functionality can be integrated and realize the multi-functional of packaged chip.Therefore, the described three-dimensional stacked technology of silicon through hole interconnect structure that utilizes becomes a kind of comparatively popular chip encapsulation technology day by day.
In the application of silicon through hole technology, usually will carry out deep via etching to materials such as silicon, the deep via formed by etching makes vertical conducting between chip and chip, between silicon chip and silicon chip, thus realizes the interconnection between chip and chip.In most of the cases, silicon through hole makes all to be needed to get through different material layers, and the through hole formed thus must meet profile control overflow (as verticality of side wall and roughness etc.), and therefore silicon via etch process becomes the key of silicon through hole manufacturing technology.
In order to the requirement of the perpendicularity and roughness that improve the sidewall of through hole, usually Bosch(Bosch is adopted during existing etch silicon through hole) etching technics, its detailed process is: provide Semiconductor substrate, described Semiconductor substrate is formed with the photoresist mask layer with opening; Carry out etch step: in etching cavity, pass into etching gas (such as: SF
6), etching gas is dissociated into plasma, etches described Semiconductor substrate, forms etched hole; Carry out deposition step: in etching cavity, pass into deposition gases (such as: CF
4), deposition gases is dissociated into plasma, form polymer at the sidewall of etched hole, described polymer protects the sidewall of established etched hole to be etched into when next etch step, thus ensures whole Bosch(Bosch) anisotropy of etching process; Repeat above-mentioned etch step and deposition step, until form silicon through hole in the semiconductor substrate.
But, prior art Bosch(Bosch) and in etching process, the stability of etching technics is still to be improved.
Summary of the invention
The problem that the present invention solves is to provide Bosch(Bosch) stability of etching technics.
For solving the problem, the invention provides a kind of Bosch lithographic method, comprising: fixed substrate, to the pedestal in reaction chamber, is formed with the mask layer with opening on the substrate; Carry out etch step, pass into etching gas, apply source radio frequency power source to reaction chamber to maintain the plasma concentration in reaction chamber, the first bias power source that simultaneously applies, to described pedestal, forms etched hole along substrate described in opening etched portions; Carry out deposition step, pass into deposition gases, the second bias power source that applies is to described pedestal, and at sidewall surfaces and the mask layer surface deposition formation polymer of etched hole, the frequency in the second bias power source is greater than the frequency in the first bias power source; Repeat etch step and deposition step, until form through hole in described substrate.。
Optionally, the frequency in the second bias power source is greater than 2.5 times of the frequency in the first bias power source.
Optionally, the frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in the second bias power source is more than or equal to 10Mhz.
Optionally, the frequency in the first bias power source is 360Khz ~ 4Mhz, and the frequency in the second bias power source is 10Mhz ~ 30Mhz.
Optionally, the frequency in the first bias power source is 400Khz ~ 2Mhz, and the frequency in the second bias power source is 13Mhz ~ 27Mhz.
Optionally, the etching gas that described etch step adopts is SF
6and/or CF
4.
Optionally, the gas that described etch step adopts also comprises O
2.
Optionally, the deposition gases that described deposition step adopts is C
4f
8, C
4f
6, CHF
3, CH
2f
2, C
5f
8or one or more in COS.
Optionally, the etch step time is 0.3 ~ 30 second, and the time of deposition step is 0.3 ~ 30 second.
Optionally, in etching process, the watt level of source radio frequency power source is 500 ~ 5000W, and the first bias power source or the second bias source power are 500 ~ 5000W.
Optionally, the material of described mask layer is photoresist, amorphous carbon, SiO
2, SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN.
Compared with prior art, technical scheme of the present invention has the following advantages:
Bosch lithographic method of the present invention, when carrying out etch step, first bias power source frequency adopts lower frequency, plasma is made to have higher bombarding energy, thus ensure good etching directivity and etch rate faster, when carrying out deposition step, second bias power source adopts higher frequency, make the energy of isoionic bombardment when depositing less, ensure the stability of the polymer deposition of etched hole sidewall, reduce the bombardment to mask layer simultaneously, and on mask layer, also can deposit formation polymer, mask layer is protected in subsequent etch step, therefore, Bosch lithographic method of the present invention, while the etch rate that maintenance is higher, mask layer can not be depleted in deposition step, and loss is less in etch step, make the etch topography of the final through hole formed better.
Further, the frequency in the second bias power source is more than or equal to 10Mhz, the frequency in described second bias power source is 10Mhz ~ 30Mhz, second bias power source frequency is higher, under Same Efficieney, the acceleration of the second bias power source article on plasma is more weak, makes isoionic bombarding energy very little, and plasma deposition forms polymer in the sidewall surfaces of etched hole and mask layer surface deposition.Therefore in deposition step; plasma to the etching of mask layer or bombardment effect negligible; and mask layer surface also can form certain thickness polymer; mask layer can be protected the speed of internal consumption or consumption to decline in follow-up etch step; while the stability ensureing polymer deposition, reduce the bombardment to mask layer.
Further, the frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in described first bias power source is 360Khz ~ 4Mhz.When carrying out etch step, the frequency in the first bias power source is low frequency, the frequency in the second bias power source when the frequency in the first bias power source is less than etch step, under making Same Efficieney, the time that plasma is accelerated is longer, plasma can obtain larger bombarding energy, good directivity and etch rate faster during to ensure etching.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of embodiment of the present invention Bosch lithographic method;
Fig. 2 ~ Fig. 6 is the structural representation of embodiment of the present invention Bosch etching process.
Embodiment
Existing Bosch(Bosch) in etching process, in order to obtain etch rate and preferably etched hole etching appearance faster, when etch step and deposition step, the bias power source frequency of usual employing lower frequency, when etch step: when bias power source frequency is lower, elongated in the accelerating time of equal power below-center offset power source article on plasma, thus plasma can obtain larger bombarding energy, make the speed of etching comparatively fast and keep good directivity, thus improve etch rate and make the sidewall of etched hole keep good pattern, but, when plasma obtains larger bombarding energy, while Semiconductor substrate etch rate is increased, also can be able to increase the etch rate of the photoresist mask in Semiconductor substrate equally, the wear rate of photoresist mask accelerates, when photoresist mask is depleted to certain thickness, its effect as mask significantly weakens or does not exist, be unfavorable for that through hole continues etching, equally, when deposition step, when bias power source frequency is lower, the bombarding energy of plasma is also comparatively large, and the thickness of the polymer that etched hole is formed also can the thinner and less stable deposited, be unfavorable for the protection to etched hole sidewall in etching process, meanwhile, the bombarding energy of plasma is also larger, and plasma also can bombard photoresist layer, not only can not again on photoresist mask layer for the protection of polymeric layer, on the contrary loss is caused to photoresist mask layer.
Although the problems referred to above can be improved by the size increasing the bias power source frequency in etch step and biased step, but the increase of bias power source frequency can make the speed etched to reduce, and because the bombarding energy of plasma reduces, the sidewall profile of the etched hole formed can be made to be deteriorated.
The present invention proposes a kind of Bosch lithographic method for this reason, when carrying out etch step, first bias power source frequency adopts lower frequency, plasma is made to have higher bombarding energy, thus ensure good etching directivity and etch rate faster, when carrying out deposition step, second bias power source adopts higher frequency, make the energy of isoionic bombardment when depositing less, ensure the stability of the polymer deposition of etched hole sidewall, reduce the bombardment to mask layer simultaneously, and on mask layer, also can deposit formation polymer, mask layer is protected in subsequent etch step, therefore, Bosch lithographic method of the present invention, while the etch rate that maintenance is higher, mask layer can not be depleted in deposition step, and loss is less in etch step, make the etch topography of the final through hole formed better.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.When describing the embodiment of the present invention in detail, for ease of illustrating, schematic diagram can be disobeyed general ratio and be made partial enlargement, and described schematic diagram is example, and it should not limit the scope of the invention at this.In addition, the three-dimensional space of length, width and the degree of depth should be comprised in actual fabrication.
Fig. 1 is the schematic flow sheet of embodiment of the present invention Bosch lithographic method, comprising:
Step S101, fixed substrate, to the pedestal in reaction chamber, is formed with the mask layer with opening on the substrate;
Step S102, carries out etch step, passes into etching gas, applies source radio frequency power source to reaction chamber to maintain the plasma concentration in reaction chamber, and the first bias power source that simultaneously applies, to described pedestal, forms etched hole along substrate described in opening etched portions;
Step S103, carries out deposition step, passes into deposition gases, and the second bias power source that applies is to described pedestal, and at sidewall surfaces and the mask layer surface deposition formation polymer of etched hole, the frequency in the second bias power source is greater than the frequency in the first bias power source;
Step S104, repeats etch step and deposition step, until form through hole in described substrate.
Be described in detail below in conjunction with the detailed process of accompanying drawing to above-mentioned Bosch lithographic method.Fig. 2 ~ Fig. 6 is the structural representation of embodiment of the present invention Bosch etching process.
With reference to figure 2, provide substrate 200, described substrate 200 is formed the mask layer 201 with opening.
Follow-up formation through hole in described substrate 200.The material of described substrate 200 is can be silicon (Si), germanium (Ge) or SiGe (GeSi), carborundum (SiC); Also can be silicon-on-insulator (SOI), germanium on insulator (GOI); Or can also be other material, such as GaAs etc. III-V compounds of group.In the present embodiment, the material of described substrate 200 is monocrystalline silicon.
In other embodiments of the invention, described substrate can also be dielectric layer material, such as: silica, silicon nitride, advanced low-k materials or polymer etc.
In other embodiments of the invention, described substrate material can also be metal, such as: copper or aluminium etc.
Described mask layer 201 is as mask during subsequent etching substrate 200.Described mask layer 201 is single layer structure or multilayer lamination structure.
In embodiments of the invention, with mask layer 201 for single layer structure does exemplary illustration, the material of described mask layer 201 is photoresist, amorphous carbon, SiO
2, SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN etc.In the present embodiment, the material of described mask layer 201 is photoresist, and graphical photoresist layer, forms opening in photoresist layer, described opening exposes the surface of substrate 200, and position and the width of the position of opening and width and the through hole formed in subsequent substrate 200 are corresponding.
In other embodiments of the present invention, when described mask layer is sandwich construction, described mask layer comprises the photoresist layer being positioned at one or more layers hard mask layer on-chip He being positioned at hard mask layer surface.Described hard mask material layer is SiO
2, one or more in SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN.
With reference to figure 3, carry out etch step, form etched hole 202 along substrate 200 described in opening etched portions.
When carrying out etch step: first need to pass into etching gas in etch chamber, applying source radio frequency power source to reaction chamber to maintain the plasma concentration (etching gas is dissociated into plasma under the effect of radio frequency power source) in reaction chamber, the plasma formed accelerates under the effect in bias power source, etches (comprising physical bombardment etching and chemical etching) substrate 200.
The frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in concrete described first bias power source is 360Khz ~ 4Mhz.In the present embodiment, the frequency in the first bias power source is 400Khz ~ 2Mhz.When carrying out etch step, the frequency in the first bias power source is low frequency, the frequency in the first bias power source is less than the frequency in subsequent deposition process second bias power source, under making Same Efficieney, the time that plasma is accelerated is longer, plasma can obtain larger bombarding energy, good directivity and etch rate faster during to ensure etching.
When carrying out etch step, the frequency in the first bias power source is low frequency, and the etching gas of employing can be SF
6, described etching gas also comprises O
2, the power of source radio frequency power source is 500 ~ 5000W, and the power of the first radio frequency power source is 500 ~ 5000W, and the time of etch step is 0.3 ~ 30 second, and the degree of depth of etched hole is 0.01 ~ 10 micron, and the pattern of the etched hole 202 of formation is better.
With reference to figure 4, carry out deposition step, pass into deposition gases, the second bias power source that applies is to described pedestal, the frequency in the first bias power source is greater than in the sidewall surfaces of etched hole 202 and the frequency in mask layer 201 surface deposition formation polymer 203, second bias power source.
When carrying out deposition step: first need to pass into deposition gases in etch chamber, deposition gases is dissociated into plasma under the effect of source radio frequency power source, and plasma forms polymer 203 in the sidewall surfaces of etched hole 202 and mask layer 201 surface deposition under the effect in the second bias power source.It should be noted that, in deposition step, the bottom of etched hole also can the polymer of forming section thickness.
When carrying out deposition step, the frequency in the second bias power source is high frequency, and 2.5 times of the frequency in the first bias power source when the frequency in the frequency first bias power source in the second bias power source is greater than etch step.When carrying out deposition step, the frequency in the second bias power source is higher, and under Same Efficieney, the acceleration of the second bias power source article on plasma is more weak, make isoionic bombarding energy very little, plasma deposition forms polymer 203 in the sidewall surfaces of etched hole 202 and mask layer 201 surface deposition.Therefore in deposition step; plasma to the etching of mask layer 201 or bombardment effect negligible; and mask layer 201 surface also can form certain thickness polymer, mask layer can be protected the speed of internal consumption or consumption to decline in follow-up etch step.
The frequency in the second bias power source is more than or equal to 10Mhz, concrete, and the frequency in described second bias power source is 10Mhz ~ 30Mhz.In the present embodiment, the frequency in the second bias power source is 13Mhz ~ 27Mhz, while the stability ensureing polymer deposition, reduces the bombardment to mask layer.
When carrying out deposition step, the second bias power source frequency is high frequency, and described deposition gases is C
4f
8, C
4f
6, CHF
3, CH
2f
2, C
5f
8or COS(carbonyl sulfide) in one or more, the power of source radio frequency power source is 500 ~ 5000W, the power of the second radio frequency power source is 500 ~ 5000W, the time of deposition step is 0.3 ~ 30 second, the thickness of polymer is 0.01 ~ 10 micron, while the stability ensureing polymer deposition, reduce the bombardment to mask layer.
Then, with reference to figure 5, carry out etch step, continue the described substrate 200 of etching along opening, the degree of depth of etched hole 202 is increased.
In etching process, described polymer 203 protects the sidewall of etched hole 202 to be etched, the polymer 203 of etched hole 202 sidewall along with the carrying out of etching can be thinning.The polymer on bottom etched hole 202 and mask layer 201 surface is removed in etch step.
After having carried out etch step, then carry out deposition step, form polymer at the sidewall of etched hole 202.The specific descriptions of etch step and deposition step please refer to aforesaid description.
With reference to figure 6, repeat etch step and deposition step, until form through hole 205 in described substrate 200.
In the present embodiment, the through hole 205 of formation does not run through substrate 200.In other embodiments, described through hole 205 runs through substrate 200.
Follow-up, on the sidewall of through hole 205 and formation barrier layer, bottom, the metal of filling full through hole can be formed over the barrier layer.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (10)
1. a Bosch lithographic method, is characterized in that, comprising:
Fixed substrate, to the pedestal in reaction chamber, is formed with the mask layer with opening on the substrate;
Carry out etch step, pass into etching gas, apply source radio frequency power source to reaction chamber to maintain the plasma concentration in reaction chamber, the first bias power source that simultaneously applies, to described pedestal, forms etched hole along substrate described in opening etched portions;
Carry out deposition step, pass into deposition gases, the second bias power source that applies is to described pedestal, at sidewall surfaces and the mask layer surface deposition formation polymer of etched hole, the frequency in the second bias power source is greater than the frequency in the first bias power source, and the frequency in the second bias power source is greater than 2.5 times of the frequency in the first bias power source;
Repeat etch step and deposition step, until form through hole in described substrate.
2. Bosch lithographic method as claimed in claim 1, it is characterized in that, the frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in the second bias power source is more than or equal to 10Mhz.
3. Bosch lithographic method as claimed in claim 2, it is characterized in that, the frequency in the first bias power source is 360Khz ~ 4Mhz, and the frequency in the second bias power source is 10Mhz ~ 30Mhz.
4. Bosch lithographic method as claimed in claim 3, it is characterized in that, the frequency in the first bias power source is 400Khz ~ 2Mhz, and the frequency in the second bias power source is 13Mhz ~ 27Mhz.
5. Bosch lithographic method as claimed in claim 1, is characterized in that, the etching gas that described etch step adopts is SF
6.
6. Bosch lithographic method as claimed in claim 1, is characterized in that, the gas that described etch step adopts also comprises O
2.
7. Bosch lithographic method as claimed in claim 1, is characterized in that, the deposition gases that described deposition step adopts is C
4f
8, C
4f
6, CHF
3, CH
2f
2, C
5f
8or one or more in COS.
8. Bosch lithographic method as claimed in claim 1, it is characterized in that, the etch step time is 0.3 ~ 30 second, and the time of deposition step is 0.3 ~ 30 second.
9. Bosch lithographic method as claimed in claim 1, it is characterized in that, in etching process, the watt level of source radio frequency power source is 500 ~ 5000W, and the first bias power source or the second bias source power are 500 ~ 5000W.
10. Bosch lithographic method as claimed in claim 1, it is characterized in that, the material of described mask layer is photoresist, amorphous carbon, SiO
2, SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN.
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| CN104733372B (en) * | 2013-12-19 | 2019-12-17 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
| CN103700622B (en) * | 2013-12-27 | 2016-11-02 | 中微半导体设备(上海)有限公司 | The forming method of silicon through hole |
| CN105590843A (en) * | 2014-11-17 | 2016-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for etching inclined hole |
| CN106783584A (en) * | 2015-11-19 | 2017-05-31 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Substrate etching method |
| US10522429B2 (en) * | 2015-11-30 | 2019-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacturing semiconductor device |
| CN105845773B (en) * | 2016-03-30 | 2017-08-25 | 江苏欧达丰新能源科技发展有限公司 | Solar battery sheet three-dimensional PN junction processing technology |
| CN108573974B (en) * | 2017-03-14 | 2021-06-08 | 中芯国际集成电路制造(上海)有限公司 | Memory and forming method thereof |
| CN108648994A (en) * | 2018-05-15 | 2018-10-12 | 长江存储科技有限责任公司 | Forming method, groove structure and the memory of groove structure |
| CN110190027A (en) * | 2019-07-02 | 2019-08-30 | 武汉新芯集成电路制造有限公司 | The production method of semiconductor devices |
| WO2023199450A1 (en) * | 2022-04-13 | 2023-10-19 | Hitachi High-Tech Corporation | Plasma processing method and plasma processing device |
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| CN100492598C (en) * | 2003-10-21 | 2009-05-27 | 优利讯美国有限公司 | Method and equipment for etching substrate characteristic using alternative deposit/etching procedure |
| US20070128875A1 (en) * | 2005-12-02 | 2007-06-07 | Jessing Jeffrey R | Dry etch release method for micro-electro-mechanical systems (MEMS) |
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| US6051503A (en) * | 1996-08-01 | 2000-04-18 | Surface Technology Systems Limited | Method of surface treatment of semiconductor substrates |
| CN102431960A (en) * | 2011-12-07 | 2012-05-02 | 华中科技大学 | Silicon through hole etching method |
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