CN103325693A - Encapsulation piece using plastic package technology to optimize FCBGA encapsulation and manufacturing technology of encapsulation piece - Google Patents
Encapsulation piece using plastic package technology to optimize FCBGA encapsulation and manufacturing technology of encapsulation piece Download PDFInfo
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- CN103325693A CN103325693A CN2013101815842A CN201310181584A CN103325693A CN 103325693 A CN103325693 A CN 103325693A CN 2013101815842 A CN2013101815842 A CN 2013101815842A CN 201310181584 A CN201310181584 A CN 201310181584A CN 103325693 A CN103325693 A CN 103325693A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Abstract
The invention discloses an encapsulation piece using a plastic package technology to optimize FCBGA encapsulation and a manufacturing technology of the encapsulation piece. The encapsulation piece is mainly formed by a chip provided with bumps, substrate back bonding pads, a substrate, a bonding pad, solder balls and plastic package bodies. The substrate is provided with the substrate back bonding pads and the bonding pad, wherein the substrate back bonding pads are in one-to-one correspondence with the bumps. The solder balls are arranged on the substrate through the bonding pad. The chip, the bumps, the substrate and the solders are connected in sequence and form an access. The chip, the substrate and part of solder balls are wrapped by the plastic package bodies. The manufacturing technology includes the steps of wafer thinning, wafer scribing, substrate balling, backflow rinsing, flip-chip, backflow rinsing, film pasting, plastic package, film uncovering, testing, packaging and delivering. According to the manufacturing technology, plastic package materials are selected to replace bottom packing, the defects can be overcome through encapsulation to an FCBGA. Therefore, the manufacturing technology has the advantages of reducing the cost, protecting the chip and avoiding falling off and deformation of the solder balls.
Description
Technical field
The present invention relates to the method for FCBGA (Flip Chip Ball Grid Array) encapsulation, belong to the semiconductor packaging field, specifically a kind of packaging part and manufacture craft thereof that adopts flip-clip to optimize the FCBGA encapsulation.
Background technology
Along with the development of electronic technology, Electronic Packaging not only will provide the protection of chip, also will satisfy the requirements such as ever-increasing performance, reliability, heat radiation, power division under certain cost simultaneously, and this has proposed Secretary and challenge to encapsulation technology.Fierce market competition is promoting the continuous progress of encapsulation technology, and FC (Flip-Chip) becomes the novel encapsulated technology that often adopts in high-end device and the high-density packages field gradually.And for chip package, no matter be conventional art or new technique, the reliability of its encapsulation, Cost And Performance etc. are the keys of semiconductor packages always.
Current FC encapsulation is adopted mainly is in the upside-down mounting after the core, carries out the end and fill out technique between chip and substrate.Easily have following problem: (1) is for the FC product, carried out in the upside-down mounting after the core operation, all to carry out the bottom and fill this step, and it is less for bump on the chip, behind the upper core between chip and the substrate space very little, therefore to satisfy good fluidity for choosing namely of end filler, again the performance such as suitable viscosity, therefore for the FC encapsulation, the price of end filler is one of key factor of restriction packaging cost always; And larger for bump on the chip, behind the upper core between chip and the substrate space then relatively large, can select other materials to replace end filler fully and to be unlikely to packaging cost high.(2) packaged product if the tin ball on its substrate lacks in transmission course that coming off also can appear in protection and the situation such as distortion, brings threat to the encapsulation yield of product.(3) for present FC technique, it is that only carrying out the end between chip and substrate fills out technique substantially, and chip then is exposed among the air.For the product that heat radiation is had relatively high expectations, this model has very great help, but for the less demanding product of heat radiation, and chip is exposed to and outer will brings to the fail safe of product very large threat, and product has also been proposed challenge useful life.
Summary of the invention
The problem that exists in order to solve above-mentioned prior art; the invention provides a kind of packaging part and manufacture craft thereof that adopts flip-clip to optimize the FCBGA encapsulation; select plastic packaging material to replace the technology of end filler; by FCBGA is carried out plastic packaging; to improve above defective; have cost, the protection chip prevents the tin ball characteristics such as distortion that come off.
A kind of packaging part that adopts flip-clip to optimize the FCBGA encapsulation mainly is comprised of chip, substrate back pad, substrate, pad, tin ball and plastic-sealed body with bump.Described substrate is with substrate back pad and pad, and substrate back pad and bump are corresponding one by one, and substrate is implanted with the tin ball by pad, and chip, bump, substrate, tin ball connect successively and form path, and plastic-sealed body wraps up chip, substrate and part tin ball.
A kind of manufacture craft that adopts flip-clip to optimize the FCBGA encapsulation is at first planted ball and is carried out Reflow Soldering substrate, will finish core step in the upside-down mounting at substrate with the chip of bump again.After this process, carry out again a Reflow Soldering bump on the chip is communicated with substrate back pad on the substrate, form path.Then carry out the rubberizing film to having planted good tin ball on the substrate; carried out carrying out plastic packaging after this step; finish the committed step of this scheme: namely allow plastic-sealed body that chip, substrate and part tin bag are wrapped; replace end filler to satisfy plastic-sealed body, reduce cost; the protection chip; prevent the characteristics that the tin ball comes off and is out of shape, the step of the film that removes photoresist is at last finished whole process.
This technique mainly is that FCBGA is carried out plastic packaging (the substrate upper and lower surface is finished plastic packaging), be different from traditional B GA and FC encapsulation, adopt plastic packaging material to replace the technique of end filler, solve the part defective that the FCBGA product easily produces in production and later stage use procedure, improve product reliability.This technology is by with plastic packaging material the substrate two sides being wrapped up, and is in conjunction with the encapsulation of traditional B GA product and FC encapsulation, for the novel process technology of FCBGA product generation.(1) for bump the greater on the FC product chips, the relatively large product in space between chip and the substrate behind the core can adopt the method in the upside-down mounting, uses plastic packaging material to replace end packed art, thereby can be good at reducing packaging cost; (2) by carry out rubberizing film (choose the thicker glued membrane of bondline thickness, in the pad pasting process, the part of tin ball can be absorbed among the glue-line, thereby prevents that the tin ball from being fallen by whole plastic packagings in the plastic packaging process) at substrate tin ball, carry out after the plastic packaging, remove glued membrane.Be absorbed in the glued membrane part before the tin ball and then can expose, and other parts of tin ball will firmly be wrapped up by plastic packaging material, difficult drop-off, distortion; (3) meanwhile, the chip on the substrate also can be wrapped up by plastic packaging material, thereby can effectively prevent in transportation and later stage use procedure chip
Injury reduces the risk that chip is damaged.
This technique is on the basis of FCBGA encapsulation, in conjunction with the encapsulation of traditional B GA product and FC packaging technology, with both cleverly combinations, the characteristics of existing FC (many I/O, the RC delay is little etc.), have again the characteristics (reliability is high, cost is low, finish simple) of conventional package, irreplaceable effect will be arranged in the high-end encapsulation in future.
Description of drawings
Fig. 1 chip and substrate profile;
Fig. 2 substrate is planted the ball profile;
Core profile in Fig. 3 upside-down mounting;
Fig. 4 Reflow Soldering profile;
Fig. 5 pad pasting profile;
Fig. 6 plastic packaging profile;
Fig. 7 striping profile.
1 is chip, and 2 is bump, and 3 is substrate back pad, and 4 is substrate, and 5 is pad, and 6 is the tin ball, and 7 is glued membrane, and 8 is plastic-sealed body.
Embodiment
Below in conjunction with accompanying drawing the present invention is done and to be described in further detail.
A kind of packaging part that adopts flip-clip to optimize the FCBGA encapsulation mainly is comprised of chip 1, substrate back pad 3, substrate 4, pad 5, tin ball 6 and plastic-sealed body 8 with bump2.Described substrate 4 is with substrate back pad 3 and pad 5, substrate back pad 3 and bump2 are corresponding one by one, substrate 4 is implanted with tin ball 6 by pad 5, and chip 1, bump2, substrate 4, tin ball 6 connect successively and form path, and plastic-sealed body 8 wraps up chip 1, substrate 4 and part tin balls 6.
A kind of manufacture craft that adopts flip-clip to optimize the FCBGA encapsulation is at first planted ball and is carried out Reflow Soldering substrate 4, will finish core step in the upside-down mounting at substrate 4 with the chip 1 of bump2 again.After this process, carry out again a Reflow Soldering bump2 on the chip 1 is communicated with substrate back pad 3 on the substrate 4, form path.Then carry out rubberizing film 7 to having planted good tin ball 6 on the substrate 4; carried out carrying out plastic packaging after this step; finish the committed step of this scheme: namely allow plastic-sealed body 8 that chip 1, substrate 4 and part tin ball 6 are wrapped up; replace end filler to satisfy plastic-sealed body, reduce cost; the protection chip; prevent the characteristics that the tin ball comes off and is out of shape, the step of the film 7 that removes photoresist is at last finished whole process.
A kind of technological process of adopting flip-clip to optimize the FCBGA encapsulation is as follows:
The wafer attenuate
Wafer Dicing
Substrate is planted ball
Reflux and clean
Core in the upside-down mounting
Reflux and clean
Pad pasting
Plastic packaging
Take off film
Test
Packing
Delivery.
A kind of manufacture craft that adopts flip-clip to optimize the FCBGA encapsulation is mainly carried out according to following steps:
1, wafer attenuate: the wafer attenuate finish grindes by roughly grinding afterwards first, thereby wafer is thinned to final required thickness from original thickness.
2, Wafer Dicing: the above wafer of 150 μ m is with common scribing process, and thickness uses double-pole scribing machine and technique thereof at the following wafer of 150 μ m.
3, substrate is planted ball: select as requested suitable tin ball 6 to plant ball at substrate 4.As depicted in figs. 1 and 2.
4, backflow is cleaned: reflow parameters is chosen corresponding reflux technique parameter according to process specification requirements according to tin ball 6.
5, core utilizes the upside-down mounting chip feeder to finish core at substrate 4 with the chip 1 of bump2 in the upside-down mounting, as shown in Figure 3.
6, backflow is cleaned: reflow parameters is chosen corresponding reflux technique parameter according to process specification requirements according to wafer bump2 information.As shown in Figure 4.
7, pad pasting: rubberizing film 7 on tin ball 6.As shown in Figure 5.
8, plastic packaging: the product behind the pad pasting is sent in the plastic package die, finishes the process of sealing with the product behind 8 pairs of pad pastings of plastic-sealed body.As shown in Figure 6, be characterized in that plastic packaging material wraps up substrate front side and the back side, to play the effect of protection chip and tin ball.
9, take off film: the glued membrane 7 on the tin ball 6 is taken off film.As shown in Figure 7.
Claims (2)
1. packaging part that adopts flip-clip to optimize the FCBGA encapsulation is characterized in that: mainly by with bump(2) chip (1), substrate back pad (3), substrate (4), pad (5), tin ball (6) and plastic-sealed body (8) form; Described substrate (4) is with substrate back pad (3) and pad (5), substrate back pad (3) and bump(2) corresponding one by one, substrate (4) is implanted with tin ball (6) by pad (5), chip (1), bump(2), substrate (4), tin ball (6) connects successively and form path, plastic-sealed body (8) parcel chip (1), substrate (4) and part tin ball (6).
2. one kind is adopted flip-clip to optimize the manufacture craft that FCBGA encapsulates, and it is characterized in that: mainly carry out according to following steps:
(1), wafer attenuate: the wafer attenuate finish grindes by roughly grinding afterwards first, thereby wafer is thinned to final required thickness from original thickness;
(2), Wafer Dicing: the above wafer of 150 μ m is with common scribing process, and thickness uses double-pole scribing machine and technique thereof at the following wafer of 150 μ m;
(3), substrate is planted ball: select as requested suitable tin ball (6) to plant ball at substrate (4);
(4), backflow is cleaned: reflow parameters is chosen corresponding reflux technique parameter according to process specification requirements according to tin ball (6);
(5), core utilizes the upside-down mounting chip feeder will be with bump(2 in the upside-down mounting) chip (1) finish upper core at substrate (4);
(6), reflux to clean: reflow parameters is according to process specification requirements, according to wafer bump(2) information chooses corresponding reflux technique parameter;
(7), pad pasting: at the upper rubberizing film (7) of tin ball (6);
(8), plastic packaging: the product behind the pad pasting is sent in the plastic package die, finishes the process of the product behind the pad pasting being sealed with plastic-sealed body (8);
(9), take off film: the glued membrane (7) on the tin ball (6) is taken off film.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104582286A (en) * | 2014-12-31 | 2015-04-29 | 广州兴森快捷电路科技有限公司 | Manufacturing method for Burn-in semiconductor test board |
CN114203559A (en) * | 2021-11-04 | 2022-03-18 | 江苏普诺威电子股份有限公司 | Packaging process for embedding flip chip in packaging carrier plate |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0855875A (en) * | 1994-08-17 | 1996-02-27 | Hitachi Ltd | Semiconductor device |
US5894108A (en) * | 1997-02-11 | 1999-04-13 | National Semiconductor Corporation | Plastic package with exposed die |
CN103094239A (en) * | 2012-12-14 | 2013-05-08 | 华天科技(西安)有限公司 | Auxiliary paster pin added lead frame package part and manufacture process |
CN203589009U (en) * | 2013-05-16 | 2014-05-07 | 华天科技(西安)有限公司 | A packaging piece employing a plastic packaging technique to optimize FCBGA packaging |
-
2013
- 2013-05-16 CN CN2013101815842A patent/CN103325693A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0855875A (en) * | 1994-08-17 | 1996-02-27 | Hitachi Ltd | Semiconductor device |
US5894108A (en) * | 1997-02-11 | 1999-04-13 | National Semiconductor Corporation | Plastic package with exposed die |
CN103094239A (en) * | 2012-12-14 | 2013-05-08 | 华天科技(西安)有限公司 | Auxiliary paster pin added lead frame package part and manufacture process |
CN203589009U (en) * | 2013-05-16 | 2014-05-07 | 华天科技(西安)有限公司 | A packaging piece employing a plastic packaging technique to optimize FCBGA packaging |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104582286A (en) * | 2014-12-31 | 2015-04-29 | 广州兴森快捷电路科技有限公司 | Manufacturing method for Burn-in semiconductor test board |
CN104582286B (en) * | 2014-12-31 | 2017-11-17 | 广州兴森快捷电路科技有限公司 | The preparation method of Burn in semiconductor test boards |
CN114203559A (en) * | 2021-11-04 | 2022-03-18 | 江苏普诺威电子股份有限公司 | Packaging process for embedding flip chip in packaging carrier plate |
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