CN103308007A - System and method for measuring coplanarity of integrated circuit (IC) pins through multistage reflection and raster imaging - Google Patents
System and method for measuring coplanarity of integrated circuit (IC) pins through multistage reflection and raster imaging Download PDFInfo
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- CN103308007A CN103308007A CN2013102003141A CN201310200314A CN103308007A CN 103308007 A CN103308007 A CN 103308007A CN 2013102003141 A CN2013102003141 A CN 2013102003141A CN 201310200314 A CN201310200314 A CN 201310200314A CN 103308007 A CN103308007 A CN 103308007A
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Abstract
The invention discloses a system and a method for measuring the coplanarity of integrated circuit (IC) pins through multistage reflection and raster imaging. The system mainly comprises an IC chip dead load slant sliding feed mechanism, an external triggering synchronous control circuit, an IC chip pin imagingoptical path system, an image acquisition card and a personal computer (PC)-based intelligent visual inspection system. The IC chip pin imaging optical path system consists of two groups of mutually independent quasi-parallel blue-light light-emitting diode (LED) light sources, two rasters, and a plurality of reflectors and prisms which areorganically combined. A raster stripe images detected from the IC chip pins can be acquired throughthe imaging optical path system; and an image acquisition and analysis software system analyzes the images of the IC chip pins with raster stripes, evaluates the isometry of the pins in the images and the torsional characteristic of the raster stripes, and calculates a corresponding coplanarity error according to a corresponding f function mapping relation between a coplanarity error and the raster stripe curved degree. By the system and the method, two rows of pins of an IC chip are simultaneously imaged, the IC chip pins can be precisely detected through one-time imaging, the structure is compact, and the cost performance is high.
Description
Technical field:
Patent of the present invention belongs to the electronic integrated circuit encapsulation field, is specifically related to coplane degree new measurement method and the new system of the IC chip pin in a kind of Electronic Packaging.Be applicable to DIP (Dual In-line Package, dual-in-line), SOP (Small Out-Line Package, little outline packages), the real-time online measuring of PFP large scale integrated circuit pin coplanarities such as (Plastic Flat Package, flat package).
Background technology:
Along with the development of surface mounting technology, the paster components and parts have been obtained development at full speed.Mount at circuit board surface in (SMT) production technology, for guaranteeing to mount quality, size and the accuracy of form and position of IC chip pin had certain requirement, particularly by there is the certain precision requirement on IC chip pin summit to the vertical distance (coplane degree) of pad.If this coplane degree is overproof, then some pin of device just can not closely contact with the PCB pad, the scolding tin that melts when just causing welding does not easily reach the bottom of pin, scolding tin just can not be joined together to form good solder joint to these pins and pad, may cause rosin joint, leak defectives such as weldering and virtual connection, finally can influence reliability of products.So general IC chip production producer has strict tolerance to chip at pin coplanarity.
Because the IC pin of chip is very little, the method for traditional manual detection pin coplanarity can cause people's kopiopia, and testing result is subjected to the influence of testing staff's subjective factor easily.Therefore, the accuracy of detection of manual detection is low, detection speed is slow.Industrial products detection based on machine vision can overcome above-mentioned difficulties, therefore is widely used in the surface quality automatic monitoring of IC chip.
Existing ray cast method is that the IC chip pin is placed on the smooth plane of level up, observes vertical range between the highest pin and the minimum pin in the horizontal direction by human eye, and its difference is coplane degree.The ray cast method is simple in structure, easy operating.But gauger's eyesight can influence the process of measurement, and subjective factor is big, can't guarantee the precision of measuring.
Chinese patent CN100354601C employing and three-coordinates measuring machine etc. similarly measuring method carry out the measurement of IC pin coplanarity.This method needs the uniform frivolous flat board of two-sided smooth thickness, is used for three pins the highest of acquisition device, thereby sets up reference planes.Record each pin to the distance of reference planes by three-coordinates measuring machine, thereby obtain coplane degree.But this contact measurement method can only be applicable to artificial sampling observation, and detection speed is slow, and accuracy of detection is low, and may cause secondary damage to device.
Chinese patent CN101424511B adopts optical imagery collection and image recognition technology.But this system has used multiple valuable optical mirror slip, and mechanical mechanism complexity, equipment cost are higher relatively.Each imaging can only be finished the image acquisition of single pin, and imaging must meet the following conditions: need carry out the switching of light signal; The IC chip needs stop motion; Linear electric motors need round trip.Above condition is the time of consume valuable all, causes image taking speed slow, is difficult to satisfy the requirement of the online detection of high speed.
Chinese patent CN102052907A has proposed a kind of BGA coplane degree three-dimension measuring system based on the moire projecting principle.This system uses two cameras to carry out imaging simultaneously, is similar to the method for binocular machine vision.This pin coplanarity measuring method based on Moire fringe is to use two cameras to carry out imaging respectively, to obtain plane information and depth information.This system needs to be equipped with an assistant software in addition and controls LCD, thereby produces virtual grating; Need the artificial reference planes of setting; Need high-precision motion platform to realize the machinery location.When can realizing large tracts of land, high-precision real, this method measures.But this method adopts the structure of two camera imagings, makes that the measurement mechanism volume is big, the system architecture complexity, and the detection algorithm operand is big, and equipment cost is higher.
US Patent No. 7012628B2 employing Vision Builder for Automated Inspection is carried out quality testing to the coplane degree of the IC chip pin on the production line.This system need carry out repeatedly imaging respectively to left side pin and right side pin, and all needs to carry out imaging from different angles, and the multiple image that collects is analyzed, and finally realizes the accurate measurement of coplane degree.But, in imaging process, require the IC chip to keep static, repeatedly imaging causes detection speed slow.
The machine vision principle that is based on Jap.P. JP, 2003-207326, A realizes the coplane degree measurement of IC pin.This method uses two cameras respectively the side view of IC chip two row's pins to be carried out image acquisition.This method requires all pins to be placed on the same supporting plane, is measuring forefathers for setting a datum line.By the method for vision, measure the end of all pins to the distance of datum line, and compare with calibration value, thus the quick measurement of realization coplane degree.But this method adopts double camera structure, complex structure.
The high speed line Measurement Technique that is used for IC chip pin coplane degree is monopolized by a few countries such as Japan, Germany always, thereby causes such equipment price costliness, is difficult to be able to widespread use at production line.In order to satisfy domestic and international producer to the demand of economical coplane degree measuring equipment, the present invention is devoted to design the Polaroid high-precision online real-time vision IC pin coplanarity measuring system of a kind of one camera.
Summary of the invention:
The object of the invention is to realize the coplane degree on-line measurement of IC chip pin, shortcoming and defect part such as overcome existing coplane degree measurement mechanism complex structure, bulky, device fabrication cost height, detection speed is slow and accuracy of detection is low.Be subjected to the inspiration of ray cast method and grating image principle, proposed a kind of coplane degree on-line intelligence vision measurement device of being formed by some separate catoptron, prism, grating and image acquisition units, to adapt to requirement of large-scale production.
For realizing purpose of the present invention, the present invention adopts following technical scheme:
The IC chip pin coplane degree measuring system of a kind of higher order reflection and grating image, mainly comprise the IC chip conduct oneself with dignity oblique slip feeding mechanism, external trigger synchronization control circuit, IC chip pin imaging optical path system, image pick-up card, camera, based on intelligent vision detection system, the photoelectric sensor of PC
Described IC chip pin imaging optical path system comprises symmetrical left side light path and right side light path, described left side light path comprises that left side blue-ray LED light source, left side transmission grating, left side first catoptron, left side second catoptron, left side the 3rd catoptron and two base angles are the left-half of the isosceles prism of 45 degree, the light of described left side blue-ray LED light source from left to right parallel penetrated the left side transmission grating after, after first mirror reflects of left side, light is radiated at the lower surface of IC chip pin obliquely; Left side second catoptron is arranged with miter angle, after diffuse light from the IC chip pin is reflected, directive is spent left side the 3rd catoptron of arranging with 45 vertically upward again, left side the 3rd mirror reflects light is after level penetrates from left to right, be radiated at the left side of prism, vertically upward reflex to video camera then;
Described right side light path comprises: right side blue-ray LED light source, right side transmission grating, right side first catoptron, right side second catoptron, right side the 3rd catoptron, two base angles are the right half part of the isosceles prism of 45 degree, the light of described right side blue-ray LED light source is the parallel right side transmission grating of penetrating from right to left, after first mirror reflects of right side, light is radiated at the lower surface of IC chip pin obliquely; Right side second catoptron is arranged with miter angle, after diffuse light from the IC chip pin is reflected, directive is spent right side the 3rd catoptron of arranging with 45 vertically upward again, right side the 3rd mirror reflects light is after level penetrates from right to left, be radiated at the right side of prism, vertically upward reflex to video camera then;
Described video camera comprises CCD camera and optical lens, be vertically mounted on the prism symmetrical center line directly over, this video camera central axis is perpendicular to the conduct oneself with dignity rail plate of oblique slip feeding mechanism and overlap with the central plane of IC chip pin imaging optical path system of IC chip;
Described IC chip conduct oneself with dignity oblique slip feeding mechanism be positioned at prism under and this IC chip conduct oneself with dignity the rail plate center line of oblique slip feeding mechanism perpendicular to the central plane of IC chip pin imaging optical path system;
Described photoelectric sensor is vertically mounted on the IC chip and conducts oneself with dignity in the rail plate of oblique slip feeding mechanism, be positioned at the left margin place of camera field of view, when the IC chip slips over guide rail and passes through IC chip pin imaging optical path system, the outside triggering synchronous control circuit of photoelectric sensor sends position signalling, this signal after treatment, to image pick-up card and left side blue-ray LED light source, right side blue-ray LED light source sends imaging signal, light source is glittering, simultaneous camera moment takes pictures, take a picture is sent to the intelligent vision detection system that has based on PC through the figure capture card, and described intelligent vision detection system based on PC is used for the photo that obtains is carried out analyzing and processing to obtain IC pin of chip coplane degree.
Further, described left side first catoptron, left side second catoptron, left side the 3rd catoptron and two base angles are that isosceles prism, right side first catoptron, right side second catoptron, right side the 3rd catoptrons of 45 degree are stainless steel, and its reflecting surface or imaging surface all add through the ultraprecise grinding machine and form.
Further, be provided with between described left side light path and the right side light path prevent that light signal from interfering with each other every tabula rasa.
Further, described optical lens 111 is the telecentric mirror head.
The IC chip pin coplane degree measuring system of a kind of higher order reflection and grating image is carried out the method that coplane degree is measured, and comprises step:
Step 1, when the IC chip slides to photoelectric sensor along rail plate, external trigger synchronization control circuit 302 trigger that video cameras and image acquisition catching are afraid of to slide and under 256 grades of gray level images of IC chip pin, as the original deal with data of IC chip pin;
The coarse positioning of step 2, realization IC chip two row's pins;
Step 3, the intercepting area-of-interest, set up two row pins subimage;
Step 4, two number of sub images are carried out medium filtering respectively, eliminate noise signal;
Step 5, two number of sub images are carried out object edge respectively detect, obtain the edge feature signal of grating fringe and pin;
Step 6, adopt average gray as the segmentation threshold split image of image, realize binarization processing of images;
Step 7, each pin is accurately located, set up the subimage of each pin;
Step 8, analyze the subimage of each pin, follow the tracks of the variation of grating fringe, calculate the pixel distance of the maximum distortion of grating fringe on each pin;
Step 9, according to the imaging precision of vision system design, calculate the physical distance of the maximum distortion of grating fringe;
Step 10, the funtcional relationship corresponding with the degreeof tortuosity of grating fringe according to the coplane degree error calculate the coplane degree error e of each pin
i, and add up calculated pin number, the respective function mapping relations are expressed as:
F (Δ H)=max{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) }-min{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) }, wherein: f
iBe the height tolerance of i pin of IC, establish f when being offset under the pin
iFor just, f during skew on the pin
iFor negative, K is the adjustment coefficient of calculated value and actual value,
Be the desired distance of the lower end lower surface of the upper end lower surface of IC pin and IC pin, Δ H is height tolerance, X
iBe the grating fringe degree of crook on i pin of IC, d
iMaximum deflection distance for the grating fringe on i pin of IC, α is the throw light of IC chip pin lower surface and the angle of vertical direction, γ is the incident angle of horizontal throw light on left side first catoptron 103 or right side first catoptron 105, f (Δ H) is coplane degree, and its numerical value is the poor of the maximal value of height tolerance of IC chip pin and minimum value;
Whether step 11, all pin subimages of judging the IC chip are all analyzed and are finished, if execution in step S512 obtains the maximal value e of the coplane degree error of each pin
Max=
Max{ e
1, e
2... e
N*KAnd minimum value e
Min=
Min{ e
1, e
2... e
N*K, if not, then return step 8, finish up to all subimage analyses;
Step 12, judge the maximal value e of measured coplane degree error
MaxWith minimum value e
MinWhether in default coplane degree tolerance bound scope, if it is qualified then to be judged as coplane degree, otherwise, for coplane degree defective.
The present invention measures the otherness that the coplane degree measurement of IC pin is converted into strain line length behind the CCD camera imaging, twists and amplifies by the ultrafine strain line differential image of grating pair pin.By setting up the corresponding f funtcional relationship of coplane degree error and grating fringe degree of crook, realize that IC chip two row's pin coplanarities are in the measurement of same visual field.This method is to analyze the degree of crook of grating fringe by the intelligent vision detection system, and finally calculates corresponding coplane degree error according to the respective function mapping relations of coplane degree error and grating fringe degree of crook, and the respective function mapping relations are expressed as:
F (Δ H)=max{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) }-min{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) }, wherein: f
iBe the height tolerance of i pin of IC, establish f when being offset under the pin
iFor just, f during skew on the pin
iFor negative, K is the adjustment coefficient of calculated value and actual value,
Be the desired distance of the lower end lower surface of the upper end lower surface of IC pin and IC pin, Δ H is height tolerance, X
iBe the grating fringe degree of crook on i pin of IC, d
iBe the maximum deflection distance of the grating fringe on i pin of IC, α is the throw light of IC chip pin lower surface and the angle of vertical direction, and γ is the incident angle of horizontal throw light on left side first catoptron or right side first catoptron.Think height tolerance f
iWith striped degree of crook X
iRelation in direct ratio.The striped degree of crook is more big, and then the coplane degree error is just more big.And striped degree of crook and maximum deflection distance, crooked angle are relevant.The method of Biao Dinging determines that the scale-up factor K in the funtcional relationship expression formula (that is: according to designing requirement, determines by experiment
Obtain the d of striped after the imaging
i, actual measurement obtains throw light angle γ, and contact type measurement obtains f
i, the above-mentioned Function Mapping relational expression of substitution calculating K, and repeatedly measure the mean value of calculating K).F (Δ H) called after coplane degree, its numerical value are the poor of the maximal value of height tolerance of IC chip pin and minimum value.
The present invention with the lower plane of IC chip as plane of orientation.In order to make the IC chip of same model obtain the grating fringe of degree of crook basically identical, the IC chip can not rotate along directions X when imaging, can not rotate along Y-direction, can not move along the Z direction.
The present invention must satisfy following constraint: for the imaging each time of CCD camera, the position of all eyeglasses and angle all are to keep immobilizing, and make light project on the testee IC pin of chip with fixing position and direction.
The IC chip pin imaging optical path system that grating, higher order reflection mirror and prism are formed: the light that light source sends drops on the IC pin of chip, based on the ray cast ratio juris, the lower surface reflected light of IC chip pin is by the higher order reflection of multistage reflective mirror, and the lower surface image of two row pins is observed in the both sides of prism respectively.The CCD camera that is placed on directly over the prism carries out imaging to this.That is: by the imaging optical path of special use, the measurement of IC chip pin coplane degree is converted into the information of length in the image.On the basis of the above, between light source and catoptron, add grating again, obtain the grating fringe image.If the coplanarity of IC pin of chip is good, the coplane degree error is little, the tendency of grating fringe curve is with regard to basically identical, otherwise, if certain pin upwarps or following bending, violent distortion and amplification will take place in corresponding grating fringe, compare with the grating fringe on the adjacent leads, seem particularly outstanding.
The IC chip conduct oneself with dignity mechanical moving device that oblique slip feeding mechanism: IC slides be self gravitation with IC as power source, whole mechanical hook-up is in tilted layout, the IC chip is done rectilinear motion along the inclined-plane from top to bottom along guide rail.Therefore, require the rail plate surfaceness little, the friction force when the IC chip slides just can be little.Because no extra power source, so whole compact mechanical structure does not have power to transmit and the vibration that causes, be conducive to imaging.Particularly when the depth of field of camera lens hour, also can obtain distinct image.
The external trigger synchronization control circuit of photoelectric sensor and composition thereof: the IC chip is done rectilinear motion from top to bottom on slide way inclined.When IC moves to the camera settings field range, after the photoelectric sensor response, give external trigger synchronizing circuit outgoing position induced signal.After this external trigger synchronizing circuit is handled signal, send trigger pip for camera and light source, last, light source is of short duration glittering, the picture frame of camera moment candid photograph simultaneously.This exposal model of stroboscopic at the volley can improve the speed of detection.And solved the problem that led light source is difficult to dispel the heat in narrow space.
Intelligent vision detection system based on PC: grating fringe is able to imaging in the CCD camera plane, intelligent vision detection system based on PC is analyzed the grating fringe image, analyze the maximum deflection distance of grating fringe on each pin, and according to the funtcional relationship of coplane degree error and grating fringe degree of crook, finally try to achieve the coplane degree of IC chip pin.
The characteristics that System and method for of the present invention has the detection method novelty, measures visualize, detection speed is fast, accuracy of detection is high, apparatus structure is compact, equipment manufacturing cost is cheap.Compared with prior art, have following characteristics and effect:
(1) this detection method novelty.This contrive equipment can be converted into intelligent measuring based on machine vision to the measurement of IC pin coplanarity, and the coplanarity of pin is measured the judgement that is mapped as pin grating fringe degreeof tortuosity at image.
(2) detection speed is fast.Because the CCD camera can carry out the while imaging to the light signal of IC chip both sides pin at every turn, only need the Polaroid detection that just can finish entire I C chip, thereby detection speed is fast.
(3) accuracy of detection height.Because grating fringe has amplification to IC chip pin coplanar error, can improve the precision of measurement.
(4) apparatus structure compactness.The mechanical driving device of IC chip be deadweight with IC chip itself as power source, thereby do not need extra propulsion system.Therefore, whole physical construction is compact to design, and volume is little.
(5) equipment cost is low.Owing to adopt one camera imaging optical path system.Therefore, the low cost of manufacture of equipment.
Description of drawings
Fig. 1 is imaging system higher order reflection of the present invention and grating image light path synoptic diagram.
Fig. 2 is system body framework synoptic diagram of the present invention.
Fig. 3 is external trigger synchronization control circuit synoptic diagram of the present invention.
Fig. 4 is image capturing system grating fringe imaging synoptic diagram of the present invention.
Fig. 5 is coplanarity measuring method process flow diagram of the present invention.
Fig. 6 is single IC pin grating fringe projection imaging geometric relationship figure of the present invention.
Shown in the figure be: 100-IC chip pin imaging optical path system, 101-left side blue-ray LED light source, 102-left side transmission grating, 103-left side first catoptron, 104-is every tabula rasa, 105-right side first catoptron, 106-right side transmission grating, 107-right side blue-ray LED light source, 108-right side second catoptron, 109-right side the 3rd catoptron, 110-CCD camera, the 111-optical lens, 112-catoptron 1,113-left side second catoptron, 114-IC chip, 115-Mitsubishi mirror, 201-is based on the intelligent vision measuring system of PC, 202-image pick-up card, 301-photoelectric sensor, 302-external trigger synchronization control circuit, the 303-IC chip oblique slip feeding mechanism of conducting oneself with dignity, the good and bad product classification device of 304-, 401-grating fringe, 601-curved stripes vertical projection plane, the horizontal projection plane of 602-grating fringe.
Embodiment:
In order to understand the present invention better, the invention will be further described below in conjunction with accompanying drawing, but embodiments of the present invention are not limited thereto.
As shown in Figure 2, system body framework of the present invention comprises: the IC chip pin imaging optical path system 100 that multiple reflection mirror, grating and prism constitute, the IC chip oblique slip feeding mechanism 303 of conducting oneself with dignity, the image-generating unit that image pick-up card 202, CCD camera 110 and camera lens 111 constitute, intelligent vision measuring system 201 based on PC, and external trigger synchronization control circuit 302, good and bad product classification device 304.
As shown in Figure 1, special-purpose light path system for the present invention's proposition: IC chip pin imaging optical path system 100, the left side light path of this IC chip pin imaging optical path system 100 comprises: described left side light path comprises left side blue-ray LED light source 101, left side transmission grating 102, left side first catoptron 103, left side second catoptron 113, left side the 3rd catoptron 112, with two base angles be the left-half of isosceles prisms 115 of 45 degree, the light of described left side blue-ray LED light source 101 from left to right parallel penetrated the left side transmission grating 102 after, by vertical with the YZ plane and become left side first catoptron, 103 reflections that (900-γ) angle installs with the XY plane after, the light oblique illumination is at the lower surface of IC chip pin; Left side second catoptron 113 is arranged with miter angle, after diffuse light from the IC chip pin is reflected, directive is spent left side the 3rd catoptron of arranging 112 with 45 vertically upward again, left side the 3rd catoptron 112 reflection rays are after level penetrates from left to right, be radiated at the left side of prism 115, the formed image of light signal is finally observed in the left side of prism 115.
Right side light path and left side light path are separate, do not disturb mutually, form symmetric relation in the position.Its light path member comprises: right side blue-ray LED light source 107, right side transmission grating 106, right side first catoptron 105, right side second catoptron 108, right side the 3rd catoptron 109, two base angles are the right half part of the isosceles prism 115 of 45 degree, the light of described right side blue-ray LED light source 107 is the parallel right side transmission grating 106 of penetrating from right to left, by vertical with the YZ plane and become right side first catoptron, 103 reflections that (900-γ) angle installs with the XY plane after, light vertically is radiated at the lower surface of IC chip pin equably; Right side second catoptron 108 is arranged with 45 angles, after diffuse light from the IC chip pin is reflected, directive is spent right side the 3rd catoptron of arranging 112 with 45 vertically upward again, right side the 3rd catoptron 112 reflection rays are after level penetrates from right to left, be radiated at the right side of prism 115, vertically upward reflex to video camera then.The transmittance process of its light signal and left side light path are identical, and final, light signal formed image in right side is observed on prism 115 right sides.
Above-mentioned all optical modules all are to be starting material with the stainless steel, and all reflectings surface or imaging surface all need to add through the ultraprecise grinding machine, thereby present mirror effect, and firmly are installed in the narrow imaging space.
Detected object IC chip 114 is positioned at the IC chip conducts oneself with dignity on the rail plate of oblique slip feeding mechanism 303, and the below is every tabula rasa 104; Along rail plate oblique sliding from top to bottom, its lower surface is as locating surface and be adjacent to the rail plate upper surface with self gravitation for IC chip 114.The three degree of freedom of rail plate restriction IC chip 114, that is: directions X rotates, Y-direction is rotated and the Z direction moves.As shown in Figure 3, when IC chip 114 moved to photoelectric sensor 301 tops, external trigger synchronization control circuit 302 got access to the rising edge of position signalling.Position signalling sends external trigger for image pick-up card 202 and captures signal through after the respective handling, has realized gathering fast in the motion IC chip pin image.
The blackstreak of each transmission grating is incident upon the lower surface of IC chip pin.The pin lower surface is in the difference of short transverse, can cause that grating fringe after the imaging produces distortion in various degree.As shown in Figure 4, the grating fringe 401 of the part correspondence that the pin height remains unchanged is straight-line segment, and the corresponding grating fringe 401 of the arc transition of pin part is the segment of curve of rounding off.For the less pin of coplane degree error, the maximum deflection of grating fringe distance is almost equal; As shown in Figure 4, the 1st row's the 2nd pin is for upwarping pin, and its coplane degree error is big, and it is less that maximum deflection is compared correct situation apart from d, and the grating fringe 401 crooked crooked just angle of certain θ that forms in a clockwise direction; As shown in Figure 4, the 1st row's the 8th pin is following curved pin, and its coplane degree error is also big, and it is bigger that maximum deflection is compared normal condition apart from d, and grating fringe 401 is with the crooked crooked negative angle of certain θ that forms counterclockwise.Advance rower calmly in measurement, set up the f function corresponding relation of the degreeof tortuosity of coplane degree error and grating fringe 401.But the coplane degree error of pin is tried to achieve in quantitative test in measurement.
As shown in Figure 5, arranging 16 pins with two is example, the higher order reflection that proposes according to the present invention and the IC chip pin coplanarity measuring method of grating image, and the coplane degrees of finishing two row's pins according to the following steps detect, particularly upwarp, descend the detection of curved pin, comprise step:
Step S501, when the IC chip slides to photoelectric sensor along rail plate, the external trigger synchronization control circuit trigger that video camera and image acquisition catching are afraid of to slide and under 256 grades of gray level images of IC chip pin, as the original deal with data of IC chip pin;
The coarse positioning of step S502, realization IC chip two row's pins;
Step S503, the intercepting area-of-interest, set up two row pins subimage;
Step S504, two number of sub images are carried out medium filtering respectively, eliminate noise signal;
Step S505, two number of sub images are carried out object edge respectively detect, obtain the edge feature signal of grating fringe and pin;
Step S506, adopt average gray as the segmentation threshold split image of image, realize binarization processing of images;
Step S507, each pin is accurately located, set up the subimage of each pin;
Step S508, analyze the subimage of each pin, follow the tracks of the variation of grating fringe, calculate the pixel distance of the maximum distortion of grating fringe on each pin;
Step S509, according to the imaging precision of vision system design, calculate the physical distance of the maximum distortion of grating fringe;
Step S510, the funtcional relationship corresponding with the degreeof tortuosity of grating fringe according to the coplane degree error calculate the coplane degree error e i of each pin, and add up calculated pin number, and the respective function mapping relations are expressed as:
F (Δ H)=max{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) }-min{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) } wherein: f
iBe the height tolerance of i pin of IC, establish f when being offset under the pin
iFor just, f during skew on the pin
iFor negative.K is the adjustment coefficient of calculated value and actual value,
Be the desired distance of the lower end lower surface of the upper end lower surface of IC pin and IC pin, Δ H is height tolerance, X
iBe the grating fringe degree of crook on i pin of IC, d
iBe the maximum deflection distance of the grating fringe on i pin of IC, α is the throw light of IC chip pin lower surface and the angle of vertical direction, and γ is the incident angle of horizontal throw light on left side first catoptron 103 or right side first catoptron 105.Think height tolerance f
iWith striped degree of crook X
iRelation in direct ratio.The striped degree of crook is more big, and then the coplane degree error is just more big.And striped degree of crook and maximum deflection distance, crooked angle are relevant.The method of Biao Dinging determines that the scale-up factor K in the funtcional relationship expression formula (that is: according to designing requirement, determines by experiment
Obtain the d of striped after the imaging
i, actual measurement obtains throw light angle γ, and contact type measurement obtains f
iThe above-mentioned Function Mapping relational expression of substitution calculating K, and repeatedly measure the mean value of calculating K), f (Δ H) called after coplane degree, its numerical value is the poor of the maximal value of height tolerance of IC chip pin and minimum value, and the concrete derivation of Function Mapping relation formula as shown in Figure 6.From single IC pin grating fringe projection imaging geometric relationship, linear fringe is to the curved stripes transforming process as can be known.Simultaneously, curved stripes vertical projection plane 601 can image reaction striped bend to because of, the slanted angle of the horizontal projection plane 602 of grating fringe is 90 °-γ, and its size can influence the degree of crook of striped, and wherein N-N ' is the normal of throw light on first catoptron 103 of left side;
Whether step S511, all pin subimages of judging the IC chip are all analyzed and are finished, if execution in step S512 obtains the maximal value e of the coplane degree error of each pin
Max=
Max{ e
1, e
2... e
N*KAnd minimum value e
Min=
Min{ e
1, e
2... e
N*K, if not, then return step 8, finish up to all subimage analyses;
Step S512, judge the maximal value e of measured coplane degree error
MaxWith minimum value e
MinWhether in default coplane degree tolerance bound scope, if it is qualified then to be judged as coplane degree, otherwise, for coplane degree defective.
The coplane degree specification product that distinguish through above-mentioned steps and coplane degree are defective placed apart through good and bad product classification device 304, to satisfy the needs of following process.
The above embodiment of the present invention only is for example of the present invention clearly is described, and is not to be restriction to embodiments of the present invention.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here need not also can't give all embodiments exhaustive.All any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., all should be included within the protection domain of claim of the present invention.
Claims (7)
1. the IC chip pin coplane degree measuring system of higher order reflection and grating image, mainly comprise IC chip conduct oneself with dignity oblique slip feeding mechanism (303), external trigger synchronization control circuit (302), IC chip pin imaging optical path system (100), image pick-up card (202), camera, the intelligent vision detection system (201) based on PC, photoelectric sensor (301), it is characterized in that:
Described IC chip pin imaging optical path system (100) comprises symmetrical left side light path and right side light path, described left side light path comprises left side blue-ray LED light source (101), left side transmission grating (102), left side first catoptron (103), left side second catoptron (113), left side the 3rd catoptron (112), with two base angles be the left-half of isosceles prisms (115) of 45 degree, the light of described left side blue-ray LED light source (101) from left to right parallel penetrated left side transmission grating (102) after, after left side first catoptron (103) reflection, light is radiated at the lower surface of IC chip pin obliquely; Left side second catoptron (113) is arranged with miter angle, after diffuse light from the IC chip pin is reflected, directive is spent left side the 3rd catoptron of arranging (112) with 45 vertically upward again, left side the 3rd catoptron (112) reflection ray is after level penetrates from left to right, be radiated at the left side of prism (115), vertically upward reflex to video camera then;
Described right side light path comprises: right side blue-ray LED light source (107), right side transmission grating (106), right side first catoptron (105), right side second catoptron (108), right side the 3rd catoptron (109), two base angles are the right half part of the isosceles prism (115) of 45 degree, the light of described right side blue-ray LED light source (107) is the parallel right side transmission grating (106) of penetrating from right to left, after right side first catoptron (103) reflection, light is radiated at the lower surface of IC chip pin obliquely; Right side second catoptron (108) is arranged with miter angle, after diffuse light from the IC chip pin is reflected, directive is spent right side the 3rd catoptron of arranging (112) with 45 vertically upward again, right side the 3rd catoptron (112) reflection ray is after level penetrates from right to left, be radiated at the right side of prism (115), vertically upward reflex to video camera then;
Described video camera comprises CCD camera (110) and optical lens (111), be vertically mounted on prism (115) symmetrical center line directly over, this video camera central axis is perpendicular to the conduct oneself with dignity rail plate of oblique slip feeding mechanism (303) and overlap with the central plane of IC chip pin imaging optical path system (100) of IC chip;
Described IC chip conduct oneself with dignity oblique slip feeding mechanism (303 be positioned at prism (115) under and this IC chip conduct oneself with dignity the rail plate center line of oblique slip feeding mechanism (303) perpendicular to the central plane of IC chip pin imaging optical path system (100);
Described photoelectric sensor (301) is vertically mounted on the IC chip and conducts oneself with dignity in the rail plate of oblique slip feeding mechanism (303), be positioned at the left margin place of camera field of view, when IC chip (114) slips over guide rail and passes through IC chip pin imaging optical path system (100), photoelectric sensor (301) outwards triggering synchronous control circuit (302) sends position signalling, this signal after treatment, to image pick-up card (202) and left side blue-ray LED light source (101), right side blue-ray LED light source (107) sends imaging signal, light source is glittering, simultaneous camera moment takes pictures, take a picture is sent to the intelligent vision detection system (201) that has based on PC through figure capture card (202), and described intelligent vision detection system (201) based on PC is used for the photo that obtains is carried out analyzing and processing to obtain IC chip pin coplane degree.
2. the IC chip pin coplane degree measuring system of higher order reflection according to claim 1 and grating image, it is characterized in that: described left side first catoptron (103), left side second catoptron (113), left side the 3rd catoptron (112) and two base angles are that isosceles prism (115), right side first catoptron (105), right side second catoptron (108), right side the 3rd catoptrons (109) of 45 degree are stainless steel, and its reflecting surface or imaging surface all add through the ultraprecise grinding machine and form.
3. the IC chip pin coplane degree measuring system of higher order reflection according to claim 2 and grating image is characterized in that: be provided with between described left side light path and the right side light path prevent that light signal from interfering with each other every tabula rasa (104).
4. the IC chip pin coplane degree measuring system of higher order reflection according to claim 3 and grating image, it is characterized in that: described optical lens (111) is the telecentric mirror head.
5. one kind is adopted the IC chip pin coplane degree measuring system of the described higher order reflection of claim 1-4 and grating image to carry out the method that coplane degree is measured, and comprises step:
Step 1, when the IC chip slides to photoelectric sensor along rail plate, external trigger synchronization control circuit 302 trigger that video cameras and image acquisition catching are afraid of to slide and under 256 grades of gray level images of IC chip pin, as the original deal with data of IC chip pin;
The coarse positioning of step 2, realization IC chip two row's pins;
Step 3, the intercepting area-of-interest, set up two row pins subimage;
Step 4, two number of sub images are carried out medium filtering respectively, eliminate noise signal;
Step 5, two number of sub images are carried out object edge respectively detect, obtain the edge feature signal of grating fringe and pin;
Step 6, adopt average gray as the segmentation threshold split image of image, realize binarization processing of images;
Step 7, each pin is accurately located, set up the subimage of each pin;
Step 8, analyze the subimage of each pin, follow the tracks of the variation of grating fringe, calculate the pixel distance of the maximum distortion of grating fringe on each pin;
Step 9, according to the imaging precision of vision system design, calculate the physical distance of the maximum distortion of grating fringe;
Step 10, the funtcional relationship corresponding with the degreeof tortuosity of grating fringe according to the coplane degree error calculate the coplane degree error e i of each pin, and add up calculated pin number, and the respective function mapping relations are expressed as:
F (Δ H)=max{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) }-min{f
1(Δ H), f
2(Δ H) ..., f
N(Δ H) }, wherein: f
iBe the height tolerance of i pin of IC, establish f when being offset under the pin
iFor just, f during skew on the pin
iFor negative, K is the adjustment coefficient of calculated value and actual value,
Be the desired distance of the lower end lower surface of the upper end lower surface of IC pin and IC pin, Δ H is height tolerance, X
iBe the grating fringe degree of crook on i pin of IC, d
iMaximum deflection distance for the grating fringe on i pin of IC, α is the throw light of IC chip pin lower surface and the angle of vertical direction, γ is the incident angle of horizontal throw light on catoptron 3 or catoptron 4, f (Δ H) is coplane degree, and its numerical value is the poor of the maximal value of height tolerance of IC chip pin and minimum value;
Whether step 11, all pin subimages of judging the IC chip are all analyzed and are finished, if execution in step S512 obtains the maximal value e of the coplane degree error of each pin
Max=
Max{ e
1, e
2... e
N*KAnd minimum value e
Min=
Min{ e
1, e
2... e
N*K, if not, then return step 8, finish up to all subimage analyses;
Step 12, judge the maximal value e of measured coplane degree error
MaxWith minimum value e
MinWhether in default coplane degree tolerance bound scope, if it is qualified then to be judged as coplane degree, otherwise, for coplane degree defective.
6. the IC chip pin coplanarity measuring method of higher order reflection according to claim 5 and grating image, it is characterized in that: described video camera is when grabbing fearness IC pin of chip gray level image, be adjacent to the lower surface of rail plate as locating surface with the IC chip, the rotation of described rail plate restriction IC chip directions X, the rotation of Y-direction, the movement of Z direction.
7. the IC chip pin coplanarity measuring method of higher order reflection according to claim 6 and grating image, it is characterized in that: described pin comprises and upwarps pin, normal pin and curved pin down, through behind the grating image, the grating fringe that upwarps on the pin twists along clockwise direction, and in vertical direction with certain positive angle; Grating fringe on the curved pin twists in the counterclockwise direction down, and in vertical direction with certain negative angle; Grating fringe on the normal pin and the angle of vertical direction are zero, and, upwarp grating fringe maximum deflection distance on the pin less than the grating fringe maximum deflection distance of normal pin, the grating fringe maximum deflection distance on the described curved pin down is greater than the grating fringe maximum deflection distance of normal pin.
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