CN103199071A - Stacking type packaging structure and manufacturing method thereof - Google Patents

Stacking type packaging structure and manufacturing method thereof Download PDF

Info

Publication number
CN103199071A
CN103199071A CN2013101092010A CN201310109201A CN103199071A CN 103199071 A CN103199071 A CN 103199071A CN 2013101092010 A CN2013101092010 A CN 2013101092010A CN 201310109201 A CN201310109201 A CN 201310109201A CN 103199071 A CN103199071 A CN 103199071A
Authority
CN
China
Prior art keywords
crystal grain
line layer
circuits
those
stacking type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2013101092010A
Other languages
Chinese (zh)
Inventor
洪嘉临
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Semiconductor Engineering Inc
Original Assignee
Advanced Semiconductor Engineering Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Engineering Inc filed Critical Advanced Semiconductor Engineering Inc
Priority to CN2013101092010A priority Critical patent/CN103199071A/en
Publication of CN103199071A publication Critical patent/CN103199071A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Abstract

The invention discloses a stacking type packaging structure and a manufacturing method of the stacking type packaging structure. The manufacturing method of the stacking type packaging structure comprises the following steps: a first crystalline grain and a second crystalline grain are provided, the first crystalline grain and the second crystalline grain are respectively provided with a first surface, a second surface and an edge surface, each first surface is opposite to each second surface, and each edge surface is arranged between each first surface and each second surface; a plurality of electric conduction connection elements are formed on the first surface, the second surface and the edge surface of the first crystalline grain; each electric conduction connection element comprises a solder part; and the solder parts are in physical connection and are in electric connection with the elements on the first surface of the second crystalline grain.

Description

Stacking type encapsulating structure and manufacture method thereof
Technical field
The invention relates to a kind of stacking type encapsulating structure and manufacture method thereof.
Background technology
In information society now, the user pursues high-speed, high-quality, polyfunctional electronic product.With regard to product appearance, the design of electronic product is to stride forward towards light, thin, short, little trend.In order to achieve the above object, many companies all incorporate systematized concept when carrying out circuit design, make single chips to possess to have multiple function, are configured in core number in the electronic product with saving.In addition, with regard to the Electronic Packaging technology, such as multi-chip module (multi-chip module in order to cooperate light, thin, short, little designer trends, also to develop; MCM) package design concept, chip size structure dress (chip scale package; The concept of the package design of package design concept CSP) and chip stacking type encapsulating structure etc.
The stacking type encapsulating structure generally refers to a crystal grain is disposed on another crystal grain, its basic purpose is that will to increase density bigger functional to produce in the per unit space, and better regional usefulness, therefore can reduce the gross area of whole stacking type encapsulating structure, also reduce its cost simultaneously.
General crystal grain apparent surface's contact is to reach via silicon perforation structure (through silicon via).Yet, the manufacture method complexity of silicon perforation structure and cost height, and its formation also allows crystal grain be subjected to extra strength and cause damage easily, therefore reduces the yield of crystal grain.
Summary of the invention
The present invention is relevant for a kind of stacking type encapsulating structure and manufacture method thereof.Manufacture method is simple, cost is low.
According to a scheme of the present invention, a kind of stacking type encapsulating structure is proposed, comprise one first crystal grain, one second crystal grain, one first line layer, one second line layer, a tertiary circuit layer and several conduction Connection Elements.First crystal grain and second crystal grain respectively have a first surface, a second surface and surface, an edge, and first surface is with respect to second surface, and edge surface is between first surface and second surface.The second surface of first crystal grain is in the face of the first surface of second crystal grain.First line layer comprises a plurality of circuits, is positioned at the first surface of first crystal grain.Second line layer comprises a plurality of circuits, is positioned at the second surface of first crystal grain.At least one is via at least one electrically connect in the circuit of the edge surface of first crystal grain and second line layer in the circuit of first line layer.The tertiary circuit layer comprises a plurality of circuits, is positioned at the first surface of second crystal grain.The conduction Connection Element comprises conductive part and/or solder portion.Conduction Connection Element physical connection also is electrically connected at second line layer on first crystal grain and the tertiary circuit layer on second crystal grain.
According to another aspect of the present invention, propose a kind of stacking type encapsulating structure, comprise one first crystal grain, one second crystal grain, one first line layer, one second line layer, a tertiary circuit layer, one the 4th line layer and several conduction Connection Elements.First crystal grain and second crystal grain respectively have a first surface, a second surface and surface, an edge, and first surface is with respect to second surface, and edge surface is between first surface and second surface.The second surface of first crystal grain is in the face of the first surface of second crystal grain.First line layer comprises a plurality of circuits, is positioned at the first surface of first crystal grain.Second line layer comprises a plurality of circuits, is positioned at the second surface of first crystal grain.At least one is via at least one electrically connect in the circuit of the edge surface of first crystal grain and second line layer in the circuit of first line layer.The tertiary circuit layer comprises a plurality of circuits, is positioned at the first surface of second crystal grain.The 4th line layer comprises a plurality of circuits, is positioned at the second surface of second crystal grain.At least one is via the edge surface of second crystal grain and at least one electrically connect of circuit of the 4th line layer in the circuit of tertiary circuit layer.The conduction Connection Element comprises conductive part and/or solder portion.Conduction Connection Element physical connection also is electrically connected at second line layer on first crystal grain and the tertiary circuit layer on second crystal grain.
According to of the present invention one scheme in addition, a kind of manufacture method of stacking type encapsulating structure is proposed, may further comprise the steps.First crystal grain and second crystal grain are provided.First crystal grain and second crystal grain respectively have a first surface, a second surface and surface, an edge, and first surface is with respect to second surface, and edge surface is between first surface and second surface.Form several conduction Connection Elements on first surface, second surface and the edge surface of first crystal grain.The conduction Connection Element comprises solder portion.Make the solder portion physical connection and be electrically connected at element on the first surface of second crystal grain.
According to another program again of the present invention, a kind of stacking type encapsulating structure is proposed, comprise one first crystal grain, one second crystal grain, one first line layer, one second line layer, a tertiary circuit layer, with several conductive bumps connectors.First crystal grain and second crystal grain respectively have a first surface, a second surface and surface, an edge, and first surface is with respect to second surface, and edge surface is between first surface and second surface.The first surface of first crystal grain is the second surface towards second crystal grain.First line layer comprises a plurality of circuits, is positioned at the first surface of first crystal grain.Second line layer comprises a plurality of circuits, is positioned at the second surface of first crystal grain.At least one of the circuit of first line layer is via at least one electrically connect of the circuit of the edge surface of first crystal grain and second line layer.The tertiary circuit layer comprises a plurality of circuits, is positioned at the first surface of second crystal grain.The conductive bumps connector comprises conductive part and solder portion, and physical connection also electrically connects second line layer on first crystal grain and the tertiary circuit layer on second crystal grain.
According to another program more of the present invention, a kind of manufacture method of stacking type encapsulating structure is proposed, may further comprise the steps.First crystal grain and second crystal grain are provided.First crystal grain and second crystal grain respectively have a first surface, a second surface and surface, an edge, and first surface is with respect to second surface, and edge surface is between first surface and second surface.Form several conductive bumps connectors on the first surface of first crystal grain.Make conductive bumps connector physical connection and be electrically connected at element on the second surface of second crystal grain.
For there is better understanding above-mentioned and other aspect of the present invention, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below:
Description of drawings
Fig. 1 illustrates the semiconductor structure unit according to stacking type encapsulating structure among the embodiment.
Fig. 2 illustrates the vertical view according to the semiconductor structure unit of stacking type encapsulating structure among the embodiment.
Fig. 3 illustrates according to the stacking type encapsulating structure among the embodiment.
Fig. 4 illustrates according to the stacking type encapsulating structure among the embodiment.
Fig. 5 illustrates according to the stacking type encapsulating structure among the embodiment.
Fig. 6 illustrates according to the stacking type encapsulating structure among the embodiment
Fig. 7 A Fig. 7 A to Fig. 7 M illustrates the manufacture method according to the semiconductor structure unit of an embodiment.
Fig. 8 illustrates the semiconductor structure unit according to stacking type encapsulating structure among the embodiment.
Fig. 9 illustrates according to the stacking type encapsulating structure among the embodiment.
Figure 10 illustrates according to the stacking type encapsulating structure among the embodiment.
Figure 11 A to Figure 11 H illustrates the manufacture method according to the semiconductor structure unit of an embodiment.
Symbol description:
102,102A, 102B, 102C, 102D, 102E, 202A, 202C, 202D, 302,302A, 302B, 302C, 302D, 302E, 302F, 302G: semiconductor structure unit;
104,104A, 104B, 104C, 104D, 104E, 104F: crystal grain;
106,108,138,146: the surface;
110: edge surface;
112: active layers;
114: seal ring;
116,116A: line layer;
118,118A, 118B, 128,128A, 128B, 228A, 228C, 228D: conduction Connection Element;
120,122,124: part;
126: contact structures;
130,330: the conductive bumps connector;
132: metal cartridge;
332: conductive part
134: solder ball;
334: solder portion
136: wafer;
116,117: line layer;
142,162: glue-line;
144,164: carrier;
148,156,166: photoresistance;
150: the space;
152,158,168: opening;
160,170,172: solder material;
174: steel ring;
176: adhesive tape;
H1, H2, H3, H4, H5, H6, H7: highly;
W1, W2, W3: thickness.
Embodiment
Fig. 1 illustrates the semiconductor structure unit 102 according to stacking type encapsulating structure among the embodiment.One crystal grain 104 has 106 and one surface 108, a relative surface, and between surface 106 and surperficial 108 surface, an edge 110.One active layers 112 and a seal ring 114 are to be configured on the surface 106 of crystal grain 104.
Line layer 116 comprises most circuits, and is configured on the surface 106 of crystal grain 104.Line layer 117 comprises most circuits, and is configured on the surface 108 of crystal grain 104.At least one circuit of line layer 116 can be via the edge surface 110 of crystal grain 104 and at least one electrically connect of line layer 117, therefore can not need manufacturing cost silicon perforation structure (the through silicon via more expensive than line layer 116 and line layer 117; TSV), in other words, the low cost of manufacture of semiconductor structure unit 102.In an embodiment, for instance, the height H 1 of 117 parts on the edge surface 110 of crystal grain 104 of line layer 116 or line layer is 5 μ m~50 μ m.Line layer 116 and/or line layer 117 can comprise re-wiring layer (Re-Distribution Layer; RDL).
Several conduction Connection Elements 118 respectively comprise part 120,122,124, line layer 116 and line layer 117 on physical connection and the surface 106, surface 108 that are electrically connected at crystal grain 104 and the edge surface 110.In an embodiment, conduction Connection Element 118 comprises solder portion, and therefore, in other words, part 120,122,124 is the scolder part.In other embodiment, conduction Connection Element 118 comprises conductive part, and material is copper or gold, and therefore, in other words, part 120,122,124 is current-carrying part.In an embodiment, for instance, the width W 1 of part 120 is 10 μ m~100 μ m.The height H 2 of part 120 is 10 μ m~100 μ m.The width W 2 of part 122 is 10 μ m~100 μ m.The height H 3 of part 122 is 10 μ m~100 μ m.The height H 4 of part 124 is 5 μ m~50 μ m.
Fig. 2 illustrates the vertical view according to the semiconductor structure unit 102 of stacking type encapsulating structure among the embodiment.For instance, the line layer 116 of position on the surface 106 of crystal grain 104 is re-wiring layers, and the lead of its fan-out (fan-out) form is to be connected with conduction Connection Element 118 and contact structures 126.Contact structures 126 can comprise the contact mat that is formed by electric conducting material or comprise solder ball or the conductive bumps connector of metal cartridge.In an embodiment, position line layer 117 on the surface 108 of crystal grain 104 also is the re-wiring layer (not illustrating) that comprises the lead of fan-out form.Can reach the pin (high pin) of high number via the re-wiring layer of the lead of fan-out form.
Fig. 3 illustrates according to the stacking type encapsulating structure among the embodiment.Semiconductor structure unit 102A stacks with semiconductor structure unit 102B.Semiconductor structure unit 102A is similar in appearance to the semiconductor structure unit 102 of Fig. 1.Semiconductor structure unit 102B is that compared to the difference of the semiconductor structure unit 102 of Fig. 1 semiconductor structure unit 102B has omitted the line layer 117 of Fig. 1; Line layer 116 has only the part of position on the surface 106 of crystal grain 104; Conduction Connection Element 118B has only the part of position on the surface 106 of crystal grain 104.
Please refer to Fig. 3, semiconductor structure unit 102A and semiconductor structure unit 102B are via conduction Connection Element 118A and the mutual physical connection of 118B and electrically connect.Be all solder portion according to conduction Connection Element 118A among the embodiment and conduction Connection Element 118B, can carry out the reflow step and merge conduction Connection Element 118A and conduction Connection Element 118B.Because conduction Connection Element 118A and conduction Connection Element 118B fusion in the reflow step, even so evenness inequality of semiconductor structure unit 102A and semiconductor structure unit 102B, also can reach connected to each other via the conduction Connection Element 118A with melting characteristic and conduction Connection Element 118B easily, and before carrying out the reflow step, do not need to apply the extra force that may cause semiconductor structure unit 102A and semiconductor structure unit 102B to damage and force conduction Connection Element 118A to touch conduction Connection Element 118B.In addition, conduction Connection Element 118A is big with the size of conduction Connection Element 118B, therefore can accept process shifts in a big way, and contraposition stacks semiconductor structure unit 102A and the semiconductor structure unit 102B of arrangement easily.According to above-mentioned, the manufacture method of stacking type encapsulating structure is simple, cost is low, process flexibility and production capacity height, and repeatedly the formula encapsulating structure can have high yield.The structure of semiconductor structure unit 102B is not limited to use in the situation of having only two semiconductor structure unit, also can be applied in the stacking type encapsulating structure of other more (more than three) semiconductor structure unit, configuration is as lowermost semiconductor structure unit.
The difference of the stacking type encapsulating structure of Fig. 4 and the stacking type encapsulating structure of Fig. 3 is, the position below its conduction Connection Element of semiconductor structure unit 202A 228A comprise conductive part, material is for example copper or gold of metal. Semiconductor structure unit 102A, 202A are via the mutual physical connection of conduction Connection Element 118A (solder portion) and conduction Connection Element 228A (conductive part, metal be copper or gold for example) and electrically connect.Because therefore conduction Connection Element 118A fusion can link conduction Connection Element 228A (conductive part) easily in the reflow step.Before carrying out the reflow step, do not need to apply the extra force that may cause damage.In addition, conduction Connection Element 118A is big with the size of conduction Connection Element 228A, therefore can accept process shifts in a big way.According to above-mentioned, the manufacture method of stacking type encapsulating structure is simple, cost is low, process flexibility and production capacity height, and repeatedly the formula encapsulating structure can have high yield.
Fig. 5 illustrates according to the stacking type encapsulating structure among the embodiment.The semiconductor structure unit 102C, the 102D that have semiconductor structure unit 102A, the 102B of conduction Connection Element 118A, 118B and have conduction Connection Element 128A, a 128B alternately stack.In this embodiment, conduction Connection Element 118A, 118B, 128A, 128B comprise solder portion.In other words, semiconductor structure unit 102A, 102B, 102C, 102D can be similar to semiconductor structure unit 102 shown in Figure 1.
Please refer to Fig. 5, semiconductor structure unit 102A, 102B, 102C, 102D are via conduction Connection Element 118A, 118B and conduction Connection Element 128A, the mutual physical connection of 128B and electrically connect.Be all solder portion according to conduction Connection Element 118A, 118B and conduction Connection Element 128A, 128B among the embodiment, can carry out the reflow step and merge conduction Connection Element 118A, 118B and conduction Connection Element 128A, 128B.Because conduction Connection Element 118A in the reflow step, 118B and conduction Connection Element 128A, the 128B fusion, even so semiconductor structure unit 102A, 102B, 102C, the evenness inequality of 102D, also can be easily via the conduction Connection Element 118A with melting characteristic, 118B and conduction Connection Element 128A, it is connected to each other that 128B reaches, and before carrying out the reflow step, do not need to apply and may cause semiconductor structure unit 102A, 102B, 102C, the extra force that 102D damages is forced conduction Connection Element 118A, 118B touches conduction Connection Element 128A, 128B.In addition, conduction Connection Element 118A, 118B are big with the size of conduction Connection Element 128A, 128B, so can accept process shifts in a big way, and contraposition stacks semiconductor structure unit 102A, 102B, 102C, the 102D of arrangement easily.According to above-mentioned, the manufacture method of stacking type encapsulating structure is simple, cost is low, process flexibility and production capacity height, and repeatedly the formula encapsulating structure can have high yield.Conducting electricity one of Connection Element 128A, 128B according to conduction Connection Element 118A, 118B among another embodiment with another is solder portion, another is conductive part, conductive part has higher conductance, so can improve the signal efficiency of transmission, and preferable support (standoff) effect can be provided.
The difference of the stacking type encapsulating structure of Fig. 6 and the stacking type encapsulating structure of Fig. 5 is that conduction Connection Element 228C, the 228D of semiconductor structure unit 202C, 202D comprise conductive part, and material is for example copper or gold of metal.Semiconductor structure unit 102A, 102B, 202C, 202D also electrically connect with conduction Connection Element 228C, the mutual physical connection of 228D (conductive part, metal be copper or gold for example) via conduction Connection Element 118A, 118B (solder portion).Can carry out the reflow step comes fusion conduction Connection Element 118A, 118B (solder portion) to connect conduction Connection Element 228C, 228D (conductive part).Because conduction Connection Element 118A, 118B fusion in the reflow step, even the therefore evenness inequality of semiconductor structure unit 102A, 102B, 202C, 202D, also can melt to conduction Connection Element 228C, 228D (conductive part) via conduction Connection Element 118A, 118B (solder portion) easily and reach connected to each other, and before carrying out the reflow step, do not need to apply the extra force that may cause semiconductor structure unit 102A, 102B, 202C, 202D to damage and force conduction Connection Element 118A, 118B to touch conduction Connection Element 228C, 228D.In addition, conduction Connection Element 118A, 118B are big with the size of conduction Connection Element 228C, 228D, so can accept process shifts in a big way, and contraposition stacks semiconductor structure unit 102A, 102B, 202C, the 202D of arrangement easily.According to above-mentioned, the manufacture method of stacking type encapsulating structure is simple, cost is low, process flexibility and production capacity height, and repeatedly the formula encapsulating structure can have high yield.
Fig. 7 A Fig. 7 A to Fig. 7 M illustrates the manufacture method according to the semiconductor structure unit of an embodiment.
Please refer to Fig. 7 A, a wafer 136 is provided.Wafer 136 can comprise silicon.Configurable seal ring 114 is on the surface 138 of wafer 136.Configurable active layers 112 is on the surface 138 of wafer 136.Surface 138 at wafer 136 forms line layer 116, for example comprises the re-wiring layer of a plurality of circuits.
Please refer to Fig. 7 B, utilize a glue-line 142 that wafer 136 is pasted to a carrier 144, wherein the surface 138 of wafer 136 is towards carrier 144.
Please refer to Fig. 7 C, from the surface 146 thinning wafers 136 of wafer 136.In addition, cutting crystal wafer 136 is to form several crystal grain 104A, 104B.The line layer of wherein staying on each crystal grain 104A, 104B 116 is that the position is on the surface 106 of crystal grain 104A, 104B.
Please refer to Fig. 7 D, coating photoresistance 148 is on the surface 108 of crystal grain 104A, 104B, and the space 150 between the edge surface 110 of filling crystal grain 104A, 104B.
Please refer to Fig. 7 E, with photoresistance 148 patternings, expose the edge surface 110 of crystal grain 104A, 104B and the opening 152 of part surface 108 with formation.
Please refer to Fig. 7 F, form line layer 117 on the edge surface 110 of crystal grain 104A, 104B that the opening 152 of photoresistance 148 exposes and surface 108.Line layer 117 comprises the re-wiring layer of a plurality of circuits.Line layer 116 is mutual electric connections with line layer 117.In an embodiment, for instance, crystal grain 104 facing surfaces 106 can electrically connect via line layer 116 and line layer 117 with contact point (not shown) on the surface 108, therefore can not need manufacturing cost silicon perforation structure (the through silicon via more expensive than line layer 116 and line layer 117; TSV), in other words, the low cost of manufacture of semiconductor structure unit.Remove photoresistance 148 then.
Please refer to Fig. 7 G, form photoresistance 156 on the surface 108 of crystal grain 104A, 104B, and fill the space 150 between crystal grain 104A, the 104B.
Please refer to Fig. 7 H, with photoresistance 156 patternings, expose the opening 158 in the space 150 between crystal grain 104A, the 104B with formation.In other words, the opening 158 of photoresistance 156 be expose 117 of line layers on the edge surface 110 with the surface 108 that is adjacent to edge surface 110 on part.
Please refer to Fig. 7 I, in an embodiment, the opening 158 with a solder material 160 filling photoresistances 156 in another embodiment, forms a conductive part with plating mode, for example electro-coppering or electrogilding.Remove photoresistance 156 then.
Please refer to Fig. 7 J, utilize a glue-line 162 that crystal grain 104A, 104B are pasted to a carrier 164, wherein the surface 108 of crystal grain 104A, 104B is towards carrier 164.In addition, glue-line 142 and carrier 144 are moved apart crystal grain 104A, 104B.Form photoresistance 166 on the surface 106 of crystal grain 104A, 104B, and patterning photoresistance 166 to be forming opening 168, it exposes the part of solder material 160 and the edge surface 110 of line layer 116 adjacent grain 104A, 104B.
Please refer to Fig. 7 K, fill the opening 168 of photoresistance 166 with a solder material 170.Remove photoresistance 166 then.Solder material 160 is to form solder material 172 with solder material 170.
Please refer to Fig. 7 L, structure is transferred to adhesive tape 176 on the steel ring 174 from the glue-line 162 on the carrier 164.
Please refer to Fig. 7 M, cutting solder material 172 is to separate crystal grain 104A, 104B.Wherein the solder material 172 after the cutting of physical connection line layer 116 and line layer 117 is to form conduction Connection Element 118 (solder portion).In other embodiments, solder material 172 be by metal for example copper or gold institute is replaced, in other words, the Connection Element 118 (conductive part) that conducts electricity can be that copper or golden conduction Connection Element are replaced by material.
Fig. 8 illustrates the semiconductor structure unit 302 according to stacking type encapsulating structure among the embodiment.The semiconductor structure unit 302 of Fig. 8 is with the difference of the semiconductor structure unit 102 of Fig. 1, has omitted the conduction Connection Element 118 of Fig. 1.In addition, conductive bumps connector 330 is the line layers 116 that are configured on the surface 106 of crystal grain 104, and electrically connects line layer 116.Conductive bumps connector 330 can comprise conductive part 332 and the solder portion 334 that is configured on the conductive part.Conductive part 332 can comprise metal cartridge.The material of conductive part 332 can comprise metal, for example copper or gold.Solder portion 334 can comprise solder ball.In an embodiment, for instance, the height H 5 of conductive part 332 is 3 μ m~100 μ m.The width W 3 of conductive part 332 is 10 μ m~100 μ m.The height H 6 of solder portion 334 is 3 μ m~50 μ m.
Please refer to Fig. 8, in an embodiment, for instance, crystal grain 104 facing surfaces 106 can be via line layer 116 and line layer 117 electric connections with the contact point (not shown) on the surface 108, therefore can not need the manufacturing cost silicon perforation structure more expensive than line layer 116 and line layer 117, in other words, the low cost of manufacture of semiconductor structure unit 302.In an embodiment, for instance, the height H 7 of line layer 116 or line layer 117 part on the edge surface 110 of crystal grain 104 is 5 μ m~50 μ m.Line layer 116 can comprise re-wiring layer with line layer 117.
Fig. 9 illustrates according to the stacking type encapsulating structure among the embodiment.Semiconductor structure unit 302A stacks with semiconductor structure unit 302B.Semiconductor structure unit 302A is similar in appearance to the semiconductor structure unit 302 of Fig. 8.Semiconductor structure unit 302B is that compared to the difference of the semiconductor structure unit 302 of Fig. 8 semiconductor structure unit 302B has omitted the line layer 117 of Fig. 8, and line layer 116 part on the surface 106 of crystal grain 104B only.
Please refer to Fig. 9, the solder portion 334 of the conductive bumps connector 330 on the surface 106 of the crystal grain 104 of semiconductor structure unit 302B is the line layers 117 on the surface 108 of physical connection and the crystal grain 104 that is wired to semiconductor structure unit 302A, reaches physical connection and electric connection between semiconductor structure unit 302A, the 302B by this.Can carry out the reflow step comes fusion welding portion 334 to connect conductive part 332 and line layer 117.Because solder portion 334 fusions in the reflow step, even so evenness inequality of semiconductor structure unit 302A, 302B, also can melt to line layer 117 via solder portion 334 easily and reach connected to each other, and before carrying out the reflow step, do not need to apply the extra force that may cause semiconductor structure unit 302A, 302B to damage and force solder portion 334 to touch line layer 117.According to above-mentioned, the manufacture method of stacking type encapsulating structure is simple, cost is low, process flexibility and production capacity height, and repeatedly the formula encapsulating structure can have high yield.The structure of semiconductor structure unit 302B is not limited to use in the situation of having only two semiconductor structure unit, also can be applied in the stacking type encapsulating structure of other more (more than three) semiconductor structure unit, configuration is as lowermost semiconductor structure unit.
Figure 10 illustrates according to the stacking type encapsulating structure among the embodiment.For instance, the solder portion 334 of the conductive bumps connector 330 on the surface 106 of crystal grain 104C, 104D, 104E is the line layers 117 on physical connection and the surface 108 that is wired to crystal grain 104D, 104E, 104F, reaches physical connection and electric connection between semiconductor structure unit 302C, 302D, 302E, the 302F by this.Can carry out the reflow step comes fusion welding portion 334 with the line layer 117 on the surface 108 that connects conductive part 332 and crystal grain 104D, 104E, 104F.Because solder portion 334 fusions in the reflow step, even the therefore evenness inequality of semiconductor structure unit 302C, 302D, 302E, 302F, also can melt to line layer 117 via solder portion 334 easily and reach connected to each other, and before carrying out the reflow step, do not need to apply the extra force that may cause semiconductor structure unit 302C, 302D, 302E, 302F to damage and force solder portion 334 to touch line layer 117.According to above-mentioned, the manufacture method of stacking type encapsulating structure is simple, cost is low, process flexibility and production capacity height, and repeatedly the formula encapsulating structure can have high yield.
Figure 11 A to Figure 11 H illustrates the manufacture method according to the semiconductor structure unit of an embodiment.
Please refer to Figure 11 A, a wafer 136 is provided.Configurable seal ring 114 is on the surface 138 of wafer 136.Configurable active layers 112 is on the surface 138 of wafer 136.Surface 138 at wafer 136 forms line layer 116, for example comprises the re-wiring layer of a plurality of circuits.
Please refer to Figure 11 B, form several conductive parts 332 on line layer 116.Wherein conductive part 332 is to be electrically connected to line layer 116.Form several solder portion 334 on conductive part 332.Solder portion 334 is to form conductive bumps connector 330 with conductive part 332.
Please refer to Figure 11 C, utilize a glue-line 142 that wafer 136 is pasted to a carrier 144, wherein the surface 138 of wafer 136 is towards carrier 144.
Please refer to Figure 11 D, from the surface 146 thinning wafers 136 of wafer 136.In addition, cutting crystal wafer 136 is to form several crystal grain 104C, 104D.The line layer of wherein staying on each crystal grain 104C, 104D 116 is that the position is on the surface 106 of crystal grain 104C, 104D.
Please refer to Figure 11 E, coating photoresistance 148 is on the surface 108 of crystal grain 104C, 104D, and the space 150 between the edge surface 110 of filling crystal grain 104C, 104D.
Please refer to Figure 11 F, with photoresistance 148 patternings, expose the edge surface 110 of crystal grain 104C, 104D and the opening 152 of part surface 108 with formation.
Please refer to Figure 11 G, form line layer 117 on the edge surface 110 of crystal grain 104C, 104D that the opening 152 of photoresistance 148 exposes and surface 108.Line layer 117 for example comprises the re-wiring layer of a plurality of circuits.Line layer 116 is mutual electric connections with line layer 117.In an embodiment, for instance, crystal grain 104 facing surfaces 106 can electrically connect via line layer 116 and line layer 117 with contact point (not shown) on the surface 108, therefore can not need manufacturing cost silicon perforation structure (the through silicon via more expensive than line layer 116 and line layer 117; TSV), in other words, the low cost of manufacture of semiconductor structure unit.Remove photoresistance 148 then.
Please refer to Figure 11 H, structure is transferred to adhesive tape 176 on the steel ring 174 from the glue-line 142 on the carrier 144.
In sum, though the present invention discloses as above with preferred embodiment, so it is not in order to limit the present invention.The persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is as the criterion when looking claims person of defining.

Claims (14)

1. a stacking type encapsulating structure is characterized in that, comprising:
One first crystal grain;
One second crystal grain, wherein this first crystal grain and this second crystal grain respectively have a first surface, a second surface and surface, an edge, this first surface is with respect to this second surface, this edge surface is between this first surface and this second surface, and wherein this second surface of this first crystal grain is in the face of this first surface of this second crystal grain;
One first line layer comprises a plurality of circuits, is positioned at this first surface of this first crystal grain;
One second line layer comprises a plurality of circuits, is positioned at this second surface of this first crystal grain, wherein in those circuits of this first line layer at least one via at least one electrically connect in those circuits of this edge surface of this first crystal grain and this second line layer;
One tertiary circuit layer comprises a plurality of circuits, is positioned at this first surface of this second crystal grain, and wherein said tertiary circuit aspect is to described second line layer; And
Several conduct electricity Connection Element, comprise conductive part and/or solder portion, and those conduction Connection Element physical connections also are electrically connected at this second line layer on this first crystal grain and this tertiary circuit layer on this second crystal grain.
2. stacking type encapsulating structure as claimed in claim 1 is characterized in that, the material of this conductive part is copper or gold.
3. stacking type encapsulating structure as claimed in claim 1 is characterized in that, this solder portion comprises:
One first scolder part is configured on this first line layer on this first crystal grain;
One second scolder part is configured between this second line layer and this tertiary circuit layer on this second crystal grain on this first crystal grain, and electrically connect and physics link this second line layer and this tertiary circuit layer; And
One the 3rd scolder part is configured on this edge surface of this first crystal grain, this second crystal grain or this two crystal grain.
4. stacking type encapsulating structure as claimed in claim 3 is characterized in that, more comprises on this first line layer:
One metal cartridge, wherein the surface of this metal cartridge comprises the first scolder part.
5. a stacking type encapsulating structure is characterized in that, comprising:
One first crystal grain;
One second crystal grain, wherein this first crystal grain and this second crystal grain respectively have a first surface, a second surface and surface, an edge, this first surface is with respect to this second surface, this edge surface is between this first surface and this second surface, and wherein this second surface of this first crystal grain is in the face of this first surface of this second crystal grain;
One first line layer comprises a plurality of circuits, is positioned at this first surface of this first crystal grain;
One second line layer comprises a plurality of circuits, is positioned at this second surface of this first crystal grain, wherein in those circuits of this first line layer at least one via at least one electrically connect in those circuits of this edge surface of this first crystal grain and this second line layer;
One tertiary circuit layer comprises a plurality of circuits, is positioned at this first surface of this second crystal grain;
One the 4th line layer comprises a plurality of circuits, is positioned at this second surface of this second crystal grain, wherein in those circuits of this tertiary circuit layer at least one via this edge surface of this second crystal grain and at least one electrically connect of those circuits of the 4th line layer; And
Several conduct electricity Connection Element, comprise conductive part and/or solder portion, and those conduction Connection Element physical connections also are electrically connected at this second line layer on this first crystal grain and this tertiary circuit layer on this second crystal grain.
6. the manufacture method of a stacking type encapsulating structure is characterized in that, comprising:
First crystal grain and second crystal grain are provided, wherein this first crystal grain and this second crystal grain respectively have a first surface, a second surface and surface, an edge, this first surface is with respect to this second surface, and this edge surface is between this first surface and this second surface;
Form several conduction Connection Elements on this first surface, this second surface and this edge surface of this first crystal grain, wherein those conduction Connection Elements comprise solder portion; And
Make those solder portion physical connections and be electrically connected at element on this first surface of this second crystal grain.
7. the manufacture method of stacking type encapsulating structure as claimed in claim 6 is characterized in that, more comprises:
Form one first line layer at a wafer;
Cut this wafer to form several this first crystal grain;
This second surface at this first crystal grain forms one second line layer, wherein in this first line layer at least one circuit via this edge surface of this first crystal grain and the circuit electrically connect of this second line layer.
8. the manufacture method of stacking type encapsulating structure as claimed in claim 6 is characterized in that, forms the method for those solder portion on this first surface, this second surface and this edge surface of this first crystal grain and comprises:
Several this first crystal grain is spaced-apart with a space;
Form a photoresistance on those first crystal grain, wherein this photoresistance has this space that an opening exposes those first intergranules;
Fill this space that this opening was exposed of this photoresistance with solder material;
Remove this photoresistance; And
Cut this solder material to form those solder portion.
9. a stacking type encapsulating structure is characterized in that, comprising:
One first crystal grain;
One second crystal grain, wherein this first crystal grain and this second crystal grain respectively have a first surface, a second surface and surface, an edge, this first surface is with respect to this second surface, this edge surface is between this first surface and this second surface, and wherein this first surface of this first crystal grain is this second surface towards this second crystal grain;
One first line layer comprises a plurality of circuits, is positioned at this first surface of this first crystal grain;
One second line layer comprises a plurality of circuits, is positioned at this second surface of this first crystal grain, and wherein at least one of those circuits of this first line layer is via at least one electrically connect of those circuits of this edge surface of this first crystal grain and this second line layer;
One tertiary circuit layer comprises a plurality of circuits, is positioned at this first surface of this second crystal grain; And
Several conductive bumps connectors comprise conductive part, and physical connection also electrically connects this second line layer on this first crystal grain and this tertiary circuit layer on this second crystal grain.
10. stacking type encapsulating structure as claimed in claim 9 is characterized in that, the height of this conductive part is 3 μ m~100 μ m, and the width of this conductive part is 10 μ m~100 μ m.
11. stacking type encapsulating structure as claimed in claim 10 is characterized in that, these several the conduction Connection Element, further comprise solder portion.
12. the manufacture method of a stacking type encapsulating structure is characterized in that, comprising:
First crystal grain and second crystal grain are provided, wherein this first crystal grain and this second crystal grain respectively have a first surface, a second surface and surface, an edge, this first surface is with respect to this second surface, and this edge surface is between this first surface and this second surface;
Form several conductive bumps connectors on this first surface of this first crystal grain; And
Make those conductive bumps connector physical connections and be electrically connected at element on this second surface of this second crystal grain.
13. the manufacture method of stacking type encapsulating structure as claimed in claim 12 is characterized in that, more comprises:
Form several metal cartridges on this first surface of this first crystal grain; And
Form several solder balls on those metal cartridges, wherein those solder balls and those metal cartridges are to form those conductive bumps connectors.
14. the manufacture method of stacking type encapsulating structure as claimed in claim 12 is characterized in that, more comprises:
Form one first line layer at a wafer;
Form those conductive bumps connectors at this first line layer;
Cut this wafer to form several this first crystal grain;
This second surface at this first crystal grain forms one second line layer, wherein in this first line layer at least one circuit via this edge surface of this first crystal grain and the circuit electrically connect of this second line layer.
CN2013101092010A 2013-03-29 2013-03-29 Stacking type packaging structure and manufacturing method thereof Pending CN103199071A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2013101092010A CN103199071A (en) 2013-03-29 2013-03-29 Stacking type packaging structure and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013101092010A CN103199071A (en) 2013-03-29 2013-03-29 Stacking type packaging structure and manufacturing method thereof

Publications (1)

Publication Number Publication Date
CN103199071A true CN103199071A (en) 2013-07-10

Family

ID=48721524

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013101092010A Pending CN103199071A (en) 2013-03-29 2013-03-29 Stacking type packaging structure and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN103199071A (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818107A (en) * 1997-01-17 1998-10-06 International Business Machines Corporation Chip stacking by edge metallization
US20050046006A1 (en) * 2003-08-28 2005-03-03 Kun-Dae Yeom Unit semiconductor chip and multi chip package with center bonding pads and methods for manufacturing the same
CN1893063A (en) * 2005-07-07 2007-01-10 海力士半导体有限公司 Stack type package
CN101038908A (en) * 2006-03-17 2007-09-19 海力士半导体有限公司 Stack package utilizing through vias and re-distribution lines
CN101286459A (en) * 2007-04-13 2008-10-15 矽品精密工业股份有限公司 Stacktable semiconductor apparatus and manufacturing method
CN101295651A (en) * 2007-04-26 2008-10-29 矽品精密工业股份有限公司 Semiconductor device and its manufacturing method
US20100109139A1 (en) * 2003-01-03 2010-05-06 Dong-Ho Lee Stack package made of chip scale packages

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818107A (en) * 1997-01-17 1998-10-06 International Business Machines Corporation Chip stacking by edge metallization
US20100109139A1 (en) * 2003-01-03 2010-05-06 Dong-Ho Lee Stack package made of chip scale packages
US20050046006A1 (en) * 2003-08-28 2005-03-03 Kun-Dae Yeom Unit semiconductor chip and multi chip package with center bonding pads and methods for manufacturing the same
CN1893063A (en) * 2005-07-07 2007-01-10 海力士半导体有限公司 Stack type package
CN101038908A (en) * 2006-03-17 2007-09-19 海力士半导体有限公司 Stack package utilizing through vias and re-distribution lines
CN101286459A (en) * 2007-04-13 2008-10-15 矽品精密工业股份有限公司 Stacktable semiconductor apparatus and manufacturing method
CN101295651A (en) * 2007-04-26 2008-10-29 矽品精密工业股份有限公司 Semiconductor device and its manufacturing method

Similar Documents

Publication Publication Date Title
US11626388B2 (en) Interconnect structure with redundant electrical connectors and associated systems and methods
US10867897B2 (en) PoP device
CN102376595B (en) Form method and the semiconductor device with the FO-WLCSP of conductive layer and conductive through hole
CN103681397B (en) Semiconductor device and method of the accumulating interconnection structure for the test in the intermediate stage are formed on carrier
KR101577884B1 (en) Microelectronic device, stacked die package and computing system containing same, method of manufacturing a multi-channel communication pathway in same, and method of enabling electrical communication between components of a stacked-die package
US9177936B2 (en) Method of manufacturing semiconductor device
TWI508242B (en) 3d integrated circuit package with through-mold first level interconnects
US8866309B2 (en) Chip package structure
US20130300000A1 (en) Microelectronic package with stacked microelectronic elements and method for manufacture thereof
US20130016477A1 (en) Electronic Assembly Including Die on Substrate With Heat Spreader Having an Open Window on the Die
US20070216008A1 (en) Low profile semiconductor package-on-package
US20090127682A1 (en) Chip package structure and method of fabricating the same
CN103119711A (en) Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby
TW201133769A (en) Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP
CN101789380B (en) Structure and process of internally buried package
TWI599009B (en) Semiconductor chip package, semiconductor module, method of fabricating the semiconductor chip package and method of fabricating the semiconductor module
CN106449579A (en) Semiconductor device and manufacturing method
CN111128914A (en) Low-warpage multi-chip packaging structure and manufacturing method thereof
KR20160135688A (en) A thin sandwitch embedded package
CN102693965A (en) Package-on-package structure
KR20190125888A (en) Method of stacking multiple semiconductor dies
CN101877334A (en) Semiconductor device with heat radiation and gain
US8283780B2 (en) Surface mount semiconductor device
CN103337486B (en) Semiconductor packaging structure and manufacture method thereof
KR101013556B1 (en) Method for fabricating stack package

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20130710