CN103050527A - Improved structure of safety working area of high-voltage NMOS (N-channel metal oxide semiconductor) device and method thereof - Google Patents
Improved structure of safety working area of high-voltage NMOS (N-channel metal oxide semiconductor) device and method thereof Download PDFInfo
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- CN103050527A CN103050527A CN2011103096498A CN201110309649A CN103050527A CN 103050527 A CN103050527 A CN 103050527A CN 2011103096498 A CN2011103096498 A CN 2011103096498A CN 201110309649 A CN201110309649 A CN 201110309649A CN 103050527 A CN103050527 A CN 103050527A
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Abstract
The invention discloses an improved structure of a safety working area of a high-voltage NMOS (N-channel metal oxide semiconductor) device and a method thereof. The improved structure comprises a low-voltage P-well (LVPW) surrounding a low-voltage N-well (LVNW), wherein the upper surface of the LVPW is positioned at the middle position of the side face of the LVNW; the LVPW is positioned in a deep N-well (DNW); and the DNW is positioned in a P-type epitaxial layer. According to the improved structure and the method, the strength of an electric field close to a source end PN junction is lowered, and the electron and hole collision probability is reduced, so that hole current is reduced, and the safety working area is enlarged.
Description
Technical field
The present invention relates to a kind of semiconductor device and method thereof.
Background technology
Traditional high pressure N-channel metal-oxide-semiconductor HVNMOS, two kinds by SD and low pressure N trap LVNW are injected the formation drain terminal, when work, PN junction space charge region near source is wider, the space charge region loses the foreign ion of the positively charged of electronics formation for impurity at the DNW end, the electronegative foreign ion that the LVPW end forms for losing the hole, internal electric field points to negative electricity district (as shown below) by the positive electricity district, the electric field strength that forms is larger, collision probability is larger, forms larger hole current.
Traditional HVNMOS device is by two kinds of injection formation source drain terminals of SD and LVNW, when work, larger near source PN junction place peak value electric field intensity.
Summary of the invention
Technical problem to be solved by this invention provides a kind of structure of improving the high pressure NMOS part safety operation area, and it can reduce the electric field strength near source PN junction place, and electronics, hole collision probability are reduced, thereby reduces hole current, improves the safety operation area.
In order to solve above technical problem, the invention provides a kind of structure of improving the high pressure NMOS part safety operation area, comprising: a low pressure P trap LVPW who surrounds low pressure N trap LVNW; Low pressure P trap LVPW upper surface is positioned at centre position, low pressure N trap LVNW side; Low pressure P trap LVPW is arranged in dark N trap DNW, and dark N trap DNW is arranged in P type epitaxial loayer.
Beneficial effect of the present invention is: this Structure Decreasing reduces electronics, hole collision probability near source PN junction place electric field strength, thereby reduces hole current, improves the safety operation area.
Vertical structure is that the N-type shallow-layer injects, and surface density is injected in the deep layer of 1E15 magnitude and N-type, and surface density is in the 1E12 magnitude.
To high pressure N-channel metal-oxide-semiconductor HVNMOS, P type more deep layer injects, and surface density is the 1E12 magnitude.
N-type is injected and is arranged in the N trap that the N-type deep layer is injected, and the N-type deep layer is injected and is made in the P type trap that more deeply injects, and total is made in one with the outer Yanzhong of dark N trap.
The below connects dense n type buried layer, and surface density is in the 1E15 magnitude.
To high pressure N-channel metal-oxide-semiconductor HVNMOS, Implantation Energy scope 1MKev-2MKev, the injection element is boron, dosage range is 1E12-5E12.
The present invention also provides a kind of manufacture method of improving the structure of high pressure NMOS part safety operation area, and in the BCD technological process, the drain terminal that forms the HVNMOS pipe injects, and may further comprise the steps:
Carry out first drain terminal photoresist gluing;
Carrying out drain terminal develops again;
Carry out the drain terminal exposure;
Carry out the drain terminal zero degree and vertically inject, high-energy 1Mev, the Implantation of 1E12 low dosage;
Remove photoresist.
Description of drawings
Below in conjunction with the drawings and specific embodiments the present invention is described in further detail.
Fig. 1 is traditional HVNMOS device electric fields distribution schematic diagram;
Fig. 2 is the HVNMOS device electric fields distribution schematic diagram of structure of the present invention;
Fig. 3 is the HVNMOS device ionization by collision analogous diagram of two kinds of structures;
Fig. 4 is the HVNMOS device electric breakdown strength simulation result schematic diagram of two kinds of structures;
Fig. 5 is the schematic diagram of the method for the invention.
Embodiment
We adopt at drain terminal now increases the relatively low injection of a step high-energy dosage, vertically inject at drain terminal, for NMOS, inject the B element, energy is 1Mev to 2Mev, and injection face density is the 1E12 magnitude, form a low pressure P trap LVPW who surrounds low pressure N trap LVNW, low pressure P trap LVPW upper surface is positioned at centre position, low pressure N trap LVNW side, and low pressure P trap LVPW is arranged in dark N trap DNW, and dark N trap DNW is arranged in P type epitaxial loayer.Such structure makes the positively charged foreign ion in original DNW Space-charge district become now two parts, a part is with originally identical, form internal electric field with the electronegative foreign ion of source, pointed to the electronegative foreign ion of LVPW of source below depletion region by the positive electricity foreign ion of the DNW of space charge region end, the electronegative foreign ion of LVPW of another part and drain terminal below attracts, a part of electric field of the PN junction electric field of source is changed by the PN junction electric field of drain terminal, the power line direction is pointed to drain terminal LVPW, so source PN junction electric field strength reduces, make electronics, the hole collision probability reduces, thereby reduced hole current, reduce the voltage of parasitic EB knot, improved the device safety operation area.As seen from Figure 3, the ionization by collision of new structure has substantial degradation than traditional structure.As seen from Figure 4, the breakdown voltage characteristics of new structure improves a lot than traditional structure.
In the BCD technological process, the drain terminal that forms the HVNMOS pipe injects.
1) carries out first drain terminal photoresist gluing.
2) carrying out drain terminal develops again.
3) carry out the drain terminal exposure.
4) carry out the drain terminal zero degree and vertically inject, high-energy 1Mev, the Implantation of 1E12 low dosage.
5) remove photoresist.
The present invention is not limited to execution mode discussed above.Above description to embodiment is intended in order to describe and illustrate the technical scheme that the present invention relates to.Based on the apparent conversion of the present invention enlightenment or substitute and also should be considered to fall into protection scope of the present invention.Above embodiment is used for disclosing best implementation method of the present invention, so that those of ordinary skill in the art can use numerous embodiments of the present invention and multiple alternative reaches purpose of the present invention.
Claims (7)
1. a structure of improving the high pressure NMOS part safety operation area is characterized in that, comprising:
A low pressure P trap LVPW who surrounds low pressure N trap LVNW;
Low pressure P trap LVPW upper surface is positioned at centre position, low pressure N trap LVNW side;
Low pressure P trap LVPW is arranged in dark N trap DNW, and dark N trap DNW is arranged in P type epitaxial loayer.
2. the structure of improvement high pressure NMOS part as claimed in claim 1 safety operation area is characterized in that, vertical structure is that the N-type shallow-layer injects, and surface density is injected in the deep layer of 1E15 magnitude and N-type, and surface density is in the 1E12 magnitude.
3. the structure of improvement high pressure NMOS part as claimed in claim 1 safety operation area is characterized in that, to high pressure N-channel metal-oxide-semiconductor HVNMOS, P type more deep layer injects, and surface density is the 1E12 magnitude.
4. the structure of improvement high pressure NMOS part as claimed in claim 1 safety operation area is characterized in that, N-type is injected and is arranged in the N trap that the N-type deep layer is injected, and the N-type deep layer is injected and is made in the P type trap that more deeply injects, and total is made in one with the outer Yanzhong of dark N trap.
5. the structure of improvement high pressure NMOS part as claimed in claim 1 safety operation area is characterized in that, the below connects dense n type buried layer, and surface density is in the 1E15 magnitude.
6. the structure of improvement high pressure NMOS part as claimed in claim 1 safety operation area is characterized in that, to high pressure N-channel metal-oxide-semiconductor HVNMOS, and Implantation Energy scope 1MKev-2MKev, the injection element is boron, dosage range is 1E12-5E12.
7. such as the manufacture method of the structure of the described improvement high pressure NMOS part of any one in the claim 1 to 6 safety operation area, it is characterized in that, in the BCD technological process, the drain terminal that forms the HVNMOS pipe injects, and may further comprise the steps:
Carry out first drain terminal photoresist gluing;
Carrying out drain terminal develops again;
Carry out the drain terminal exposure;
Carry out the drain terminal zero degree and vertically inject, high-energy 1Mev, the Implantation of 1E12 low dosage; Remove photoresist.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110309649.8A CN103050527B (en) | 2011-10-13 | 2011-10-13 | Improve structure and the method thereof of high pressure NMOS part safety operation area |
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| CN201110309649.8A CN103050527B (en) | 2011-10-13 | 2011-10-13 | Improve structure and the method thereof of high pressure NMOS part safety operation area |
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| CN103050527A true CN103050527A (en) | 2013-04-17 |
| CN103050527B CN103050527B (en) | 2016-04-13 |
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| CN201110309649.8A Active CN103050527B (en) | 2011-10-13 | 2011-10-13 | Improve structure and the method thereof of high pressure NMOS part safety operation area |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998020562A1 (en) * | 1996-11-05 | 1998-05-14 | Power Integrations, Inc. | High-voltage transistor with multi-layer conduction region and method of making the same |
| US20030049907A1 (en) * | 2001-09-12 | 2003-03-13 | Toshihiko Omi | Semiconductor device and manufacturing method therefor |
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2011
- 2011-10-13 CN CN201110309649.8A patent/CN103050527B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998020562A1 (en) * | 1996-11-05 | 1998-05-14 | Power Integrations, Inc. | High-voltage transistor with multi-layer conduction region and method of making the same |
| US20030049907A1 (en) * | 2001-09-12 | 2003-03-13 | Toshihiko Omi | Semiconductor device and manufacturing method therefor |
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| CN103050527B (en) | 2016-04-13 |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140109 |
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Effective date of registration: 20140109 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
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