CN103050399A - Diode with three-medium-layer passivation structure and manufacturing method thereof - Google Patents
Diode with three-medium-layer passivation structure and manufacturing method thereof Download PDFInfo
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- CN103050399A CN103050399A CN2012105875566A CN201210587556A CN103050399A CN 103050399 A CN103050399 A CN 103050399A CN 2012105875566 A CN2012105875566 A CN 2012105875566A CN 201210587556 A CN201210587556 A CN 201210587556A CN 103050399 A CN103050399 A CN 103050399A
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Abstract
The invention provides a diode with a three-medium-layer passivation structure and a manufacturing method thereof. The method comprises the following steps of forming a PN (Positive-Negative) junction which is provided with a P contact zone and an N contact zone in a crystal plate by utilizing a semiconductor technology; after the growth of silicon dioxide media on the front face of the crystal plate, removing a part of the silicon dioxide media to form a first window through which the P contact zone is exposed; depositing silicon nitride media which cover on the silicon dioxide media and in the first window, and removing a part of the silicon nitride media to form a second window through which the first window is exposed; manufacturing a front face electrode in the second window and on a part of the silicon nitride media closely adjacent to the second window; covering and forming polyimide media on the silicon nitride media and on a part of the front face electrode closely adjacent to the silicon nitride media; and manufacturing a back face electrode on the back face of the crystal plate to complete the processing of the diode. With the adoption of the diode with the three-medium-layer passivation structure and the manufacturing method thereof, the PN junction in the diode can be effectively protected from the contamination of outside mobile ions and the affection of moisture, so that the stability and the reliability of the PN junction are guaranteed.
Description
Technical field
The invention belongs to the semiconductor fabrication process technical field, relate in particular to a kind of diode and manufacture method thereof with three layers of medium passivating structure.
Background technology
After utilizing semiconductor fabrication process to finish the PN junction of diode, generally can carry out passivation on the surface of wafer, for the protection of PN junction, avoid PN junction to be subject to extraneous contamination and the impact of steam, guarantee stability and the reliability of PN junction.The quality of wafer surface passivation can directly affect the quality of diode, if passivation effect is bad, then diode is easier to be subject to the contaminations such as steam, metal ion after rear operation encapsulation, diode electricity performance is degenerated, cause that the diode leakage rheology is large, the drift of reverse breakdown curve wriggling, PN junction was lost efficacy damage.The structure of passivation layer becomes the important guarantee of protection diode quality.
The surface passivation of diode generally is when semiconductor fabrication process is made PN junction, adopts hot growth pattern to form passivating structure at the certain thickness silicon dioxide of the superficial growth of PN junction, to play shielding and the protective effect to PN junction.But simple silicon dioxide passivating structure can not effectively stop the movably impact of metal ion and steam, usually can cause diode electric property after rear operation encapsulation to be degenerated.
Summary of the invention
The object of the present invention is to provide a kind of diode and manufacture method thereof with three layers of medium passivating structure; in order to effectively protect the PN junction of diode inside; avoid being subject to extraneous mobile ion contamination and the impact of steam, thereby guarantee stability and the reliability of PN junction.
In order to address the above problem, the invention provides a kind of manufacture method with diode of three layers of medium passivating structure, step is as follows:
Utilize semiconductor technology to be formed on to have in the wafer PN junction of P contact zone and N contact zone;
Behind front wafer surface growth silica dioxide medium, remove the part silica dioxide medium, form the first window that exposes described P contact zone;
The silicon nitride medium that deposit covers on the described silica dioxide medium and first window is interior is removed the part silicon nitride medium, forms the Second Window that exposes described first window;
In described Second Window and with described Second Window next-door neighbour's part silicon nitride medium, make front electrode;
Reach the part front electrode that is close to described silicon nitride medium at described silicon nitride medium and cover formation polyimides medium;
Make backplate at chip back surface, finish the processing of diode.
Further, described Second Window also exposes the process with first window next-door neighbour's part silica dioxide medium and is: remove the part silicon nitride medium with the first window next-door neighbour.
Further, described front electrode also covers on the part silicon dioxide SiClx medium that is close to described first window.
Further, the thickness of described silica dioxide medium is
Further, be 800 ℃～1250 ℃ in the temperature of front wafer surface oxidation growth silica dioxide medium, the time is 1h～24h.
Further, the thickness of described silicon nitride medium is
Further, the temperature of deposit silicon nitride medium is 600 ℃～1000 ℃ on described silica dioxide medium, and the time is 1h～7h.
Further, the thickness of described polyimides medium is 3um～15um.
In order to reach another aspect of the present invention, a kind of diode with three layers of medium passivating structure also is provided, comprising:
Front electrode is formed on the P contact zone in the PN junction of wafer;
Three layers of medium passivating structure comprise silica dioxide medium, silicon nitride medium and polyimides medium, and described silica dioxide medium is formed on the wafer and surrounds the P contact zone that is formed in the PN junction; Described silicon nitride medium is formed on the silica dioxide medium; Described polyimides medium is formed on the silicon nitride medium;
Described three layers of medium passivating structure closely surround the front electrode on the P contact zone that is formed in the PN junction, and described polyimides medium also extends and is covered on the part front electrode and described front electrode also extends and is covered on the part silicon nitride medium;
Backplate is formed on the chip back surface.
Further, described front electrode also extends and is covered on the described silica dioxide medium of part.
Further, the thickness of described silica dioxide medium is
Further, the thickness of described silicon nitride medium is
Further, the thickness of described polyimides medium is 3um～15um.
As shown from the above technical solution, the present invention compares with the diode that tradition has passivating structure, has following advantage: can reach the optimised process coupling between three layers of medium passivating structure that are made of silica dioxide medium, silicon nitride medium and polyimides medium respectively successively from the bottom to top; Described three layers of medium passivating structure can effectively guarantee PN junction electrical stability and reliability.
Description of drawings
Fig. 1 is the manufacture method schematic flow sheet with diode of three layers of medium passivating structure of the present invention;
Fig. 2 to Fig. 7 is the manufacture method with diode of three layers of medium passivating structure of the present invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, below in conjunction with accompanying drawing the specific embodiment of the present invention is described in detail.
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization in the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public implementation.
Referring to Fig. 1, the flow process that the invention provides a kind of manufacture method of the diode with three layers of medium passivating structure is:
S1: the PN junction that utilizes semiconductor technology to be formed on to have in the wafer P contact zone and N contact zone;
S2: behind front wafer surface growth silica dioxide medium, remove the part silica dioxide medium, form the first window that exposes described P contact zone;
S3: the silicon nitride medium that deposit covers on the described silica dioxide medium and first window is interior, remove the part silicon nitride medium, form the Second Window that exposes described first window;
S4: in described Second Window and with described Second Window next-door neighbour's part silicon nitride medium, make front electrode;
S5: reach the part front electrode that is close to described silicon nitride medium at described silicon nitride medium and cover formation polyimides medium;
S6: make backplate at the described PN junction back side, finish the processing of diode.
The below is take method flow shown in Figure 1 as example, and by reference to the accompanying drawings 2 to 7, a kind of manufacture craft of manufacture method of three layers of medium passivating structure of diode is described in detail.
S1: the PN junction that utilizes semiconductor technology to be formed on to have in the wafer P contact zone and N contact zone.
Referring to Fig. 2, utilize semiconductor technology in wafer, to form the PN junction with P contact zone and N contact zone.
S2: behind front wafer surface growth silica dioxide medium, remove the part silica dioxide medium, form the first window that exposes described P contact zone.
Referring to Fig. 3, carry out oxidation to front wafer surface, oxidizing temperature is 800 ℃～1250 ℃, and oxidization time is 1h～24h, and growth thickness is
Silica dioxide medium 10 after, remove the part silica dioxide medium, form first window 12, described first window exposes described P contact zone.
S3: the silicon nitride medium that deposit covers on the described silica dioxide medium and first window is interior, remove the part silicon nitride medium, form the Second Window that exposes described first window.
Referring to Fig. 4, on described silica dioxide medium 10 He in the first window 12, carry out depositing technics, deposition temperature is 600 ℃～1000 ℃, deposition time is 1h～7h, forms thickness to be
Silicon nitride medium 14 after, remove the silicon nitride in the described first window 12, form Second Window 16.
Further, remove the part silicon nitride medium that is close to described first window 12, form the Second Window 16 that also exposes the part silica dioxide medium that is close to described first window.
S4: in described Second Window and with described Second Window next-door neighbour's part silicon nitride medium, make front electrode.
Referring to Fig. 5, behind the splash-proofing sputtering metal, remove part metals in described Second Window 16 and on the silicon nitride medium 14, in described Second Window 16, reach the part silicon nitride medium 16 that is close to described Second Window and be made into front electrode 18.
S5: reach the part front electrode that is close to described silicon nitride medium at described silicon nitride medium and cover formation polyimides medium.
Referring to Fig. 6, after deposition thickness is the polyimides medium 20 of 3um～15um on described silicon nitride medium 16 and the front electrode 18, remove part polyimides medium 20, reach part front electrode 18 coverings that are close to described silicon nitride medium at described silicon nitride medium 14 and form described polyimides medium 20.
S6: make backplate at the described PN junction back side, finish the processing of diode.
Referring to Fig. 7, make the backplate 22 of PN junction, finish the processing of diode.
Based on above-mentioned manufacture method, referring to Fig. 7, the present invention forms a kind of diode with three layers of medium passivating structure, comprising:
Three layers of medium passivating structure comprise silica dioxide medium 10, silicon nitride medium 14 and polyimides medium 20, and described silica dioxide medium 10 is formed on the wafer and surrounds the P contact zone that is formed in the PN junction; Described silicon nitride medium 14 is formed on the described silica dioxide medium 10; Described polyimides medium 20 is formed on the silicon nitride medium 14;
Described three layers of medium passivating structure closely surround the front electrode 18 on the P contact zone that is formed in the PN junction, and described polyimides medium 20 also extends to be covered on the part front electrode 20 also to extend with described front electrode 20 and is covered on the part silicon nitride medium 14;
Further, described front electrode 18 also extends and is covered on the described silica dioxide medium 10 of part.
Further, the thickness of described silica dioxide medium 10 is
Further, the thickness of described silicon nitride medium 14 is
Further, the thickness of described polyimides medium 20 is 3um～15um.
Manufacturing of the present invention obtains having the diode of three layers of medium passivating structure and compares with the diode that adopts simple silicon dioxide passivating structure, both models are 8A with current specification all, withstand voltage specification is that the diode of 200V is example, encapsulation and screening with qualified wafer operation after carrying out under the identical condition, and under identical standard, carry out reliability test, result of the test is shown in table ():
Table (one)
From top reliability test result, the Stability and dependability of three layers of medium passivating structure test piece of diode of the present invention is better than the test piece that only adopts simple silicon dioxide passivating structure, this mainly is because the silicon dioxide passivating structure is more loose, can not effectively stop the impact of mobile ion and steam, make the bad stability of diode.Experimental project
And the diode with three layers of medium passivating structure disclosed by the invention to have adopted be respectively three layers of medium passivating structure of silicon dioxide, silicon nitride, polyimides from the bottom to top successively, because the silicon nitride material chemical stability is fabulous, and good insulating properties and compactness arranged, not only can fix and eliminate mobile ion, also can isolate the contamination of outer bound pair diode chip for backlight unit; Polyimide material tool stronger mechanical performance and resistance to chemical corrosion, diode is had than low-leakage current, and can effectively stop moisture, increase the moisture resistant ability of device, therefore described three layers of medium passivating structure have reached best coupling at process structure, have weakened the harmful effect to device.In addition, can realize between described three layers of medium passivating structure that well stack covers, also remedy the shortcoming of simple silicon dioxide passivating structure, greatly improved the Stability and dependability of the PN junction of diode, greatly improved diode in the qualification rate of high temperature reverse bias with the test of tide temperature.
Although the present invention with preferred embodiment openly as above; but it is not to limit claim; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (13)
1. manufacture method with diode of three layers of medium passivating structure, step is as follows:
Utilize semiconductor technology to be formed on to have in the wafer PN junction of P contact zone and N contact zone;
Behind front wafer surface growth silica dioxide medium, remove the part silica dioxide medium, form the first window that exposes described P contact zone;
The silicon nitride medium that deposit covers on the described silica dioxide medium and first window is interior is removed the part silicon nitride medium, forms the Second Window that exposes described first window;
In described Second Window and with described Second Window next-door neighbour's part silicon nitride medium, make front electrode;
Reach the part front electrode that is close to described silicon nitride medium at described silicon nitride medium and cover formation polyimides medium;
Make backplate at chip back surface, finish the processing of diode.
2. manufacture method as claimed in claim 1 is characterized in that, the process that described Second Window also exposes the part silica dioxide medium that is close to first window is: remove the part silicon nitride medium with the first window next-door neighbour.
3. manufacture method as claimed in claim 2 is characterized in that, described front electrode also covers on the part silicon dioxide SiClx medium that is close to described first window.
4. manufacture method as claimed in claim 1 is characterized in that, is 800 ℃～1250 ℃ in the temperature of front wafer surface oxidation growth silica dioxide medium, and the time is 1h～24h.
5. diode as claimed in claim 4 is characterized in that, the thickness of described silica dioxide medium is
6. manufacture method as claimed in claim 1 is characterized in that, the temperature of deposit silicon nitride medium is 600 ℃～1000 ℃ on described silica dioxide medium, and the time is 1h～7h.
7. diode as claimed in claim 6 is characterized in that, the thickness of described silicon nitride medium is
8. manufacture method as claimed in claim 1 is characterized in that, the thickness of described polyimides medium is 3um～15um.
9. diode with three layers of medium passivating structure comprises:
Front electrode is formed on the P contact zone in the PN junction of wafer;
Three layers of medium passivating structure comprise silica dioxide medium, silicon nitride medium and polyimides medium, and described silica dioxide medium is formed on the wafer and surrounds the P contact zone that is formed in the PN junction; Described silicon nitride medium is formed on the silica dioxide medium; Described polyimides medium is formed on the silicon nitride medium;
Described three layers of medium passivating structure closely surround the front electrode on the P contact zone that is formed in the PN junction, and described polyimides medium also extends and is covered on the part front electrode and described front electrode also extends and is covered on the part silicon nitride medium;
Backplate is formed on the chip back surface.
10. diode as claimed in claim 9 is characterized in that, described front electrode also extends and is covered on the described silica dioxide medium of part.
11. diode as claimed in claim 9 is characterized in that, the thickness of described silica dioxide medium is
12. diode as claimed in claim 9 is characterized in that, the thickness of described silicon nitride medium is
13. diode as claimed in claim 9 is characterized in that, the thickness of described polyimides medium is 3um～15um.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210587556.6A CN103050399B (en) | 2012-12-28 | 2012-12-28 | There is diode and the manufacture method thereof of three layers of dielectric passivation structure |
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| CN201210587556.6A CN103050399B (en) | 2012-12-28 | 2012-12-28 | There is diode and the manufacture method thereof of three layers of dielectric passivation structure |
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| CN103050399B CN103050399B (en) | 2015-11-25 |
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Citations (5)
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|---|---|---|---|---|
| US6337283B1 (en) * | 1999-12-30 | 2002-01-08 | Sunpower Corporation | Method of fabricating a silicon solar cell |
| US20070018199A1 (en) * | 2005-07-20 | 2007-01-25 | Cree, Inc. | Nitride-based transistors and fabrication methods with an etch stop layer |
| CN101419923A (en) * | 2007-10-25 | 2009-04-29 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method for lead wire welding mat |
| CN101882650A (en) * | 2010-06-29 | 2010-11-10 | 常州大学 | Preparation method of solar cell with buried charge layer |
| CN202996812U (en) * | 2012-12-28 | 2013-06-12 | 杭州士兰集成电路有限公司 | Diode with three-layer medium passivation structure |
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- 2012-12-28 CN CN201210587556.6A patent/CN103050399B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6337283B1 (en) * | 1999-12-30 | 2002-01-08 | Sunpower Corporation | Method of fabricating a silicon solar cell |
| US20070018199A1 (en) * | 2005-07-20 | 2007-01-25 | Cree, Inc. | Nitride-based transistors and fabrication methods with an etch stop layer |
| CN101419923A (en) * | 2007-10-25 | 2009-04-29 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method for lead wire welding mat |
| CN101882650A (en) * | 2010-06-29 | 2010-11-10 | 常州大学 | Preparation method of solar cell with buried charge layer |
| CN202996812U (en) * | 2012-12-28 | 2013-06-12 | 杭州士兰集成电路有限公司 | Diode with three-layer medium passivation structure |
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