CN102939632B - 存储器阵列 - Google Patents

存储器阵列 Download PDF

Info

Publication number
CN102939632B
CN102939632B CN201180027954.6A CN201180027954A CN102939632B CN 102939632 B CN102939632 B CN 102939632B CN 201180027954 A CN201180027954 A CN 201180027954A CN 102939632 B CN102939632 B CN 102939632B
Authority
CN
China
Prior art keywords
bit line
series
wordline
global bit
born
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201180027954.6A
Other languages
English (en)
Other versions
CN102939632A (zh
Inventor
刘增涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of CN102939632A publication Critical patent/CN102939632A/zh
Application granted granted Critical
Publication of CN102939632B publication Critical patent/CN102939632B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00—Arrangements or instruments for measuring magnetic variables
    • G01R33/20—Arrangements or instruments for measuring magnetic variables involving magnetic resonance
    • G01R33/44—Arrangements or instruments for measuring magnetic variables involving magnetic resonance using nuclear magnetic resonance [NMR]
    • G01R33/48—NMR imaging systems
    • G01R33/58—Calibration of imaging systems, e.g. using test probes, Phantoms; Calibration objects or fiducial markers such as active or passive RF coils surrounding an MR active material
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00—Arrangements or instruments for measuring magnetic variables
    • G01R33/12—Measuring magnetic properties of articles or specimens of solids or fluids
    • G01R33/1284—Spin resolved measurements; Influencing spins during measurements, e.g. in spintronics devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G11C13/0026—Bit-line or column circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087—Data input latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093—Input synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/14—Word line organisation; Word line lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K999/00—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS dummy group
    • H05K999/99—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS dummy group dummy group
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H10B63/24—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes of the Ovonic threshold switching type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H10B63/845—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays the switching components being connected to a common vertical conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/823—Device geometry adapted for essentially horizontal current flow, e.g. bridge type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828—Tellurides, e.g. GeSbTe
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00—Arrangements or instruments for measuring magnetic variables
    • G01R33/20—Arrangements or instruments for measuring magnetic variables involving magnetic resonance
    • G01R33/24—Arrangements or instruments for measuring magnetic variables involving magnetic resonance for measuring direction or magnitude of magnetic fields or magnetic flux
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10—Resistive cells; Technology aspects
    • G11C2213/18—Memory cell being a nanowire having RADIAL composition
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/71—Three dimensional array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/72—Array wherein the access device being a diode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes

Abstract

一些实施例包含存储器阵列。所述存储器阵列可具有沿第一水平方向延伸的全局位线、从所述全局位线垂直延伸的垂直局部位线及沿垂直于所述第一水平方向的第二水平方向延伸的字线。所述全局位线可被细分成第一高程水平处的第一系列及不同于所述第一高程水平的第二高程水平处的第二系列。所述第一系列的所述全局位线可与所述第二系列的所述全局位线交替。可存在直接在所述字线与所述垂直局部位线之间的存储器胞材料。所述存储器胞材料可形成通过字线/全局位线组合唯一寻址的多个存储器胞。一些实施例包含具有约2F2的面积的交叉点存储器胞单元。

Description

存储器阵列
技术领域
本发明揭示存储器阵列。
背景技术
存储器阵列用于将存储器胞紧密地包装于集成电路内。特别适合于紧密包装的一种类型的存储器为交叉点存储器。
存储器阵列可包括沿第一方向延伸的多个字线及正交于所述字线延伸的多个位线。交叉点存储器可利用形成于跨越阵列的位线与字线的相交点处的存储器胞材料。所述存储器胞材料可为相变材料，例如硫属化合物。实例性硫属化合物为锗、锑及碲的合金。
除存储器胞材料以外，个别存储器胞还可包括存取装置，所述存取装置限制到所述存储器胞材料的电流直到跨越所述存储器胞材料及所述存取装置的电压差达到预定阈值。所述存取装置可为非线性电子装置。具体来说，所述存取装置可为如下的电子装置：处于高电阻状态中直到电压差达到预定值，届时所述电子装置变换到导电状态。实例性存取装置为二极管及双向阈值开关。
图1到3中展示实例性现有技术交叉点存储器阵列5；其中图1是俯视图，且其中图2及3是横截面侧视图。如本发明中的所有其它横截面图一样，图2及3的横截面图仅展示横截面平面内的特征。为简化图式，所述横截面图不展示横截面平面后的材料。
图1的俯视图展示：存储器阵列包括沿第一水平方向延伸的多个全局位线10到14，且包括正交于所述全局位线延伸的多个字线20到25。图2的横截面侧视图展示图1的字线实际上为字线堆叠的顶部系列，其中图2展示两个下伏字线系列。所述下伏系列中的一者内的字线标示为字线20a到25a，且所述下伏系列中的另一者中的字线标示为字线20b到25b。
图2的横截面图中展示18个字线(20到25，20a到25a及20b到25b)。所述18个字线形成具有含3个字线的若干列及含6个字线的若干行的二维字线阵列。
图1到3展示垂直位线柱30到44从全局位线向上延伸。所述位线柱延伸穿过所述字线阵列且在此字线阵列的所述列中的一些列之间。所述字线、位线及垂直位线柱包括导电材料，例如(举例来说)各种金属、含金属组合物及经导电掺杂半导体材料中的一者或一者以上。
存储器胞材料45(仅标示其中一些存储器胞材料)提供于字线与垂直位线柱之间；且存取装置46(仅标示其中一些存取装置)提供于字线与垂直位线柱之间。提供于字线与垂直位线柱之间的存储器胞材料与存取装置共用形成存储器胞47(仅标示其中一些存储器胞)。
尽管所述存储器胞材料展示为单一同质组合物，但在一些应用中其可包括多种离散组合物。此外，尽管所述存取装置展示为包括单一同质组合物，但所述存取装置可包括众多离散组合物，且通常确实包括两种或两种以上不同材料。此外，尽管每一存储器胞中展示仅单一存取装置，但个别存储器胞中可存在多个存取装置。此外，尽管所述存储器胞材料展示为直接邻近所述垂直位线柱，且所述存取装置展示为直接邻近所述字线，但所述存储器胞材料与所述存取装置的相对定向可为相反的。
在操作中，每一个别存储器胞可通过全局位线与字线的组合唯一寻址。举例来说，可利用全局位线12与字线20之间的电压差来存取位于其中字线20交叉垂直位线柱36的相交点处的存储器胞。此存取可用于通过将存储器胞放置于特定数据存储状态中而向所述存储器胞写入，且用于通过确定所述存储器胞处于哪一数据存储状态中而从所述存储器胞读取。
可将图2的二维字线阵列内的字线视为布置于多个高程平面50到52中，且因此可将图1的俯视图视为展示所述字线阵列的最上部高程平面52。可将存储器阵列视为还包括高程平面50到52，且可将存储器阵列的每一存储器单元视为具有沿含有此存储器单元的高程平面的面积。可就用来形成存储器阵列的最小特征大小F来陈述所述面积。如果将存储器阵列制造为其绝对最小尺寸，那么此最小特征大小将为位线的宽度、字线的宽度、垂直位线柱的宽度及位线与字线之间的空间的宽度。
图1的俯视图展示围绕存储器单元中的一者的正方形外围。此外围具有为尺寸2F的侧，且因此所述存储器单元具有沿高程平面52的约4F2的面积。将所述面积称为“约4F2”，而非称为绝对4F2，因为所图解说明的外围假设存储器胞材料45及存取装置46为可忽略不计的大小。由于存储器胞材料45与存取装置46具有某一物理尺寸，因此所述存储器单元胞的平面面积将接近4F2，但将并非绝对数学意义上的4F2。或者，在其中忽略存储器胞材料及存取装置的上下文中，可将每一存储器胞单元的平面面积视为4F2；或换句话说，相对于每一存储器胞单元所消耗的字线、位线及空间，可将所述平面面积视为4F2。
发明内容
附图说明
图1到3是现有技术存储器阵列的部分的示意图。图1是所述阵列的俯视图，且图2及3是分别沿图1的线2-2及3-3的示意性横截面侧视图。
图4到6是实例性实施例存储器阵列的部分的示意图。图4是所述阵列的俯视图，且图5及6是分别沿图4的线5-5及6-6的示意性横截面侧视图。
图7是类似于图4到6的所述存储器阵列的存储器阵列的三维视图。
图8是类似于图5的所述示意性横截面图的示意性横截面图，且展示另一实例性实施例存储器阵列。
图9是另一实例性实施例存储器阵列的三维视图。
图10是另一实例性实施例存储器阵列的三维视图。
具体实施方式
一些实施例包含其中交叉点存储器胞可比借助常规存储器阵列实现的交叉点存储器胞更紧密包装的新存储器阵列。参考图4到10描述实例性实施例。
图4到6中展示实例性实施例存储器阵列100。图4的俯视图展示：存储器阵列100包括沿第一水平方向延伸的多个全局位线110到118，且包括正交于所述全局位线延伸的多个字线120到125。图5的横截面侧视图展示图4的字线实际上为字线堆叠的顶部系列，其中图5展示两个下伏字线系列；其中所述系列中的一者内的字线标示为字线120a到125a，且其中另一系列中的字线标示为字线120b到125b。因此，图5的横截面图中展示18个字线。所述18个字线形成具有含3个字线的若干列及含6个字线的若干行的二维字线阵列。所述二维字线阵列为各种各样的不同二维字线阵列的一个实例。此些字线阵列通常将在所述阵列的每一行中具有至少两个字线，且在所述阵列的每一列中具有至少两个字线。
图4到6展示垂直位线柱160到182从全局位线向上延伸。所述位线柱延伸穿过所述字线阵列且在此字线阵列的邻近列之间。所述字线、位线及垂直位线柱包括导电材料，例如(举例来说)各种金属、含金属组合物及经导电掺杂半导体材料中的一者或一者以上。
存储器胞材料45(仅标示其中一些存储器胞材料)提供于字线与垂直位线柱之间；且存取装置46(仅标示其中一些存取装置)提供于字线与垂直位线柱之间。提供于字线与垂直位线柱之间的存储器胞材料与存取装置共用形成存储器胞47(仅标示其中一些存储器胞)。图4到6的实例性实施例的存储器胞材料45及存取装置46可与上文在“背景技术”章节中所描述的现有技术的存储器胞材料45及存取装置46相同。
尽管所述存储器胞材料展示为单一同质组合物，但在一些应用中其可包括多种离散组合物。此外，尽管所述存取装置展示为包括单一同质组合物，但所述存取装置可包括众多离散组合物，且通常确实包括两种或两种以上不同材料。此外，尽管每一存储器胞中展示仅单一存取装置，但在个别存储器胞中可存在多个存取装置。此外，尽管所述存储器胞材料展示为邻近于所述垂直位线柱，且所述存取装置展示为邻近于所述字线，但所述存储器胞材料与所述存取装置的相对定向可颠倒。
图6的横截面图展示全局位线110到118中的一些全局位线形成于不同于所述全局位线中的其它全局位线的高程水平处。具体来说，所述全局位线包含：含有位线110、112、114、116及118的第一系列，其形成于一个高程水平处；及含有位线111、113、115及117的第二系列，其形成于不同高程水平处。如图6中所展示，所述第一系列的所述全局位线与所述第二系列的所述全局位线交替。
在操作中，每一个别存储器胞可通过全局位线与字线的组合唯一寻址。举例来说，可利用全局位线116与字线121之间的电压差来存取位于其中字线121与垂直位线柱175交叉的相交点处的存储器胞。此存取可用于通过将存储器胞放置于特定数据存储状态中而向所述存储器胞写入，且用于通过确定所述存储器胞处于哪一数据存储状态中而从所述存储器胞读取。
可将图5的二维字线阵列内的字线视为布置于多个高程平面150到152中，且因此可将图4的俯视图视为展示所述字线阵列的最上部高程平面152。可将所述存储器阵列视为还包括高程平面150到152，且可将所述存储器阵列的每一存储器单元视为具有沿含有此存储器单元的高程平面的面积。可就用来形成存储器阵列的最小特征大小F来陈述所述面积。如果将存储器阵列制造为其绝对最小尺寸，那么此最小特征大小将为位线的宽度、字线的宽度、垂直位线柱的宽度及位线与字线之间的空间的宽度。
全局位线的多个高程水平的利用使得图4到6的实例性实施例存储器阵列的存储器单元能够比图1到3中所描述的现有技术存储器阵列的存储器单元更紧密地包装。
图4的俯视图展示围绕实例性实施例存储器阵列的存储器单元中的一者的矩形外围。此外围具有为尺寸2F的两侧及为尺寸F的两侧。因此，所述存储器单元具有沿高程平面152的约2F2的面积。将所述面积称为“约2F2”，而非称为绝对2F2，因为所图解说明的外围假设存储器胞材料45及存取装置46为可忽略不计的大小。由于存储器胞材料45及存取装置46具有某一物理尺寸，因此所述存储器单元胞的平面面积将接近2F2，但将并非绝对数学意义上的2F2。或者，如果忽略所述存储器胞材料及存取装置，那么可将每一存储器胞单元的平面面积视为2F2；或换句话说，相对于每一存储器胞单元所消耗的字线、位线及空间，可将所述平面面积视为2F2。
图7是类似于图4到6的所述实例性实施例存储器阵列的实例性实施例存储器阵列的三维视图，其可帮助读者想象出此存储器阵列。利用与用以标示图4到6的组件的编号相同的编号来标示图7的组件。字线120到125的位置用箭头来指示，但为简化图式未展示所述字线。
图7的实施例与图4到6的所述实施例不同之处在于存储器胞材料45围绕图7的垂直位线柱为连续的，且围绕图4到6的实施例中的此些垂直柱为不连续的。因此，图7展示稍微不同于图4到6的实施例。图7的实施例还展示包括围绕所述垂直位线柱为连续的材料的存取装置46。在又一些实施例中，存储器胞材料围绕垂直柱可为连续的，但存取装置的材料围绕此些柱可为不连续的。
图4到7的实施例在存储器阵列的个别存储器胞47中具有邻近存储器胞材料45的存取装置46。因此，每一存储器胞单元包括存储器胞材料及存取装置。在其它实施例中，可从个别存储器胞单元移除存取装置以进一步减小所述存储器胞单元的大小。具体来说，可将存取装置放置于垂直柱与全局位线之间的位置中，而非放置于个别存储器胞单元中。因此，虽然图5的横截面展示其中垂直位线柱170到172欧姆性地连接到全局位线114的实施例，但在其它实施例中，此些垂直位线柱可经由非线性地响应于增加的电压的存取装置(例如(举例来说)双向阈值开关)连接到全局位线。图8展示类似于图5的所述横截面图的横截面图，但展示其中存储器阵列100a具有直接放置于全局位线114与垂直位线柱170到172之间的存取装置46的实施例。
图8的实施例通过从存储器胞47移除存取装置而有利地减小此些存储器胞的大小。在图8的实施例中，字线(举例来说，120到125)与垂直位线柱(举例来说，170到172)之间的仅有材料为存储器胞材料45。
图4到7展示其中所有全局位线在二维字线阵列(具体来说，包括图5中所展示的字线120到125、120a到125a及120b到125b的二维阵列)的同一侧上的实施例。在其它实施例中，全局位线中的一些全局位线可相对于所述全局位线中的其它全局位线在字线阵列的相对侧上。图9展示其中全局位线中的一些全局位线在二维字线阵列的一侧上且所述全局位线中的其它全局位线在所述字线阵列的相对侧上的存储器阵列200的三维视图。将使用与上文用于描述图4到7的编号相同的编号来描述图9。为简化图式，图9中未全部展示字线120到125、120a到125a及120b到125b。而是，仅展示字线121、121a及121b，且用箭头来指示字线120、122、123、124及125的位置。
可将图9的实施例视为使全局位线110到118中的一些全局位线形成于不同于所述全局位线中的其它全局位线的高程水平处。具体来说，所述全局位线包含：含有位线112、114及116的第一系列，其形成于一个高程水平处(且具体来说，在所展示的实施例中的字线下面)；及含有位线111、113、115及117的第二系列，其形成于不同高程水平处(且具体来说，在所展示的实施例中的字线上面)。如图9中所展示，所述第一系列的所述全局位线与所述第二系列的所述全局位线交替。
在图9的实施例中，所述第一系列的全局位线从所述第二系列的全局位线水平偏移，使得所述第一系列的全局位线不在所述第二系列的全局位线正上方。在其它实施例中，所述第一系列的全局位线可在所述第二系列的全局位线正上方，如图10中参考存储器阵列300所展示。为简化图式，图10中未展示字线。然而，用箭头指示字线120到125的位置。
与图4到6的实施例一样，图9及10的实施例可形成一阵列，其中相对于个别存储器胞单元所消耗的字线、位线及空间，所述个别存储器胞单元的平面面积为2F2。
存取装置可在图9及10的实施例的存储器胞中(如所展示)，或在类似于图8的实施例的其它实施例中，可在垂直位线柱与全局位线之间。
可将全局位线与附接到所述全局位线的垂直柱的组合视为形成类似于梳状物的结构。在图4到7的实施例中，可将此些梳状物视为在相对于彼此在高程上偏移的两个系列内；其中一个系列包括全局位线110、112、114、116及118，且另一系列包括全局位线111、113、115及117。两个系列的梳状物彼此平行且全部具有在同一方向上延伸的垂直柱。相比来说，在图9及10的实施例中，一个梳状物系列具有向上延伸的垂直柱，而另一梳状物系列具有向下延伸的垂直柱。举例来说，图10的实施例在第一梳状物系列内具有全局位线111、113、115及117；且在第二梳状物系列内具有全局位线112、114、116及118。所述第一系列由全局位线118及附接到全局位线118的垂直柱180、181及182例示；而所述第二系列由全局位线117与附接到全局位线117的垂直柱178及179的组合例示。所述第一梳状物系列具有向上延伸的垂直柱，且所述第二系列具有向下延伸的垂直柱。
本文中所描述的存储器阵列可并入到集成电路中，且因此在一些应用中可由半导体衬底支撑。所述存储器阵列可通过任何适合处理形成。
图式中的各种实施例的特定定向仅出于图解说明的目的，且在一些应用中可相对于所展示的定向旋转所述实施例。本文中所提供的说明及以上权利要求书涉及具有各种特征之间的所描述关系的任何结构，而不论所述结构是呈所述图式的特定定向还是相对于此定向旋转。
当称如层、区域或衬底的元件“抵靠”另一元件时，其可直接抵靠另一元件或还可存在介入元件。相比来说，当称元件“直接抵靠”另一元件时，不存在介入元件。当称元件“连接”或“耦合”到另一元件时，其可直接连接或耦合到另一元件，或可存在介入元件。相比来说，当称元件“直接连接”或“直接耦合”到另一元件时，不存在介入元件。
术语“在…正上方”用以指示结构的垂直对准，且区别于仅指示一个结构在另一结构上方的术语“在…上方”。因此，如果第一结构在第二结构上方而不论可存在于所述第一结构与所述第二结构之间的任何横向位移如何，那么所述第一结构在所述第二结构上方；且如果第一结构与第二结构垂直对准，那么所述第一结构“在”所述第二结构“正上方”。
如果称一种或一种以上物质“直接在”一对结构“之间”，那么术语“直接在…之间”用以指示所述一种或一种以上物质夹在所述两个结构之间的间隙内。
在例如(举例来说)计算机、汽车、飞机、钟表、蜂窝式电话等电子系统中可利用上文所论述的实施例。

Claims (22)

1.一种存储器阵列，其包括多个存储器胞单元；所述阵列包括字线的多个高程水平及穿过每一水平的若干平面；对于个别存储器胞单元所消耗的字线、位线及空间，所述存储器胞单元沿所述平面的面积小于4F2，其中F为形成存储器阵列的最小特征大小。
2.根据权利要求1所述的存储器阵列，其中所述个别存储器胞单元沿所述平面的所述面积相对于所述存储器胞单元所消耗的字线、位线及空间为2F2。
3.根据权利要求1所述的存储器阵列，其中所述存储器胞单元包括相变材料且直接在字线与位线之间；且其中直接在所述字线与位线之间的仅有材料为所述相变材料。
4.根据权利要求1所述的存储器阵列，其包括：
全局位线，其沿第一水平方向延伸；所述全局位线包括第一高程水平处的第一系列及不同于所述第一高程水平的第二高程水平处的第二系列；所述第一系列的所述全局位线与所述第二系列的所述全局位线交替；
垂直局部位线，其垂直于所述全局位线延伸；
字线，其沿垂直于所述第一水平方向的第二水平方向延伸；所述字线堆叠在包括垂直列及水平行的二维阵列中；所述字线阵列的所述垂直列包括两个或两个以上字线；所述垂直局部位线延伸穿过所述字线阵列，使得垂直局部位线在所述字线阵列的邻近垂直列之间；及
存储器胞材料，其在所述字线与所述垂直局部位线之间；所述存储器胞材料形成所述存储器胞单元的存储器胞，其中个别存储器胞通过字线/全局位线组合唯一寻址。
5.根据权利要求4所述的存储器阵列，其中所述第一系列的所述全局位线在所述字线的与所述第二系列的所述全局位线相对的侧上。
6.根据权利要求5所述的存储器阵列，其中所述第一系列的所述全局位线在所述第二系列的所述全局位线正上方。
7.根据权利要求5所述的存储器阵列，其中所述第一系列的所述全局位线不在所述第二系列的所述全局位线正上方。
8.根据权利要求4所述的存储器阵列，其中所述第一系列的所述全局位线在所述字线的与所述第二系列的所述全局位线共同的侧上。
9.一种存储器阵列，其包括：
全局位线，其沿第一水平方向延伸；所述全局位线包括第一高程水平处的第一系列及不同于所述第一高程水平的第二高程水平处的第二系列；所述第一系列的所述全局位线与所述第二系列的所述全局位线交替；
垂直局部位线，其垂直于所述全局位线延伸；
字线，其沿垂直于所述第一水平方向的第二水平方向延伸；所述字线堆叠在包括垂直列及水平行的二维阵列中；所述字线阵列的所述垂直列包括两个或两个以上字线；所述垂直局部位线延伸穿过所述字线阵列，使得垂直局部位线在所述字线阵列的邻近垂直列之间；及
存储器胞材料，其直接在所述字线与所述垂直局部位线之间；所述存储器胞材料形成通过字线/全局位线组合唯一寻址的多个存储器胞。
10.根据权利要求9所述的存储器阵列，其中所述第一系列的所述全局位线在所述字线的与所述第二系列的所述全局位线相对的侧上。
11.根据权利要求10所述的存储器阵列，其中所述第一系列的所述全局位线在所述第二系列的所述全局位线正上方。
12.根据权利要求10所述的存储器阵列，其中所述第一系列的所述全局位线不在所述第二系列的所述全局位线正上方。
13.根据权利要求9所述的存储器阵列，其中所述第一系列的所述全局位线在所述字线的与所述第二系列的所述全局位线共同的侧上。
14.一种存储器阵列，其包括：
多个梳状物结构；所述多个梳状物结构中的每一者包括水平延伸的全局位线及电连接到所述全局位线的多个垂直延伸的位线柱；所述梳状物结构包括第一系列及第二系列；所述第二系列相对于所述第一系列垂直偏移；所述第一系列的所述梳状物结构与所述第二系列的所述梳状物结构交替以形成所述垂直延伸的位线柱的交错布置；所述水平延伸的全局位线彼此平行；
字线，其正交于所述全局位线延伸；所述字线堆叠在包括垂直列及水平行的二维阵列中；所述字线阵列的所述垂直列包括两个或两个以上字线；所述位线柱延伸穿过所述字线阵列，使得位线柱在所述字线阵列的邻近垂直列之间；及
存储器胞材料，其直接在所述字线与所述位线柱之间；所述存储器胞材料形成通过字线/全局位线组合唯一寻址的多个存储器胞。
15.根据权利要求14所述的存储器阵列，其中所述梳状物结构的所述第一系列的所述垂直延伸的位线柱从所述全局位线向下延伸，且所述梳状物结构的所述第二系列的所述垂直延伸的位线柱从所述全局位线向上延伸。
16.根据权利要求15所述的存储器阵列，其中所述梳状物结构的所述第一系列的个别全局位线在所述梳状物结构的所述第二系列的个别全局位线正上方。
17.根据权利要求15所述的存储器阵列，其中所述梳状物结构的所述第一系列的个别全局位线从所述梳状物结构的所述第二系列的个别全局位线正上方偏移。
18.根据权利要求14所述的存储器阵列，其中所述梳状物结构的所述第一系列及所述梳状物结构的第二系列的所述垂直延伸的位线柱从所述全局位线向上延伸。
19.根据权利要求14所述的存储器阵列，其中所述梳状物结构的所述垂直延伸的位线柱经由非线性地响应于增加的电压的存取装置连接到所述全局位线。
20.根据权利要求14所述的存储器阵列，其中所述梳状物结构的所述垂直延伸的位线柱经由双向阈值开关连接到所述全局位线。
21.根据权利要求14所述的存储器阵列，其中与个别垂直延伸的位线柱相关联的多个存储器胞的所述存储器胞材料在所述垂直延伸的位线柱的表面上为非连续的。
22.根据权利要求14所述的存储器阵列，其中与个别垂直延伸的位线柱相关联的多个存储器胞的所述存储器胞材料在所述垂直延伸的位线柱的表面上为连续的。
CN201180027954.6A 2010-06-07 2011-05-06 存储器阵列 Active CN102939632B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/795,565 US8289763B2 (en) 2010-06-07 2010-06-07 Memory arrays
US12/795,565 2010-06-07
PCT/US2011/035601 WO2011156069A2 (en) 2010-06-07 2011-05-06 Memory arrays

Publications (2)

Publication Number Publication Date
CN102939632A CN102939632A (zh) 2013-02-20
CN102939632B true CN102939632B (zh) 2015-06-17

Family

ID=45064357

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180027954.6A Active CN102939632B (zh) 2010-06-07 2011-05-06 存储器阵列

Country Status (8)

Country Link
US (11) US8289763B2 (zh)
EP (1) EP2577668B1 (zh)
JP (1) JP5549962B2 (zh)
KR (1) KR101417568B1 (zh)
CN (1) CN102939632B (zh)
SG (1) SG186189A1 (zh)
TW (1) TWI517304B (zh)
WO (1) WO2011156069A2 (zh)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8289763B2 (en) 2010-06-07 2012-10-16 Micron Technology, Inc. Memory arrays
CN102881317B (zh) * 2011-07-13 2015-08-12 华邦电子股份有限公司 三维存储器阵列
US8835990B2 (en) * 2011-08-12 2014-09-16 Winbond Electronics Corp. 3D memory array
KR101957897B1 (ko) * 2012-04-26 2019-03-13 에스케이하이닉스 주식회사 가변 저항 메모리 장치 및 그 제조 방법
US8729523B2 (en) * 2012-08-31 2014-05-20 Micron Technology, Inc. Three dimensional memory array architecture
US8841649B2 (en) * 2012-08-31 2014-09-23 Micron Technology, Inc. Three dimensional memory array architecture
KR20140054975A (ko) * 2012-10-30 2014-05-09 에스케이하이닉스 주식회사 가변 저항 메모리 장치
KR20140113024A (ko) * 2013-03-15 2014-09-24 에스케이하이닉스 주식회사 저항 변화 메모리 장치 및 그 구동방법
US9728584B2 (en) 2013-06-11 2017-08-08 Micron Technology, Inc. Three dimensional memory array with select device
KR102061694B1 (ko) 2013-10-14 2020-01-02 삼성전자주식회사 3차원 크로스 포인트 어레이를 갖는 반도체 메모리 소자
US9236124B2 (en) 2014-03-07 2016-01-12 Kabushiki Kaisha Toshiba Nonvolatile memory device
KR20150124517A (ko) * 2014-04-28 2015-11-06 에스케이하이닉스 주식회사 전자 장치
KR102203459B1 (ko) 2014-08-11 2021-01-15 삼성전자주식회사 반도체 소자
EP3389199A4 (en) * 2015-12-30 2018-11-21 Huawei Technologies Co., Ltd. Bi-directional optical sub-assembly
US9837471B2 (en) 2016-04-14 2017-12-05 Western Digital Technologies, Inc. Dual OTS memory cell selection means and method
US10269804B2 (en) 2016-05-11 2019-04-23 Micron Technology, Inc. Array of cross point memory cells and methods of forming an array of cross point memory cells
KR20180064084A (ko) * 2016-12-05 2018-06-14 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR102345542B1 (ko) * 2017-06-02 2021-12-30 삼성전자주식회사 가변 저항 메모리 소자를 포함하는 반도체 소자
US10461125B2 (en) 2017-08-29 2019-10-29 Micron Technology, Inc. Three dimensional memory arrays
US10593730B1 (en) 2018-10-10 2020-03-17 Micron Technology, Inc. Three-dimensional memory array
US10700128B1 (en) 2018-12-21 2020-06-30 Micron Technology, Inc. Three-dimensional memory array
KR20210007737A (ko) 2019-07-12 2021-01-20 에스케이하이닉스 주식회사 수직형 메모리 장치
CN112420720B (zh) * 2020-11-13 2024-02-09 武汉新芯集成电路制造有限公司 半导体器件
US11475947B1 (en) 2021-04-15 2022-10-18 Micron Technology, Inc. Decoding architecture for memory tiles
US11894103B2 (en) 2021-04-15 2024-02-06 Micron Technology, Inc. Decoding architecture for word line tiles
US11587606B2 (en) 2021-04-15 2023-02-21 Micron Technology, Inc. Decoding architecture for memory devices

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101546602A (zh) * 2008-03-27 2009-09-30 三星电子株式会社 使用可变电阻元件的非易失性存储器设备

Family Cites Families (290)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE713483A (zh) 1968-04-10 1968-08-16
GB1266513A (zh) 1969-05-19 1972-03-08
AU562641B2 (en) 1983-01-18 1987-06-18 Energy Conversion Devices Inc. Electronic matrix array
US4616392A (en) 1984-10-04 1986-10-14 Westinghouse Electric Corp. Bladder mandrel for hydraulic expansions of tubes and sleeves
US4715685A (en) 1985-03-04 1987-12-29 Energy Conversion Devices, Inc. Liquid crystal display having potential source in a diode ring
JPH01130552A (ja) 1987-11-17 1989-05-23 Sharp Corp 高抵抗素子
US4964080A (en) 1990-03-09 1990-10-16 Intel Corporation Three-dimensional memory cell with integral select transistor
US5057888A (en) 1991-01-28 1991-10-15 Micron Technology, Inc. Double DRAM cell
US6432767B2 (en) 1995-12-05 2002-08-13 Hitachi, Ltd. Method of fabricating semiconductor device
US6271131B1 (en) 1998-08-26 2001-08-07 Micron Technology, Inc. Methods for forming rhodium-containing layers such as platinum-rhodium barrier layers
US6197628B1 (en) 1998-08-27 2001-03-06 Micron Technology, Inc. Ruthenium silicide diffusion barrier layers and methods of forming same
US6034882A (en) 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US7157314B2 (en) 1998-11-16 2007-01-02 Sandisk Corporation Vertically stacked field programmable nonvolatile memory and method of fabrication
US6635914B2 (en) 2000-09-08 2003-10-21 Axon Technologies Corp. Microelectronic programmable device and methods of forming and programming the same
US6218696B1 (en) 1999-06-07 2001-04-17 Infineon Technologies North America Corp. Layout and wiring scheme for memory cells with vertical transistors
US20040124407A1 (en) 2000-02-11 2004-07-01 Kozicki Michael N. Scalable programmable structure, an array including the structure, and methods of forming the same
US7247876B2 (en) 2000-06-30 2007-07-24 Intel Corporation Three dimensional programmable device and method for fabricating the same
US6451646B1 (en) 2000-08-30 2002-09-17 Micron Technology, Inc. High-k dielectric materials and processes for manufacturing them
US7067852B1 (en) 2000-09-12 2006-06-27 National Semiconductor Corporation Electrostatic discharge (ESD) protection structure
KR100451096B1 (ko) 2000-09-19 2004-10-02 엔이씨 일렉트로닉스 가부시키가이샤 자기메모리셀어레이를 갖는 비휘발성 반도체메모리장치
KR100751736B1 (ko) 2000-11-01 2007-08-27 도꾸리쯔교세이호징 가가꾸 기쥬쯔 신꼬 기꼬 포인트 컨택트 어레이, ｎｏｔ 회로, 및 이를 이용한 전자회로
US6534357B1 (en) 2000-11-09 2003-03-18 Micron Technology, Inc. Methods for forming conductive structures and structures regarding same
US6646297B2 (en) 2000-12-26 2003-11-11 Ovonyx, Inc. Lower electrode isolation in a double-wide trench
US6524867B2 (en) 2000-12-28 2003-02-25 Micron Technology, Inc. Method for forming platinum-rhodium stack as an oxygen barrier
US6440753B1 (en) 2001-01-24 2002-08-27 Infineon Technologies North America Corp. Metal hard mask for ILD RIE processing of semiconductor memory devices to prevent oxidation of conductive lines
JP4818519B2 (ja) 2001-02-06 2011-11-16 ルネサスエレクトロニクス株式会社 磁気記憶装置
US7102150B2 (en) 2001-05-11 2006-09-05 Harshfield Steven T PCRAM memory cell and method of making same
ITMI20011150A1 (it) 2001-05-30 2002-11-30 St Microelectronics Srl Multiplatore di colonna per memorie a semiconduttore
US6693821B2 (en) 2001-06-28 2004-02-17 Sharp Laboratories Of America, Inc. Low cross-talk electrically programmable resistance cross point memory
US6825058B2 (en) 2001-06-28 2004-11-30 Sharp Laboratories Of America, Inc. Methods of fabricating trench isolated cross-point memory array
US7193267B2 (en) 2001-06-28 2007-03-20 Sharp Laboratories Of America, Inc. Cross-point resistor memory array
US6905937B2 (en) 2001-06-28 2005-06-14 Sharp Laboratories Of America, Inc. Methods of fabricating a cross-point resistor memory array
US6747286B2 (en) 2001-06-30 2004-06-08 Ovonyx, Inc. Pore structure for programmable device
US6567301B2 (en) 2001-08-09 2003-05-20 Hewlett-Packard Development Company, L.P. One-time programmable unit memory cell based on vertically oriented fuse and diode and one-time programmable memory using the same
US6946712B2 (en) 2001-11-07 2005-09-20 Kabushiki Kaisha Toshiba Magnetic memory device using SOI substrate
US20030143853A1 (en) 2002-01-31 2003-07-31 Celii Francis G. FeRAM capacitor stack etch
JP2003273252A (ja) 2002-03-12 2003-09-26 Mitsubishi Electric Corp 半導体記憶装置
US6778421B2 (en) 2002-03-14 2004-08-17 Hewlett-Packard Development Company, Lp. Memory device array having a pair of magnetic bits sharing a common conductor line
US6687147B2 (en) 2002-04-02 2004-02-03 Hewlett-Packard Development Company, L.P. Cubic memory array with diagonal select lines
JP4047615B2 (ja) 2002-04-03 2008-02-13 株式会社ルネサステクノロジ 磁気記憶装置
US6757188B2 (en) 2002-05-22 2004-06-29 Hewlett-Packard Development Company, L.P. Triple sample sensing for magnetic random access memory (MRAM) with series diodes
DE10223178B4 (de) 2002-05-24 2004-11-04 Infineon Technologies Ag Schaltungsanordnung mit einer Ablaufsteuerung, integrierter Speicher sowie Testanordnung mit einer derartigen Schaltungsanordnung
US6952043B2 (en) 2002-06-27 2005-10-04 Matrix Semiconductor, Inc. Electrically isolated pillars in active devices
TWI233204B (en) 2002-07-26 2005-05-21 Infineon Technologies Ag Nonvolatile memory element and associated production methods and memory element arrangements
US6859382B2 (en) 2002-08-02 2005-02-22 Unity Semiconductor Corporation Memory array of a non-volatile ram
US6970375B2 (en) 2002-08-02 2005-11-29 Unity Semiconductor Corporation Providing a reference voltage to a cross point memory array
US6753561B1 (en) 2002-08-02 2004-06-22 Unity Semiconductor Corporation Cross point memory array using multiple thin films
US6834008B2 (en) 2002-08-02 2004-12-21 Unity Semiconductor Corporation Cross point memory array using multiple modes of operation
US7067862B2 (en) 2002-08-02 2006-06-27 Unity Semiconductor Corporation Conductive memory device with conductive oxide electrodes
US6785159B2 (en) 2002-08-29 2004-08-31 Micron Technology, Inc. Combination etch stop and in situ resistor in a magnetoresistive memory and methods for fabricating same
US7184301B2 (en) 2002-11-27 2007-02-27 Nec Corporation Magnetic memory cell and magnetic random access memory using the same
JP2006511965A (ja) 2002-12-19 2006-04-06 マトリックス セミコンダクター インコーポレイテッド 高密度不揮発性メモリを製作するための改良された方法
DE10261457B3 (de) 2002-12-31 2004-03-25 Infineon Technologies Ag Integrierte Schaltungsanordnung mit einem Transistorarray aus vertikalen FET-Auswahltransistoren
US7005350B2 (en) 2002-12-31 2006-02-28 Matrix Semiconductor, Inc. Method for fabricating programmable memory array structures incorporating series-connected transistor strings
JP2004220740A (ja) 2003-01-17 2004-08-05 Seiko Epson Corp 強誘電体記憶装置
DE10306281B4 (de) 2003-02-14 2007-02-15 Infineon Technologies Ag Anordnung und Verfahren zur Herstellung von vertikalen Transistorzellen und transistorgesteuerten Speicherzellen
US6906937B1 (en) 2003-03-21 2005-06-14 Netlogic Microsystems, Inc. Bit line control circuit for a content addressable memory
US6958273B2 (en) 2003-03-21 2005-10-25 Silicon Storage Technology, Inc. Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate, pointed floating gate and pointed channel region, and a memory array made thereby
US6753562B1 (en) 2003-03-27 2004-06-22 Sharp Laboratories Of America, Inc. Spin transistor magnetic random access memory device
US7233024B2 (en) * 2003-03-31 2007-06-19 Sandisk 3D Llc Three-dimensional memory device incorporating segmented bit line memory array
US6879505B2 (en) 2003-03-31 2005-04-12 Matrix Semiconductor, Inc. Word line arrangement having multi-layer word line segments for three-dimensional memory array
US7459715B2 (en) 2003-04-03 2008-12-02 Kabushiki Kaisha Toshiba Resistance change memory device
JP4445398B2 (ja) 2003-04-03 2010-04-07 株式会社東芝 相変化メモリ装置
US6806531B1 (en) 2003-04-07 2004-10-19 Silicon Storage Technology, Inc. Non-volatile floating gate memory cell with floating gates formed in cavities, and array thereof, and method of formation
US7001846B2 (en) 2003-05-20 2006-02-21 Sharp Laboratories Of America, Inc. High-density SOI cross-point memory array and method for fabricating same
US7291878B2 (en) 2003-06-03 2007-11-06 Hitachi Global Storage Technologies Netherlands B.V. Ultra low-cost solid-state memory
TW589753B (en) 2003-06-03 2004-06-01 Winbond Electronics Corp Resistance random access memory and method for fabricating the same
US7416911B2 (en) 2003-06-24 2008-08-26 California Institute Of Technology Electrochemical method for attaching molecular and biomolecular structures to semiconductor microstructures and nanostructures
KR100507205B1 (ko) 2003-07-15 2005-08-10 현대자동차주식회사 노킹 센서 장착 위치 설정 방법
US7029924B2 (en) 2003-09-05 2006-04-18 Sharp Laboratories Of America, Inc. Buffered-layer memory cell
US6955992B2 (en) 2003-09-30 2005-10-18 Sharp Laboratories Of America, Inc. One mask PT/PCMO/PT stack etching process for RRAM applications
JPWO2005041303A1 (ja) 2003-10-23 2007-04-26 松下電器産業株式会社 抵抗変化素子、その製造方法、その素子を含むメモリ、およびそのメモリの駆動方法
US7098438B1 (en) 2003-11-19 2006-08-29 Raytheon Company Method and apparatus for resetting a high speed latch circuit
US7009278B2 (en) 2003-11-24 2006-03-07 Sharp Laboratories Of America, Inc. 3d rram
US6937507B2 (en) 2003-12-05 2005-08-30 Silicon Storage Technology, Inc. Memory device and method of operating same
JP4567963B2 (ja) 2003-12-05 2010-10-27 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US6849891B1 (en) 2003-12-08 2005-02-01 Sharp Laboratories Of America, Inc. RRAM memory cell electrodes
US7002197B2 (en) 2004-01-23 2006-02-21 Hewlett-Packard Development Company, L.P. Cross point resistive memory array
US7138687B2 (en) 2004-01-26 2006-11-21 Macronix International Co., Ltd. Thin film phase-change memory
US20060171200A1 (en) 2004-02-06 2006-08-03 Unity Semiconductor Corporation Memory using mixed valence conductive oxides
US7082052B2 (en) 2004-02-06 2006-07-25 Unity Semiconductor Corporation Multi-resistive state element with reactive metal
US7538338B2 (en) 2004-09-03 2009-05-26 Unity Semiconductor Corporation Memory using variable tunnel barrier widths
US7050316B1 (en) 2004-03-09 2006-05-23 Silicon Storage Technology, Inc. Differential non-volatile content addressable memory cell and array using phase changing resistor storage elements
US7476945B2 (en) 2004-03-17 2009-01-13 Sanyo Electric Co., Ltd. Memory having reduced memory cell size
DE102004020297B4 (de) 2004-04-26 2007-06-21 Infineon Technologies Ag Verfahren zur Herstellung resistiv schaltender Speicherbauelemente
DE102004026003B3 (de) 2004-05-27 2006-01-19 Infineon Technologies Ag Resistive Speicherzellen-Anordnung
JP4377751B2 (ja) * 2004-06-10 2009-12-02 シャープ株式会社 クロスポイント構造の半導体記憶装置及びその製造方法
KR100614240B1 (ko) 2004-06-10 2006-08-18 삼성전자주식회사 전계 효과 트랜지스터를 포함하는 반도체 소자 및 그 형성방법
US7187201B1 (en) 2004-06-24 2007-03-06 Xilinx, Inc. Programmable logic device suitable for implementation in molecular electronics
US7091091B2 (en) 2004-06-28 2006-08-15 Promos Technologies Inc. Nonvolatile memory fabrication methods in which a dielectric layer underlying a floating gate layer is spaced from an edge of an isolation trench and/or an edge of the floating gate layer
KR20070028604A (ko) 2004-06-30 2007-03-12 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 나노선(ｎａｎｏｗｉｒｅ)에 의해 접촉되는 전도성 있는재료로 된 층이 있는 전기 장치 및 그 제조 방법
US7791141B2 (en) 2004-07-09 2010-09-07 International Business Machines Corporation Field-enhanced programmable resistance memory cell
JP2006032729A (ja) 2004-07-16 2006-02-02 Matsushita Electric Ind Co Ltd 不揮発性メモリとその製造方法
JP4827074B2 (ja) 2004-07-22 2011-11-30 シャープ株式会社 高密度ｓｏｉクロスポイントメモリアレイおよびそれを製造するための方法
US7180160B2 (en) 2004-07-30 2007-02-20 Infineon Technologies Ag MRAM storage device
US20080008642A1 (en) 2004-08-24 2008-01-10 Osaka University Process For Producing Aluminum Nitride Crystal And Aluminum Nitride Crystal Obtained Thereby
KR100568543B1 (ko) 2004-08-31 2006-04-07 삼성전자주식회사 작은 접점을 갖는 상변화 기억 소자의 제조방법
KR100645044B1 (ko) 2004-09-17 2006-11-10 삼성전자주식회사 높은 신뢰도를 갖는 불 휘발성 메모리 장치의 프로그램 방법
US7205238B2 (en) 2004-10-21 2007-04-17 Sharp Laboratories Of America, Inc. Chemical mechanical polish of PCMO thin films for RRAM applications
JP4687066B2 (ja) 2004-10-25 2011-05-25 株式会社デンソー パワーｉｃ
US7189626B2 (en) 2004-11-03 2007-03-13 Micron Technology, Inc. Electroless plating of metal caps for chalcogenide-based memory devices
US7035141B1 (en) 2004-11-17 2006-04-25 Spansion Llc Diode array architecture for addressing nanoscale resistive memory arrays
US20060108667A1 (en) 2004-11-22 2006-05-25 Macronix International Co., Ltd. Method for manufacturing a small pin on integrated circuits or other devices
WO2006070693A1 (ja) 2004-12-27 2006-07-06 Nec Corporation スイッチング素子、スイッチング素子の駆動方法および製造方法、書き換え可能な論理集積回路、メモリ素子
JP4578985B2 (ja) 2005-01-12 2010-11-10 日本車輌製造株式会社 押出し中空形材及びその形材によって形成された鉄道車両構体
US7046550B1 (en) 2005-01-18 2006-05-16 International Business Machines Corporation Cross-point memory architecture with improved selectivity
US7208372B2 (en) 2005-01-19 2007-04-24 Sharp Laboratories Of America, Inc. Non-volatile memory resistor cell with nanotip electrode
KR100682926B1 (ko) 2005-01-31 2007-02-15 삼성전자주식회사 저항체를 이용한 비휘발성 메모리 소자 및 그 제조방법
JP4462424B2 (ja) 2005-02-03 2010-05-12 セイコーエプソン株式会社 半導体装置
DE102005005938B4 (de) 2005-02-09 2009-04-30 Qimonda Ag Resistives Speicherelement mit verkürzter Löschzeit, Verfahren zur Herstellung und Speicherzellen-Anordnung
WO2006087798A1 (ja) 2005-02-18 2006-08-24 Fujitsu Limited 記憶素子マトリックス、その記憶素子マトリックスの製造方法、及び、その記憶素子マトリックスを用いた半導体回路装置
KR100697282B1 (ko) 2005-03-28 2007-03-20 삼성전자주식회사 저항 메모리 셀, 그 형성 방법 및 이를 이용한 저항 메모리배열
US8031509B2 (en) 2008-12-19 2011-10-04 Unity Semiconductor Corporation Conductive metal oxide structures in non-volatile re-writable memory devices
US7154774B2 (en) 2005-03-30 2006-12-26 Ovonyx, Inc. Detecting switching of access elements of phase change memory cells
US7323349B2 (en) 2005-05-02 2008-01-29 Sharp Laboratories Of America, Inc. Self-aligned cross point resistor memory array
US7782650B2 (en) 2005-05-09 2010-08-24 Nantero, Inc. Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
US9196615B2 (en) 2005-05-09 2015-11-24 Nantero Inc. Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
US7585724B2 (en) 2005-05-10 2009-09-08 Elite Semiconductor Memory Technology, Inc. FLASH memory device and method of manufacture
KR100655447B1 (ko) 2005-06-07 2006-12-08 삼성전자주식회사 플로팅 게이트를 갖는 비휘발성 기억 소자 및 그 형성 방법
US7514288B2 (en) 2005-06-17 2009-04-07 Macronix International Co., Ltd. Manufacturing methods for thin film fuse phase change ram
US7238994B2 (en) 2005-06-17 2007-07-03 Macronix International Co., Ltd. Thin film plate phase change ram circuit and manufacturing method
US7321130B2 (en) 2005-06-17 2008-01-22 Macronix International Co., Ltd. Thin film fuse phase change RAM and manufacturing method
US20070010082A1 (en) 2005-07-05 2007-01-11 Cay-Uwe Pinnow Structure and method for manufacturing phase change memories with particular switching characteristics
US7446010B2 (en) 2005-07-18 2008-11-04 Sharp Laboratories Of America, Inc. Metal/semiconductor/metal (MSM) back-to-back Schottky diode
KR20080040715A (ko) 2005-07-22 2008-05-08 콸콤 인코포레이티드 Ｍｅｍｓ 장치를 위한 지지 구조물 및 그 방법들
US7521705B2 (en) 2005-08-15 2009-04-21 Micron Technology, Inc. Reproducible resistance variable insulating memory devices having a shaped bottom electrode
JP4309877B2 (ja) 2005-08-17 2009-08-05 シャープ株式会社 半導体記憶装置
US20070048990A1 (en) 2005-08-30 2007-03-01 Sharp Laboratories Of America, Inc. Method of buffer layer formation for RRAM thin film deposition
KR100630437B1 (ko) 2005-08-31 2006-10-02 삼성전자주식회사 비휘발성 유기물 저항 메모리 장치 및 그 제조 방법
KR100665227B1 (ko) 2005-10-18 2007-01-09 삼성전자주식회사 상변화 메모리 장치 및 그 제조 방법
US7236389B2 (en) 2005-11-17 2007-06-26 Sharp Laboratories Of America, Inc. Cross-point RRAM memory array having low bit line crosstalk
US7666526B2 (en) 2005-11-30 2010-02-23 The Trustees Of The University Of Pennsylvania Non-volatile resistance-switching oxide thin film devices
US8106375B2 (en) 2005-11-30 2012-01-31 The Trustees Of The University Of Pennsylvania Resistance-switching memory based on semiconductor composition of perovskite conductor doped perovskite insulator
US20070132049A1 (en) 2005-12-12 2007-06-14 Stipe Barry C Unipolar resistance random access memory (RRAM) device and vertically stacked architecture
JP4054347B2 (ja) 2005-12-16 2008-02-27 シャープ株式会社 不揮発性半導体記憶装置
CN101461071B (zh) 2005-12-20 2012-01-18 Nxp股份有限公司 纵向相变存储器单元及其制造方法
KR100655082B1 (ko) 2005-12-23 2006-12-08 삼성전자주식회사 상변화 메모리 소자 및 그 제조방법
US7531825B2 (en) 2005-12-27 2009-05-12 Macronix International Co., Ltd. Method for forming self-aligned thermal isolation cell for a variable resistance memory array
US7560337B2 (en) 2006-01-09 2009-07-14 Macronix International Co., Ltd. Programmable resistive RAM and manufacturing method
KR101186293B1 (ko) 2006-01-19 2012-09-27 삼성전자주식회사 배리스터를 포함하는 저항성 메모리 소자 및 그 동작 방법
JP2007201081A (ja) 2006-01-25 2007-08-09 Elpida Memory Inc 半導体記憶装置
US7456421B2 (en) 2006-01-30 2008-11-25 Macronix International Co., Ltd. Vertical side wall active pin structures in a phase change memory and manufacturing methods
KR100723420B1 (ko) 2006-02-20 2007-05-30 삼성전자주식회사 비정질 합금 산화층을 포함하는 비휘발성 메모리 소자
KR100707212B1 (ko) 2006-03-08 2007-04-13 삼성전자주식회사 나노 와이어 메모리 소자 및 그 제조 방법
KR100745764B1 (ko) 2006-03-09 2007-08-02 삼성전자주식회사 나노 와이어 메모리 소자의 제조 방법 및 이 방법에사용되는 나노 와이어 형성 제어 시스템
KR101176543B1 (ko) 2006-03-10 2012-08-28 삼성전자주식회사 저항성 메모리소자
US8395199B2 (en) 2006-03-25 2013-03-12 4D-S Pty Ltd. Systems and methods for fabricating self-aligned memory cell
US20070246795A1 (en) 2006-04-20 2007-10-25 Micron Technology, Inc. Dual depth shallow trench isolation and methods to form same
KR101213702B1 (ko) 2006-04-21 2012-12-18 삼성전자주식회사 비휘발성 메모리 소자, 그 동작 방법, 및 그 제조 방법
US7606055B2 (en) 2006-05-18 2009-10-20 Micron Technology, Inc. Memory architecture and cell design employing two access transistors
KR101206034B1 (ko) 2006-05-19 2012-11-28 삼성전자주식회사 산소결핍 금속산화물을 이용한 비휘발성 메모리 소자 및 그제조방법
KR100833903B1 (ko) 2006-06-13 2008-06-03 광주과학기술원 비휘발성 기억소자, 그 제조방법 및 그 제조장치
KR100818271B1 (ko) 2006-06-27 2008-03-31 삼성전자주식회사 펄스전압을 인가하는 비휘발성 메모리 소자의 문턱 스위칭동작 방법
KR101159075B1 (ko) 2006-06-27 2012-06-25 삼성전자주식회사 ｎ+ 계면층을 구비한 가변 저항 랜덤 액세스 메모리 소자
US7569459B2 (en) 2006-06-30 2009-08-04 International Business Machines Corporation Nonvolatile programmable resistor memory cell
US7696077B2 (en) 2006-07-14 2010-04-13 Micron Technology, Inc. Bottom electrode contacts for semiconductor devices and methods of forming same
US7932548B2 (en) 2006-07-14 2011-04-26 4D-S Pty Ltd. Systems and methods for fabricating self-aligned memory cell
JP2008028228A (ja) 2006-07-24 2008-02-07 Seiko Epson Corp 可変抵抗素子および抵抗変化型メモリ装置
US7807995B2 (en) 2006-07-27 2010-10-05 Panasonic Corporation Nonvolatile semiconductor memory apparatus and manufacturing method thereof
KR101309111B1 (ko) 2006-07-27 2013-09-17 삼성전자주식회사 폴리실리콘 패턴의 형성방법과 폴리실리콘 패턴을 포함한다층 교차점 저항성 메모리 소자 및 그의 제조방법
KR100749740B1 (ko) 2006-08-01 2007-08-17 삼성전자주식회사 상변화 메모리 장치의 제조 방법
US7515454B2 (en) 2006-08-02 2009-04-07 Infineon Technologies Ag CBRAM cell and CBRAM array, and method of operating thereof
US7727908B2 (en) 2006-08-03 2010-06-01 Micron Technology, Inc. Deposition of ZrA1ON films
JP4344372B2 (ja) 2006-08-22 2009-10-14 シャープ株式会社 半導体記憶装置及びその駆動方法
KR100755409B1 (ko) 2006-08-28 2007-09-04 삼성전자주식회사 저항 메모리 소자의 프로그래밍 방법
WO2008029446A1 (fr) 2006-09-05 2008-03-13 Fujitsu Limited Procédé d'écriture d'appareil de stockage a semi-conducteur non volatil
US7553758B2 (en) 2006-09-18 2009-06-30 Samsung Electronics Co., Ltd. Method of fabricating interconnections of microelectronic device using dual damascene process
JP2008078404A (ja) 2006-09-21 2008-04-03 Toshiba Corp 半導体メモリ及びその製造方法
US8058643B2 (en) 2006-09-29 2011-11-15 The Board Of Trustees Of The Leland Stanford Junior University Electrochemical memory with internal boundary
US7751163B2 (en) 2006-09-29 2010-07-06 Qimonda Ag Electric device protection circuit and method for protecting an electric device
KR100772904B1 (ko) 2006-10-02 2007-11-05 삼성전자주식회사 가변저항 메모리 장치 및 그 제조 방법
KR100819099B1 (ko) 2006-10-02 2008-04-03 삼성전자주식회사 가변저항 반도체 메모리 장치
KR100858083B1 (ko) 2006-10-18 2008-09-10 삼성전자주식회사 하부전극 콘택층과 상변화층 사이에 넓은 접촉면적을 갖는상변화 메모리 소자 및 그 제조 방법
US10134985B2 (en) 2006-10-20 2018-11-20 The Regents Of The University Of Michigan Non-volatile solid state resistive switching devices
US20080102278A1 (en) 2006-10-27 2008-05-01 Franz Kreupl Carbon filament memory and method for fabrication
KR100827661B1 (ko) 2006-10-31 2008-05-07 삼성전자주식회사 이중의 하부 전극을 갖는 상변화 기억소자 및 그 제조방법
US7639523B2 (en) 2006-11-08 2009-12-29 Symetrix Corporation Stabilized resistive switching memory
US7872900B2 (en) 2006-11-08 2011-01-18 Symetrix Corporation Correlated electron memory
KR100827697B1 (ko) 2006-11-10 2008-05-07 삼성전자주식회사 3차원 구조를 가지는 반도체 메모리 장치 및 셀 어레이구조
KR101196392B1 (ko) 2006-11-28 2012-11-02 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
US7864568B2 (en) * 2006-12-07 2011-01-04 Renesas Electronics Corporation Semiconductor storage device
US7557424B2 (en) 2007-01-03 2009-07-07 International Business Machines Corporation Reversible electric fuse and antifuse structures for semiconductor devices
US8675571B2 (en) 2007-01-04 2014-03-18 Nokia Corporation Apparatus, methods and computer program products providing a common signaling entry for a modular control channel structure
JP5091491B2 (ja) 2007-01-23 2012-12-05 株式会社東芝 不揮発性半導体記憶装置
KR100881292B1 (ko) 2007-01-23 2009-02-04 삼성전자주식회사 3차원 적층구조를 가지는 저항성 반도체 메모리 장치 및그의 제어방법
KR100885184B1 (ko) 2007-01-30 2009-02-23 삼성전자주식회사 전기장 및 자기장에 의해 독립적으로 제어될 수 있는 저항특성을 갖는 메모리 장치 및 그 동작 방법
US7800093B2 (en) 2007-02-01 2010-09-21 Qimonda North America Corp. Resistive memory including buried word lines
CN101242707A (zh) 2007-02-07 2008-08-13 鸿富锦精密工业（深圳）有限公司 电路板及其设计方法
US20080185687A1 (en) 2007-02-07 2008-08-07 Industry-University Cooperation Foundation Hanyang University Memory device and method for fabricating the same
JP2008192995A (ja) 2007-02-07 2008-08-21 Matsushita Electric Ind Co Ltd 抵抗変化素子とその製造方法ならびにそれを用いた抵抗変化型メモリ
US7906175B2 (en) 2007-02-21 2011-03-15 Air Liquide Electronics U.S. Lp Methods for forming a ruthenium-based film on a substrate
JP4798793B2 (ja) 2007-02-27 2011-10-19 ヤマハモーターパワープロダクツ株式会社 発電装置におけるキャニスタ配設構造
US7382647B1 (en) 2007-02-27 2008-06-03 International Business Machines Corporation Rectifying element for a crosspoint based memory array architecture
KR100852206B1 (ko) 2007-04-04 2008-08-13 삼성전자주식회사 저항 메모리 소자 및 그 제조 방법.
US7723786B2 (en) 2007-04-11 2010-05-25 Ronald Kakoschke Apparatus of memory array using FinFETs
US7569844B2 (en) 2007-04-17 2009-08-04 Macronix International Co., Ltd. Memory cell sidewall contacting side electrode
US7755076B2 (en) 2007-04-17 2010-07-13 Macronix International Co., Ltd. 4F2 self align side wall active phase change memory
CN100521278C (zh) 2007-04-19 2009-07-29 复旦大学 以CuxO为存储介质的RRAM的制备方法
US7990754B2 (en) 2007-06-01 2011-08-02 Panasonic Corporation Resistance variable memory apparatus
US7459716B2 (en) 2007-06-11 2008-12-02 Kabushiki Kaisha Toshiba Resistance change memory device
JP4280302B2 (ja) * 2007-06-22 2009-06-17 パナソニック株式会社 抵抗変化型不揮発性記憶装置
US8513637B2 (en) 2007-07-13 2013-08-20 Macronix International Co., Ltd. 4F2 self align fin bottom electrodes FET drive phase change memory
TWI402980B (zh) 2007-07-20 2013-07-21 Macronix Int Co Ltd 具有緩衝層之電阻式記憶結構
KR101344346B1 (ko) 2007-07-25 2013-12-24 삼성전자주식회사 상변화 기억 소자 및 그 형성 방법
JP5088036B2 (ja) 2007-08-06 2012-12-05 ソニー株式会社 記憶素子および記憶装置
US7772580B2 (en) 2007-08-10 2010-08-10 Qimonda Ag Integrated circuit having a cell with a resistivity changing layer
JP2009059735A (ja) 2007-08-29 2009-03-19 Elpida Memory Inc 半導体記憶装置
TW200913249A (en) 2007-09-04 2009-03-16 Ind Tech Res Inst Phase-change memory and fabrication method thereof
US7838861B2 (en) 2007-09-17 2010-11-23 Qimonda Ag Integrated circuits; methods for manufacturing an integrated circuit and memory module
JP2009081251A (ja) * 2007-09-26 2009-04-16 Panasonic Corp 抵抗変化素子とその製造方法ならびに抵抗変化型メモリ
US8665629B2 (en) 2007-09-28 2014-03-04 Qimonda Ag Condensed memory cell structure using a FinFET
KR20090055874A (ko) 2007-11-29 2009-06-03 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
JP4466738B2 (ja) 2008-01-09 2010-05-26 ソニー株式会社 記憶素子および記憶装置
US7768812B2 (en) 2008-01-15 2010-08-03 Micron Technology, Inc. Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices
US20090250661A1 (en) 2008-01-18 2009-10-08 Stevenson Steven A Trimetallic Nitride Clusters Entrapped Within CnN Heteroatom Cages
JP5049814B2 (ja) 2008-02-14 2012-10-17 株式会社東芝 不揮発性半導体記憶装置のデータ書き込み方法
US7742324B2 (en) * 2008-02-19 2010-06-22 Micron Technology, Inc. Systems and devices including local data lines and methods of using, making, and operating the same
KR100978911B1 (ko) 2008-02-28 2010-08-31 삼성전자주식회사 반도체 장치 및 그의 형성방법
JP2009212202A (ja) 2008-03-03 2009-09-17 Elpida Memory Inc 相変化メモリ装置およびその製造方法
US7960216B2 (en) 2008-05-10 2011-06-14 Intermolecular, Inc. Confinement techniques for non-volatile resistive-switching memories
US8343813B2 (en) 2009-04-10 2013-01-01 Intermolecular, Inc. Resistive-switching memory elements having improved switching characteristics
US8034655B2 (en) 2008-04-08 2011-10-11 Micron Technology, Inc. Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays
DE102008019860B4 (de) 2008-04-15 2010-10-07 Technische Universität Dresden Vorrichtung, Verfahren und Verwendung des Verfahrens zur Erzeugung von schaltbarem temporärem Magnetismus in oxidischen Materialien mittels elektrischer Felder
KR20090109804A (ko) 2008-04-16 2009-10-21 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
US8098520B2 (en) 2008-04-25 2012-01-17 Seagate Technology Llc Storage device including a memory cell having multiple memory layers
US7969806B2 (en) 2008-04-28 2011-06-28 Qimonda Ag Systems and methods for writing to a memory
JP2009267219A (ja) 2008-04-28 2009-11-12 Hitachi Ltd 半導体記憶装置およびその製造方法
US8129704B2 (en) 2008-05-01 2012-03-06 Intermolecular, Inc. Non-volatile resistive-switching memories
US8062918B2 (en) 2008-05-01 2011-11-22 Intermolecular, Inc. Surface treatment to improve resistive-switching characteristics
US8053364B2 (en) 2008-05-01 2011-11-08 Intermolecular, Inc. Closed-loop sputtering controlled to enhance electrical characteristics in deposited layer
US8551809B2 (en) 2008-05-01 2013-10-08 Intermolecular, Inc. Reduction of forming voltage in semiconductor devices
US8211743B2 (en) 2008-05-02 2012-07-03 Micron Technology, Inc. Methods of forming non-volatile memory cells having multi-resistive state material between conductive electrodes
US8284596B2 (en) 2008-06-09 2012-10-09 Qimonda Ag Integrated circuit including an array of diodes coupled to a layer of resistance changing material
US8134137B2 (en) 2008-06-18 2012-03-13 Micron Technology, Inc. Memory device constructions, memory cell forming methods, and semiconductor construction forming methods
US8114468B2 (en) 2008-06-18 2012-02-14 Boise Technology, Inc. Methods of forming a non-volatile resistive oxide memory array
US7795109B2 (en) 2008-06-23 2010-09-14 Qimonda Ag Isolation trenches with conductive plates
KR101407362B1 (ko) 2008-06-23 2014-06-16 삼성전자주식회사 상 변화 메모리 장치
KR20100001260A (ko) 2008-06-26 2010-01-06 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
JP2010009669A (ja) * 2008-06-26 2010-01-14 Toshiba Corp 半導体記憶装置
US7732235B2 (en) 2008-06-30 2010-06-08 Sandisk 3D Llc Method for fabricating high density pillar structures by double patterning using positive photoresist
US9343665B2 (en) 2008-07-02 2016-05-17 Micron Technology, Inc. Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array
JP5100555B2 (ja) 2008-07-30 2012-12-19 株式会社東芝 半導体記憶装置
CN101350360B (zh) 2008-08-29 2011-06-01 中国科学院上海微系统与信息技术研究所 一种三维堆叠非相变所致电阻转换存储装置及其制造方法
KR20100032572A (ko) 2008-09-18 2010-03-26 주식회사 하이닉스반도체 저항성 메모리 소자 및 그 제조 방법
KR101424138B1 (ko) 2008-09-19 2014-08-04 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
JP4733233B2 (ja) 2008-09-19 2011-07-27 パナソニック株式会社 電流抑制素子の製造方法
US8687402B2 (en) 2008-10-08 2014-04-01 The Regents Of The University Of Michigan Silicon-based nanoscale resistive device with adjustable resistance
US8063394B2 (en) 2008-10-08 2011-11-22 Qimonda Ag Integrated circuit
KR20100041155A (ko) 2008-10-13 2010-04-22 삼성전자주식회사 저항성 메모리 소자
US7897955B2 (en) 2008-11-03 2011-03-01 Seagate Technology Llc Programmable resistive memory cell with filament placement structure
US8022547B2 (en) 2008-11-18 2011-09-20 Seagate Technology Llc Non-volatile memory cells including small volume electrical contact regions
US20100135061A1 (en) 2008-12-02 2010-06-03 Shaoping Li Non-Volatile Memory Cell with Ferroelectric Layer Configurations
US20100140578A1 (en) 2008-12-05 2010-06-10 Seagate Technology Llc Non volatile memory cells including a composite solid electrolyte layer
WO2010068221A1 (en) 2008-12-12 2010-06-17 Hewlett-Packard Development Company, L.P. Memristive device
KR20100076274A (ko) 2008-12-26 2010-07-06 주식회사 하이닉스반도체 상변화 메모리 소자 및 그 제조방법
TWI401796B (zh) 2008-12-30 2013-07-11 Ind Tech Res Inst 導通微通道記憶體元件及其製造方法
KR20100078808A (ko) 2008-12-30 2010-07-08 삼성전자주식회사 저항성 메모리소자
WO2010082923A2 (en) 2009-01-13 2010-07-22 Hewlett-Packard Development Company, L.P. Programmable bipolar electronic device
KR101583717B1 (ko) 2009-01-13 2016-01-11 삼성전자주식회사 저항 메모리 장치의 제조방법
WO2010082922A1 (en) 2009-01-13 2010-07-22 Hewlett-Packard Development Company, L.P. Memristor having a triangular shaped electrode
JP2010165803A (ja) 2009-01-14 2010-07-29 Toshiba Corp 半導体記憶装置の製造方法及び半導体記憶装置
US8614432B2 (en) 2009-01-15 2013-12-24 Hewlett-Packard Development Company, L.P. Crystalline silicon-based memristive device with multiple mobile dopant species
US8471234B2 (en) 2009-01-20 2013-06-25 Hewlett-Packard Development Company, L.P. Multilayer memristive devices
WO2010087854A1 (en) 2009-01-30 2010-08-05 Hewlett-Packard Development Company, L.P. Memristive transistor memory
US8134138B2 (en) 2009-01-30 2012-03-13 Seagate Technology Llc Programmable metallization memory cell with planarized silver electrode
US8487291B2 (en) 2009-01-30 2013-07-16 Seagate Technology Llc Programmable metallization memory cell with layered solid electrolyte structure
TWI394231B (zh) 2009-02-03 2013-04-21 Nanya Technology Corp 非揮發性記憶體胞元及其製造方法
JP2010192569A (ja) 2009-02-17 2010-09-02 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2010192646A (ja) 2009-02-18 2010-09-02 Toshiba Corp 半導体装置及びその製造方法
US8021897B2 (en) 2009-02-19 2011-09-20 Micron Technology, Inc. Methods of fabricating a cross point memory array
WO2010101340A1 (ko) 2009-03-05 2010-09-10 광주과학기술원 3차원 구조를 갖는 저항 변화 메모리 소자, 저항 변화 메모리 소자 어레이, 전자제품 및 상기 소자 제조방법
WO2010104918A1 (en) 2009-03-10 2010-09-16 Contour Semiconductor, Inc. Three-dimensional memory array comprising vertical switches having three terminals
US8410559B2 (en) 2009-03-19 2013-04-02 International Business Machines Corporation Selectively self-assembling oxygen diffusion barrier
JP4810581B2 (ja) 2009-03-25 2011-11-09 株式会社東芝 不揮発性記憶装置
US8420478B2 (en) 2009-03-31 2013-04-16 Intermolecular, Inc. Controlled localized defect paths for resistive memories
US8351236B2 (en) 2009-04-08 2013-01-08 Sandisk 3D Llc Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture
US7983065B2 (en) 2009-04-08 2011-07-19 Sandisk 3D Llc Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines
US8199576B2 (en) 2009-04-08 2012-06-12 Sandisk 3D Llc Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architecture
JP2010263211A (ja) 2009-05-04 2010-11-18 Samsung Electronics Co Ltd 積層メモリ素子
TWI492432B (zh) 2009-12-17 2015-07-11 Hitachi Ltd Semiconductor memory device and manufacturing method thereof
US8048755B2 (en) 2010-02-08 2011-11-01 Micron Technology, Inc. Resistive memory and methods of processing resistive memory
US8411477B2 (en) 2010-04-22 2013-04-02 Micron Technology, Inc. Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells
US8427859B2 (en) 2010-04-22 2013-04-23 Micron Technology, Inc. Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells
US8289763B2 (en) 2010-06-07 2012-10-16 Micron Technology, Inc. Memory arrays
US8759809B2 (en) 2010-10-21 2014-06-24 Micron Technology, Inc. Integrated circuitry comprising nonvolatile memory cells having platelike electrode and ion conductive material layer
US9454997B2 (en) 2010-12-02 2016-09-27 Micron Technology, Inc. Array of nonvolatile memory cells having at least five memory cells per unit cell, having a plurality of the unit cells which individually comprise three elevational regions of programmable material, and/or having a continuous volume having a combination of a plurality of vertically oriented memory cells and a plurality of horizontally oriented memory cells; array of vertically stacked tiers of nonvolatile memory cells
KR20140043050A (ko) 2010-12-14 2014-04-08 쌘디스크 3디 엘엘씨 듀얼 게이팅되는 수직 선택 디바이스들을 갖는 삼차원 비휘발성 저장
US8431458B2 (en) 2010-12-27 2013-04-30 Micron Technology, Inc. Methods of forming a nonvolatile memory cell and methods of forming an array of nonvolatile memory cells
US8791447B2 (en) 2011-01-20 2014-07-29 Micron Technology, Inc. Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells
US8537592B2 (en) 2011-04-15 2013-09-17 Micron Technology, Inc. Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101546602A (zh) * 2008-03-27 2009-09-30 三星电子株式会社 使用可变电阻元件的非易失性存储器设备

Also Published As

Publication number Publication date
US9989616B2 (en) 2018-06-05
US20180120405A1 (en) 2018-05-03
TW201203463A (en) 2012-01-16
US9887239B2 (en) 2018-02-06
US20130003435A1 (en) 2013-01-03
EP2577668B1 (en) 2015-03-11
US10656231B1 (en) 2020-05-19
WO2011156069A3 (en) 2012-02-02
TWI517304B (zh) 2016-01-11
US10613184B2 (en) 2020-04-07
US20160336046A1 (en) 2016-11-17
US9412421B2 (en) 2016-08-09
US10859661B2 (en) 2020-12-08
US20130294132A1 (en) 2013-11-07
JP5549962B2 (ja) 2014-07-16
JP2013531887A (ja) 2013-08-08
EP2577668A2 (en) 2013-04-10
US20200249307A1 (en) 2020-08-06
US20180275239A1 (en) 2018-09-27
US9697873B2 (en) 2017-07-04
US8488374B2 (en) 2013-07-16
US20190178969A1 (en) 2019-06-13
US8289763B2 (en) 2012-10-16
US10746835B1 (en) 2020-08-18
US20200341105A1 (en) 2020-10-29
WO2011156069A2 (en) 2011-12-15
KR20130036013A (ko) 2013-04-09
US20170301733A1 (en) 2017-10-19
KR101417568B1 (ko) 2014-07-08
US20110299328A1 (en) 2011-12-08
SG186189A1 (en) 2013-01-30
US10241185B2 (en) 2019-03-26
CN102939632A (zh) 2013-02-20
EP2577668A4 (en) 2014-01-22

Similar Documents

Publication Publication Date Title
CN102939632B (zh) 存储器阵列
CN100375289C (zh) 用于包含各向异性半导体薄板的写一次存储器的二极管-和-熔丝存储元件
US10050085B2 (en) Block architecture for vertical memory array
EP2715731B1 (en) Semiconductor memory device
CN101174646A (zh) 半导体存储器件和字线接触部的布局结构
US8711597B2 (en) 3D solid-state arrangement for solid state memory
US7830709B2 (en) Integrated circuit, method of reading data stored within a memory device of an integrated circuit, method of writing data into a memory device of an integrated circuit, memory module, and computer program
US20150194203A1 (en) Storing memory with negative differential resistance material
KR20090031105A (ko) 비휘발성 메모리 소자 및 그 제조 방법
GB2526453A (en) A 3D solid-state arrangement for solid-state memory

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant