CN102931124B - The integrated approach of high density thin film hybrid IC - Google Patents

The integrated approach of high density thin film hybrid IC Download PDF

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Publication number
CN102931124B
CN102931124B CN201210492815.7A CN201210492815A CN102931124B CN 102931124 B CN102931124 B CN 102931124B CN 201210492815 A CN201210492815 A CN 201210492815A CN 102931124 B CN102931124 B CN 102931124B
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integrated
ceramic substrate
base substrate
film
substrate
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CN102931124A (en
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杨成刚
苏贵东
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Guizhou Zhenhua Fengguang Semiconductor Co.,Ltd.
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Guizhou Zhenhua Fengguang Semiconductor Co Ltd
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Abstract

The invention discloses a kind of integrated approach of high density thin film hybrid IC, the method first adopts film producing process, make the base substrate containing film conduction band, stopband and bonding region and little ceramic substrate, the pin that little ceramic substrate is connected with base substrate is produced on same one end integrated with base substrate from the two sides of little ceramic substrate in a thin film manner respectively; Then gold goal is formed in pin bonding district and the corresponding bonding region of base substrate; Then, adopt film hybrid integrated mode, at integrated more than one semiconductor chip of the positive and negative of little ceramic substrate or chip components and parts, and complete the wire bonding of semiconductor chip; Finally, the little substrate after integrated is vertically integrated on base substrate, completes high density thin film hybrid IC.The present invention adopts three-dimensional vertical Vertical collection, more than one semiconductor chip or chip components and parts is vertically integrated on same base substrate, realizes density three-dimensional integrated, improve the integrated level of thin-film hybrid integrated circuit.

Description

The integrated approach of high density thin film hybrid IC
Technical field
The present invention relates to hybrid integrated circuit, in particular to thin-film hybrid integrated circuit, furthermore, relate to high density thin film hybrid IC.
Background technology
In the integrated technology of original thin film hybrid circuit, two dimensional surface integrated technology is adopted in the hybrid integrated face of ceramic substrate, semiconductor chip, other chip components and parts are directly filled and are attached in film substrate, bonding wire (spun gold or Si-Al wire) is adopted to carry out wire bonding again, complete whole electrical equipment to connect, finally in specific atmosphere, Guan Ji and pipe cap are sealed to form.The subject matter that original technology exists is: owing to being employing two dimensional surface integrated technology, semiconductor chip, other chip components and parts mount on ceramic substrate with largest face direction, the wire bonding of chip and substrate from a solder joint to another solder joint need certain span, add on substrate and also need to make necessary film resistor, thin-film capacitor, thin film inductor etc. according to the requirement of physical circuit, therefore, the chip attachment limited amount of substrate surface, integrated chip efficiency is by the impact of chip area, and chip integration is difficult to improve.
Through retrieval, the Chinese patent application part relating to high density integrated circuit is many, as No. 99813068.0 " high density integrated circuits ", No. 02121825.0 " high-density IC package structure and method thereof ", No. 200410063042.6 " high density integrated circuit ", No. 201010141336.1 " high density integrated circuit module structure ", No. 201110334691.5 " a kind of high-density integrated circuit package structure, method for packing and integrated circuits " etc.But there is no the application part of high density thin film hybrid IC.
Summary of the invention
The object of the invention is to provide the integrated approach of high-density film hybrid integrated circuit, to increase chip-count, other chip components and parts quantity of accessible site in substrate unit are, reaches the object promoting thin-film hybrid integrated circuit integration density.
The high density thin film hybrid IC that inventor provides, adopt the method for three-dimensional vertical Vertical collection to realize, specific practice is: the common process first adopting film to make makes required film conduction band, stopband and bonding region on a ceramic substrate, complete the making of base substrate and little ceramic substrate, wherein, the pin that little ceramic substrate is connected with base substrate is produced on same one end integrated with base substrate from the two sides of little ceramic substrate respectively in the mode of film; Then after pin bonding district adopts gold wire ball bonding or silk screen printing, the method for reflow welding forms gold goal, uses the same method at base substrate corresponding bond area formation gold goal; Then, adopt the mode of film hybrid integrated, at integrated more than one semiconductor chip of the positive and negative of little ceramic substrate or chip components and parts, and complete the wire bonding of semiconductor chip; Finally, the little ceramic substrate after integrated is vertically integrated on base substrate, completes high density thin film hybrid IC.
Above-mentioned film is formed by the mode of magnetron sputtering or electron beam evaporation.
Above-mentioned conduction band, stopband, bonding region are made by the method for photoetching, selective corrosion film, laser resistor trimming.
Above-mentioned little ceramic substrate be adopt eutectic welding or gold ball bond, insulating adhesive reinforce mode be vertically integrated on base substrate.
Formed by the method for reflow welding after above-mentioned gold goal adopts gold wire ball bonding or screen-printed metal slurry.
Inventor points out: above-mentioned chip components and parts are other chip components and parts not comprising semiconductor chip.
Advantage of the present invention is: 1. adopt three-dimensional vertical Vertical collection, more than one semiconductor chip or other chip components and parts can be vertically integrated on same base substrate, realize density three-dimensional integrated, greatly improve the integrated level of thin-film hybrid integrated circuit; 2. due to the more semiconductor chip of accessible site, other chip components and parts, thus the more function of accessible site; 3. can reduce the quantity that complete machine application system uses electronic devices and components, thus reduce the volume of complete machine, improve the reliability of application system; 4. owing to adopting High Density Integration, greatly shorten wire length, can further improve operating frequency and the reliability of thin-film hybrid integrated circuit.
The device adopting the inventive method to produce is widely used in the fields such as space flight, aviation, boats and ships, precision instrument, communication, Industry Control, is specially adapted to change system miniaturization, highly reliable field, has wide market prospects and application space.
Accompanying drawing explanation
Fig. 1 is the integrated technology schematic diagram of original thin-film hybrid integrated circuit, and Fig. 2 is the structural representation of high density thin film hybrid IC of the present invention.
In figure, 1 is shell pedestal, and 2 is ceramic substrate, and 3 is pin, and 4 is conduction band/bonding region, and 5 is semiconductor chip, and 6 is stopband, and 7 is chip components and parts, and 8 is insulating adhesive, and 9 is gold goal, and 10 is little substrate, and 11 is lead.
Embodiment
Embodiment:
The high density thin film hybrid IC integrated approach of Guizhou Zhenhua scene semiconductor company research and development, for high density thin film hybrid IC technique, concrete implementing process flow process is as follows:
(1) Guan Ji of product demand, pipe cap is chosen;
(2) the choosing of ceramic substrate: adopt aluminum oxide ceramic substrate (Al 2o 3) or aluminium nitride ceramic substrate (Al 3n 4) make substrate.Comprise and be pasted onto the base ceramic substrate of base, the ceramic substrate for the vertical Vertical collection of three-dimensional;
(3) by the graphic making photo mask board of product design;
(4) in the high vacuum magnetic control platform or electron beam evaporation platform of 2 × below 10-3Pa, form nickel-chromium alloy (80%Ni: 20%Cr) resistance film on a ceramic substrate, film thickness is controlled by the square resistance of product requirement, carries out process monitoring by external FOUR-POINT PROBE METER;
(5) continue to be evacuated down to 2 × below 10-3Pa, adopt the method for (4), form one deck gold thin film, the thickness of gold thin film 1 ~ 3 μm, its thickness is tested by film thickness instrument;
(6) be coated with photoresist by glue spreader, in the baking oven of about 80 DEG C, carry out prebake conditions;
(7) exposure, development is carried out with mask;
(8) in the high temperature oven of about 180 DEG C, high temperature post bake is carried out;
(9) priority selective etch gold, nickel-chromium alloy;
(10) photoresist is removed;
(11) laser resistor trimming, annealing, complete film substrate and make;
(12) ceramic substrate after resistance trimming is carried out scribing separation;
(13) weldering of base substrate synthetic, Reflow Soldering or slurry bonding method dress are attached on base;
(14) gold wire bonding equipment is adopted, respectively at base substrate, form gold goal for the corresponding bond area of the ceramic substrate of the vertical Vertical collection of three-dimensional;
(15) integrated circuit packaging technology routinely, the ceramic substrate of the vertical Vertical collection of three-dimensional carries out the assembling of semiconductor chip, other SMD components;
(16) on special fixture, leading wire bonding (spun gold or Si-Al wire) is carried out to the vertical Vertical collection ceramic substrate of three-dimensional of assembled semiconductor chip or other SMD components;
(17) integrated circuit packaging technology routinely, base ceramic substrate carries out the assembling of semiconductor chip, other SMD components.
(18) on special fixture, leading wire bonding (spun gold or Si-Al wire) is carried out to the base ceramic substrate of assembled semiconductor chip or other SMD components.
(19) mode adopting slurry to paste, vertically fills vertical for the three-dimensional completing bonding Vertical collection ceramic substrate and is attached on the corresponding region of base ceramic substrate.
(20) sinter: the high temperature sintering carrying out 2 hours under the protection of High Purity Nitrogen, in the high-temperature cabinet of about 180 DEG C, is organically sintered together vertical for three-dimensional Vertical collection ceramic substrate and base ceramic substrate.
(21) sealing cap: carry out sealing cap in specific environment, completes the integrated of whole device and production work.
(22) test, screen, print and packaging: by Product Process file and checking file, complete the test of device, screening, printing and packing work.
(23) product warehousing.

Claims (5)

1. the integrated approach of a high density thin film hybrid IC, it is characterized in that first adopting film producing process, make required film conduction band, stopband and bonding region on a ceramic substrate, complete the making of base substrate and little ceramic substrate, wherein, the pin that little ceramic substrate is connected with base substrate is produced on same one end integrated with base substrate from the two sides of little ceramic substrate respectively in the mode of film; Then gold goal is formed in pin bonding district and the corresponding bonding region of base substrate; Then, adopt the mode of film hybrid integrated, at integrated more than one semiconductor chip of the positive and negative of little ceramic substrate or chip components and parts, and complete the wire bonding of semiconductor chip; Finally, the little ceramic substrate after integrated is vertically integrated on base substrate, completes high density thin film hybrid IC.
2. the method for claim 1, is characterized in that described film is formed by the mode of magnetron sputtering or electron beam evaporation.
3. the method for claim 1, is characterized in that described conduction band, stopband, bonding region makes by the method for photoetching, selective corrosion film, laser resistor trimming.
4. the method for claim 1, is characterized in that described little ceramic substrate adopts eutectic welding manner or the mode Vertical collection with gold ball bond, insulating adhesive reinforcing.
5. the method for claim 1, is characterized in that described gold goal is formed by the method for reflow welding after adopting gold wire ball bonding or screen-printed metal slurry.
CN201210492815.7A 2012-11-28 2012-11-28 The integrated approach of high density thin film hybrid IC Active CN102931124B (en)

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CN104485324A (en) * 2014-12-15 2015-04-01 贵州振华风光半导体有限公司 Lead-less ball foot surface adhesion type microwave film hybrid integrated circuit and integration method thereof

Citations (5)

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Publication number Priority date Publication date Assignee Title
US5295045A (en) * 1990-11-14 1994-03-15 Hitachi, Ltd. Plastic-molded-type semiconductor device and producing method therefor
US5397747A (en) * 1993-08-19 1995-03-14 International Business Machines Corporation Vertical chip mount memory package and method
CN101673693A (en) * 2009-09-22 2010-03-17 贵州振华风光半导体有限公司 Bonding system of high-reliability thick-film mixed integrated circuit and manufacturing method thereof
CN102522412A (en) * 2011-12-28 2012-06-27 贵州振华风光半导体有限公司 Integration method of high-integration high-reliable controllable working-temperature thin-film hybrid integrated circuit
CN202443971U (en) * 2011-12-28 2012-09-19 贵州振华风光半导体有限公司 High-integrated high-reliability working temperature controllable thin film hybrid integrated circuit

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4270282B2 (en) * 2007-01-23 2009-05-27 セイコーエプソン株式会社 Manufacturing method of semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5295045A (en) * 1990-11-14 1994-03-15 Hitachi, Ltd. Plastic-molded-type semiconductor device and producing method therefor
US5397747A (en) * 1993-08-19 1995-03-14 International Business Machines Corporation Vertical chip mount memory package and method
CN101673693A (en) * 2009-09-22 2010-03-17 贵州振华风光半导体有限公司 Bonding system of high-reliability thick-film mixed integrated circuit and manufacturing method thereof
CN102522412A (en) * 2011-12-28 2012-06-27 贵州振华风光半导体有限公司 Integration method of high-integration high-reliable controllable working-temperature thin-film hybrid integrated circuit
CN202443971U (en) * 2011-12-28 2012-09-19 贵州振华风光半导体有限公司 High-integrated high-reliability working temperature controllable thin film hybrid integrated circuit

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Inventor after: Yang Chenggang

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