CN102670331A - Electronic cochlear in-vitro debugging platform based on local area network (LAN) - Google Patents

Electronic cochlear in-vitro debugging platform based on local area network (LAN) Download PDF

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CN102670331A
CN102670331A CN2012101813325A CN201210181332A CN102670331A CN 102670331 A CN102670331 A CN 102670331A CN 2012101813325 A CN2012101813325 A CN 2012101813325A CN 201210181332 A CN201210181332 A CN 201210181332A CN 102670331 A CN102670331 A CN 102670331A
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interface
circuit
cochlear implant
modulation
chip
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CN102670331B (en
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宫琴
刘京雷
刘托
关添
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Tsinghua University
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Tsinghua University
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Abstract

The invention discloses an electronic cochlear debugging platform based on a local area network (LAN), and belongs to the technical field of electronic cochlear implantation. The electronic cochlear debugging platform is characterized by comprising person computer (PC) end electronic cochlear algorithm experimental platform software, an embedded processor module, an audio module, a modulation and power amplification module and a wireless transmitting coil. The PC end electronic cochlear algorithm experimental platform software is mainly used for controlling an electronic cochlear working mode and working parameters and carrying out data communication with the embedded processor module in a form of LAN communication; the embedded processor module comprises a low power consumption dual-core processor OMAP-L137 containing a digital signal processor (DSP) and an accumulator read-in module (ARM) and a protective circuit; the audio unit comprises an audio decoder-coder, a sound acquisition interface connected with a microphone, and an earphone output interface; the modulation and power amplification module comprises a baseband signal generating circuit, an amplifying and filtering circuit, a modulation circuit and a power amplifying circuit; and the wireless transmitting coil is mainly used for being coupled with an electronic cochlear implant and transmitting data and energy. The electronic cochlear debugging platform can be used for development and research of parameter debugging and new algorithms.

Description

The external debug platform of a kind of cochlear implant based on LAN
Technical field
The invention belongs to electronics, computer and signal processing technology field, the external debug platform device of the cochlear implant in particularly a kind of cochlear implant implantation.
Background technology
Cochlear implant is claimed the artificial cochlea again, and it is present unique device that can make anacusia patient recover audition.It stimulates remaining acoustic nerve in deaf person's cochlea through acoustical signal being converted to faint current impulse, and the function of imitation peripheral auditory system makes the patient produce the nerve granting similar with normal human ear.But different electronic cochlea implant persons, their acous remaining situation is widely different.In order to let the best results of listening to of electronic cochlea implant persons as much as possible, just must be the customized running parameter of its external speech processor according to cochlea implantation person's acoustic nerve residual condition.In addition, most importantly, debug platform is that the exploitation of the verbal coding policing algorithm of new suitable tone characteristic provides necessary research platform.
Some is to propose certain concrete method for processing signals for the domestic invention relevant with cochlear implant; Patent like Acoustical Inst., Chinese Academy of Sciences: " a kind of artificial cochlea's method of speech processing and processor " (number of patent application: 200810239725.0) based on frequency modulation information; " a kind of cochlear implant and sound signal processing method thereof " (number of patent application: 201010279103.8), and the invention of Shenzhen Xianjin Technology Academe and Hong Kong Chinese University's co-applications: " realizing the cochlear implant of multiple physiological information detection functions " (number of patent application: 200810242499.X).These inventions all are to have proposed a kind of algorithm that is applied in the cochlear implant, rather than the research debug platform of debugging to the exploitation of new algorithm.
Patent by inventions such as Shenzhen Graduate School of Tsinghua University leaf land for growing field crops, Huang Shengyang: " in-vitro voice processing unit for electronic cochlear duct " (number of patent application: 200610060580.9); And by the patent of invention such as Tsing-Hua University's palace qin, Du Zhi Yue: " a kind of speech signal processor for cochlear implant " (number of patent application: 201010224849.9) based on dual core processor; Realize the hardware unit of the external speech processor of cochlear implant separately through different chips, comprised audio unit, core processing unit, wireless transmitting unit and PMU.But they have all just built the external machine of cochlear implant, rather than the research platform that new algorithm is debugged, so they do not have the function that the new algorithm of cochlear implant is debugged.
Patent by inventions such as Shenzhen Graduate School of Tsinghua University leaf land for growing field crops, Yu Shuli: " cochlear implant audition emulation platform, simulating experimental and algorithm comparative approach " (number of patent application: 200610060579.6), built a kind of software platform of cochlear implant audition emulation.On this platform, can carry out emulation comparison and evaluation to the voice processing effect of algorithms of different, the result of algorithm simulating is provided for research worker.But this invention does not have the relevant hardware platform to support, can't can't accomplish yet real debug function is carried out in the influence of each parameter in the cochlear implant new algorithm as the research debug platform of cochlear implant.
Patent by inventions such as the Fu Qianjie of Hangzhou Nuorkang Neural Electronic Technology Co., Ltd., Chen Hongbin: " a kind of detection method of automatic language processing strategy and system " (number of patent application: 201010112507.8) realized language processing strategy automatic testing method and detection system based on " virtual processor ".This system is physical support with the computer; In computer, realize " virtual processor " consistent with the speech functional processor according to employed processing policy in the speech processor; Pass through high-speed sampling again; The output of speech processor and the output of " virtual processor " are compared, judge the correctness of speech processes strategy.But this invention mainly is the correctness that is used for relatively judging between the strategy of the language processing strategy result that in the speech processor, carries out and design, and its main purpose is not for new algorithm is developed debugging.。
Patent by inventions such as the Luo Dan of Shanghai Guanxin Electronic Technology Co., Ltd., Shen Guangbo: " a kind of artificial cochlear debugging programming method and system that adopts wireless data transmission " (number of patent application: 200810204677.1) a kind of artificial cochlear debugging system that is used for clinical debugging that adopts wireless data transmission is provided, promptly usually said MAP machine.Wherein, the detail programming machine is connected through wireless mode with language processing device for artificial cochlea.Patent is similar therewith also has by inventions such as the Sun Zengjun of the special medical science and technology of Shanghai power sound company, Wang Zhengmin: " the wireless debugging apparatus of artificial cochlea MAP " (number of patent application: 200820155990.6).Also be to have designed a kind of MAP machine that is used for clinical debugging, rather than be used for the debug platform of new algorithm exploitation through wireless transmission.
Compare with patent before; The invention provides a research debug platform that is used for the new algorithm exploitation; Hardware and Software Design through system; Make debug platform not only can carry out the reasonable debugging of parameter, and the more important thing is and to debug on stream new verbal coding strategy, in addition according to the hearing condition of each electronic cochlea implant persons; Research platform designed suitable coding strategy through the communication of LAN thereby can be directed against different its characteristic parameters of speech feature extraction more flexibly and easily.
Summary of the invention
The objective of the invention is to realize the external debug platform of a kind of cochlear implant based on LAN.The invention is characterized in, contain: PC, flush bonding processor, audio coding decoding circuit, modulation and power amplification circuit, Ethernet interface, wireless transmit coil, also have electric power management circuit, wherein:
PC is made extraneous emulator usefulness, is provided with: cochlear implant algorithm experimental debugging module, and mode of operation is selected module and LAN data communication module, wherein:
Cochlear implant algorithm experimental debugging module, contain: various cochlear implant speech processing algorithm softwares, can realize the setting and the adjustment of cochlear implant running parameter;
Mode of operation is selected module, is provided with following three kinds of alternative mode of operations:
Non real-time pattern: the running parameter of selecting cochlear implant through the said cochlear implant speech processing algorithm software in the said PC; The data file of redispatching after handling is given flush bonding processor; Processor is encoded according to the running parameter of cochlear implant to the data file that is received and through modulation, be transmitted on the said wireless transmit coil after the power amplification
Real-time mode; Select the running parameter of cochlear implant and read patient's debugging coupling MAP information through the said cochlear implant speech processing algorithm software in the said PC; Send into said flush bonding processor; Said flush bonding processor is according to the cochlear implant running parameter that receives and said debugging coupling MAP real time information sampling and the voice signal of handling the interlocutor, and encode, modulation and power amplifier
The single electrode stimulus modelity; Through the said cochlear implant speech processing algorithm software in the said PC select cochlear implant running parameter and the electrode label and the stimulation amplitude that will stimulate; Send to said flush bonding processor; Said flush bonding processor carries out the stimulation of certain hour according to the parameter that receives to a selected electrode
Flush bonding processor; Be one and make the flush bonding processor of interface, be provided with lower interface: McASP interface, I2C interface, EMIFA interface with the low-power consumption DSP+ARM dual core processor OMAP-L137 chip of TI Texas Instruments; The EMIFB interface; The SPI interface, EMAC interface and jtag interface, wherein:
The McASP interface; Audio coding decoding chip TLV320AIC3106 interconnection with said audio coding decoding circuit; Issuing said OMAP-L137 chip through this McASP interface from the filtered voice data of the process of mike; Under this OMAP-L137 chip controls of said flush bonding processor, carry out playback to voice data through this McASP interface again through earphone
The I2C interface has two: the power management chip in said audio coding decoding chip TLV320AIC3106 and said electric power management circuit is exported control signal respectively,
The EMIFA interface, with NAND Flash in external memory element interconnection, expanding the nonvolatile storage space of 64MByte code and data,
The EMIFB interface, with SDRAM in said external memory element interconnection, expanding 32MByte program running space,
The SPI interface links to each other with the input of baseband signal generative circuit in said modulation and the amplifying circuit, and output is waited for the boost pulse supplemental characteristic frame of wireless transmit through the coding back,
The EMAC interface links to each other with the ethernet physical layer transceiver KSZ8001L of said ethernet interface module, obtains the Ethernet interface of 10Mbps/100Mbps,
Jtag interface is connected with the socket of 14 feet, links to each other with outer computer through said PC,
Said audio coding decoding circuit, contain: voice acquisition interface and headset output interface, wherein:
Voice acquisition interface connects an omni-directional electret formula capacitance microphone, through the MICBIAS pin 2.0V is provided bias voltage,
Headset output interface connects the 3.5mm earphone, is used for acoustic playback,
Modulation and power amplifier module are connected in series successively by the multiplex electronics of said baseband signal generative circuit, filtering and amplifying circuit, do modulation usefulness and power amplification circuit and form, wherein:
The baseband signal generative circuit is an active crystal oscillator of 5MHz by the power supply of+5V power supply,
Filter circuit is made up of 7 rank passive low-pass filter circuits,
Amplifying circuit is made up of the buffer BUF634 of the high speed operation amplifier AD811 of ADI company and said TI company, and said AD8ll adopts in-phase amplifier to connect method, and being amplified to the Voltage Peak peak value to input signal is 10V,
Modulation circuit; Be one 2 and select 1 multiplexer AD8170 chip, when the gating foot of input is " 0 ", export 0 level; When the gating foot of input is " 1 "; Output 5MHz is sinusoidal wave, before said 5MHz signal gets into said multiplexer, adds that one-level constitutes with amplifier AD8027 chip and voltage follower
The wireless transmit coil is that the multiturn coil by the lead coiled constitutes, is used for and receiving coil coupled transfer modulation signal,
Electric power management circuit contains: 5V dc source, 4.2V lithium battery; Commutator (S), diode (D1), electric fuse (F1); + 5V external direct current power supply input interface, the external lithium battery input interface of+4.2V, main power source management circuit; First voltage conversion circuit (1), second voltage conversion circuit (2) and tertiary voltage change-over circuit (3), wherein:
Commutator (S); First input end is connected in series said electric fuse (F1); Diode (D1) and said+5V external direct current power supply outfan; Second input links to each other with the outfan of said first voltage conversion circuit (1); Be output as+input of first voltage conversion circuit (1) of 5V links to each other with the outfan of said+4.2V lithium battery; Said commutator (S) is respectively to said main power source management circuit; Second voltage conversion circuit (2) and tertiary voltage change-over circuit (3) provide+the 5V power supply
The main power source management circuit; Be a power management chip TPS65023; Pin HOTRESETn connects the reset key of an other end ground connection, press this reset key after said pin HOTRESETn become low level, pin RESPWRONn is to the RESETn of said OMAP-L137 chip pin output reset signal; Said TPS65023 chip has three road DC/DC output and two-way LDO output; So that the voltage of different brackets to be provided, said OMAP-L137 manages the output voltage and the electric sequence of said TPS65023 chip through said I2C interface
First voltage conversion circuit (1) is a voltage transitions chip MAX1760, to said modulation and amplifying circuit power supply, for+5V,
Second voltage conversion circuit (2) is a voltage transitions chip MAX762, provides+the 10V power supply to described modulation and amplifying circuit,
Tertiary voltage change-over circuit (3) is a voltage transitions chip MAX766, provides-the 10V power supply to said modulation and amplifying circuit.
The present invention has following advantage:
The first, the present invention has realized that intactly cochlear implant research debug platform is from PC end cochlear implant algorithm experiment software, based on the network data communication of LAN, to the real-time processing of data and coding, modulate and power amplification and the function through the coil wireless transmit coded data.
The second, the PC end cochlear implant algorithm experiment software among the present invention can be adjusted test cochlear implant running parameter to greatest extent so that carry out the relevant algorithm experiment of cochlear implant.
The 3rd; PC end cochlear implant algorithm experiment software among the present invention can be realized the importing of new algorithm; The result of new algorithm is sent to embedded system, thereby the performance of new algorithm is verified, for the research and development of cochlear implant new algorithm provide necessary debug platform.
The 4th, the algorithm among the present invention in the embedded system can be revised flexibly, and electronic cochlea implant persons is carried, and carries out long testing evaluation with the performance to new algorithm.
The 5th, the flexible selection of the present invention through the different coding agreement can realize and the seamless link of the multiple cochlear implant implant of extensive use clinically at present, greatly makes things convenient in checking and the proof of algorithm experiment of new algorithm the experimenter is selected.
Description of drawings
Fig. 1 is the block diagram of system of the present invention.
Fig. 2 is a present embodiment non real-time mode of operation flow chart.
Fig. 3 is present embodiment real time operation model process figure.
Fig. 4 is a present embodiment single electrode stimulus modelity flow chart.
Fig. 5 is present embodiment PC end cochlear implant algorithm experiment porch software interface.
Fig. 6 is the core processor OMAP-L137 of present embodiment and the interface sketch map of audio codec TLV320AIC3106.
Fig. 7 is the core processor OMAP-L137 of present embodiment and the interface sketch map of NAND Flash.
Fig. 8 is the core processor OMAP-L137 of present embodiment and the interface sketch map of SDRAM.
Fig. 9 is that the Ethernet interface of present embodiment connects sketch map.
Figure 10 is the structured flowchart of the PMU of present embodiment.
Figure 11 is the main power source management circuit schematic diagram of present embodiment.
Figure 12 is the circuit theory diagrams of present embodiment+4.2V commentaries on classics+5V.
Figure 13 is the circuit theory diagrams of present embodiment+5V commentaries on classics+10V.
Figure 14 is the circuit theory diagrams of present embodiment+5V commentaries on classics-10V.
Figure 15 is the wireless transmitting unit structured flowchart of present embodiment.
The specific embodiment
The present invention includes the system hardware that constitutes by flush bonding processor module, audio-frequency module, ethernet module, modulation and power amplifier module and wireless transmit coil etc., comprise the systems soft ware that network data communication, speech processing algorithm and data encryption algorithm etc. in PC end cochlear implant algorithm experiment porch software, the embedded system constitute.This cochlear implant debug platform comprises PC end system and embedded system two large divisions.Wherein the PC end system mainly is an operation cochlear implant algorithm experiment software, realizes the cochlear implant selection of working parameters through this software, the selection of mode of operation, and the indication of network data communication between embedded system and duty etc.; Embedded system partly is to be the core processor unit with TI low-power consumption DSP+ARM dual core processor OMAP-L137; It can realize communicating by letter with the LAN data of PC end; Be used for transmission electronic cochlea parameter information and need the coded data file; And above-mentioned data are encoded; It can be gathered voice signal in real time and handle and encode through the cochlear implant speech processing algorithm, and above-mentioned coded data sends to modulation and power amplification circuit through the form of serial, is transferred to the wireless transmit coil through the signal of ovennodulation and power amplification.The each several part annexation is as shown in Figure 1.
The invention is characterized in, contain: PC, flush bonding processor, audio coding decoding circuit, modulation and power amplification circuit, Ethernet interface, wireless transmit coil, also have electric power management circuit, wherein:
PC comprises user interface, cochlear implant mode of operation and running parameter setting, local net network data communication etc.
The flush bonding processor module; Processor is the dual core processor OMAP-L137 that a slice comprises TMS320C674 Floating-point DSP and ARM926EJ-S RISC MPU; Main its McASP interface, I2C interface, EMIFA interface, EMIFB interface, SPI interface, EMAC interface and the jtag interface of using, wherein:
The McASP interface with the audio codec TLV320AIC3106 interconnection in the said audio unit, carries out audio data transmission;
The I2C interface has two, respectively the output of the power management chip TPS65023 in said audio codec TLV320AIC3106 and said PMU control signal;
The EMIFA interface is with the NAND Flash interconnection in the said memory element, to expand the nonvolatile storage space of 64MByte code and data;
The EMIFB interface, the SDRAM interconnection with in the said memory element expands 32MByte program running space;
The SPI interface is connected with power amplification with said modulation, exports the boost pulse supplemental characteristic frame that process is encoded and treated wireless transmit;
The EMAC interface, KSZ8001L is connected with the ethernet physical layer transceiver, expands the 10Mbps/100Mbps Ethernet interface;
Jtag interface is connected with the JTAG socket of 14 pins, communicates through external emulator and outer computer;
Audio-frequency module, contain: the said audio codec TLV320AIC3106 that the Codec chip is formed, this said audio codec TLV320AIC3106 contains voice acquisition interface and headset output interface, wherein:
Voice acquisition interface connects omni-directional electret formula capacitance microphone, through the MICBIAS pin 2.0V is provided voltage bias;
Headset output interface connects the 3.5mm earphone, is used for acoustic playback;
Modulation and power amplifier module, multiplex electronics of using by baseband signal generative circuit, filtering and amplifying circuit, as modulation circuit and power amplification circuit are connected in series successively and form, wherein:
The baseband signal generative circuit is the active crystal oscillator of 5MHz of one+5V power supply power supply;
Filter circuit is made up of 7 rank passive low-pass filter circuits;
Modulation circuit selects 1 multiplexer realization with 2, when the gating foot of input is " 0 ", exports 0 level, and when input was " 1 ", output 5MHz was sinusoidal wave.Before the 5MHz signal gets into multiplexer, add the one-level voltage follower,, select amplifier AD8027 chip for use with the influence between the late-class circuit before avoiding;
Power amplification circuit is made up of the high speed operation amplifier AD811 of ADI company and the buffer BUF634 of TI company, and AD8ll adopts in-phase amplifier to connect method, and it is 10V that input signal is amplified to the Voltage Peak peak value;
The wireless transmit coil is that the multiturn coil by the lead coiled is configured for and receiving coil coupled transfer modulation signal.
Power management module comprise a commutator S, diode D1, electric fuse F1 ,+5V external power supply input interface ,+the external lithium battery input interface of 4.2V, main power source management circuit, voltage conversion circuit 1, voltage conversion circuit 2 and voltage conversion circuit 3, wherein:
The first input end of commutator serial connection electric fuse, diode and+5V external power supply input interface; Second input and the voltage conversion circuit 1 of commutator join, the external lithium battery input interface of the input connection+4.2V of this voltage conversion circuit, and output voltage is+5V; The outfan of said commutator connects the input of main power source management circuit, the input of voltage conversion circuit 2 and the input of voltage conversion circuit 3 respectively;
The main power source management circuit is made up of a power management chip TPS65023, reset key and I2C interface; This reset key one end ground connection; The HOTRESETn pin of the said TPS65023 chip of another termination; Said HOTRESETn pin becomes low level after pressing this reset key; The RESPWRONn pin of said TPS65023 chip is to the RESETn of said dual core processor OMAP-L137 pin output reset signal, and the TPS65023 chip has three road DC/DC output, two-way LDO is output as system provides different voltages, and said dual core processor OMAP-L137 manages the output voltage and the electric sequence of said TPS65023 chip through the I2C interface;
Voltage conversion circuit 1 is a voltage transitions chip MAX1760, for said wireless transmitting unit provides+the 5V power supply;
Voltage conversion circuit 2 is voltage transitions chip MAX762, for said wireless transmitting unit provides+the 10V power supply.
Voltage conversion circuit 3 is voltage transitions chip MAX766, for said wireless transmitting unit provides-the 10V power supply.
The present invention proposes a kind of system embodiment of the cochlear implant debug platform based on LAN, is made up of hardware circuit and software two large divisions.Specify as follows in conjunction with each accompanying drawing:
The present embodiment entire system constitutes as shown in Figure 1; Comprise the system hardware that constitutes by flush bonding processor module, audio-frequency module, ethernet module, modulation and power amplifier module and wireless transmit coil etc., comprise the systems soft ware that network data communication, speech processing algorithm and data encryption algorithm etc. in PC end cochlear implant algorithm experiment porch software, the embedded system constitute.The present embodiment system is mainly by three kinds of mode of operations: the one, and non-real-time mode; The cochlear implant algorithm experiment software of holding through PC under this pattern is selected the running parameter of cochlear implant; Send the data file of using after the cochlear implant speech processing algorithm is handled then and give embedded system; Flush bonding processor is encoded according to running parameter to the data file that is received and through being transmitted on the coil behind modulation and the power amplifier, its workflow is as shown in Figure 2; The 2nd, real-time mode; This pattern descended the cochlear implant algorithm experiment software of PC end to select the running parameter of cochlear implant and read patient's map information; Above-mentioned parameter is sent to embedded system, and flush bonding processor is gathered and processes voice signals according to the parameter that receives in real time, and encode, modulation and power amplifier; And then be transmitted on the coil, its workflow is as shown in Figure 3; The 3rd, the single electrode stimulus modelity; Under this pattern through the cochlear implant algorithm experiment software of PC end select cochlear implant running parameter and the electrode label and the stimulation amplitude that will stimulate; Above-mentioned parameter is sent to embedded system; Flush bonding processor carries out the stimulation of certain hour according to the parameter that receives to selected electrode, and its workflow is as shown in Figure 4.
PC end cochlear implant algorithm experiment porch software is as shown in Figure 5 in the present embodiment; It can realize the setting of cochlear implant running parameter; The transmission of the data file after the cochlear implant speech processing algorithm processed voice, the demonstration of the selection of cochlear implant debug platform mode of operation and cochlear implant debug platform duty etc.
The flush bonding processor module is the core processor unit with TI low-power consumption DSP+ARM dual core processor OMAP-L137 in the present embodiment, and it can receive the cochlear implant running parameter of PC end transmission and the dat file data that after cochlear implant speech processing algorithm processes voice signals, obtains through the form of LAN data communication.Be operated under above-mentioned three kinds of mode of operations according to cochlear implant algorithm experiment porch control of software.
The interface sketch map of audio-frequency module and flush bonding processor is as shown in Figure 6.Audio-frequency module adopts a slice TLV320AIC3106 (hereinafter to be referred as " AIC3106 ") low-power consumption dual-channel audio codec to expand interfaces such as Mike's input, earphone output.OMAP-L137 is configured AIC3106 through the I2C interface, and it is 24kHz that sample rate is set, and the sampled data precision is 32; Gain is 8.5dB; The 1 rank high pass filter that becomes through the AIC3106 chip integration then, cut-off frequency is 90Hz, low-frequency noises such as filtering 50Hz power frequency.Voice data through wave filter is issued OMAP-L137 through the McASP interface, and OMAP-L137 can pass voice data back AIC3106 through the McASP interface, carries out playback through earphone interface.
Present embodiment outside the memory space, has been expanded a slice 64MByte NAND Flash through the EMIFA interface in the sheet of OMAP-L137, data bits transmitted is wide to be 8 bits, is used for save routine and data, and is the startup source of system.The interface sketch map is as shown in Figure 7.EMA_WAIT0 is by NAND Flash waiting signal (low level is effective) when OMAP-L137 provides busy; EMA_OEn is that Flash enables control signal (low level is effective); EMA_CS3n provides chip selection signal (low level is effective); EMA_WEn is WE signal (low level is effective); EMA_D [7:0] is 8 bit address and data transmission channel, and EMA_A2, EMA_A1 be control command latch enable signal CLE (high level is effective), address latch enable signal ALE (high level is effective) respectively.
Present embodiment connects 32Mbyte through the EMIFB interface, and (4M * 16Bit * 4Banks), data bits transmitted is wide respectively is the SDRAM of 16 bits.The interface sketch map is as shown in Figure 8.BA [1:0] selects pin for Bank; A [12:0] is the address transfer passage; DQ [15:0] is data input and output buses; DQML is the mask signal of the DQ [7:0] corresponding to least-significant byte, and UDQM is the mask signal of the DQ [15:8] corresponding to most-significant byte.
The ethernet module of present embodiment and flush bonding processor to be connected block diagram as shown in Figure 9.Ethernet control chip KSZ8893 is connected with the continuous hardware of local area network communication of realizing of network interface respectively at flush bonding processor OMAP L137.
The structured flowchart of the PMU of present embodiment is shown in figure 10, wherein comprise a commutator S, diode D1, electric fuse F1 ,+5V external power supply input interface ,+the external lithium battery input interface of 4.2V, main power source management circuit, first voltage conversion circuit and second voltage conversion circuit.Diode D1 provide polarity protection; Electric fuse F1 provide overcurrent protection, and maximum current is 1A.Through commutator S, can the input of+5V external power supply and+switch between the external lithium battery input of 4.2V, satisfy the requirement of circuit debugging and portable set respectively.
Adopt power management chip TPS65023 in the main power source management circuit of present embodiment, utilize TPS65023 three road DC/DC output, two-way LDO is output as system that different voltages are provided, and utilizes two voltage comparators to realize rational electric sequence.Between TPS65023 and the OMAP-L137 to be connected sketch map shown in figure 11.VDCDC1, VDCDC2, VDCDC3 provide 1.2V, 1.8V, 3.3V output voltage respectively.For the solution of electric sequence, mainly utilize on the sheet two battery status monitoring comparator LOWBAT_SNS and PWRFAIL_SNS.With the input of VDCDC1 as these two comparators; The output of comparator LOWBAT_SNS is as the enable signal of DCDC1 output; The output of comparator PWRFAIL_SNS is as the enable signal of other DCDC and LDO output, with the input of VDCDC2 as comparator LOWBAT, thereby realized the at first 1.2V of OMAP-L137; Next 1.8V, the electric sequence control of last 3.3V.
The voltage conversion circuit of present embodiment such as Figure 12, Figure 13 are shown in Figure 14.In Figure 13, MAX762 is operated under the pattern of output+10V fixed voltage.Among Figure 14, MAX766 is operated under the pattern of output-10V fixed voltage.
Data are carried out the ASK modulation through after encoding with the 5MHz sinusoidal carrier signal in the present embodiment, and the modulated signal envelope amplitude of the following 0 yard correspondence of ideal situation is 0.Modulation and power amplifier module circuit structure diagram are shown in figure 12.In order to obtain the more satisfactory carrier signal of waveform; Reduce circuit complexity; Adopt a slice 5MHz crystal oscillator to produce primary carrier signal in the present embodiment,, send into the input IN1 of multiplexer AD8170 as modulating baseband signal through filtering, amplification and one-level buffer circuit.Another input IN0 ground connection of AD8170, and the modulation signal that OMAP-L137 produces is as selecting signal to be input to " select " pin of multiplexer.When modulation signal is high level (promptly corresponding to " 1 "), the signal of multiplexer output IN1 pin, just outgoing carrier signal; When modulation signal is low level (promptly corresponding to " 0 "), the signal of multiplexer output IN0 pin, just output level is 0, the ASK modulation of so just accomplishing.Then modulated signal is sent into the power amplifier of being made up of AD811 and BUF634, and its output is about 220mW, then through the coil emission.

Claims (1)

1. the cochlear implant debug platform based on LAN is characterized in that, contains: PC, flush bonding processor, audio coding decoding circuit, modulation and power amplification circuit, Ethernet interface, wireless transmit coil, also have electric power management circuit, wherein:
PC is made extraneous emulator usefulness, is provided with: cochlear implant algorithm experimental debugging module, and mode of operation is selected module and LAN data communication module, wherein:
Cochlear implant algorithm experimental debugging module, contain: various cochlear implant speech processing algorithm softwares, can realize the setting and the adjustment of cochlear implant running parameter;
Mode of operation is selected module, is provided with following three kinds of alternative mode of operations:
Non real-time pattern: the running parameter of selecting cochlear implant through the said cochlear implant speech processing algorithm software in the said PC; The data file of redispatching after handling is given flush bonding processor; Processor is encoded according to the running parameter of cochlear implant to the data file that is received and through modulation, be transmitted on the said wireless transmit coil after the power amplification
Real-time mode; Select the running parameter of cochlear implant and read patient's debugging coupling MAP information through the said cochlear implant speech processing algorithm software in the said PC; Send into said flush bonding processor; Said flush bonding processor is according to the cochlear implant running parameter that receives and said debugging coupling MAP real time information sampling and the voice signal of handling the interlocutor, and encode, modulation and power amplifier
The single electrode stimulus modelity; Through the said cochlear implant speech processing algorithm software in the said PC select cochlear implant running parameter and the electrode label and the stimulation amplitude that will stimulate; Send to said flush bonding processor; Said flush bonding processor carries out the stimulation of certain hour according to the parameter that receives to a selected electrode
Flush bonding processor; Be one and make the flush bonding processor of interface, be provided with lower interface: McASP interface, I2C interface, EMIFA interface with the low-power consumption DSP+ARM dual core processor OMAP-L137 chip of TI Texas Instruments; The EMIFB interface; The SPI interface, EMAC interface and jtag interface, wherein:
The McASP interface; Audio coding decoding chip TLV320AIC3106 interconnection with said audio coding decoding circuit; Issuing said OMAP-L137 chip through this McASP interface from the filtered voice data of the process of mike; Under this OMAP-L137 chip controls of said flush bonding processor, carry out playback to voice data through this McASP interface again through earphone
The I2C interface has two: the power management chip in said audio coding decoding chip TLV320AIC3106 and said electric power management circuit is exported control signal respectively,
The EMIFA interface, with NAND Flash in external memory element interconnection, expanding the nonvolatile storage space of 64MByte code and data,
The EMIFB interface, with SDRAM in said external memory element interconnection, expanding 32MByte program running space,
The SPI interface links to each other with the input of baseband signal generative circuit in said modulation and the amplifying circuit, and output is waited for the boost pulse supplemental characteristic frame of wireless transmit through the coding back,
The EMAC interface links to each other with the ethernet physical layer transceiver KSZ8001L of said ethernet interface module, obtains the Ethernet interface of 10Mbps/100Mbps,
Jtag interface is connected with the socket of 14 feet, links to each other with outer computer through said PC,
Said audio coding decoding circuit, contain: voice acquisition interface and headset output interface, wherein:
Voice acquisition interface connects an omni-directional electret formula capacitance microphone, through the MICBIAS pin 2.0V is provided bias voltage,
Headset output interface connects the 3.5mm earphone, is used for acoustic playback,
Modulation and power amplifier module are connected in series successively by the multiplex electronics of said baseband signal generative circuit, filtering and amplifying circuit, do modulation usefulness and power amplification circuit and form, wherein:
The baseband signal generative circuit is an active crystal oscillator of 5MHz by the power supply of+5V power supply,
Filter circuit is made up of 7 rank passive low-pass filter circuits,
Amplifying circuit is made up of the buffer BUF634 of the high speed operation amplifier AD811 of ADI company and said TI company, and said AD8ll adopts in-phase amplifier to connect method, and being amplified to the Voltage Peak peak value to input signal is 10V,
Modulation circuit; Be one 2 and select 1 multiplexer AD8170 chip, when the gating foot of input is " 0 ", export 0 level; When the gating foot of input is " 1 "; Output 5MHz is sinusoidal wave, before said 5MHz signal gets into said multiplexer, adds that one-level constitutes with amplifier AD8027 chip and voltage follower
The wireless transmit coil is that the multiturn coil by the lead coiled constitutes, is used for and receiving coil coupled transfer modulation signal,
Electric power management circuit contains: 5V dc source, 4.2V lithium battery; Commutator (S), diode (D1), electric fuse (F1); + 5V external direct current power supply input interface, the external lithium battery input interface of+4.2V, main power source management circuit; First voltage conversion circuit (1), second voltage conversion circuit (2) and tertiary voltage change-over circuit (3), wherein:
Commutator (S); First input end is connected in series said electric fuse (F1); Diode (D1) and said+5V external direct current power supply outfan; Second input links to each other with the outfan of said first voltage conversion circuit (1); Be output as+input of first voltage conversion circuit (1) of 5V links to each other with the outfan of said+4.2V lithium battery; Said commutator (S) is respectively to said main power source management circuit; Second voltage conversion circuit (2) and tertiary voltage change-over circuit (3) provide+the 5V power supply
The main power source management circuit; Be a power management chip TPS65023; Pin HOTRESETn connects the reset key of an other end ground connection, press this reset key after said pin HOTRESETn become low level, pin RESPWRONn is to the RESETn of said OMAP-L137 chip pin output reset signal; Said TPS65023 chip has three road DC/DC output and two-way LDO output; So that the voltage of different brackets to be provided, said OMAP-L137 manages the output voltage and the electric sequence of said TPS65023 chip through said I2C interface
First voltage conversion circuit (1) is a voltage transitions chip MAX1760, to said modulation and amplifying circuit power supply, for+5V,
Second voltage conversion circuit (2) is a voltage transitions chip MAX762, provides+the 10V power supply to described modulation and amplifying circuit,
Tertiary voltage change-over circuit (3) is a voltage transitions chip MAX766, provides-the 10V power supply to said modulation and amplifying circuit.
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CN107007932A (en) * 2017-04-25 2017-08-04 深圳信息职业技术学院 A kind of medical monitoring system and signal processing method
CN107040858A (en) * 2017-06-19 2017-08-11 上海市第六人民医院 A kind of artificial cochlea's speech algorithm experimental device
CN107800173A (en) * 2017-11-21 2018-03-13 出门问问信息科技有限公司 A kind of wireless charger and information cuing method
CN107800173B (en) * 2017-11-21 2023-08-15 出门问问信息科技有限公司 Wireless charger and information prompting method
CN108828356A (en) * 2018-06-11 2018-11-16 南京尤尼泰信息科技有限公司 It is a kind of suitable for plurality of specifications crystal oscillator for electrical test circuit
CN109248379A (en) * 2018-10-30 2019-01-22 上海力声特医学科技有限公司 The long-range tune machine device of artificial cochlea
CN109687598A (en) * 2018-12-20 2019-04-26 南京理工大学 It is a kind of based on non-linear parity-time symmetric circuit energy and information carrying means
CN109918298A (en) * 2019-02-25 2019-06-21 深圳米唐科技有限公司 Intelligent sound front end microphone adjustment method, device, system and medium
CN109918298B (en) * 2019-02-25 2022-04-01 深圳米唐科技有限公司 Intelligent voice front-end microphone debugging method, device, system and medium
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