CN102611411A - Tracking compensation integrator, wide-band filter and wide-band analog chip - Google Patents

Abstract

The embodiment of the invention discloses a tracking compensation integrator. The tracking compensation integrator comprises an operational amplifier, an integral resistor, an integral capacitor and a zero resistor. The integral resistor is connected with the input end of the operational amplifier; the integral capacitor and the zero resistor are connected in series between the input end and the output end of the operational amplifier; the zero resistor is used for generating a zero point; the operational amplifier is used for relating the zero point generated by the zero resistor with a pole point generated by own limited bandwidth, so as to cancel out the pole point and realize tracking compensation. The embodiment of the invention further discloses a wide-band filter and a wide-band analog chip. With the adoption of the embodiment of the invention, the tracking compensation the zero point to the pole point generated by the limited bandwidth can be realized, so as to remove the influence on the wide-band filter caused by an operational amplification of the limited bandwidth. Therefore, the high-bandwidth filter is stably realized.

Description

A kind of tracking compensation integrator, broadband filter and broadband analog chip

Technical field

The present invention relates to the broadband connections technical field, particularly relate to a kind of tracking compensation integrator, broadband filter and broadband analog chip.

Background technology

Along with LTE (Long Term Evolution, Long Term Evolution) and microwave communication progress, strong to the demand of broadband analog chip in the broadband connections technical field.Analog filter is the circuit that baseband portion is carried out filtering in the chip, and the base band frequency bandwidth surpasses 20,000,000 even wideer now.In order when realizing high bandwidth, to realize high linearity, the analog filter that amplifier and resistance capacitance combine to form is main selection, can claim that this filter is an active RC filter.

The transfer function of desirable active RC filter is by the value decision of resistance capacitance, and is irrelevant with the bandwidth of amplifier itself.But under the bigger situation of filter bandwidht, the finite bandwidth of amplifier can not be ignored, even has had a strong impact on the transfer function of filter, causes uneven the increase and the spike increase in the filter band, has influenced use.And the bandwidth of amplifier can change along with flow-route and temperature, and it is difficult more to the influence of filter to cause eliminating the amplifier finite bandwidth.

Be the influence of the finite bandwidth that reduces amplifier to filter; Common way is the bandwidth that increases amplifier now; Make the bandwidth of the bandwidth of amplifier far above filter itself; But this method can increase power consumption greatly when increasing the bandwidth of amplifier, and because of also very difficult unlimited raising of the restriction amplifier bandwidth of technology.

Can also adjust the quality factor of its transfer function in the prior art through tandem tap resistance in biquadratic filter.But; This method need increase extra quality factor and detect and the RC calibration circuit; Value through the adjustment switch resistance is calibrated the quality factor of filter; But the parasitic capacitance that the switch resistance that increases produces can worsen the performance of broadband filter, and said RC calibration circuit structure is very complicated, is not easy to realize.

Summary of the invention

Embodiments of the invention provide a kind of tracking compensation integrator, broadband filter and broadband analog chip, and this compensation integrator can be eliminated the influence that brings because of the amplifier finite bandwidth in the broadband filter, realizes stable high bandwidth filter.

The embodiment of the invention provides a kind of compensation integrator, and said compensation integrator comprises: operational amplifier, integrating resistor and integrating capacitor and zero mark resistance;

Said integrating resistor connects the input of said operational amplifier, and said integrating capacitor and said zero mark resistance series connection are between the input and output of said operational amplifier;

Said zero mark resistance is used to produce a zero point;

Be associated with the limit that self finite bandwidth produces the zero point that said operational amplifier is used for said zero mark resistance is produced, and offsets said limit, realizes following the tracks of compensating.

The embodiment of the invention also provides a kind of broadband filter; Said filter comprises two described compensation integrators; Be respectively the first compensation integrator and the second compensation integrator, the input of the said second compensation integrator of the output termination of the said first compensation integrator;

Said filter also comprises the 3rd resistance and the 4th resistance;

Said the 3rd resistance is connected between the input and output of operational amplifier of the said first compensation integrator, and said the 4th resistance is connected between the output of operational amplifier of input and the said second compensation integrator of operational amplifier of the said first compensation integrator.

The embodiment of the invention also provides a kind of broadband analog chip, and said chip comprises described broadband filter.

According to specific embodiment provided by the invention, the invention discloses following technique effect:

In the embodiment of the invention; Through the zero mark resistance of connecting for said integrating capacitor; Produce left half-plane zero point, the limit of utilizing the finite bandwidth of offsetting said operational amplifier this zero point that integrator is produced, thus eliminate in the filter influence that the finite bandwidth because of operational amplifier brings; And through the Current Control tail current source that zero point is related with limit, realize following the tracks of compensation.

Adopt the embodiment of the invention, its scheme implementation is simple, and only needing increases zero mark resistance and the current source related with the amplifier bandwidth, does not need extra complicated calibration circuit, and circuit is easy to realize.

Description of drawings

Fig. 1 is the circuit diagram of the tracking compensation integrator of the embodiment of the invention;

Fig. 2 is a kind of implementation circuit diagram of the operational amplifier of the embodiment of the invention;

Fig. 3 is a kind of implementation circuit diagram of the tail current source of the embodiment of the invention;

Fig. 4 is the another kind of implementation circuit diagram of the tail current source of the embodiment of the invention;

Fig. 5 is the circuit diagram of the broadband filter of the embodiment of the invention.

Embodiment

For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, below in conjunction with accompanying drawing and embodiment the present invention done further detailed explanation.

The object of the present invention is to provide a kind of tracking compensation integrator, broadband filter and broadband analog chip; This compensation integrator can be realized the tracking compensation of zero point to the limit of operational amplifier finite bandwidth generation; Thereby the influence that brings because of the amplifier finite bandwidth in the elimination broadband filter realizes stable high bandwidth filter.

In the embodiment of the invention; Said tracking compensation integrator comprises operational amplifier, integrating resistor, integrating capacitor and zero mark resistance; Said integrating resistor connects the input of said operational amplifier, and said integrating capacitor and zero mark resistance series connection are between the input and output of said operational amplifier.

Wherein, the end that said integrating resistor does not link to each other with said operational amplifier is as the input of said compensation integrator, and the output of said operational amplifier is as the output of said compensation integrator.

Said zero mark resistance is used to produce a zero point.

Be associated with the limit that self finite bandwidth produces the zero point that said operational amplifier is used for said zero mark resistance is produced, and offsets said limit, realizes following the tracks of compensating.

In the embodiment of the invention; Through the zero mark resistance of connecting for said integrating capacitor; Produce left half-plane zero point, the limit of utilizing the finite bandwidth of offsetting said operational amplifier this zero point that integrator is produced, thus eliminate in the filter influence that the finite bandwidth because of operational amplifier brings; And through the Current Control tail current source that zero point is related with limit, realize following the tracks of compensation.

With reference to Fig. 1, compensate the circuit diagram of integrator for the tracking of the embodiment of the invention.Said tracking compensation integrator can be difference form, and as shown in Figure 1, said operational amplifier is specially the broadband differential operational amplifier.

Said tracking compensation integrator comprises: operational amplifier A, integrating resistor, integrating capacitor and zero mark resistance.

Said integrating resistor comprises first integral resistance R 01 and second integral resistance R 02; Said integrating capacitor comprises first integral capacitor C 01 and second integral capacitor C 02; Said zero mark resistance comprises the first zero resistance R z1 and the second zero mark resistance Rz2.

Said first integral resistance R 01 connects the in-phase input end of said operational amplifier A, said first integral capacitor C 01 be connected between the in-phase input end and negative output terminal of said operational amplifier A after first zero resistance R z1 connects.

Said second integral resistance R 02 connects the inverting input of said operational amplifier A, said second integral capacitor C 02 be connected between the inverting input and positive output end of said operational amplifier A after the second zero mark resistance Rz2 connects.

Wherein, End that said first integral resistance R 01 does not link to each other with operational amplifier A and said second integral resistance R 02 are the input in of an end that does not link to each other with operational amplifier A as said compensation integrator, and the positive output end of said operational amplifier and negative output terminal are as the output out of said compensation integrator; This zero mark resistance is used to produce a zero point; Be associated with the limit that self finite bandwidth produces the zero point that said operational amplifier is used for said zero mark resistance is produced, and offsets said limit, realizes following the tracks of compensating.

Operation principle in the face of the described tracking compensation of embodiment of the invention integrator describes in detail down.

Not for for the integrator of integrating capacitor series connection zero mark resistance, the ideal transfer of integrator is for traditional:

$H_i\left(s\right)=-\frac{1}{s{R}_0{C}_0}---\left(1\right)$

Wherein, R0 is an integrating resistor; C0 is an integrating capacitor.

For traditional integrator, when considering the imperfect bandwidth of operational amplifier, its transfer function is:

$H_p\left(s\right)=-\frac{A\left(s\right)}{1+{\mathrm{sR}}_0{C}_0(1+A\left(s\right))}=\frac{1}{{\mathrm{sR}}_0{C}_0(\frac{s}{A_0{\mathrm{\ω}}_0}+1+\frac{1}{A_0}+\frac{1}{A_0{\mathrm{\ω}}_0{C}_0{R}_0})+\frac{1}{A_0}}---\left(2\right)$

Wherein, A ₀＞＞1, A ₀ω ₀C ₀R ₀＞＞1, then formula (2) can be reduced to:

$H_p\left(s\right)\≈-\frac{1}{s{R}_0{C}_0(1+\frac{s}{A_0{\mathrm{\ω}}_0})}---\left(3\right)$

And the described tracking of embodiment of the invention compensation integrator is to be equivalent to the integrating capacitor C0 zero mark resistance Rz that connects on the basis of traditional quadrature device, and integrating capacitor is replaced with the form of resistance capacitance series connection, and at this moment, the transfer function of compensation integrator is:

$H_c\left(s\right)\≈-\frac{1+{\mathrm{sC}}_0{R}_z}{{\mathrm{sR}}_0{C}_0(1+\frac{s}{A_0{\mathrm{\ω}}_0})}---\left(4\right)$

The zero point and the limit in the following formula (4) that make said zero mark resistance Rz produce equate, just can realize compensation and the counteracting of zero point to imperfect limit, when realizing offsetting fully, have:

$C_0{R}_z=\frac{1}{A_0{\mathrm{\ω}}_0}---\left(5\right)$

In order to realize following the tracks of the tracking compensation of antipodal points at zero point in the compensation integrator, only need formula (50) both sides be associated, be about to zero point and limit and associate, just can eliminate the influence that brings because of the amplifier finite bandwidth in the filter.

In the embodiment of the invention, said operational amplifier A can adopt the broadband differential operational amplifier of tail current control.With reference to Fig. 2, be a kind of implementation circuit diagram of the operational amplifier of the embodiment of the invention.Need to prove that circuit shown in Figure 2 only is a kind of concrete implementation circuit diagram of operational amplifier, in other embodiment of the present invention, said operational amplifier can also be realized through the circuit of other modes.

Operational amplifier shown in Figure 2 is the broadband differential operational amplifier of tail current control, is one-pole system.Said operational amplifier can be made up of one-level or dual-stage amplifier, and Fig. 2 is that example describes with the two-stage system.

As shown in Figure 2, said operational amplifier comprises: the 3rd transistor M3, the 4th transistor M4, the 5th transistor M5, the 6th transistor M6, the first triode T1, the second triode T2, the first miller capacitance Cc1, the second miller capacitance Cc2, tail current source I ₀, the first current source load Is1, the second current source load Is2.

The grid short circuit of the grid of said the 4th transistor M4 and the 3rd transistor M3, the drain electrode of said the 4th transistor M4 connects the collector electrode of the said second triode T2, and the drain electrode of said the 3rd transistor M3 connects the collector electrode of the said first triode T1.

The collector electrode of the emitter of the said second triode T2 and the said first triode T1 meets said tail current source I jointly ₀First end.

The grid of said the 5th transistor M5 connects the drain electrode of said the 3rd transistor M3, and the drain electrode of said the 5th transistor M5 connects first end of the said first current source load Is1.

The grid of said the 6th transistor M6 connects the drain electrode of said the 4th transistor M4, and the drain electrode of said the 6th transistor M6 connects first end of the said second current source load Is2.

The source electrode of the source electrode of the source electrode of the source electrode of said the 4th transistor M4, the 3rd transistor M3, the 5th transistor M5 and the 6th transistor M6 connects working power jointly; Said tail current source I ₀Second end, second end of the first current source load Is1 and the second end common ground of the second current source load Is2.

The said first miller capacitance Cc1 is connected between the grid and drain electrode of said the 5th transistor M5; The said second miller capacitance Cc2 is connected between the grid and drain electrode of said the 6th transistor M6.

Wherein, the base stage of the base stage of the said first triode T1 and the second triode T2 is as the input of said operational amplifier, and first end of first end of the said first current source load Is1 and the second current source load Is2 is as the output of said operational amplifier.

The broadband differential operational amplifier of tail current control shown in Figure 2 is made up of dual-stage amplifier.The first order is an input stage, by the bipolar devices first triode T1, the second triode T2, tail current source I ₀, and the 3rd transistor M3 and the 4th transistor M4 formation; The second level is driving stage, is made up of the 5th transistor M5, the 6th transistor M6 and the first current source load Is1 and the second current source load Is2.

Wherein, said the 3rd transistor M3 and the 4th transistor M4 play the effect of current source, and Vbias shown in Fig. 2 is the fixed level that biasing is provided for current source M3 and M4.

Wherein, the drain electrode of the drain electrode of said the 3rd transistor M3 and the 4th transistor M4 is the output of the first order, and the drain electrode of the drain electrode of said the 5th transistor M5 and the 6th transistor M6 is partial output.The said first miller capacitance Cc1 and the second miller capacitance Cc2 are connected across between the output and partial output of the first order.

The broadband differential operational amplifier of tail current control shown in Figure 2 is an one-pole system, and its transfer function is:

$A\left(s\right)=\frac{A_0{\mathrm{\ω}}_0}{s+{\mathrm{\ω}}_0}---\left(6\right)$

Wherein, A ₀Be the DC current gain of operational amplifier, ω ₀Dominant pole frequency for operational amplifier; A then ₀ω ₀Bandwidth when dropping to unit gain for the gain of operational amplifier is called the long-pending GBP of unity gain bandwidth.

The long-pending GBP of the unity gain bandwidth of operational amplifier shown in Figure 2 can be by the ratio decision of input stage mutual conductance and miller capacitance, that is:

$\mathrm{GBP}=\frac{1}{A_0{\mathrm{\ω}}_0}=\frac{g_m}{C_c}=\frac{I_0}{V_T{k}_1{C}_0}---\left(7\right)$

Wherein, g _mBe the function of biasing tail current source,

Make miller capacitance (the first miller capacitance Cc1 and the second miller capacitance Cc2) proportional, that is: C with the integrating capacitor in the compensation integrator _c=k ₁C ₀

Tail current source I in the operational amplifier shown in Figure 2 ₀Can have multiple generation form, below with tail current source I ₀Two kinds of concrete ways of realization be that example describes.

With reference to Fig. 3, be a kind of implementation circuit diagram of the tail current source of the embodiment of the invention.Need to prove that tail current source shown in Figure 3 is produced by the bias current generating circuit of a realization and zero mark resistance and temperature correlation.

As shown in Figure 3, said bias current generating circuit comprises: the 11 transistor M11, the tenth two-transistor M12, the 13 transistor M13, the 14 transistor M14, the 15 transistor M15, the 16 transistor M16, the 3rd triode T3, the 4th triode T4, the first resistance R t1.

The source shorted of said the 11 transistor M11, the tenth two-transistor M12, the 13 transistor M13, the door short circuit of said the 11 transistor M11, the tenth two-transistor M12, the 13 transistor M13.

The drain and gate short circuit of said the 11 transistor M11, the drain electrode of said the 11 transistor M11 connects the collector electrode of the 3rd triode T3; The emitter of said the 3rd triode T3 is through the first temperature and resistance Rt1 ground connection, the base stage short circuit of the base stage of said the 3rd triode T3 and the 4th transistor T 4.

The drain electrode of said the tenth two-transistor M12 connects the collector electrode of the 4th triode T4, the base stage of said the 4th triode T4 and collector electrode short circuit, the grounded emitter of the 4th triode T4.

The drain electrode of said the 13 transistor M13 connects the drain electrode of the 14 transistor M14, the drain and gate short circuit of said the 14 transistor M14.

The grid short circuit of said the 14 transistor M14, the 15 transistor M15, the 16 transistor M16, the source electrode common ground of said the 14 transistor M14, the 15 transistor M15, the 16 transistor M16.

The drain electrode of said the 15 transistor M15 drain electrode and the 16 transistor M16 is as said tail current source I ₀First end.

Tail current source shown in Figure 3 is the bias current generating circuit of a realization and zero mark resistance and temperature correlation.Wherein, the 3rd triode T3 and the 4th triode T4 all are bipolarity triodes of NPN type, and its area is than being A.Zero mark resistance in the first resistance R t1 and the said compensation integrator is of the same type and proportional.Said the 11 transistor M11, the tenth two-transistor M12, the 13 transistor M13, the 14 transistor M14 are for realizing the current mirror of current mirror.The drain electrode of said the 15 transistor M15 and the drain electrode of the 16 transistor M16 are as first end of said tail current source.

Explain explanation in the face of the operation principle of tail current source shown in Figure 3 down.

Among Fig. 3, the area of the 3rd triode T3 and the 4th triode T4 is than being A, and the electric current that then produces at the 14 transistor M14 is:

$I=\frac{V_T\ln A}{R_t}---\left(8\right)$

Electric current and the electric current shown in the formula (8) of said the 15 transistor M15 and the 16 transistor M16 are proportional, by way of compensation the tail current source I of the operational amplifier in the integrator ₀Electric current.The first resistance R t1 is proportional with the zero mark resistance in the compensation integrator, i.e. R _t=k ₂R _Z, then have:

$I_0=\frac{k_3{V}_T\ln A}{k_2{R}_z}---\left(9\right)$

Wherein, I ₀Electric current for tail current source; R _ZZero mark resistance for the compensation integrator; k ₂, k ₃Be constant.Comprehensive above-mentioned formula (5), (7), (9) during zero pole cancellation, draw:

$\frac{k_3\ln A}{k_1{k}_2}\·\frac{C_0}{C}=1---\left(10\right)$

Can find out that equality left side each item of following formula (10) is a constant, show that the compensation integrator is scattered insensitive with temperature effect to technology, realize the tracking compensation of the limit that in compensation integrator form the operational amplifier finite bandwidth zero point.

Tail current source shown in Figure 3 and zero mark resistance and temperature correlation, under the little situation of variations in temperature, said tail current source also can adopt circuit shown in Figure 4 to realize.

With reference to Fig. 4, be the another kind of implementation circuit diagram of the tail current source of the embodiment of the invention.Need to prove that tail current source shown in Figure 4 realizes that by one the reference offset current generating circuit relevant with zero mark resistance produces.

As shown in Figure 4, said bias current generating circuit comprises: the 21 transistor M21, the 20 two-transistor M22, the 23 transistor M23, the 24 transistor M24, the 25 transistor M25, the 26 transistor M26, the second amplifier U2, the second resistance R t2.

The source shorted of said the 21 transistor M21, the 20 two-transistor M22, the grid short circuit of said the 21 transistor M21, the 20 two-transistor M22, the grid of said the 21 transistor M21 and drain electrode short circuit.

The drain electrode of said the 21 transistor M21 connects the drain electrode of the 23 transistor M23, and the grid of said the 23 transistor M23 connects the output of the second amplifier U2; The in-phase input end of the said second amplifier U2 meets reference voltage V bg, and the inverting input of the second amplifier U2 connects the source electrode of the 23 transistor M23.

The source electrode of the 23 transistor M23 is through the second resistance R t2 ground connection.

The drain electrode of said the 20 two-transistor M22 connects the drain electrode of the 24 transistor M24, the drain and gate short circuit of said the 24 transistor M24.

The grid short circuit of said the 24 transistor M24, the 25 transistor M25, the 26 transistor M26, the source electrode common ground of said the 24 transistor M24, the 25 transistor M25, the 26 transistor M26.

The drain electrode of said the 25 transistor M25 drain electrode and the 26 transistor M26 is as said tail current source I ₀First end.

In the tail current source shown in Figure 4, the second amplifier U2 is a base amplifier, and current mirror is output as the ratio of the reference voltage and the second resistance R t2.Said the 21 transistor M21, the 20 two-transistor M22, the 23 transistor M23, the 24 transistor M24 are current mirror, and the drain electrode of said the 25 transistor M25 drain electrode and the 26 transistor M26 is as said tail current source I ₀First end.

Above-mentioned Fig. 3 and circuit shown in Figure 4 only are the concrete implementation circuit diagrams of two kinds of operational amplifier, and in other embodiment of the present invention, said operational amplifier can also be realized through the circuit of other modes.

The said tracking compensation of embodiment of the invention integrator through increasing the method at the zero point that can follow the tracks of the operational amplifier bandwidth, has been offset the influence of the finite bandwidth of operational amplifier to the broadband filter transfer function.The counteracting method that the said compensation integrator of the embodiment of the invention is adopted is discrete insensitive with variations in temperature to technology, and under filter bandwidht is not very wide situation, can reduce power consumption through the operational amplifier that adopts less bandwidth.The said tracking compensation of embodiment of the invention integrator, its scheme implementation is simple, and only needing increases zero mark resistance, does not need extra complicated calibration circuit, has strengthened the competitiveness of circuit solution.

Corresponding to the compensation integrator that the embodiment of the invention provides, the embodiment of the invention also provides a kind of broadband filter.Said broadband filter adopts as the described compensation integrator of aforementioned arbitrary embodiment.

Said broadband filter can be two step low-pass or band pass filter.Said broadband filter comprises two described compensation integrators, is respectively the first compensation integrator and the second compensation integrator; The input of the said second compensation integrator of the output termination of the said first compensation integrator.

Said broadband filter also comprises the 3rd resistance and the 4th resistance.

Said the 3rd resistance is connected between the input and output of operational amplifier of the said first compensation integrator, and said the 4th resistance is connected between the output of operational amplifier of input and the said second compensation integrator of operational amplifier of the said first compensation integrator.

Said compensation integrator can be the described compensation integrator of aforementioned arbitrary embodiment.

The said broadband filter of the embodiment of the invention; Adopt the compensation integrator; Through being the integrating capacitor of the said compensation integrator zero mark resistance of connecting; Produce left half-plane zero point, the limit of utilizing the finite bandwidth of offsetting said operational amplifier this zero point that integrator is produced, thus eliminate in the filter influence that the finite bandwidth because of operational amplifier brings.

With the biquadratic filter is that example describes.With reference to Fig. 5, be the circuit diagram of the broadband filter of the embodiment of the invention.Adopt the compensation integrator of difference form shown in Figure 1 in the broadband filter shown in Figure 5.

As shown in Figure 5, said broadband filter comprises: the first compensation integrator, second compensation integrator, the 3rd resistance and the 4th resistance.

For the compensation integrator of difference form, its 3rd resistance comprises the one or three resistance R 13 and the two or three resistance R 23; The 4th resistance comprises the one or four resistance R 14 and the two or four resistance R 24.

The device formation and the annexation between each device of the said first compensation integrator and the second compensation integrator are same as shown in Figure 1, repeat no more at this.

The in-phase input end of the positive output termination second compensation integrator of the said first compensation integrator, the inverting input of the negative output termination second compensation integrator of the said first compensation integrator.

Said the one or three resistance R 13 is connected between the in-phase input end and negative output terminal of operational amplifier of the said first compensation integrator, and the in-phase input end and second that said the one or four resistance R 14 is connected on the operational amplifier of the said first compensation integrator compensates between the negative output terminal of operational amplifier of integrator.

Said the two or three resistance R 23 is connected between the inverting input and positive output end of operational amplifier of the said first compensation integrator, and the inverting input and second that said the two or four resistance R 24 is connected on the operational amplifier of the said first compensation integrator compensates between the positive output end of operational amplifier of integrator.

Wherein, The input of said first integral compensator is as the input input of said filter; The output of said first integral compensator is as the first order output output1 of said filter, and the output of said second integral device is as the second level output output2 of said filter.

Filter shown in Figure 5 is two step low-pass or band pass filter.What Fig. 5 provided only is a kind of concrete way of realization of broadband filter of utilizing the described compensation integrator of the embodiment of the invention, and in other embodiment of the present invention, said broadband filter can also adopt other forms to realize.

The embodiment of the invention also provides a kind of broadband analog chip, and said chip comprises the described broadband filter like above-mentioned embodiment.

The technical scheme that the embodiment of the invention provides is with a wide range of applications in integrated simulation broadband filters such as terminal LTE chip, microwave communication chip and base station ic.

More than to a kind of tracking compensation integrator broadband filter provided by the present invention, and broadband analog chip; Carried out detailed introduction; Used concrete example among this paper principle of the present invention and execution mode are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, part all can change on embodiment and range of application.In sum, this description should not be construed as limitation of the present invention.

Claims (10)

1. a compensation integrator is characterized in that said compensation integrator comprises: operational amplifier, integrating resistor and integrating capacitor and zero mark resistance;

Said integrating resistor connects the input of said operational amplifier, and said integrating capacitor and said zero mark resistance series connection are between the input and output of said operational amplifier;

Said zero mark resistance is used to produce a zero point;

Be associated with the limit that self finite bandwidth produces the zero point that said operational amplifier is used for said zero mark resistance is produced, and offsets said limit, realizes following the tracks of compensating.

2. compensation integrator according to claim 1 is characterized in that, said integrating resistor comprises first integral resistance and second integral resistance; Said integrating capacitor comprises first integral electric capacity and second integral electric capacity; Said zero mark resistance comprises the first zero resistance and second zero mark resistance;

Said first integral resistance connects the in-phase input end of said operational amplifier, said first integral electric capacity be connected between the in-phase input end and negative output terminal of said operational amplifier after first zero resistance is connected;

Said second integral resistance connects the inverting input of said operational amplifier, said second integral electric capacity be connected between the inverting input and positive output end of said operational amplifier after second zero mark resistance is connected.

3. compensation integrator according to claim 2 is characterized in that, said operational amplifier is the broadband differential operational amplifier of tail current control.

4. compensation integrator according to claim 3; It is characterized in that said operational amplifier comprises: the 3rd transistor, the 4th transistor, the 5th transistor, the 6th transistor, first triode, second triode, first miller capacitance, second miller capacitance, tail current source, first current source load, second current source load;

The said the 4th transistorized grid and the 3rd transistorized grid short circuit, said the 4th transistor drain connects the collector electrode of said second triode, and said the 3rd transistor drain connects the collector electrode of said first triode;

The collector electrode of the emitter of said second triode and said first triode connects first end of said tail current source jointly;

The said the 5th transistorized grid connects said the 3rd transistor drain, and said the 5th transistor drain connects first end of said first current source load;

The said the 6th transistorized grid connects said the 4th transistor drain, and said the 6th transistor drain connects first end of said second current source load;

The said the 4th transistorized source electrode, the 3rd transistorized source electrode, the 5th transistorized source electrode and the 6th transistorized source electrode connect working power jointly; The second end common ground of second end of said tail current source, second end of first current source load and second current source load;

Said first miller capacitance is connected between the said the 5th transistorized grid and the drain electrode; Said second miller capacitance is connected between the said the 6th transistorized grid and the drain electrode.

5. compensation integrator according to claim 4 is characterized in that, said tail current source becomes positively related bias current generating circuit to produce by one with said zero mark resistance with temperature.

6. compensation integrator according to claim 5; It is characterized in that said bias current generating circuit comprises: the 11 transistor, the tenth two-transistor, the 13 transistor, the 14 transistor, the 15 transistor, the 16 transistor, the 3rd triode, the 4th triode, first resistance;

Said the 11 transistor, the tenth two-transistor, the 13 transistorized source shorted, said the 11 transistor, the tenth two-transistor, the 13 transistorized short circuits;

Said the 11 transistor drain and grid short circuit, said the 11 transistor drain connects the collector electrode of the 3rd triode; The emitter of said the 3rd triode is through the first temperature and resistance ground connection, the base stage of said the 3rd triode and the 4th transistorized base stage short circuit;

The drain electrode of said the tenth two-transistor connects the collector electrode of the 4th triode, the base stage of said the 4th triode and collector electrode short circuit, the grounded emitter of the 4th triode;

Said the 13 transistor drain connects the 14 transistor drain, said the 14 transistor drain and grid short circuit;

Said the 14 transistor, the 15 transistor, the 16 transistorized grid short circuit, said the 14 transistor, the 15 transistor, the 16 transistorized source electrode common ground;

Said the 15 transistor drain and the 16 transistor drain are as first end of said tail current source.

7. compensation integrator according to claim 4 is characterized in that, said tail current source becomes positively related bias current generating circuit to produce by one with said zero mark resistance.

8. compensation integrator according to claim 7; It is characterized in that said bias current generating circuit comprises: the 21 transistor, the 20 two-transistor, the 23 transistor, the 24 transistor, the 25 transistor, the 26 transistor, second amplifier, second resistance;

The source shorted of said the 21 transistor, the 20 two-transistor, the grid short circuit of said the 21 transistor, the 20 two-transistor, the said the 21 transistorized grid and drain electrode short circuit;

Said the 21 transistor drain connects the 23 transistor drain, and the said the 23 transistorized grid connects the output of second amplifier; The in-phase input end of said second amplifier connects reference voltage, and second amplifier's inverting input connects the 23 transistorized source electrode;

The 23 transistorized source electrode is through second grounding through resistance;

The drain electrode of said the 20 two-transistor connects the 24 transistor drain, said the 24 transistor drain and grid short circuit;

Said the 24 transistor, the 25 transistor, the 26 transistorized grid short circuit, said the 24 transistor, the 25 transistor, the 26 transistorized source electrode common ground;

Said the 25 transistor drain and the 26 transistor drain are as first end of said tail current source.

9. broadband filter; It is characterized in that; Said filter comprises two like each described compensation integrator of claim 1 to 8, is respectively the first compensation integrator and the second compensation integrator, the input of the said second compensation integrator of the output termination of the said first compensation integrator;

Said filter also comprises the 3rd resistance and the 4th resistance;

Said the 3rd resistance is connected between the input and output of operational amplifier of the said first compensation integrator, and said the 4th resistance is connected between the output of operational amplifier of input and the said second compensation integrator of operational amplifier of the said first compensation integrator.

10. a broadband analog chip is characterized in that, said chip comprises broadband filter as claimed in claim 9.

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