CN102593198A - II-VI group laminating integrated nano photovoltaic device and manufacturing method thereof - Google Patents
II-VI group laminating integrated nano photovoltaic device and manufacturing method thereof Download PDFInfo
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- CN102593198A CN102593198A CN2012100536448A CN201210053644A CN102593198A CN 102593198 A CN102593198 A CN 102593198A CN 2012100536448 A CN2012100536448 A CN 2012100536448A CN 201210053644 A CN201210053644 A CN 201210053644A CN 102593198 A CN102593198 A CN 102593198A
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Abstract
The invention discloses an II-VI group laminating integrated nano photovoltaic device and a manufacturing method of the II-VI group laminating integrated nano photovoltaic device. The bottom layer of the photovoltaic device is a heavily doped silicon wafer (4), the upper layer of the heavily doped silicon wafer (4) is a PMMA (Polymethyl Methacrylate) insulating layer (2), at least one II-VI group nano material (3) is arranged in the PMMA insulating layer in an array manner; the II-VI group nano material (3) penetrates through the PMMA insulating layer (2) in the direction perpendicular to the plane of the PMMA insulating layer (2); and an electrode (1) is in ohm contact with the at least one II-VI group nano material (3). The manufacturing method of the photovoltaic device is simple and easy to operate, low in cost, more stable in performance of the photovoltaic device, can be used for manufacturing various nano structure silicon-based heterojunction photovoltaic devices and integrating the photovoltaic device in a large scale.
Description
One, technical field:
The present invention relates to a kind of photovoltaic device and preparation method thereof, more precisely be based on II-VI family/silicon heterogenous range upon range of integrated nanometer photovoltaic device.
Two, background technology
Solar-energy photo-voltaic cell is the device that directly changes into luminous energy electric energy through photoelectric effect or Photochemical effects.Owing to have zero discharge, pollution-free a, environmental protection, characteristics such as the life-span is long are considered to alleviate energy shortage and reduce one of important technology of greenhouse gas emission, be widely used at present space flight, industrial and agricultural production, domestic life etc. multiple field.
The accurate one dimension semiconductor of II-VI family; Comprise ZnO, ZnS, ZnSe, ZnTe, CdS, CdSe and CdTe nano wire/band/pipe etc.; Have excellent properties such as high-crystal quality, well transport property, and high-luminous-efficiency, be widely used at aspects such as luminous, photodetection, photovoltaic devices.Solar cell based on II-VI family nanostructure also has report in recent years, but it extensively exists photovoltaic performance poor, complicated process of preparation, and shortcoming such as poor controllability.
Three, summary of the invention:
The present invention aims to provide range upon range of integrated nanometer photovoltaic device of a kind of II-VI family and preparation method thereof, and technical problem to be solved is the conversion efficiency that under the prerequisite of simplifying the preparation method, strengthens the nano photovoltaic device, increases photovoltaic device photosensitive layer area.
Technical solution problem of the present invention adopts following technical scheme:
II-VI family of the present invention range upon range of integrated nanometer photovoltaic device difference with the prior art is: the bottom of the said photovoltaic device doped silicon wafer 4 of attaching most importance to; The upper strata of said heavy doping silicon chip 4 is a PMMA insulating barrier 2; Array arrangement has at least one II-VI family nano material 3 in the said PMMA insulating barrier; Said II-VI family nano material 3 is exposed on PMMA insulating barrier 2 surfaces, and surface and the said electrode 1 that electrode 1 is positioned at said PMMA insulating barrier 2 is ohmic contact with at least one said II-VI family nano material 3;
Said II-VI family nano material 3 is nano wire, nano belt or nanotube;
Said II-VI family nano material 3 is selected from ZnSe, ZnS, ZnO or CdS;
Said heavy doping silicon chip 4 is n-type doped silicon wafer or p-type doped silicon wafer;
Said II-VI family nano material 3 is p-type doped with II-VI family nano material or n-type doped with II-VI family nano material;
When said heavy doping silicon chip 4 during for n-type doped silicon wafer said II-VI family nano material be p-type doped with II-VI family nano material; When said heavy doping silicon chip 4 during for p-type doped silicon wafer said II-VI family nano material be n-type doped with II-VI family nano material;
Said electrode 1 is Au, Al, ITO, In or Graphene etc.; Being shaped as of said electrode 1 is circular, square, bar shaped etc.
The doped source of said p type doped with II-VI family nano material is selected from one or more among N, P, As, Bi, the Ag; The doped source of said n type doped with II-VI family nano material is selected from one or more among Ga, In, Cl, the I.When doped source is multiple between each doped source ratio any.
The doping of doped source gets final product with the requirement of satisfying signal, and doping is low, and signal is little, and doping is high, and signal is big, can obtain various signals through different doping regulation and control, as long as satisfy the n/P type character of nano photovoltaic device.
The preparation method of the range upon range of integrated nanometer photovoltaic device of II-VI family of the present invention is characterized in that operating according to the following steps:
A, heavy doping silicon chip 4 is placed mass concentration is 5% hydrofluoric acid solution etching 2-3 minute, removes the thin oxide layer on heavy doping silicon chip 4 surfaces, takes out back ultrasonic cleaning and drying and obtains pretreated heavy doping silicon chip;
B, II-VI family nano material 3 is dispersed on the pretreated heavy doping silicon chip; Spin coating one deck PMMA insulating barrier 2 and oven dry then; The thickness of the PMMA insulating barrier 2 II-VI family nano material 3 of being annihilated fully at least makes II-VI family nano material 3 surperficial invisible at PMMA insulating barrier 2;
Can there be the silicon substrate of II-VI family nano material 3 to cover directed scratch of the enterprising row of pretreated heavy doping silicon chip growth during prepared in batches; Make II-VI family nano material 3 be arranged on the heavy doping silicon chip 4, through the distance of 4 of adjustment silicon substrate and heavy doping silicon chips and the number of times may command array density of scratch with array format.
C, with oxygen gas plasma etching (plasma) PMMA insulating barrier 2; When II-VI family nano material 3 is exposed on the surface of PMMA insulating barrier 2, stop etching, on heavy doping silicon chip 4, do not disperse this moment the position of II-VI family nano material 3 to still have PMMA insulating barrier 2 to exist;
D, utilize electron beam technology on PMMA insulating barrier 2, to prepare electrode 1, and electrode 1 is ohmic contact with II-VI family nano material 3, obtains the range upon range of integrated nanometer photovoltaic device of II-VI family through mask plate.
Photosensitive material of the present invention is an II-VI family nano material, can obtain n type or p type material through adopting different doped source.
Compared with present technology, beneficial effect of the present invention is embodied in:
1, the present invention adopts PMMA as insulating material, and method simply is easy to realize, and cost is low.
2, the present invention adopts the directed method that moves that nano material is arranged into array way, and array density is controlled, and making has the II-VI of controllable number family nano material between electrode, can be used for the preparation of extensive integrated nanometer photovoltaic device.
3, the present invention makes the conversion efficiency of nano photovoltaic device be improved under the prerequisite of having simplified the preparation method.
Four, description of drawings:
Fig. 1 is the structural representation of II-VI family of the present invention range upon range of integrated nanometer photovoltaic device individual devices.
The structural representation of a plurality of devices when Fig. 2 is II-VI family of the present invention range upon range of integrated nanometer photovoltaic device prepared in batches.
Wherein 1 is electrode, and 2 is the PMMA insulating barrier, and 3 is II-VI family nano material, 4 doped silicon wafer of attaching most importance to.
Fig. 3 is the SEM figure of the p type-ZnSe/n type-range upon range of integrated nanometer photovoltaic device of Si heterojunction of the embodiment of the invention 1 preparation, and lower right corner illustration is the arrange SEM figure of situation of nano wire.
Fig. 4 is the photovoltaic property curve of the p type-ZnSe/n type-range upon range of integrated nanometer photovoltaic device of Si heterojunction of the embodiment of the invention 1 preparation.
Fig. 5 is the p type-ZnSe/n type-photoresponse curve of Si heterojunction under the 0V bias voltage of the embodiment of the invention 1 preparation.
Fig. 6 is the photovoltaic property curve of the n type-ZnSe/p type-range upon range of integrated nanometer photovoltaic device of Si heterojunction of the embodiment of the invention 2 preparations.
Fig. 7 is the n type-ZnSe/p type-photoresponse curve of Si heterojunction under the 0V bias voltage of the embodiment of the invention 2 preparations.
Five, embodiment
Below in conjunction with the preparation method of the range upon range of integrated nanometer photovoltaic device of accompanying drawing detailed description II-VI family of the present invention, wherein II-VI family nano material adopts the ZnSe nano wire, and non-limiting examples is following.
Embodiment 1:
A, n-type heavy doping silicon chip is placed mass concentration is 5% hydrofluoric acid solution etching 2 minutes, removes the oxide layer on heavy doping silicon chip surface, takes out the back and uses the acetone ultrasonic cleaning, dries up subsequent use.
B, there is the silicon substrate of p-type Ag doped ZnS e nano wire (doping 15%) to cover that the enterprising row of n-type heavy doping silicon chip is directed to scratch growth; Make p-type Ag doped ZnS e nano wire transfer on the n-type heavy doping silicon chip and and arrange array density 40-42 root/cm with array format
2
C, the n-type heavy doping silicon chip that will be evenly equipped with p-type Ag doped ZnS e nano wire place spin coating one deck PMMA on the glue evenning table (model 445746-25G, Aldrich) (the spin coating parameter is insulating barrier: low speed 600r/s, t=9s; High speed 3000r/s, t=30s), place then on the drying glue platform oven dry (the baking parameter is 100 ℃, t=3min), the thickness of the PMMA insulating barrier II-VI family nano material of being annihilated fully;
D, with oxygen plasma etching (model PDC-32G, low-grade parameter 680V DC, 10mA DC, 6.8W) PMMA insulating barrier, when II-VI family nano material appears in the surface of PMMA insulating barrier, stop etching, etch period 4min, oxygen flow are 10sccm.On the heavy doping silicon chip, do not disperse this moment the position of II-VI family nano material to still have the PMMA insulating barrier to exist.
D, utilize electron beam technology on the PMMA insulating barrier, to prepare the Au electrode of thickness, and this Au electrode and Ag doped ZnS e nano wire form ohmic contact, obtain the range upon range of integrated nanometer photovoltaic device of p type-ZnSe/n type-Si for 10nm through the circular hole mask plate.
Folded integrated nanometer photovoltaic device SEM figure is as shown in Figure 3 for the ZnSe layer of present embodiment preparation.Fig. 4 is for being 0.35mWcm in light intensity
-2Under the white light conditions of power, the photovoltaic property curve of p type-ZnSe/n type-range upon range of integrated nanometer photovoltaic device of Si heterojunction, open circuit voltage Voc is 0.25V, and short circuit current Isc is 10.87nA, and fill factor, curve factor FF is 47%, and conversion efficiency is 0.09%.Fig. 5 is the p type-ZnSe/n type-photoresponse curve of Si heterojunction under the 0V bias voltage, shows this heterogeneous good photovoltaic property and stability of having.
Embodiment 2:
The present embodiment preparation method is with embodiment 1, and different is that the heavy doping silicon chip is a p-type heavy doping silicon chip, and II-VI family nano material is n type-I doped ZnS e nano wire (doping 20%), uses ITO (tin indium oxide) conduct to become the electrode material of ohmic contact with it.The photovoltaic property curve for preparing n type-range upon range of integrated nanometer photovoltaic device of ZnSe/p type-Si is as shown in Figure 6, and open circuit voltage Voc is 0.22V, and short circuit current Isc is 50.13nA, and fill factor, curve factor FF is 46%, and conversion efficiency is 0.12%.N type-ZnSe/p type-the photoresponse curve of Si heterojunction under the 0V bias voltage is as shown in Figure 7, shows this heterogeneous good photovoltaic property and stability of having.
In actual the use, can adjust photosensitive layer and doping, doped chemical, electrode material and shape, obtain suitable nano photovoltaic device according to demand.
Claims (3)
1.II-VI the range upon range of integrated nanometer photovoltaic device of family; It is characterized in that: the bottom of the said photovoltaic device doped silicon wafer (4) of attaching most importance to; The upper strata of said heavy doping silicon chip (4) is PMMA insulating barrier (2); Array arrangement has at least one II-VI family nano material (3) in the said PMMA insulating barrier; Said II-VI family's nano material (3) is exposed on PMMA insulating barrier (2) surface, and surface and said electrode (1) that electrode (1) is positioned at said PMMA insulating barrier (2) are ohmic contact with at least one said II-VI family's nano material (3);
Said II-VI family's nano material (3) is nano wire, nano belt or nanotube;
Said II-VI family's nano material (3) is selected from ZnSe, ZnS, ZnO or CdS;
Said heavy doping silicon chip (4) is n-type doped silicon wafer or p-type doped silicon wafer;
Said II-VI family's nano material (3) is p-type doped with II-VI family nano material or n-type doped with II-VI family nano material;
When said heavy doping silicon chip (4) said II-VI family nano material when the n-type doped silicon wafer is p-type doped with II-VI family nano material; When said heavy doping silicon chip (4) said II-VI family nano material when the p-type doped silicon wafer is n-type doped with II-VI family nano material;
Said electrode (1) is Au, Al, ITO, In or Graphene etc.
2. the range upon range of integrated nanometer photovoltaic device of II-VI family according to claim 1 is characterized in that:
The doped source of said p-type doped with II-VI family nano material is selected from one or more among N, P, As, Bi, the Ag; The doped source of said n-type doped with II-VI family nano material is selected from one or more among Ga, In, Cl, the I.
3. the preparation method of the range upon range of integrated nanometer photovoltaic device of claim 1 or 2 described II-VI families is characterized in that operating according to the following steps:
A, heavy doping silicon chip (4) is placed mass concentration is 5% hydrofluoric acid solution etching 2-3 minute, removes the thin oxide layer on heavy doping silicon chip (4) surface, takes out back ultrasonic cleaning and drying and obtains pretreated heavy doping silicon chip;
B, II-VI family nano material (3) is dispersed on the pretreated heavy doping silicon chip spin coating one deck PMMA insulating barrier (2) and oven dry then, the thickness of PMMA insulating barrier (2) the II-VI family nano material of being annihilated fully at least;
C, with oxygen gas plasma etching PMMA insulating barrier, when II-VI family nano material (3) is exposed on the surface of PMMA insulating barrier (2), stop etching;
D, utilize electron beam technology to go up preparation electrode (1), and electrode (1) is ohmic contact with II-VI family nano material (3), obtains the range upon range of integrated nanometer photovoltaic device of II-VI family at PMMA insulating barrier (2) through mask plate.
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CN102931249A (en) * | 2012-11-26 | 2013-02-13 | 西南交通大学 | Cadmium selenide transparent thin film solar battery with graphene |
CN105304729A (en) * | 2015-09-08 | 2016-02-03 | 安阳师范学院 | Flexible optoelectronic device based on graphene and II-VI group semiconductor axial p-n junction nanowire array and preparation method thereof |
CN110148526A (en) * | 2019-04-24 | 2019-08-20 | 金华莱顿新能源科技有限公司 | A kind of ZnSN nano-material and preparation method thereof for supercapacitor |
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CN102931249A (en) * | 2012-11-26 | 2013-02-13 | 西南交通大学 | Cadmium selenide transparent thin film solar battery with graphene |
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CN110148526A (en) * | 2019-04-24 | 2019-08-20 | 金华莱顿新能源科技有限公司 | A kind of ZnSN nano-material and preparation method thereof for supercapacitor |
CN110148526B (en) * | 2019-04-24 | 2021-05-04 | 金华莱顿新能源科技有限公司 | ZnSN nanowire material for super capacitor and preparation method thereof |
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