CN102592670A - Data writing method, memory controller and memory storage device - Google Patents
Data writing method, memory controller and memory storage device Download PDFInfo
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- CN102592670A CN102592670A CN2011100024407A CN201110002440A CN102592670A CN 102592670 A CN102592670 A CN 102592670A CN 2011100024407 A CN2011100024407 A CN 2011100024407A CN 201110002440 A CN201110002440 A CN 201110002440A CN 102592670 A CN102592670 A CN 102592670A
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Abstract
The invention relates to a data writing method for a reproducible-type nonvolatile memory module. The data writing method comprises the following steps of: receiving at least one piece of updating data, wherein the updating data belongs to at least one logic page of a first logic block, and the first logic page maps a first physical block; extracting a third physical block from an idle region when a physical page, corresponding to the at least one logic page, in a second physical block which serves as a physical sub-block of the first physical block currently, stores data; writing the updating data into the third physical block; taking the third physical block as a physical sub-block corresponding to the first physical block; and carrying out an erasure operation on the second physical block. Therefore, the data writing method disclosed by the invention has the capabilities of reducing data merging operation and promoting the data writing speed.
Description
Technical field
The invention relates to a kind of method for writing data, and particularly relevant for a kind of be used to write Update Information to the method for writing data of non-volatile memory module and use the Memory Controller and the memorizer memory devices of the method.
Background technology
Digital camera, mobile phone and MP3 are very rapid in growth over the years, make the consumer also increase rapidly the storage requirements of digital content.Because flash memory (Flash Memory) has that data are non-volatile, power saving, volume is little and the characteristic of no mechanical structure etc., suitable user carries the Storage Media as digital document transmission and exchange.
Physical characteristics based on flash memory; Only can carry out unidirectional programming (promptly at flash memory cell; Position in the storage unit only can be programmed for 0 from 1), therefore can write new data again after before stored data have been erased in must be earlier with storage unit when in the storage unit of flash memory, writing data.
In the design of flash memory system; In general; The flash memory physical blocks of flash memory system can be grouped into a plurality of physical blocks (that is, each physical blocks is made up of one or more physical blocks), has at least one flash memory cell (flash memory cell) in this physical blocks; Each storage unit is made up of at least one transistor; Like MOSFET or other transistor or logical circuit, respectively this storage unit can store at least one position, and these a little physical blocks can be grouped into data field (data area) and idle district (free area).Classify as and to store in the physical blocks of data field by writing the data that instruction writes, and the physical blocks in the idle district is the physical blocks in the replacement data district when writing instruction in execution, writes data.In order to let main frame access successfully with the physical blocks of the mode storage data of rotating, flash memory system can provide blocks to shine upon this a little physical blocks.Specifically; Flash memory system can be converted to the logic access address of main frame institute access corresponding blocks; And the enantiomorphic relationship through between the physical blocks of record in blocks-physical blocks bitmap (logical unit-physical unit mapping table) and renewal blocks and data field reflects rotating of physical blocks; So main frame only needs to carry out access according to the logic access address, and flash memory system can carry out reading or writing of data to the physical blocks of institute's mapping according to blocks-physical blocks bitmap.
Specifically; When the main frame desire with data storing during in a blocks; Flash memory can extract a physical blocks and new data can be write to the physical blocks of from idle district, extracting (also being called the muon physics block) from idle district, with the physical blocks (also being called parent substance reason block) of replacing original this blocks of mapping.Afterwards, machine in due course, flash memory can carry out the data consolidation procedure, merges (that is the data that, will belong to this blocks all are incorporated in the physical blocks) with the valid data of parent substance being managed in block and the muon physics block.For example; Flash memory can copy to the muon physics block with the valid data that parent substance is managed in the block; This blocks will be remapped to muon physics block (that is, this muon physics block will be associated to the data field), and the parent substance reason block of data field is erased and is associated to idle district originally.
Under the operational architecture based on above-mentioned flash memory system, when main frame to same blocks in identical logical page (LPAGE) when carrying out Data Update times without number, flash memory must be carried out data times without number and merge with data and erase.Therefore, carry out to write and instruct the required time to increase, and influence the access usefulness of flash memory.
Summary of the invention
The present invention provides a kind of method for writing data, Memory Controller and memory storage system, and it can shorten effectively carries out the time that writes instruction, promotes the speed that writes data thus.
The present invention proposes a kind of method for writing data; Be used to write data to duplicative non-volatile memory module; Wherein this duplicative non-volatile memory module has a plurality of physical blocks, and each physical blocks has according to tactic a plurality of physical pages.The notebook data wiring method comprises these a little physical blocks is grouped into a data field and an idle district at least, and disposes the physical blocks of a plurality of blocks with the mapping (enum) data district, and wherein each blocks has a plurality of logical page (LPAGE)s.The notebook data wiring method also comprises that receiving many Updates Information; Wherein this Updates Information a bit and belongs to a plurality of continuous logical page (LPAGE) among these a little logical page (LPAGE)s, and these a little continuous logical page (LPAGE)s belong to first blocks and this first logical page (LPAGE) shines upon first physical blocks.The notebook data wiring method also comprises judges whether arbitrary physical blocks has been extracted the muon physics block as corresponding this first physical blocks in the idle district.The notebook data wiring method also comprises; When second physical blocks in idle district had been extracted the muon physics block as corresponding first physical blocks, whether one of them part of judging the physical page of corresponding these a little continuous logical page (LPAGE)s in this second physical blocks storage data.The notebook data wiring method also comprises, when one of them part of the physical page of corresponding these a little continuous logical page (LPAGE)s in second physical blocks storage data, carries out second write-in program.At this, second write-in program comprises: the data separation that will be stored in second physical blocks is first data and second data; From idle district, extract tertium quid reason block; This is Updated Information and these second data write in the tertium quid reason block; Tertium quid is managed the muon physics block of block as corresponding first physical blocks; And to the second physics onblock executing erase operation for use; Wherein, first data are that to be stored in second physical blocks data and two data in the physical page of corresponding these a little continuous logical page (LPAGE)s are the data that are stored in the physical page of these a little continuous logical page (LPAGE)s of non-correspondence in second physical blocks.
In one embodiment of this invention; Above-mentioned method for writing data also comprises; When the physical page of corresponding these a little continuous logical page (LPAGE)s in second physical blocks not during storage data, this is Updated Information a bit writes in the physical page of corresponding these a little continuous logical page (LPAGE)s in second physical blocks.
In one embodiment of this invention; Above-mentioned method for writing data also comprises: before in the physical page that writes in second physical blocks corresponding these a little continuous logical page (LPAGE)s that this is Updated Information a bit, will copy at the valid data in first physical blocks in second physical blocks.
In one embodiment of this invention; Above-mentioned method for writing data also comprises; When no any physical blocks in the idle district is extracted the muon physics block as corresponding first physical blocks; From idle district, extract one the 4th physical blocks, this is Updated Information a bit writes in the 4th physical blocks and with the muon physics block of the 4th physical blocks as first physical blocks.
The present invention proposes a kind of method for writing data, is used to write many and Updates Information to a duplicative non-volatile memory module.This duplicative non-volatile memory module has a plurality of physical blocks, and each physical blocks has according to tactic a plurality of physical pages, and these a little physical blocks are grouped into a data field and an idle district.In addition, a plurality of blocks are configured to the physical blocks in mapping (enum) data district, one of them of the physical blocks in each blocks mapping (enum) data district and have a plurality of logical page (LPAGE)s.Moreover; First blocks among the 5th physical blocks mapping logic block among the physical blocks of data field; The 6th physical blocks among the physical blocks in idle district has been extracted the muon physics block as corresponding the 5th physical blocks, among this logical page (LPAGE) that belongs to first blocks that Updates Information a bit a plurality of continuous logical page (LPAGE)s and in the 6th physical blocks one of them part storage data of the physical page of corresponding these a little continuous logical page (LPAGE)s.The notebook data wiring method comprises: whether the physical page of judging corresponding these a little continuous logical page (LPAGE)s in the 6th physical blocks belongs to specific webpage zone.The notebook data wiring method also comprises, when the physical page of corresponding these a little continuous logical page (LPAGE)s in the 6th physical blocks belongs to this specific webpage zone, carries out second write-in program.At this, second write-in program comprises: the data separation that will be stored in the 6th physical blocks is first data and second data; From the physical blocks in idle district, extract the 7th physical blocks; This is Updated Information and second data write so far in the 7th physical blocks; With the 7th physical blocks this muon physics block as corresponding the 5th physical blocks; And the 6th physical blocks carried out erase operation for use, wherein first data are that to be stored in data and two data in the physical page of corresponding these a little continuous logical page (LPAGE)s in the 6th physical blocks are the data in the non-physical page that is stored in corresponding these a little continuous logical page (LPAGE)s in the 6th physical blocks.In addition, the specific webpage zone is for comprising a plurality of continuous physical pages of initial physical page in each physical blocks.
In one embodiment of this invention, above-mentioned method for writing data also comprises, when the physical page of corresponding these a little continuous logical page (LPAGE)s in the 6th physical blocks does not belong to above-mentioned specific webpage zone, carries out first write-in program.At this, first write-in program comprises: will copy in the 6th physical blocks at the valid data in the 5th physical blocks; The 5th physical blocks is carried out erase operation for use; The 5th physical blocks is associated to idle district; First blocks is mapped to the 6th physical blocks; From idle district, extract the 8th physical blocks; This is Updated Information write in the 8th physical blocks; And with the muon physics block of the 8th physical blocks as corresponding the 6th physical blocks.
In one embodiment of this invention, the above-mentioned step that writes in the 8th physical blocks that will Update Information comprises: an initial physical page writes this and Updates Information among the physical page of the 8th physical blocks.
In one embodiment of this invention, the above-mentioned step that writes in the 8th physical blocks that this is Updated Information a bit comprises: will be copied at the part valid data in the 6th physical blocks in the 8th physical blocks; And this is Updated Information a bit write in the 8th physical blocks in the physical page of corresponding these a little continuous logical page (LPAGE)s.
The present invention proposes a kind of method for writing data; Be used to write data to duplicative non-volatile memory module; Wherein this duplicative non-volatile memory module has a plurality of physical blocks, and each physical blocks has according to tactic a plurality of physical pages.The notebook data wiring method comprises these a little physical blocks is grouped into a data field and an idle district at least; And dispose the physical blocks of a plurality of blocks with the mapping (enum) data district, wherein each blocks has a plurality of logical page (LPAGE)s.The notebook data wiring method comprises that also receiving at least one pen Updates Information; At least one logical page (LPAGE) among these corresponding so far a little logical page (LPAGE)s that Update Information wherein, this at least one logical page (LPAGE) belong to one first blocks and one first physical blocks among these a little physical blocks of this first blocks mapping among these a little blocks.The notebook data wiring method comprises also whether the arbitrary physical blocks among the physical blocks of judging idle district has been extracted the muon physics block as corresponding this first physical blocks.The notebook data wiring method also comprises; When second physical blocks among the physical blocks in idle district has been extracted the muon physics block of corresponding this first physical blocks of conduct; Whether the physical page of judgement corresponding this logical page (LPAGE) in second physical blocks storage data; And when the physical page of corresponding this logical page (LPAGE) in second physical blocks storage data, carry out one second write-in program.At this, second write-in program comprises: from the physical blocks in idle district, extract tertium quid reason block; To Update Information and write in the tertium quid reason block; Tertium quid is managed the muon physics block of block as corresponding first physical blocks; And to the operation of erasing of the second physics onblock executing one.
In one embodiment of this invention, wherein when second physical blocks has second data of first data and non-this logical page (LPAGE) of correspondence of corresponding this logical page (LPAGE), above-mentioned second write-in program also comprises second data is write in the tertium quid reason block.
In one embodiment of this invention; Above-mentioned method for writing data judges whether the physical page of corresponding this logical page (LPAGE) in second physical blocks is positioned at specific webpage zone before also being included in and carrying out second write-in program; And when physical page was positioned at this specific webpage zone, the side carried out above-mentioned second write-in program.
Exemplary embodiment of the present invention proposes a kind of Memory Controller, is used to manage the duplicative non-volatile memory module, and wherein this duplicative non-volatile memory module has a plurality of physical blocks.This Memory Controller comprises HPI, memory interface and memory management circuitry.HPI is in order to being coupled to host computer system, and memory interface is in order to be coupled to the duplicative non-volatile memory module.Memory management circuitry couples so far HPI memory interface therewith, and in order to carry out above-mentioned method for writing data.
Exemplary embodiment of the present invention proposes a kind of memorizer memory devices, and it comprises connector, duplicative non-volatile memory module and Memory Controller.The duplicative non-volatile memory module has a plurality of physical blocks.Memory Controller couples so far duplicative non-volatile memory module connector therewith, and in order to carry out above-mentioned method for writing data.
Based on above-mentioned, the method for writing data of exemplary embodiment of the present invention, Memory Controller and memorizer memory devices can reduce carries out the data merging, shortens effectively thus and carries out the time that writes instruction.
For letting the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts embodiment, and cooperates appended graphic elaborating as follows.
Description of drawings
Figure 1A is that first exemplary embodiment illustrates host computer system and memorizer memory devices according to the present invention.
Figure 1B is the synoptic diagram of exemplary embodiment illustrated according to the present invention computing machine, input/output device and memorizer memory devices.
Fig. 1 C is another exemplary embodiment illustrated according to the present invention the host computer system and the synoptic diagram of memorizer memory devices.
Fig. 2 is the summary calcspar that illustrates the memorizer memory devices shown in Figure 1A.
Fig. 3 is the summary calcspar of the Memory Controller that first exemplary embodiment is illustrated according to the present invention.
Fig. 4 and Fig. 5 are the synoptic diagram of the managing physical block that first exemplary embodiment is illustrated according to the present invention.
Fig. 6～Fig. 8 be that first exemplary embodiment is illustrated according to the present invention generally to write the example that pattern writes data to duplicative non-volatile memory module in proper order.
What Fig. 9 was that first exemplary embodiment is illustrated according to the present invention writes the example that pattern writes data to duplicative non-volatile memory module in proper order with special.
What Figure 10 was that first exemplary embodiment is illustrated according to the present invention writes another example that pattern writes data to duplicative non-volatile memory module in proper order with special.
What Figure 11 was that first exemplary embodiment is illustrated according to the present invention writes another example that pattern writes data to duplicative non-volatile memory module in proper order with special.
Figure 12 is the process flow diagram of the method for writing data that first exemplary embodiment is illustrated according to the present invention.
Figure 13 is the synoptic diagram of the physical page of the differentiation physical blocks that second exemplary embodiment is illustrated according to the present invention.
Figure 14 is the process flow diagram of the method for writing data that second exemplary embodiment is illustrated according to the present invention.
[main element label declaration]
1000: host computer system
1100: computing machine
1102: microprocessor
1104: RAS
1106: input/output device
1108: system bus
1110: data transmission interface
1202: mouse
1204: keyboard
1206: display
1208: printer
1212: coil with oneself
1214: storage card
1216: solid state hard disc
1310: digital camera
The 1312:SD card
The 1314:MMC card
1316: memory stick
The 1318:CF card
1320: embedded storage device
100: memorizer memory devices
102: connector
104: Memory Controller
106: the duplicative non-volatile memory module
202: memory management circuitry
204: HPI
206: memory interface
252: memory buffer
254: electric power management circuit
256: bug check and correcting circuit
310 (0)～310 (R): physical blocks
502: system region
504: the data field
506: idle district
508: replace the district
510 (0)～510 (H): blocks
UD: Update Information
S1201, S1203, S1205, S1207, S1209, S1211, S1213, S1215, S1217, S1219: the step that data write
1302: the specialized page zone
S1401, S1403, S1405, S1407, S1409, S1411, S1413: the step that data write
Embodiment
[first exemplary embodiment]
Figure 1A is that example first embodiment illustrates host computer system and memorizer memory devices according to the present invention.
Please with reference to Figure 1A, host computer system 1000 generally comprises computing machine 1100 and I/O (input/output, I/O) device 1106.Computing machine 1100 comprise microprocessor 1102, RAS (random access memory, RAM) 1104, system bus 1108 and data transmission interface 1110.Input/output device 1106 comprises mouse 1202, keyboard 1204, the display 1206 and printer 1208 like Figure 1B.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other device.
In embodiments of the present invention, memorizer memory devices 100 is to couple through data transmission interface 1110 other element with host computer system 1000.Can data be write to memorizer memory devices 100 or reading of data from memorizer memory devices 100 through microprocessor 1102, RAS 1104 with the running of input/output device 1106.For example, memorizer memory devices 100 can be carry-on dish 1212, storage card 1214 or solid state hard disc (Solid State Drive, SSD) the non-volatile memory storage device of 1216 grades shown in Figure 1B.
Generally speaking, but host computer system 1000 can be any system of storage data substantially.Though in this exemplary embodiment; Host computer system 1000 is to explain with computer system; Yet host computer system 1000 can be systems such as digital camera, video camera, communicator, audio player or video player in another exemplary embodiment of the present invention.For example; In host computer system is digital camera (video camera) 1310 o'clock, and the non-volatile memory storage device then is its employed SD card 1312, mmc card 1314, memory stick (memory stick) 1316, CF card 1318 or embedded storage device 1320 (shown in Fig. 1 C).Embedded storage device 1320 comprise the built-in multimedia card (Embedded MMC, eMMC).What deserves to be mentioned is that the built-in multimedia card is directly to be coupled on the substrate of host computer system.
Fig. 2 is the summary calcspar that illustrates the memorizer memory devices shown in Figure 1A.
Please with reference to Fig. 2, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and duplicative non-volatile memory module 106.
In this exemplary embodiment, connector 102 is secure digital (Secure Digital, SD) interface connector.Yet; It must be appreciated; The invention is not restricted to this; Connector 102 can also be universal serial bus (Universal Serial Bus, USB) connector, Institute of Electrical and Electric Engineers (Institute of Electrical and Electronic Engineers, IEEE) 1394 connectors, high-speed peripheral component connecting interface (Peripheral Component Interconnect Express; PCIExpress) connector, advanced annex (the Serial Advanced Technology Attachment of sequence; SATA) connector, memory stick (Memory Stick, MS) interface connector, Multi Media Card (MultiMedia Card, MMC) interface connector, compact flash (Compact Flash; CF) interface connector, integrated form drive electrical interface (Integrated Device Electronics, IDE) connector or other connector that is fit to.
Memory Controller 104 is in order to carrying out with example, in hardware or real a plurality of logic gates or the steering order of doing of form of firmware, and in duplicative non-volatile memory module 106, carries out the runnings such as writing, read and erase of data according to the instruction of host computer system 1000.Particularly, Memory Controller 104 can write data according to the method for writing data of this exemplary embodiment.
Duplicative non-volatile memory module 106 is to be coupled to Memory Controller 104, and in order to store the data that host computer system 1000 is write.
Duplicative non-volatile memory module 106 has physical blocks 310 (0)～310 (R).Each physical blocks has a plurality of physical pages respectively, and the physical page that wherein belongs to same physical blocks can be write and side by side erased independently.For example, each physical blocks is made up of 128 physical pages.Yet, it must be appreciated that the invention is not restricted to this, each physical blocks is to be made up of 64 physical pages, 256 physical pages or other arbitrarily individual physical page.
More detailed, physical blocks is the least unit of erasing.That is each physical blocks contains the storage unit of being erased in the lump of minimal amount.Physical page is the least unit of programming.That is, physical page is the least unit that writes data.Yet, it must be appreciated that in another exemplary embodiment of the present invention, the least unit that writes data can also be sector (Sector) or other size.Each physical page generally includes data bit district D and redundant digit district R.Data bit district D is in order to storage user's data, and redundant digit district R is in order to the data (for example, bug check and correcting code) of stocking system.
In this exemplary embodiment, duplicative non-volatile memory module 106 is multi-level cell memory (Multi Level Cell, MLC) a nand flash memory module.Yet, the invention is not restricted to this, duplicative non-volatile memory module 106 also the single-order storage unit (Single Level Cell, SLC) nand flash memory module, other flash memory module or other have the memory module of identical characteristics.
Fig. 3 is the summary calcspar of the Memory Controller that first exemplary embodiment is illustrated according to the present invention.
Please with reference to Fig. 3, Memory Controller 104 comprises memory management circuitry 202, HPI 204 and memory interface 206.
In this exemplary embodiment, the steering order of memory management circuitry 202 is to come real the work with form of firmware.For example, memory management circuitry 202 has microprocessor unit (not illustrating) and ROM (read-only memory) (not illustrating), and these a little steering orders are to be burned onto in this ROM (read-only memory).When memorizer memory devices 100 runnings, these a little steering orders can be carried out to carry out the runnings such as writing, read and erase of data by microprocessor unit.
In another exemplary embodiment of the present invention; The steering order of memory management circuitry 202 can also the procedure code stores in the specific region of duplicative non-volatile memory module 106 (for example, being exclusively used in the system region of storage system data in the memory module).In addition, memory management circuitry 202 has microprocessor unit (not illustrating), ROM (read-only memory) (not illustrating) and RAS (not illustrating).Particularly; This ROM (read-only memory) has the sign indicating number of driving section; And when Memory Controller 104 was enabled, microprocessor unit can be carried out this driving yard steering order that section will be stored in the duplicative non-volatile memory module 106 earlier and be loaded in the RAS of memory management circuitry 202.Afterwards, microprocessor unit can turn round these a little steering orders to carry out the runnings such as writing, read and erase of data.In addition, in another exemplary embodiment of the present invention, the steering order of memory management circuitry 202 can also an example, in hardware be come real the work.
In the present invention's one exemplary embodiment, Memory Controller 104 also comprises memory buffer 252.Memory buffer 252 is to be coupled to memory management circuitry 202 and in order to the temporary data that come from the data and instruction of host computer system 1000 or come from duplicative non-volatile memory module 106.
In the present invention's one exemplary embodiment, Memory Controller 104 also comprises electric power management circuit 254.Electric power management circuit 254 is to be coupled to memory management circuitry 202 and in order to the power supply of control store storage device 100.
In the present invention's one exemplary embodiment, Memory Controller 104 also comprises bug check and correcting circuit 256.Bug check and correcting circuit 256 be coupled to memory management circuitry 202 and in order to execution error inspection and correction program to guarantee the correctness of data.Specifically; When receiving, memory management circuitry 202 writes when instruction from host computer system 1000; Bug check can produce corresponding bug check and correcting code (Error Chec king andCorrecting Code for the corresponding data that this writes instruction with correcting circuit 256; ECC Code), and memory management circuitry 202 can corresponding these data that write instruction be write in the duplicative non-volatile memory module 106 with corresponding bug check and correcting code.Afterwards; When memory management circuitry 202 can read these data corresponding bug check and correcting code during reading of data simultaneously from duplicative non-volatile memory module 106, and bug check is understood according to this bug check and data execution error inspection and the correction program of correcting code to being read with correcting circuit 256.
Fig. 4 and Fig. 5 are the synoptic diagram of the managing physical block that first exemplary embodiment is illustrated according to the present invention.
Please with reference to Fig. 4, the memory management circuitry 202 of Memory Controller 104 can logically be grouped into physical blocks 310 (0)～310 (R) data field 502, idle district 504, system region 506 and replace district 508.
The physical blocks that belongs to data field 502 and idle district 504 in logic is the data that come from host computer system 1000 in order to storage.Specifically, data field 502 is physical blocks of storage data, and the physical blocks in idle district 504 is the physical blocks in order to replacement data district 502.Therefore, the physical blocks in idle district 504 be sky or spendable physical blocks, i.e. no record data or be labeled as invalid data useless.That is to say that the physical blocks in idle district 504 has been performed the running of erasing, perhaps the physical blocks in idle district 504 is extracted the physical blocks that is used for being extracted before the storage data and can be performed the running of erasing.Therefore, the physical blocks of the physical blocks in idle district 504 for being used.
The physical blocks that belongs to system region 506 in logic is in order to the register system data, and wherein this system data comprises about the manufacturer of duplicative non-volatile memory module and model, the physical blocks number of duplicative non-volatile memory module, physical page number of each physical blocks etc.
Belonging to the physical blocks that replaces in the district 508 in logic is in order to replace bad physical blocks.For example, non-volatile memory module 106 can be reserved 4% physical blocks and uses as changing when dispatching from the factory.That is to say that when damaged with the physical blocks in the system region 506 in data field 502, idle district 504, the physical blocks of reserving in replacing district 508 can be used to replacing damaged physical blocks.Therefore, if replace when still having normal physical blocks in the district 508 and the physical blocks damage taking place, memory management circuitry 202 can be extracted the physical blocks that normal physical blocks is changed damage from replace district 508.If when no normal physical blocks and generation physical blocks were damaged in the replacement district 508, then memory management circuitry 202 can be declared as write protection (write protect) state with whole memorizer memory devices 100, and can't write data again.
Particularly, the quantity of data field 502, idle district 504, system region 506 and the physical blocks that replaces district 508 can the different storer specification of foundation and different.In addition, it must be appreciated that during the running of memorizer memory devices 100, the grouping relation that physical blocks is associated to data field 502, idle district 504, system region 506 and replacement district 508 can dynamically change.For example, when being substituted the physical blocks replacement in district when the physical blocks damage in the idle district 504, the physical blocks that then replaces district 508 originally can be associated to leave unused distinguishes 504.
Please with reference to Fig. 5, as stated, data field 502 is to store the data that host computer system 1000 is write with the mode of rotating with the physical blocks in idle district 504.In this exemplary embodiment; The physical blocks that memory management circuitry 202 meeting configuration logic blocks 510 (0)～510 (H) come storage data with mapping with the above-mentioned mode of rotating; And the logical page (LPAGE) of blocks 510 (0)～510 (H) is mapped to the logic access address of 1000 accesses of host computer system, come access data in order to host computer system 1000.
For example, memory management circuitry 202 can initially map to blocks 510 (0)～510 (H) physical blocks of data field 502.Specifically, when memorizer memory devices 100 was done manufacturing, blocks 510 (0)～510 (H) mapped to the physical blocks 310 (0)～310 (D) of data field 502 respectively.That is to say that a blocks is understood a physical blocks in the mapping (enum) data district 502.At this, memory management circuitry 202 can be set up blocks-physical blocks mapping table (logicalunit-physical unit mapping table), with the mapping relations between record blocks and the physical blocks.That is to say that memory management circuitry 202 can convert the logic access address that host computer system 1000 is desired access to the logical page (LPAGE) of corresponding blocks, thus through query logic block-physical blocks mapping table access data in physical address.
Fig. 6～Fig. 8 be that first exemplary embodiment is illustrated according to the present invention generally to write the example that pattern writes data to duplicative non-volatile memory module in proper order.
Please be simultaneously with reference to Fig. 6～Fig. 8; For example; In blocks 510 (0) is to map under the mapping status of physical blocks 310 (0); Write instruction and desire to write data when belonging to the logical page (LPAGE) of blocks 510 (0) when Memory Controller 104 receives from host computer system 1000, memory management circuitry 202 can according to blocks-physical blocks mapping table recognition logic block 510 (0) be at present map to physical blocks 310 (0) and from idle district 504 extracts physical block 310 (D+1) as the replacement physical blocks physical blocks 310 (0) of rotating.Yet; When memory management circuitry 202 write to muon physics block 310 (D+1) with new data, memory management circuitry 202 can be not at once be moved all valid data in the physical blocks 310 (0) to physical blocks 310 (D+1) and the physical blocks 310 (0) of erasing.Specifically; Memory management circuitry 202 can write physical page valid data before (promptly with desiring in the physical blocks 310 (0); The 0th physical page of physical blocks 310 (0) and the data in the 1st physical page) be copied in the 0th physical page and the 1st physical page of physical blocks 310 (D+1) (as shown in Figure 7), and new data write in the 2nd～4 physical page of physical blocks 310 (D+1) (as shown in Figure 8).At this moment, memory management circuitry 202 is promptly accomplished the running that writes.Therefore because it is invalid that the valid data in the physical blocks 310 (0) might become in next operation (for example, writing instruction), at once other valid data in the physical blocks 310 (0) are moved to physical blocks 310 (D+1) and may be caused meaningless moving.In addition; Data must write to the physical page in the physical blocks in order; Therefore, memory management circuitry 202 only can be moved the valid data desiring to write before the physical page (that is, being stored in data in the 0th physical page and the 0th physical page of physical blocks 310 (0)) earlier; And wouldn't move all the other valid data (that is, being stored in data in the 5th～K physical page of physical blocks 310 (0)).
In this exemplary embodiment; The running of temporarily keeping these instantaneous relations is called unlatching (open) mother and child blocks; And the original physical block (for example; Above-mentioned physical blocks 310 (0)) is called parent substance reason block and replaces physical blocks (for example, above-mentioned with physical blocks 310 (D+1)) and be called the muon physics block.
Afterwards; In the time need the data of physical blocks 310 (0) and physical blocks 310 (D+1) being merged (merge); Memory management circuitry 202 meetings are put in order the physical blocks 310 (0) and the data of physical blocks 310 (D+1) and to a physical blocks, are promoted the service efficiency of physical blocks thus.At this, the running that merges mother and child blocks is called the data consolidation procedure or closes (close) mother and child blocks.For example; As shown in Figure 9, when closing mother and child blocks, memory management circuitry 202 can be with remaining valid data in the physical blocks 310 (0) (promptly; Data in the 5th～K physical page of physical blocks 310 (0)) be copied in the 5th physical page～K physical page of replacement physical blocks 310 (D+1); The physical blocks of then physical blocks 310 (0) being carried out after erase operation for use also will be erased 310 (0) is associated to idle district 504, and simultaneously, (D+1) is associated to data field 502 with physical blocks 310.That is to say that memory management circuitry 202 can remap blocks 510 (0) to physical blocks 310 (D+1) in blocks-physical blocks mapping table.In addition, in this exemplary embodiment, memory management circuitry 202 can be set up idle district's physical blocks table (not illustrating) and write down the physical blocks that is associated to idle district at present.What deserves to be mentioned is that the number of physical blocks is limited in the idle district 504, base this, during memorizer memory devices 100 runnings, the group number of the mother and child blocks of unlatching also can be restricted.Therefore; When memorizer memory devices 100 receives when instruction of writing that comes from host computer system 1000; Reach in limited time if opened the group number of mother and child blocks, memory management circuitry 202 need be closed and just can be carried out this after at least one group of mother and child blocks of having opened at present and write instruction.
For example, be in the example of SD storage card at flash memory, the upper limit of the group number of openable mother and child blocks generally is to be set at 1.For example; When under state as shown in Figure 8 and Memory Controller 104 from host computer system 1000, receive and write instruction and desire to write data when belonging to the logic access address of blocks 510 (1); Memory management circuitry 202 must be closed mother and child blocks (as shown in Figure 8) earlier; And afterwards, opening mother and child blocks (shown in Fig. 6～7) from physical blocks of idle district's 504 extractions again writes to accomplish data.
In this exemplary embodiment, the memory management circuitry 202 of Memory Controller 104 is except that carrying out above-mentioned generally writing in proper order the pattern, also in order to use the special pattern that writes in proper order to write data.
Specifically; Because the programming code requirement of duplicative non-volatile memory module 106 must begin to write to last physical page and only can program in each position once under the condition of (promptly by only can " 1 " becoming " 0 ") from the initial physical page (that is the 0th physical page) of each physical blocks.Therefore, in case after the physical page of physical blocks is written into data, just must from idle district 504, another physical blocks of extraction come to carry out again Fig. 8, Fig. 6 and operation shown in Figure 7 if desire is upgraded the data that write.In this exemplary embodiment; If the data of corresponding a plurality of continuous logical page (LPAGE) have been written in the muon physics block and host computer system 1000 when upgrading this a little continuous logical page (LPAGE) once more; Memory management circuitry 202 can not carried out and above-mentionedly generally write pattern in proper order, and can replace with the special pattern that writes in proper order.Specifically; Write in the pattern in proper order special; The memory management circuitry 202 of Memory Controller 104 can not carried out above-mentioned operation of closing mother and child blocks and carries out data and merge, and writes or many of belonging to this continuous logical page (LPAGE) as new muon physics block and Updates Information but from idle district 504, extract another physical blocks.
What Fig. 9 was that first exemplary embodiment is illustrated according to the present invention writes the example that pattern writes data to duplicative non-volatile memory module in proper order with special, and it is in order to special in proper order the write pattern of expression when the page that Updates Information of new muon physics block is same as the page of data of old muon physics block.
Please with reference to Fig. 9; When the storing state of duplicative non-volatile memory module 106 is under the state shown in Figure 7 and Memory Controller 104 receives from host computer system 1000 and writes instruction and desire to write and Update Information UD during to the 0th～4 logical page (LPAGE) of blocks 510 (0); The physical blocks that memory management circuitry 202 can be extracted a sky from idle district 504 (for example; Physical blocks 310 (D+2)); The UD that will Update Information writes in the 0th～4 physical page of physical blocks 310 (D+2), with the muon physics block of physical blocks 310 (D+2) as corresponding physical blocks 310 (0), and to physical blocks 310 (D+1) execution erase operation for use.
What Figure 10 was that first exemplary embodiment is illustrated according to the present invention writes another example that pattern writes data to duplicative non-volatile memory module in proper order with special, its in order to expression when the page that Updates Information of the new muon physics block special pattern that writes in proper order during more than the page of data on the old muon physics block.
Please with reference to Figure 10; When the storing state of duplicative non-volatile memory module 106 is under the state shown in Figure 7 and Memory Controller 104 receives from host computer system 1000 and writes instruction and desire to write and Update Information UD during to the 0th～5 logical page (LPAGE) of blocks 510 (0); The physical blocks that memory management circuitry 202 can be extracted a sky from idle district 504 (for example; Physical blocks 310 (D+2)); The UD that will Update Information writes in the 0th～5 physical page of physical blocks 310 (D+2), with the muon physics block of physical blocks 310 (D+2) as corresponding physical blocks 310 (0), and to physical blocks 310 (D+1) execution erase operation for use.
What Figure 11 was that first exemplary embodiment is illustrated according to the present invention writes another example that pattern writes data to duplicative non-volatile memory module in proper order with special, and it is in order to special in proper order the write pattern of expression when the page that Updates Information of new muon physics block is less than the page of data on the old muon physics block.
Please with reference to Figure 11; When the storing state of duplicative non-volatile memory module 106 is under the state shown in Figure 7 and Memory Controller 104 receives from host computer system 1000 and writes instruction and desire to write and Update Information UD during to the 2nd～3 logical page (LPAGE) of blocks 510 (0); The physical blocks that memory management circuitry 202 can be extracted a sky from idle district 504 (for example; Physical blocks 310 (D+2)); Valid data in the 0th～1 physical page of physical blocks 310 (D+1) are copied in the physical blocks 310 (D+2); The UD that will Update Information writes in the 2nd～3 physical page of physical blocks 310 (D+2); Valid data in the 4th physical page of physical blocks 310 (D+1) are copied in the physical blocks 310 (D+2), with the muon physics block of physical blocks 310 (D+2) as corresponding physical blocks 310 (0), and to physical blocks 310 (D+1) execution erase operation for use.
Based on above-mentioned; In this exemplary embodiment; Desire to write when host computer system 1000 and Update Information the muon physics block of the physical blocks of shining upon to a plurality of continuous logical page (LPAGE) of a blocks and corresponding this blocks when having stored the data of corresponding these a little continuous logical page (LPAGE)s; Memory management circuitry 202 can be extracted another physical blocks and store valid data (shown in Fig. 9～11) as new muon physics block from idle district 504; Merge (that is, closing the operation of mother and child blocks) and can not carry out data, reduce the operation of data merging thus and shorten the time that execution writes instruction.
Figure 12 is the process flow diagram of the method for writing data that first exemplary embodiment is illustrated according to the present invention.
Please with reference to Figure 12, when from host computer system 1000, receiving when desiring to write to the Updating Information of a plurality of continuous logical page (LPAGE)s, in step S1201, memory management circuitry 202 can identification blocks under this a little continuous logical page (LPAGE)s.
Then, in step S1203, memory management circuitry 202 can the present physical blocks of shining upon of these blocks of identification (below be called first physical blocks).And in step S1205, whether memory management circuitry 202 can be judged in the idle district 504 has arbitrary physical blocks to be extracted the muon physics block as corresponding first physical blocks.
If when not having any physical blocks to be used as the muon physics block of corresponding first physical blocks in the idle district 504; In step S1207; Memory management circuitry 202 can be extracted a physical blocks (being called the 4th physical blocks down) from idle district 504, and will Update Information and write in the 4th physical blocks.Specifically, memory management circuitry 202 can will Update Information in order according to putting in order of physical page and write in the corresponding physical page of the 4th physical blocks.Particularly; Non-when the initial physical page when writing the physical page that Updates Information, the valid data of the physical page before the physical page that memory management circuitry 202 can be earlier desired correspondence to write copy to the 4th physical blocks (shown in Fig. 6～8) from first physical blocks.Afterwards, in step S1209, memory management circuitry 202 can be with the muon physics block of the 4th physical blocks as corresponding first physical blocks.
If when an existing physical blocks in idle district 504 (below be called second physical blocks) is extracted as the muon physics block of corresponding first physical blocks; In step S1211, whether at least a portion that memory management circuitry 202 can be judged the physical page of corresponding these a little continuous logical page (LPAGE)s in second physical blocks storage data.
If during storage data, the data separation that memory management circuitry 202 can will be stored in second physical blocks in step S1213 is first data and second data to one of them part of the physical page of corresponding these a little continuous logical page (LPAGE)s in second physical blocks.These so-called first data be meant in the physical page that is stored in second physical blocks corresponding these a little continuous logical page (LPAGE)s data (for example; Data in the 0th, 1 and 4 physical pages of physical blocks 310 (D+1) shown in Figure 11); And second data are meant the data (for example, the data in the 2nd and 3 physical pages of physical blocks 310 (D+1) shown in Figure 11) in the physical page that is stored in these a little continuous logical page (LPAGE)s of non-correspondence in second physical blocks.
Afterwards, at step S1215, middle memory management circuitry 202 can be extracted a physical blocks (below be called tertium quid reason block) from idle district 504, and this is Updated Information and second data write in the tertium quid reason block.Specifically, Update Information and second data can be written in the tertium quid reason block according to its corresponding physical page in order.
Then, in step S1217, memory management circuitry 202 can be managed block as the muon physics block of corresponding first physical blocks and to the second physics onblock executing erase operation for use with tertium quid.At this, above-mentioned steps S1213, step S1215 and step S1217 can be described as second write-in program.
If during storage data, memory management circuitry 202 can will Update Information and write in second physical blocks one of them part of the physical page of corresponding these a little continuous logical page (LPAGE)s in step S1219 in second physical blocks.Similarly, the valid data of the physical page before memory management circuitry 202 physical page can be earlier correspondence being desired to write copy to second physical blocks from first physical blocks.
[second exemplary embodiment]
The memorizer memory devices of the present invention's second exemplary embodiment and host computer system are memorizer memory devices and the host computer system that is same as first exemplary embodiment in essence, and wherein difference is that the Memory Controller of second exemplary embodiment is just to use the above-mentioned special pattern that writes in proper order to write data under given conditions.Below will cooperate Figure 1A, Fig. 2 and Fig. 3 to describe second exemplary embodiment.
In second exemplary embodiment, the memory management circuitry 202 of Memory Controller 104 is to use the memory management mode that is same as first exemplary embodiment to manage duplicative non-volatile memory module 106 (shown in Fig. 4 and 5).In addition, memory management circuitry 202 meetings are identified as the specialized page zone with the part of the physical page of each physical blocks.Particularly; When the data of a plurality of continuous logical page (LPAGE)s of correspondence have been written in the muon physics block and host computer system 1000 when upgrading this a little continuous logical page (LPAGE) once more, whether memory management circuitry 202 can belong to the specialized page zone and decide generally to write pattern in proper order or to write this and Update Information with the special pattern that writes in proper order according to desiring to write the physical page that Updates Information.For example; Whether belong to specialized page when zone when desiring to write the physical page that Updates Information; Memory management circuitry 202 can write this and Updates Information with the special pattern that writes in proper order, otherwise memory management circuitry 202 can write this and Updates Information generally to write pattern in proper order.
Figure 13 is the synoptic diagram of the physical page of the differentiation physical blocks that second exemplary embodiment is illustrated according to the present invention.
With reference to Figure 13, be example with physical blocks 310 (0) please, memory management circuitry 202 can be set at specialized page zone 1302 with the 0th～P physical page in order from initial physical page (that is the 0th physical page) beginning.In exemplary embodiment of the present invention, P is K/2.Yet, it must be appreciated, the invention is not restricted to this.Specifically; Because the specialized page zone is to arrange more preceding several physical pages and physical page among the physical blocks must write in regular turn; Therefore; When host computer system 1000 is upgraded the data in the specialized page zone repeatedly, utilize the above-mentioned special pattern that writes in proper order can reduce the operation that data merge effectively.And when host computer system 1000 was upgraded the data in the non-specialized page zone repeatedly, owing to the time that the merging of execution data is required is shorter, use generally writes pattern in proper order may be more efficient.
Figure 14 is the process flow diagram of the method for writing data that second exemplary embodiment is illustrated according to the present invention; It illustrates data when corresponding a plurality of continuous logical page (LPAGE)s and has been written in the muon physics block (below be called the 6th physical blocks) and host computer system 1000 stores the write step when Updating Information so far a little continuous logical page (LPAGE) once more, wherein this a bit continuous logical page (LPAGE)s be to belong to the physical blocks that same blocks (below be called first blocks) and first blocks are mapped data districts 502 (below be called the 5th physical blocks).
Please with reference to Figure 14, in step S1401, memory management circuitry 202 can judge whether the physical page of corresponding these a little continuous logical page (LPAGE)s in the 6th physical blocks belongs to the specific webpage zone.
If when the physical page of corresponding these a little continuous logical page (LPAGE)s belongs to the specific webpage zone in the 6th physical blocks; Then in step S1403, the data separation that memory management circuitry 202 can will be stored in the 6th physical blocks is first data and second data.Be same as in first exemplary embodiment; At this; First data are meant the data in the physical page that is stored in second physical blocks corresponding these a little continuous logical page (LPAGE)s, and second data are meant the data in the physical page that is stored in these a little continuous logical page (LPAGE)s of non-correspondence in second physical blocks.
Afterwards, in step S1405, memory management circuitry 202 can be extracted a physical blocks (below be called the 7th physical blocks) and will Update Information and second data write in the 7th physical blocks from idle district 504.Specifically, Update Information and second data can be written in the 7th physical blocks according to its corresponding physical page in order.
Then, in step S1407, memory management circuitry 202 can be carried out erase operation for use as this muon physics block of corresponding the 5th physical blocks and to the 6th physical blocks with the 7th physical blocks.At this, above-mentioned steps S1403, S1405, S1407 can be described as second write-in program.
If when the physical page of corresponding these a little continuous logical page (LPAGE)s does not belong to the specific webpage zone in the 6th physical blocks; Then in step S1409; Memory management circuitry 202 can will copy in the 6th physical blocks at the valid data in the 5th physical blocks; The 5th physical blocks is carried out erase operation for use, the 5th physical blocks is associated to idle district 504, and first blocks is mapped to the 6th physical blocks.
Then, in step S1411, memory management circuitry 202 can be extracted a physical blocks (below be called the 8th physical blocks) from idle district 504, and will Update Information and write in the 8th physical blocks.For example, in exemplary embodiment of the present invention, memory management circuitry 202 can will Update Information in order according to putting in order of physical page and write in the corresponding physical page of the 8th physical blocks.Particularly; Non-when the initial physical page when writing the physical page that Updates Information, the valid data of the physical page before the physical page that memory management circuitry 202 can be earlier desired correspondence to write copy to the 8th physical blocks (shown in Fig. 6～8) from the 6th physical blocks.
In the above-mentioned corresponding physical page that writes to the 8th physical blocks that will Update Information; In another exemplary embodiment of the present invention; Memory management circuitry 202 also can be write direct from the initial physical page of the 8th physical blocks and Updated Information; And record gap value (offset) is discerned the mapping relations of logical page (LPAGE) and physical page in the 8th physical blocks; For example the data of desiring to write the 3rd and 4 logical page (LPAGE)s are write the 0th and 1 physical page, but the record gap value is 3 in order to represent that the data in this 0th and 1 physical page are to correspond to the 3rd and 4 logical page (LPAGE)s respectively.
Afterwards, in step S1413, memory management circuitry 202 can be with the muon physics block of the 8th physical blocks as the 6th physical blocks.At this, above-mentioned steps S1409, S1411, S1413 can be described as first write-in program.
In sum; The method for writing data of exemplary embodiment of the present invention, Memory Controller and memory storage system can repeat again to store when Updating Information to identical continuous logical page (LPAGE) in host computer system; Reduce data and merge, promote the speed that writes data thus.
Though the present invention discloses as above with embodiment; Right its is not in order to limit the present invention; Has common knowledge the knowledgeable in the technical field under any; Do not breaking away from the spirit and scope of the present invention, when doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim scope person of defining.
Claims (21)
1. method for writing data; Be used to write data to duplicative non-volatile memory module; Wherein this duplicative non-volatile memory module has a plurality of physical blocks; Each these a plurality of physical blocks has according to tactic a plurality of physical pages, and this method for writing data comprises:
Should a plurality of physical blocks be grouped into a data field and an idle district at least;
Dispose a plurality of blocks to shine upon these a plurality of physical blocks of this data field, wherein each these a plurality of blocks has a plurality of logical page (LPAGE)s;
Receiving many Updates Information; Wherein these many Update Information and correspond to a plurality of continuous logical page (LPAGE) among these a plurality of logical page (LPAGE)s, and these a plurality of continuous logical page (LPAGE)s belong to one first blocks and one first physical blocks among these a plurality of physical blocks of this first blocks mapping among these a plurality of blocks;
Judge whether arbitrary physical blocks among this a plurality of physical blocks in this idle district has been extracted conduct to a muon physics block that should first physical blocks;
When one second physical blocks among this a plurality of physical blocks in this idle district has been extracted as to this muon physics block that should first physical blocks time, judgement in this second physical blocks to one of them parts of this a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data whether; And
When in this second physical blocks, during to one of them part of this a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data, carrying out one second write-in program, this second write-in program comprises:
With the data separation that is stored in this second physical blocks is one first data and one second data;
From these a plurality of physical blocks in this idle district, extract tertium quid reason block;
Should many Update Information and these second data write in this tertium quid reason block;
With this tertium quid reason block as to this muon physics block that should first physical blocks; And
To the operation of erasing of this second physics onblock executing one, wherein these first data be stored in this second physical blocks to the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) and this second data be stored in this second physical blocks non-to the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE).
2. method for writing data according to claim 1 also comprises:
When in this second physical blocks to these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) not during storage data, this a plurality of Updating Information is write in this second physical blocks in these a plurality of physical pages to should be a plurality of continuous logical page (LPAGE).
3. method for writing data according to claim 2 also comprises:
Will this a plurality of Update Information write in this second physical blocks these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) in before, will copy at the valid data in this first physical blocks in this second physical blocks.
4. method for writing data according to claim 1 also comprises:
When the no any physical blocks among this a plurality of physical blocks in this idle district is extracted conduct to this muon physics block that should first physical blocks; Extraction one the 4th physical blocks from this a plurality of physical blocks in this idle district, these many Updated Information writes in the 4th physical blocks and with the 4th physical blocks this muon physics block as this first physical blocks.
5. method for writing data; Being used to write many Updates Information to a duplicative non-volatile memory module; This duplicative non-volatile memory module has a plurality of physical blocks; Each these a plurality of physical blocks has according to tactic a plurality of physical pages; These a plurality of physical blocks are grouped into a data field and an idle district; A plurality of blocks are configured to these a plurality of physical blocks of this data field of mapping; One of them of this a plurality of physical blocks of each this this data field of a plurality of blocks mappings and have a plurality of logical page (LPAGE)s, one first blocks among these a plurality of blocks of one the 5th physical blocks mapping among a plurality of physical blocks of this data field this, one the 6th physical blocks among these idle these a plurality of physical blocks of distinguishing have been extracted conduct to a muon physics block that should the 5th physical blocks; Among these many these a plurality of logical page (LPAGE)s that belong to this first blocks that Update Information a plurality of continuous logical page (LPAGE)s and in the 6th physical blocks to one of them part of this a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data, this method for writing data comprises:
Whether judgement physical page to should be a plurality of continuous logical page (LPAGE) in the 6th physical blocks belongs to specific webpage zone; And
When in the 6th physical blocks, the physical page of should be a plurality of continuous logical page (LPAGE) being belonged to this specific webpage zone, carry out one second write-in program, this second write-in program comprises:
With the data separation that is stored in the 6th physical blocks is one first data and one second data;
From these a plurality of physical blocks in this idle district, extract one the 7th physical blocks;
Should many Update Information and these second data write in the 7th physical blocks;
With the 7th physical blocks as to this muon physics block that should the 5th physical blocks; And
The 6th physical blocks is carried out the operation of erasing; Wherein these first data are that being stored in the 6th physical blocks the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) and this two data is non-being stored in the 6th physical blocks the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE)
Wherein this specific webpage zone is for comprising a plurality of continuous physical pages of an initial physical page in each these a plurality of physical blocks.
6. method for writing data according to claim 5 also comprises:
When in the 6th physical blocks, the physical page of should be a plurality of continuous logical page (LPAGE) not belonged to this specific webpage zone, carry out one first write-in program, this first write-in program comprises:
To copy in the 6th physical blocks at the valid data in the 5th physical blocks;
The 5th physical blocks is carried out this erase operation for use;
The 5th physical blocks is associated to this idle district;
With this first blocks mapping the 6th physical blocks;
From these a plurality of physical blocks in this idle district, extract one the 8th physical blocks;
Should many Update Information and write in the 8th physical blocks; And
With the muon physics block of the 8th physical blocks as the 6th physical blocks.
7. method for writing data according to claim 6 wherein comprises these many steps that write in the 8th physical blocks that Update Information:
An initial physical page begins to write these many and Updates Information among these a plurality of physical pages of the 8th physical blocks.
8. method for writing data according to claim 6 wherein comprises these many steps that write in the 8th physical blocks that Update Information:
To be copied at the part valid data in the 6th physical blocks in the 8th physical blocks; And
These many Updated Information write in the 8th physical blocks in these a plurality of physical pages to should be a plurality of continuous logical page (LPAGE).
9. method for writing data; Be used to write data to duplicative non-volatile memory module; Wherein this duplicative non-volatile memory module has a plurality of physical blocks; Each these a plurality of physical blocks has according to tactic a plurality of physical pages, and this method for writing data comprises:
Should a plurality of physical blocks be grouped into a data field and an idle district at least;
Dispose a plurality of blocks to shine upon these a plurality of physical blocks of this data field, wherein each these a plurality of blocks has a plurality of logical page (LPAGE)s;
Receiving at least one pen Updates Information; Wherein this Updates Information and corresponds at least one logical page (LPAGE) among these a plurality of logical page (LPAGE)s, and this at least one logical page (LPAGE) belongs to one first blocks and one first physical blocks among these a plurality of physical blocks of this first blocks mapping among these a plurality of blocks;
Judge whether arbitrary physical blocks among this a plurality of physical blocks in this idle district has been extracted conduct to a muon physics block that should first physical blocks;
When one second physical blocks among this a plurality of physical blocks in this idle district has been extracted as to this muon physics block that should first physical blocks time, judgement in this second physical blocks to this physical page that should logical page (LPAGE) storage data whether; And
When in this second physical blocks, during to this physical page that should logical page (LPAGE) storage data, carrying out one second write-in program, this second write-in program comprises:
From these a plurality of physical blocks in this idle district, extract tertium quid reason block;
This is Updated Information write in this tertium quid reason block;
With this tertium quid reason block as to this muon physics block that should first physical blocks; And
To the operation of erasing of this second physics onblock executing one.
10. method for writing data according to claim 9; Wherein have one first data that should logical page (LPAGE) and non-during to one second data that should logical page (LPAGE) when this second physical blocks, this second write-in program also comprises these second data is write in this tertium quid reason block.
11. method for writing data according to claim 9; Also be included in to carry out and judge in this second physical blocks that whether this physical page that should logical page (LPAGE) is positioned at a specific webpage is regional before this second write-in program; And when this physical page was positioned at this specific webpage zone, the side carried out this second write-in program.
12. Memory Controller; Be used to manage a duplicative non-volatile memory module; Wherein this duplicative non-volatile memory module has a plurality of physical blocks and each these a plurality of physical blocks has according to tactic a plurality of physical pages, and this Memory Controller comprises:
One HPI is in order to be coupled to a host computer system;
One memory interface is in order to be coupled to this duplicative non-volatile memory module; And
One memory management circuitry is coupled to this HPI and this memory interface,
Wherein this memory management circuitry be in order to should a plurality of physical blocks being grouped into a data field and an idle district at least, and disposed a plurality of blocks to shine upon these a plurality of physical blocks of this data field, and wherein each these a plurality of blocks has a plurality of logical page (LPAGE)s,
Wherein this memory management circuitry Updates Information from this many of host computer system reception; Wherein these many Update Information and belong to a plurality of continuous logical page (LPAGE) among these a plurality of logical page (LPAGE)s; These a plurality of continuous logical page (LPAGE)s belong to one first physical blocks among these a plurality of physical blocks of one first blocks and this first logical page (LPAGE) mapping among these a plurality of blocks
Wherein this memory management circuitry judges whether arbitrary physical blocks among this a plurality of physical blocks in this idle district has been extracted conduct to a muon physics block that should first physical blocks,
Wherein when one second physical blocks among this a plurality of physical blocks in this idle district has been extracted conduct to this muon physics block that should first physical blocks; Whether this memory management circuitry is judged in this second physical blocks one of them parts of these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data
Wherein when in this second physical blocks during to one of them part of this a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data; The data separation that this memory management circuitry will be stored in this second physical blocks is one first data and one second data; From these a plurality of physical blocks in this idle district, extract tertium quid reason block; Should many Update Information and these second data write in this tertium quid reason block; With this tertium quid reason block as to this muon physics block that should first physical blocks, and to this second physics onblock executing erase operation for use
Wherein these first data be stored in this second physical blocks to the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) and this two data be stored in this second physical blocks non-to the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE).
13. Memory Controller according to claim 12,
Wherein when in this second physical blocks to these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) not during storage data, this memory management circuitry will these many Updates Information and writes in this second physical blocks in these a plurality of physical pages to should be a plurality of continuous logical page (LPAGE).
14. Memory Controller according to claim 13,
Wherein will these many Update Information write in this second physical blocks these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) in before, this memory management circuitry will copy at the valid data in this first physical blocks in this second physical blocks.
15. Memory Controller according to claim 14,
Wherein when the no any physical blocks among this a plurality of physical blocks in this idle district is extracted conduct to this muon physics block that should first physical blocks; This memory management circuitry is extraction one the 4th physical blocks from this a plurality of physical blocks in this idle district, and these many are Updated Information writes in the 4th physical blocks and with the 4th physical blocks this muon physics block as this first physical blocks.
16. Memory Controller according to claim 12; Wherein when in this second physical blocks during to one of them part of this a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data; This memory management circuitry judges also in this second physical blocks whether the physical page to should be a plurality of continuous logical page (LPAGE) belongs to specific webpage zone
Wherein only when in this second physical blocks, the physical page of should be a plurality of continuous logical page (LPAGE) being belonged to this specific webpage zone; The data separation that this memory management circuitry just will be stored in this second physical blocks is these first data and this second data; From these a plurality of physical blocks in this idle district, extract this tertium quid reason block; Should many Update Information and these second data write in this tertium quid reason block; With this tertium quid reason block as to this muon physics block that should first physical blocks, and to this this erase operation for use of second physics onblock executing.
17. a memorizer memory devices comprises:
A connector is in order to be coupled to a host computer system;
One duplicative non-volatile memory module has a plurality of physical blocks and each these a plurality of physical blocks and has according to tactic a plurality of physical pages; And
One Memory Controller is coupled to this connector and this duplicative non-volatile memory module,
Wherein this Memory Controller be in order to should a plurality of physical blocks being grouped into a data field and an idle district at least, and disposed a plurality of blocks to shine upon these a plurality of physical blocks of this data field, and wherein each these a plurality of blocks has a plurality of logical page (LPAGE)s,
Wherein this Memory Controller Updates Information from this many of host computer system reception; Wherein these many Update Information and belong to a plurality of continuous logical page (LPAGE) among these a plurality of logical page (LPAGE)s; These a plurality of continuous logical page (LPAGE)s belong to one first physical blocks among these a plurality of physical blocks of one first blocks and this first logical page (LPAGE) mapping among these a plurality of blocks
Wherein this Memory Controller judges whether arbitrary physical blocks among this a plurality of physical blocks in this idle district has been extracted conduct to a muon physics block that should first physical blocks,
Wherein when one second physical blocks among this a plurality of physical blocks in this idle district has been extracted conduct to this muon physics block that should first physical blocks; Whether this Memory Controller is judged in this second physical blocks one of them parts of these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data
Wherein when in this second physical blocks during to one of them part of this a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data; The data separation that this Memory Controller will be stored in this second physical blocks is one first data and one second data; From these a plurality of physical blocks in this idle district, extract tertium quid reason block; Should many Update Information and these second data write in this tertium quid reason block; With this tertium quid reason block as to this muon physics block that should first physical blocks, and to the operation of erasing of this second physics onblock executing one
Wherein these first data be stored in this second physical blocks to the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) and this two data be stored in this second physical blocks non-to the data in these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE).
18. memorizer memory devices according to claim 17,
Wherein when in this second physical blocks to these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) not during storage data, this Memory Controller will these many Updates Information and writes in this second physical blocks in these a plurality of physical pages to should be a plurality of continuous logical page (LPAGE).
19. memorizer memory devices according to claim 18,
Wherein will these many Update Information write in this second physical blocks these a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) in before, this Memory Controller will copy at the valid data in this first physical blocks in this second physical blocks.
20. memorizer memory devices according to claim 17,
Wherein when the no any physical blocks among this a plurality of physical blocks in this idle district is extracted conduct to this muon physics block that should first physical blocks; This Memory Controller is extraction one the 4th physical blocks from this a plurality of physical blocks in this idle district, and these many are Updated Information writes in the 4th physical blocks and with the 4th physical blocks this muon physics block as this first physical blocks.
21. memorizer memory devices according to claim 17; Wherein when in this second physical blocks during to one of them part of this a plurality of physical pages of should be a plurality of continuous logical page (LPAGE) storage data; This Memory Controller judges also in this second physical blocks whether the physical page to should be a plurality of continuous logical page (LPAGE) belongs to specific webpage zone
Wherein only when in this second physical blocks, the physical page of should be a plurality of continuous logical page (LPAGE) being belonged to this specific webpage zone; The data separation that this Memory Controller just will be stored in this second physical blocks is these first data and this second data; From these a plurality of physical blocks in this idle district, extract this tertium quid reason block; Should many Update Information and these second data write in this tertium quid reason block; With this tertium quid reason block as to this muon physics block that should first physical blocks, and to this this erase operation for use of second physics onblock executing.
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| CN201110002440.7A CN102592670B (en) | 2011-01-07 | 2011-01-07 | Method for writing data, Memory Controller and memorizer memory devices |
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