CN102315312A - Manufacturing process of silicon heterojunction solar battery - Google Patents
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- CN102315312A CN102315312A CN2010102268863A CN201010226886A CN102315312A CN 102315312 A CN102315312 A CN 102315312A CN 2010102268863 A CN2010102268863 A CN 2010102268863A CN 201010226886 A CN201010226886 A CN 201010226886A CN 102315312 A CN102315312 A CN 102315312A
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Abstract
The invention relates to a manufacturing process of a silicon heterojunction solar battery. The silicon heterojunction solar battery comprises a first electric silicon substrate, a first intrinsic silicon layer, a second intrinsic silicon layer, a second electric silicon layer and a first electric heavily-doping silicon layer, wherein the first intrinsic silicon layer and the second intrinsic silicon layer are respectively formed at two sides of the first electric silicon substrate and forms a heterojunction with the first electric silicon substrate; and the second electric silicon layer and the first electric heavily-doping silicon layer are respectively formed on the first intrinsic silicon layer and the second intrinsic silicon layer. According to the invention, the second electric silicon layer and the first electric heavily-doping silicon layer are formed in an ion implantation way so as to optimize the thicknesses and the doping qualities of the second electric silicon layer and the first electric heavily-doping silicon layer.
Description
Technical field
The present invention relates to a kind of processing procedure of silicon heterojunction solar cell, relate in particular to a kind of processing procedure that reduces manufacturing cost and improve the silicon heterojunction solar cell of conversion efficiency.
Background technology
Along with the prosperity of science and technology, the evolution of civilization and the quick growth of population, for the use and the consumption sharp increase day by day of the energy.Under natural resources condition of limited such as oil, natural gas and coal, energy savings and look for, develop alternative energy source how has become just that everybody is primary to solve and one of very important problem.Just become the main flow of new century owing to from the energy of the sun greatly and continuously, therefore develop solar cell gradually as the equipment of generating, accumulate.
So-called solar cell is a kind of photoelectric subassembly that can solar energy be converted into electric energy.The simplest solar cell structure comprises a p type semiconductor layer and a n type semiconductor layer, and both form a PN and connect face.When the solar radiation solar cell; Energy from sunlight can come out the electron excitation in the semiconductor layer; Electronics can move towards n type semiconductor layer because of built in potential; Electric hole is then to moving towards the p type semiconductor layer direction, therefore when p type semiconductor layer and n type semiconductor layer connect external circuit formation loop, will produce electric current.The above-mentioned reaction that transfers luminous energy to electric current then is referred to as photovoltaic effect (photovoltaic effect).
With reference to shown in Figure 1, it is the structural representation of the silicon heterojunction solar cell of electrical machinery of Japanese sanyo proposition.This silicon heterojunction solar cell 1 structure comprise a n type single crystal silicon substrate 11 (n-type single crystal silicon substrate), respectively be formed at one first intrinsic amorphous silicon layer 12 (intrinsic amorphoussilicon layer) and one second intrinsic amorphous silicon layer 13 of these n type single crystal silicon substrate 11 both sides, respectively be formed at a P type amorphous silicon layer 14 and a N+ type amorphous silicon layer 15 in this first intrinsic amorphous silicon layer 12 and these second intrinsic amorphous silicon layer, 13 outsides, be formed at one first transparent conductive oxide (transparent conductiveoxide, TCO) layer 16 and 1 second including transparent conducting oxide layer 17 and one first electrode layer 18 and the second electrode lay 19 that are formed at this first including transparent conducting oxide layer 16 and these second including transparent conducting oxide layer, 17 outsides respectively in this P type amorphous silicon layer 14 and these N+ type amorphous silicon layer 15 outsides respectively.Because above-mentioned solar cell has silicon heterojunction and silicon intrinsic layer, HIT solar cell (Hetero-junction with Intrinsic Thin-layer solar cell) therefore is otherwise known as.The HIT solar cell is because of possessing high-photoelectric transformation efficiency (photoelectric conversion efficiency) (Yue Keda 23%); And can engage by 200 ℃ of low temperature; Help reducing characteristics such as manufacturing cost, dropped into solar energy market first and promptly attract attention deeply in 1997.
Wherein, The P type amorphous silicon layer 14 in the known structure and the thickness of N+ type amorphous silicon layer 15 are as thin as a wafer; Approximately between several nanometers (nm) between tens nanometers; And for cooperating low temperature process, directly (plasma enhanced chemical vapor deposition PECVD) forms film with plasma enhanced chemical vapor deposition usually for this P type amorphous silicon layer 14 and N+ type amorphous silicon layer 15.Under the situation of film very thin (for example a few nanometer), be difficult to film forming with the plasma enhanced chemical vapor deposition method, the concentration of not only mixing is wayward, and the problem that the even or subregion of uneven film thickness can't film forming takes place easily.Because the film quality of above-mentioned amorphous silicon layer is a big key that influences the solar cell photoelectric conversion efficiency, thereby anxious to be solved.
Summary of the invention
Therefore, the objective of the invention is to propose a kind of processing procedure of silicon heterojunction solar cell, the film thickness of controlled doping layer and doping accuracy accurately thus, thus promote the yield and the photoelectric conversion efficiency of silicon heterojunction solar cell.
To achieve these goals, the present invention proposes the processing procedure of silicon heterojunction solar cell, and its step comprises: prepare one first electrical crystalline silicon substrate; Form first silicon layer and second silicon layer on two sides of this first electrical crystalline silicon substrate, this first silicon layer and this second silicon layer form the silicon heterojunction with this first electrical crystalline silicon substrate respectively; Implanting ions cause the subregion formation second electrical silicon layer toward the outer side in this first silicon layer, and this second silicon layer subregion toward the outer side forms the first electrical heavy doping type silicon layer in this first silicon layer and this second silicon layer; Form one first oxidic, transparent, conductive layers on this second electrical silicon layer; And form one first electrode layer and a second electrode lay respectively on this first oxidic, transparent, conductive layers and this first electrical heavy doping type silicon layer.
Through the silicon heterojunction solar cell that processing procedure of the present invention forms, can under P type silicon layer and N+ type silicon layer situation as thin as a wafer, control its doping content exactly.Avoid known process technique to produce uneven, the uneven problem of mixing of thickness.Relevant detailed technology content of the present invention and preferred embodiment, cooperate graphic explanation as after.
Description of drawings
Execution mode of the present invention combines graphic the description:
Fig. 1 is the structural representation of a known silicon heterojunction solar cell;
Fig. 2 is the flow chart of one embodiment of the invention; And
Fig. 3-1 is the schematic flow sheet of one embodiment of the invention to Fig. 3-8.
Embodiment
Relevant detailed description of the present invention and technology contents cooperate graphic explanation following at present:
With reference to shown in Figure 2, it is the flow chart of one embodiment of the invention, and is as shown in the figure: the present invention proposes a kind of processing procedure of silicon heterojunction solar cell, and its step comprises: prepare one first electrical crystalline silicon substrate; Form first silicon layer and second silicon layer on two sides of this first electrical crystalline silicon substrate, this first silicon layer and this second silicon layer form the silicon heterojunction with this first electrical crystalline silicon substrate respectively; Implanting ions cause the subregion formation second electrical silicon layer toward the outer side in this first silicon layer, and this second silicon layer subregion toward the outer side forms the first electrical heavy doping type silicon layer in this first silicon layer and this second silicon layer; Form one first oxidic, transparent, conductive layers on this second electrical silicon layer; And form one first electrode layer and a second electrode lay respectively on this first oxidic, transparent, conductive layers and this first electrical heavy doping type silicon layer.
What need explanation is, above-mentioned so-called " first electrical " with " second electrical " be meant that the N type mixes or the P type mixes, even first is the N type electrically, then second electrically just is reversed the P type; If first is the P type electrically, then second electrically just be reversed the N type.On the other hand, so-called " heavy doping " refer to that then N+ or P+ type mix.Yet, for convenient explanation with understand, with the detailed explanation of next embodiment, electrically be preset as the N type with first, second electrically is preset as the P type explains, but the present invention is not exceeded with it.
To shown in Fig. 3-8, it is the schematic flow sheet of one embodiment of the invention with reference to Fig. 3-1.At first shown in Fig. 3-1; Prepare a N type crystalline silicon substrate 21; So-called N type crystalline silicon substrate 21 can be n type single crystal silicon substrate (single crystal silicon substrate) or N type polysilicon (polycrystal) substrate, and its thickness is about 200～600 μ m, but does not exceed with it.Then, on two sides of this N type crystalline silicon substrate 21, form first silicon layer 22 and second silicon layer 23 respectively, shown in Fig. 3-2.Wherein, first silicon layer 22 and second silicon layer 23 form the silicon heterojunctions with N type crystallizing silicon layer 21 respectively, and promptly this first silicon layer 22 and second silicon layer 23 can be amorphous silicon layer or polysilicon layer, and with the N type crystalline silicon substrate 21 formation silicon heterojunctions of monocrystalline.In an above-mentioned embodiment, this N type crystalline silicon substrate 21 is a N shape monocrystalline silicon substrate, and this first silicon layer 22 and second silicon layer 23 be the amorphous silicon layer of intrinsic (mixing), and its thickness is approximately between 0.3～15nm.
The mode that forms above-mentioned first silicon layer 22 and second silicon layer 23 does not have any qualification, and available any known semiconductor film deposition techniques is reached.For instance, in one embodiment of this invention, (low pressure chemicalvapor deposition LPCVD) forms first, second silicon layer 22,23 to Low Pressure Chemical Vapor Deposition capable of using.Its process is earlier N type crystalline silicon substrate 21 to be cleaned with standard RCA step, then inserts the low-pressure chemical vapor deposition boiler tube, and deposits first silicon layer 22 and second silicon layer 23 of amorphous simultaneously in 21 two sides of N type crystalline silicon substrate.The reaction equation of chemical vapour deposition (CVD) is SiH
4 (g)→ Si
(s)+ 2H
2 (g), its reaction temperature can be between 120～600 ℃, and reaction pressure can be between 0.1～500m-torr.
Shown in Fig. 3-4 and Fig. 3-5; After depositing first silicon layer 22 and second silicon layer 23 respectively in 21 two sides of N type crystalline silicon substrate, cause with the ion implantation mode then that the subregion towards the outside forms P type silicon layer 24 and N+ type silicon layer 25 respectively in this first silicon layer 22 and second silicon layer 23.Side by side, outer part of P type silicon layer 24 and N+ type silicon layer 25 or N type crystalline silicon substrate 21 will form an intrinsic silicon layer in fact near the part of first silicon layer 22 and second silicon layer 23 in this first silicon layer 22 and second silicon layer 23.
What need explanation is; At first silicon layer 22 and second silicon layer 23 is under the situation of intrinsic silicon layer; Behind implanting ions formation P type silicon layer 24 and N+ type silicon layer 25, first silicon layer 22 and second silicon layer 23 can keep intrinsic silicon state originally in fact with the intersection of N type crystalline silicon substrate 21.Relatively; If first silicon layer 22 is under the situation of N type silicon layer; Then with P type implanting ions behind first silicon layer 22; Then first silicon layer 22 can form P type silicon layer 24 towards lateral direction, and first silicon layer 22 also can form intrinsic silicon layer because of positive and negative electrical neutralization naturally towards the zone of N type crystalline silicon substrate 21 intersections.So first silicon layer 22 and second silicon layer 23 among the present invention need not to be defined in intrinsic silicon.
Further, after implanting ions is intact, can pass through high temperature (900～1100 ℃) thermal anneal process again, the atomic structure that causes cloth to plant ion and first, second silicon layer 22,23 produces the key knot, and removes stress and defective simultaneously.In an above-mentioned embodiment, be with boron (B) or boron fluoride (BF
2) etc. group iii elements be that cloth is planted ion and is implanted in first silicon layer 22, be that cloth is planted ion and is implanted in second silicon layer 23 with arsenic or group-v element.
On the other hand; In one embodiment; Plant first, second silicon layer 22 with ion implanter may cloth; Before 23, optionally prior to forming one first silicon oxide layer 31 (silicon oxide layer) and one second silicon oxide layer 32 respectively earlier on first silicon layer 22 and second silicon layer 23, with resilient coating as implanting ions.After waiting for that implanting ions finishes; (remove this first, second silicon oxide layer 31,32 with Wet-type etching again as utilizing SiO 2 etch liquid (buffered oxide etch, BOE) etching); Cause this P type silicon layer 24 and this N+ type silicon layer 25 to expose, like Fig. 3-3 to shown in Fig. 3-6.Wherein, the thickness of this first, second silicon oxide layer 31,32 is between 1～20nm.The mode that forms this first, second silicon oxide layer 31,32 is for example reached with chemical vapour deposition (CVD), and its reaction equation is exemplified below:
Si(OC
2H
5)
4(g)→SiO
2(s)+4C
2H
4(g)+2H
2O
2(g)
Wherein, the purpose and the advantage that form first silicon oxide layer 31 and second silicon oxide layer 32 are listed below: at first, and first, second silicon oxide layer 31; 32 can serve as a change layer of first, second silicon layer 22,23 in the processing procedure of implanting ions, to fill up first, second silicon layer 22; 23 outstanding key (dangling bonds); Make the outstanding key on first, second silicon layer 22,23 surfaces reduce, strengthen architecture quality; To promote the yield and the structural intergrity of silicon heterojunction solar cell, to increase its photoelectric conversion efficiency simultaneously.Secondly; Because the cloth of implanting ions is planted ion and can be passed through first silicon oxide layer 31 and second silicon oxide layer 32, and on first, second silicon layer 22,23, form the kind Gaussian distribution; So this first, second silicon oxide layer 31; 32 also can plant the degree of depth and the CONCENTRATION DISTRIBUTION of ion in order to adjustment and control cloth, with concentration and the depth distribution of control P type silicon layer 24 with N+ type silicon layer 25, make it to reach expect.On the other hand, first, second silicon oxide layer 31,32 also can be removed ion and vacancy (vacancies) not; The unnecessary vacancy that produces when that is to say low weight ion and implanting ions can be run superficially; And be distributed in first, second silicon oxide layer 31; 32, so unnecessary cloth is planted ion or vacancy can remove with the etching of first, second silicon oxide layer 31,32.
Then; Shown in Fig. 3-7, on this P type silicon layer 24, form first oxidic, transparent, conductive layers 26, this first oxidic, transparent, conductive layers 26 can be used as the collecting layer of the anti-reflecting layer and the electric current of sensitive surface; Its material for example is a tin indium oxide (ITO), but does not exceed with it.These N+ type silicon layer 25 outsides also optionally form second oxidic, transparent, conductive layers 27 as current collection layer, and its material can be same as this first oxidic, transparent, conductive layers 26.At last, form first electrode layer 28 and the second electrode lay 29 again respectively at first oxidic, transparent, conductive layers 26 and second oxidic, transparent, conductive layers, 27 outsides, with electric connection place, shown in Fig. 3-8 as silicon heterojunction solar cell.
Silicon heterojunction solar cell through processing procedure formation of the present invention; Can be under P type silicon layer 24 and N+ type silicon layer 25 situation as thin as a wafer; Control its doping content exactly, and can be through the auxiliary membrane quality that promotes P type silicon layer 24 and N+ type silicon layer 25 of silicon oxide layer.Moreover, if can with large-area ionic cloth plant machine fast cloth plant, cost maybe be comparatively cheap, and cloth plants precision and be easier to control, can effectively promote the yield of processing procedure, and let solar cell that preferable photoelectric conversion efficiency is arranged.
On the other hand, though above-mentioned explanation is an example with N type crystalline silicon substrate formation P-N-N+ structure, also can in like manner be applicable to P type crystalline silicon substrate, the electrical and concentration that needs this moment adjustment simultaneously to mix makes it form the N-P-P+ structure.Yet the above content is merely preferred embodiment of the present invention; The scope of patent protection of non-desire limitation patent of the present invention; Therefore, the equivalence that all utilizations specification of the present invention and graphic content are done changes and modifies, and all in like manner is contained in rights protection scope of the present invention.
Claims (13)
1. the processing procedure of a silicon heterojunction solar cell (1), its step comprises:
Prepare one first electrical crystalline silicon substrate;
Form first silicon layer (22) and second silicon layer (23) on two sides of the said first electrical crystalline silicon substrate; Said first silicon layer (22) forms the silicon heterojunction with the said first electrical crystalline silicon substrate respectively with said second silicon layer (23);
Implanting ions is in said first silicon layer (22) and said second silicon layer (23); Cause the subregion formation second electrical silicon layer toward the outer side in said first silicon layer (22), and said second silicon layer (23) subregion toward the outer side forms the first electrical heavy doping type silicon layer;
Form one first oxidic, transparent, conductive layers (26) on the said second electrical silicon layer; And
Form one first electrode layer (28) and a second electrode lay (29) respectively on said first oxidic, transparent, conductive layers (26) and the said first electrical heavy doping type silicon layer.
2. the processing procedure of silicon heterojunction solar cell according to claim 1 (1); It is characterized in that; Before said the second electrode lay (29) is formed on the said first electrical heavy doping type silicon layer, also comprise the step of formation second oxidic, transparent, conductive layers (27) on the said first electrical heavy doping type silicon layer.
3. the processing procedure of silicon heterojunction solar cell according to claim 1 (1); It is characterized in that; The described first electrical crystalline silicon substrate is a n type single crystal silicon substrate (21); The said second electrical silicon layer is a P type silicon layer (24), and the said first electrical heavy doping type silicon layer is a N+ type silicon layer (25).
4. the processing procedure of silicon heterojunction solar cell according to claim 1 (1) is characterized in that, described first silicon layer (22) is the intrinsic amorphous silicon film with said second silicon layer (23).
5. the processing procedure of silicon heterojunction solar cell according to claim 1 (1) is characterized in that, said first silicon layer (22) forms with chemical vapour deposition technique with said second silicon layer (23) simultaneously.
6. the processing procedure of silicon heterojunction solar cell according to claim 1 (1) is characterized in that, after the intact said second electrical silicon layer of implanting ions and the said first electrical heavy doping type silicon layer, also comprises the step of a high-temperature thermal annealing.
7. the processing procedure of a silicon heterojunction solar cell (1), its step comprises:
Prepare one first electrical crystalline silicon substrate;
Form first silicon layer (22) and second silicon layer (23) on two sides of the said first electrical crystalline silicon substrate; Said first silicon layer (22) forms the silicon heterojunction with the said first electrical crystalline silicon substrate respectively with said second silicon layer (23);
Form one first silicon oxide layer (31) and one second silicon oxide layer (32) respectively on said first silicon layer (22) and said second silicon layer (23);
Implanting ions is in said first silicon layer (22) and said second silicon layer (23); Cause the subregion formation second electrical silicon layer toward the outer side in said first silicon layer (22), and said second silicon layer (23) subregion toward the outer side forms the first electrical heavy doping type silicon layer;
Remove said first silicon oxide layer (31) and said second silicon oxide layer (32), cause the said second electrical silicon layer and the said first electrical heavy doping type silicon layer to expose;
Form one first oxidic, transparent, conductive layers (26) on the said second electrical silicon layer; And
Form one first electrode layer (28) and a second electrode lay (29) respectively on said first oxidic, transparent, conductive layers (26) and the said first electrical heavy doping type silicon layer.
8. the processing procedure of silicon heterojunction solar cell according to claim 7 (1); It is characterized in that; Before said the second electrode lay (29) is formed on the said first electrical heavy doping type silicon layer, also comprise the step of formation second oxidic, transparent, conductive layers (27) on the said first electrical heavy doping type silicon layer.
9. the processing procedure of silicon heterojunction solar cell according to claim 7 (1); It is characterized in that; The described first electrical crystalline silicon substrate is a n type single crystal silicon substrate (21); The said second electrical silicon layer is a P type silicon layer (24), and the said first electrical heavy doping type silicon layer is a N+ type silicon layer (25).
10. the processing procedure of silicon heterojunction solar cell according to claim 7 (1) is characterized in that, described first silicon layer (22) is the intrinsic amorphous silicon film with said second silicon layer (23).
11. the processing procedure of silicon heterojunction solar cell according to claim 7 (1) is characterized in that, said first silicon layer (22) forms with chemical vapour deposition technique with said second silicon layer (23) simultaneously.
12. the processing procedure of silicon heterojunction solar cell according to claim 7 (1) is characterized in that, after the intact said second electrical silicon layer of implanting ions and the said first electrical heavy doping type silicon layer, also comprises the step of a high-temperature thermal annealing.
13. the processing procedure of a silicon heterojunction solar cell (1), its step comprises:
Prepare a n type single crystal silicon substrate (21);
Form first intrinsic amorphous silicon layer (12) and second intrinsic amorphous silicon layer (13) on two sides of said n type single crystal silicon substrate (21);
Implanting ions is in said first intrinsic amorphous silicon layer (12) and said second intrinsic amorphous silicon layer (13); Cause said first intrinsic amorphous silicon layer (12) subregion toward the outer side to form P type amorphous silicon layer (14), said second intrinsic amorphous silicon layer (13) subregion toward the outer side forms a N+ type amorphous silicon layer (15);
Form one first oxidic, transparent, conductive layers (26) on said P type amorphous silicon layer (14); And
Form one first electrode layer (28) and a second electrode lay (29) respectively on said first oxidic, transparent, conductive layers (26) and said N+ type amorphous silicon layer (15).
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| CN103311376A (en) * | 2013-06-26 | 2013-09-18 | 英利集团有限公司 | Manufacturing method for N type solar cell |
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| CN1445865A (en) * | 2001-11-29 | 2003-10-01 | 三洋电机株式会社 | Light generating device and manufacturing method thereof |
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| US20090151782A1 (en) * | 2007-12-18 | 2009-06-18 | Lg Electronics Inc. | Hetero-junction silicon solar cell and fabrication method thereof |
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| CN1445865A (en) * | 2001-11-29 | 2003-10-01 | 三洋电机株式会社 | Light generating device and manufacturing method thereof |
| CN1404113A (en) * | 2002-10-18 | 2003-03-19 | 中国科学院微电子中心 | Prepn of nitride-oxide film |
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