CN102289825A - Real-time image edge detection circuit and realization method thereof - Google Patents
Real-time image edge detection circuit and realization method thereof Download PDFInfo
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Abstract
The invention discloses a real-time image edge detection circuit and a realization method thereof. The circuit comprises a 3*3 square window generating module and a gradient operating module, wherein the 3*3 square window generating module is used for extracting each central pixel in an image to be processed and nine pixels in a field; and the gradient operating module is used for multiplying extracted pixel data with coefficients of corresponding positions in four direction operator modules. In the invention, a parallel structure and a multi-stage assembly line technology are adopted, and the design of the real-time image edge detection circuit is realized in a hardware mode, so that the image edge detection speed can be increased remarkably, and the requirement of a video motion target tracking system on the instantaneity of image edge detection is met. A result image edge obtained by using a Sobel image edge real-time detection optimization algorithm disclosed by the invention is smooth; and moreover, elements on both sides of an edge are enhanced, so that the edge is more bright and the accuracy of image edge detection is increased.
Description
Technical field
The present invention relates to the technical field of realtime graphic rim detection, particularly a kind of realtime graphic edge detect circuit and its implementation.
Background technology
The realtime graphic edge detect circuit is applicable to the video frequency motion target tracker, is that video image is handled required kernal hardware module, can be accurately and realize that apace edge of image detects and edge extracting.In the prior art, because the data volume that Image Edge-Detection need be handled is bigger, the software realization mode that generally adopts has been difficult to requirement of real time at present.Consider the independence of rim detection in image processing process, Image Edge-Detection can and should adopt the hardware circuit mode to realize, to improve detection efficiency, satisfies the requirement of video frequency motion target tracker to real-time.
At present, the method for detecting image edge of main flow has spatial domain method of differential operator, fitting surface method, multi-scale wavelet edge detection method and mathematical morphology edge detection method etc., and wherein, the spatial domain method of differential operator is the most commonly used.If with image be defined as two-dimensional function f (x, y), because the variation of image grayscale at edge is violent, its functional gradient is bigger, therefore, the gradient that the variation of gradation of image can adopt gradation of image to distribute characterizes.Image f (x, gradient y)
Be defined as:
Wherein, gradient is oriented to f (x, y) direction of increment rate maximum.Consider that function equals the mould of gradient in the directional derivative maximal value of this point, so have:
In the formula, G
xBe the vertical direction template, maximum to the vertical edge response; G
yBe the horizontal direction template, maximum to the horizontal sides response.In present design, usually adopt zonule template product method to calculate this Grad approx, and use different templates to constitute different edge detection operators, include Robert operator, Sobel operator, Prewitt operator and Laplacian operator etc.Wherein, the Sobel operator can suppress noise preferably, and implementation procedure is comparatively simple, thereby has obtained widespread use.
Classical Sobel edge detection algorithm utilizes the operator template of 2 directions to carry out product with 3 * 3 area images respectively, and with the result of product sum
Output obtains required rim detection value.Wherein, 2 directional operator templates and 3 * 3 area images are respectively:
Vertical direction template G
xBe used for the detection level edge, horizontal direction template G
yBe used for the detection of vertical edge,
For:
Sx=in the formula (Z3+2 Z6+Z9)-(Z1+2 Z4+Z7), Sy=(Z7+2 Z8+Z9)-(Z1+2 Z2+Z3).
At present, generally adopt software mode to realize above-mentioned classical Sobel edge detection algorithm, but when based on this algorithm texture being carried out rim detection than complex image, it is unsatisfactory that it detects effect.For this reason, modified Sobel edge detection algorithm arises at the historic moment, on the operator template basis of classical Sobel edge detection algorithm, increased the operator template of 6 directions, but this modified Sobel edge detection algorithm causes hardware spending too big, is unfavorable for embedding the real-time detection that video image processing system carries out the image border.In addition, because in the video frequency motion target tracker, the data volume that need handle Image Edge-Detection is bigger, adopt general software mode to realize that edge detection algorithm has been difficult to requirement of real time.
Summary of the invention
The shortcoming that the objective of the invention is to overcome prior art provides a kind of realtime graphic edge detect circuit with not enough, and this testing circuit has improved the precision and the speed of Image Edge-Detection; Satisfied of the real-time requirement of video frequency motion target tracker to Image Edge-Detection.
Another object of the present invention is to, a kind of implementation method of realtime graphic edge detect circuit is provided, improved the precision and the speed of Image Edge-Detection; Satisfied of the real-time requirement of video frequency motion target tracker to Image Edge-Detection.
In order to achieve the above object, the present invention adopts following technical proposals to realize:
A kind of realtime graphic edge detect circuit comprises 3 * 3 square window generation modules, the gradient computing module that is connected with described 3 * 3 square window generation modules; Described 3 * 3 square window generation modules read the image data stream of pending image, and to be the center with each pixel take out 8 pixels of each pixel in the pending image and neighborhood thereof; The pixel number that described gradient computing module is taken out 3 * 3 square window generation modules according to respectively with vertical direction, horizontal direction, right product calculation is carried out to the coefficient of correspondence position in the four direction operator template of angular direction in angular direction and a left side, and the operation result of four direction compared, export as the rim detection value with maximum operation result.
Described 3 * 3 square window generation modules are provided with and are used for two line buffers and three column buffers that three line data with image data stream align in time, and described line buffer is connected with column buffer.
A kind of implementation method of realtime graphic edge detect circuit may further comprise the steps:
(1), respectively with vertical direction template G
x, horizontal direction template G
y, right diagonal angle direction template G
rWith left diagonal angle direction template G
lThe operator template of this four direction moves to next pixel along image from a pixel, and the center pixel of operator template is overlapped with the position of each pixel in the image;
(2), 9 pixel numbers generating of the module that respectively the operator template of above-mentioned this four direction and 3 * 3 square window generated are according to carrying out product, thereby obtain the four direction Grad of each pixel: horizontal direction Grad, vertical gradient value, right diagonal Grad and left diagonal Grad;
(3), the four direction Grad that obtains input first order comparer relatively in twos, the output result with first order comparer deposits by second level register more then;
(4), data that second level register is deposited compare by second level comparer, and the result that will obtain deposits third level register, this value is maximum Grad, i.e. the rim detection numerical value of this each pixel.
The present invention has following advantage and effect with respect to prior art:
1, the Sobel image border of adopting the present invention to propose is detected the result that optimized Algorithm obtains in real time, and the image border is comparatively level and smooth, and because the both sides of edges element has obtained enhancing, makes the edge seem more bright, has improved the precision of Image Edge-Detection.
2, the present invention increases by 2 direction templates as the real-time optimized Algorithm that detects in Sobel image border on the basis of classical Sobel operator template, the right diagonal angle direction template G of promptly new introducing
rWith left diagonal angle direction template G
l, be respectively applied for the image border of detecting diagonal angle, a right diagonal sum left side, thereby optimized present modified Sobel edge detection algorithm.
3, the present invention adopts parallel organization and multi-stage pipeline technology, realizes designing based on the realtime graphic edge detect circuit of the Sobel rim detection optimized Algorithm that proposes with hardware mode, can effectively reduce hardware spending; Compare with the realization effect that generally adopts at present, can obviously improve the speed of Image Edge-Detection, satisfy of the real-time requirement of video frequency motion target tracker Image Edge-Detection in the pure software mode.
Description of drawings
Fig. 1 is the structured flowchart of realtime graphic edge detect circuit of the present invention;
Fig. 2 is the operator module of four direction of the present invention;
Fig. 3 is the circuit structure block diagram of the present invention's 3 * 3 square window generation modules;
Fig. 4 is the circuit structure block diagram of gradient computing module of the present invention.
Embodiment
The present invention is described in further detail below in conjunction with embodiment and accompanying drawing, but embodiments of the present invention are not limited thereto.
Embodiment
A kind of structure of realtime graphic edge detect circuit comprises 3 * 3 square window generation modules and the gradient computing module that are connected as shown in Figure 1; Described 3 * 3 square window generation modules read the image data stream of pending image, and to be the center with each pixel take out 8 pixels of each pixel in the pending image and neighborhood thereof; The pixel number that described gradient computing module is taken out 3 * 3 square window generation modules according to respectively with vertical direction shown in Figure 2, horizontal direction, right to angular direction and a left side to the coefficient of correspondence position in the four direction operator template of angular direction carry out product calculation (pixel number that is about to the capable j row of 3 * 3 square window generation module i according to respectively with vertical direction, horizontal direction, right product calculation is carried out to the coefficient of the capable j row of i in the four direction operator template of angular direction in angular direction and a left side, 1≤i≤3,1≤j≤3.), and the operation result of four direction compared, export as the rim detection value with maximum operation result.Wherein, described vertical direction, horizontal direction, the right side are respectively angular direction four direction operator template an angular direction and a left side:
In described 3 * 3 square window generation modules, adopt registers group procession buffering, in the same clock period, can obtain 9 pixels (be 8 pixels of central pixel point and neighborhood thereof, have 9 pixels altogether) that 3 * 3 square window are covered simultaneously.As shown in Figure 3, described 3 * 3 square window generation modules comprise first line buffer, second line buffer, first column buffer, secondary series impact damper, the 3rd column buffer and line count device, second line buffer, first line buffer and first column buffer connect in turn, second line buffer is connected with the secondary series impact damper, and the line count device is used to export the effective marker signal.Adopt first line buffer and second line buffer that first line data of the image data stream of source images is carried out importing first column buffer again behind the buffer memory; Adopt second line buffer that second line data of the image data stream of source images is carried out importing the secondary series impact damper again behind the buffer memory; When the third line data of the image data stream of source images arrive, reading of data and output in the 3rd column buffer, first column buffer and the secondary series impact damper simultaneously, thus realize three line data of image data stream are alignd in time; It is that 3bit (bit), width are the shift register formation of 8bit (bit) that column buffer adopts the degree of depth, each row view data through the line buffer alignment is passed through column buffer again, can realize the output of 3 column data simultaneously, thereby obtain 9 interior pixel numbers of whole 3 * 3 square templates according to Z
1-Z
9At this moment, trigger output effective marker signal dout_valid through the line count device.
In the described gradient computing module, 9 pixel numbers that 3 * 3 square window generation modules are obtained are according to Z
1-Z
9Respectively with vertical direction, horizontal direction, right product calculation is carried out to the coefficient of correspondence position in the four direction operator template of angular direction in angular direction and a left side, and adopting the two-stage input comparator that the operation result of four direction is compared in twos, the maximum operation result of output is as the rim detection value.
Fig. 4 is the circuit structure diagram of gradient computing module, comprise first order parallel adder, second level parallel adder, first order register, second level register, third level register, first order comparer and second level comparer, described first order parallel adder, first order register and second level parallel adder are linked in sequence, described first order comparer, second level register, second level comparer and third level register are linked in sequence, and second level parallel adder is connected with first order comparer; Described first order parallel adder is provided with 3, and the result after three groups of operators that are respectively applied for three groups of pixels of module that 3 * 3 square window are generated and four direction operator module multiply each other adds up; Described first order register is provided with three groups, is respectively applied for the accumulation result of depositing described first order parallel adder; Described second level parallel adder adds up to the result that deposits of described three groups of first order registers, and the Grad of output four direction; Described first order comparer is provided with 2, compares in twos in 2 first order comparers of Grad input of the four direction that second level parallel adder is exported; Described second level register is provided with 2 groups, is respectively applied for to deposit the comparative result that 2 first order comparers are exported; Described second level comparer is used for the result that deposits of comparison second level register, and the output comparative result is as the rim detection value.The present invention is when carrying out the gradient computing, and 9 pixel numbers of the module generation that at first 3 * 3 square window is generated are according to Z
1-Z
9Be divided into z by row
1~z
3, z
4~z
6, z
7~z
9Three groups, then with three groups of pixel numbers according to respectively with four direction operator template in w
1~w
3, w
4~w
6, w
7~w
9In three groups of operators carry out multiplying, every group of three data that obtain are carried out additive operation by first order parallel adder.In order to improve the speed of circuit operation, and pass through the result who obtains after multiplying, the additive operation with every group and deposit by first order register again, by second level parallel adder three groups of resulting results of computing are carried out additive operation at last, thereby obtain the Grad of a direction.But in this circuit design the four direction operator module carried out simultaneously just four direction Grad of above-mentioned similar processing, with four direction Grad process first order input comparator, second level input comparator, at last the maximal value in the four direction Grad is exported as the rim detection value then; In order to improve the travelling speed of circuit, resulting result after the comparison operation of each grade comparer is deposited by register simultaneously.
The implementation method of the real-time edge detect circuit of Sobel that the present invention proposes, the vertical direction template G that adopts Fig. 2 to provide
x, horizontal direction template G
y, right diagonal angle direction template G
rWith left diagonal angle direction template G
lThe operator template of four direction is carried out the detection of image border respectively.Comprise the steps:
(1), respectively with vertical direction template G
x, horizontal direction template G
y, right diagonal angle direction template G
rMove to next pixel along image from a pixel with the operator template of left diagonal angle this four direction of direction template Gl, and the center pixel of operator template is overlapped with the position of each pixel in the image;
(2), 9 pixel numbers generating of the module that respectively the operator template of above-mentioned this four direction and 3 * 3 square window generated are according to carrying out product, thereby obtain the four direction Grad of each pixel: horizontal direction Grad, vertical gradient value, right diagonal Grad and left diagonal Grad;
(3), the four direction Grad that obtains input first order comparer relatively in twos, the output result with first order comparer deposits by second level register more then;
(4), data that second level register is deposited compare by second level comparer, and the result that will obtain deposits third level register, this value is maximum Grad, i.e. the rim detection numerical value of this each pixel.
Described step (2) specifically may further comprise the steps:
(21), 9 pixels that 3 * 3 square window generation modules are generated are divided into three groups of pixels by row;
(22), the operator in each directional operator module is divided into three groups of operators;
(23), on each direction, all three groups of pixels are carried out product calculation with three groups of operators of this direction respectively: promptly in the horizontal direction three groups of operators of three groups of pixels and horizontal direction are carried out product calculation, three groups of operators with three groups of pixels and vertical direction carry out product calculation in vertical direction, three groups of operators with three groups of pixels and right diagonal on right diagonal carry out product calculation, and three groups of operators with three groups of pixels and left diagonal on left diagonal carry out product calculation;
(24), three data that all every group of product calculation obtained on each direction are carried out additive operation by first order parallel adder, and the result who obtains after the additive operation deposited by first order register again, by second level parallel adder three groups of resulting results of computing are carried out additive operation at last, thereby obtain the Grad of this direction.
The four direction operator is carried out the processing of step (21)-(24) simultaneously, thereby obtain the Grad of four direction.
The foregoing description is a preferred implementation of the present invention; but embodiments of the present invention are not restricted to the described embodiments; other any do not deviate from change, the modification done under spirit of the present invention and the principle, substitutes, combination, simplify; all should be the substitute mode of equivalence, be included within protection scope of the present invention.
Claims (9)
1. a realtime graphic edge detect circuit is characterized in that, comprises 3 * 3 square window generation modules, the gradient computing module that is connected with described 3 * 3 square window generation modules; Described 3 * 3 square window generation modules read the image data stream of pending image, and to be the center with each pixel take out 8 pixels of each pixel in the pending image and neighborhood thereof; The pixel number that described gradient computing module is taken out 3 * 3 square window generation modules according to respectively with vertical direction, horizontal direction, right product calculation is carried out to the coefficient of correspondence position in the four direction operator template of angular direction in angular direction and a left side, and the operation result of four direction compared, export as the rim detection value with maximum operation result.
2. realtime graphic edge detect circuit according to claim 1, it is characterized in that, described 3 * 3 square window generation modules are provided with and are used for two line buffers and three column buffers that three line data with image data stream align in time, and described line buffer is connected with column buffer.
3. realtime graphic edge detect circuit according to claim 2, it is characterized in that, described 3 * 3 square window generation modules comprise first line buffer, second line buffer, first column buffer, secondary series impact damper and the 3rd column buffer, second line buffer, first line buffer and first column buffer connect in turn, and second line buffer is connected with the secondary series impact damper; Adopt first line buffer and second line buffer that first line data of image data stream is carried out importing first column buffer again behind the buffer memory; Adopt second line buffer that second line data of image data stream is carried out importing the secondary series impact damper again behind the buffer memory; When the third line data of image data stream arrive, reading of data and output in the 3rd column buffer, first column buffer and the secondary series impact damper simultaneously.
4. realtime graphic edge detect circuit according to claim 3 is characterized in that, it is that 3 bits, width are the shift register of 8 bits that described column buffer adopts the degree of depth.
5. realtime graphic edge detect circuit according to claim 1, it is characterized in that, described gradient computing module comprises first order parallel adder, second level parallel adder, first order register, second level register, third level register, first order comparer and second level comparer, described first order parallel adder, first order register and second level parallel adder are linked in sequence, described first order comparer, second level register, second level comparer and third level register are linked in sequence, and second level parallel adder is connected with first order comparer; Described first order parallel adder is provided with 3, and the result after three groups of operators that are respectively applied for three groups of pixels of module that 3 * 3 square window are generated and four direction operator module multiply each other adds up; Described first order register is provided with three groups, is respectively applied for the accumulation result of depositing described first order parallel adder; Described second level parallel adder adds up to the result that deposits of described three groups of first order registers, and the Grad of output four direction; Described first order comparer is provided with 2, compares in twos in 2 first order comparers of Grad input of the four direction that second level parallel adder is exported; Described second level register is provided with 2 groups, is respectively applied for to deposit the comparative result that 2 first order comparers are exported; Described second level comparer is used for the result that deposits of comparison second level register, and the output comparative result is as the rim detection value.
6. realtime graphic edge detect circuit according to claim 5 is characterized in that, described first order comparer and second level comparer are two input comparators.
7. realtime graphic edge detect circuit according to claim 1 is characterized in that, described vertical direction, horizontal direction, the right side are respectively angular direction four direction operator template an angular direction and a left side:
8. the implementation method of the described edge detect circuit of claim 1 is characterized in that, may further comprise the steps:
(1), respectively with vertical direction template G
x, horizontal direction template G
y, right diagonal angle direction template G
rWith left diagonal angle direction template G
lThe operator template of this four direction moves to next pixel along image from a pixel, and the center pixel of operator template is overlapped with the position of each pixel in the image;
(2), 9 pixel numbers generating of the module that respectively the operator template of above-mentioned this four direction and 3 * 3 square window generated are according to carrying out product, thereby obtain the four direction Grad of each pixel: horizontal direction Grad, vertical gradient value, right diagonal Grad and left diagonal Grad;
(3), the four direction Grad that obtains input first order comparer relatively in twos, the output result with first order comparer deposits by second level register more then;
(4), data that second level register is deposited compare by second level comparer, and the result that will obtain deposits third level register, this value is maximum Grad, i.e. the rim detection numerical value of this each pixel.
9. the implementation method of edge detect circuit according to claim 8 is characterized in that, described step (2) specifically may further comprise the steps:
(21), 9 pixels that 3 * 3 square window generation modules are generated are divided into three groups of pixels by row;
(22), the operator in each directional operator module is divided into three groups of operators;
(23), on each direction, all three groups of pixels are carried out product calculation with three groups of operators of this direction respectively: promptly in the horizontal direction three groups of operators of three groups of pixels and horizontal direction are carried out product calculation, three groups of operators with three groups of pixels and vertical direction carry out product calculation in vertical direction, three groups of operators with three groups of pixels and right diagonal on right diagonal carry out product calculation, and three groups of operators with three groups of pixels and left diagonal on left diagonal carry out product calculation;
(24), three data that all every group of product calculation obtained on each direction are carried out additive operation by first order parallel adder, and the result who obtains after the additive operation deposited by first order register again, by second level parallel adder three groups of resulting results of computing are carried out additive operation at last, thereby obtain the Grad of this direction.
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CN111402280B (en) * | 2020-03-10 | 2023-03-24 | 西安电子科技大学 | Image edge detection system and method based on logarithmic image processing model |
CN113327261A (en) * | 2021-05-20 | 2021-08-31 | 电子科技大学 | Error-free provincial resource image edge detection operator method based on random calculation |
CN114217953A (en) * | 2021-11-18 | 2022-03-22 | 成都理工大学 | Target positioning system and identification method based on FPGA image processing |
CN115953331A (en) * | 2023-03-14 | 2023-04-11 | 极限人工智能有限公司 | Image edge enhancement method and system |
CN115953331B (en) * | 2023-03-14 | 2023-12-29 | 极限人工智能有限公司 | Image edge enhancement method and system |
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