CN102254815A - Etching method for conducting layer during preparation of semiconductor device - Google Patents
Etching method for conducting layer during preparation of semiconductor device Download PDFInfo
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- CN102254815A CN102254815A CN2011101870658A CN201110187065A CN102254815A CN 102254815 A CN102254815 A CN 102254815A CN 2011101870658 A CN2011101870658 A CN 2011101870658A CN 201110187065 A CN201110187065 A CN 201110187065A CN 102254815 A CN102254815 A CN 102254815A
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- conductive layer
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- lithographic method
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Abstract
The invention relates to an etching method for a conducting layer during preparation of a semiconductor device. The method comprises the following steps of: forming the conducting layer of the semiconductor device; processing the surface of the conducting layer by using nitrous oxide plasmas; forming a photo resistor layer on the processed surface of the conducting layer; photoetching the photo resistor layer; and wet-etching the conducting layer by taking the photo resistor layer subjected to photoetching as a mask. The etching method for the conducting layer during preparation of the semiconductor device can change the surface characteristic of conducting layer, so that the adhesivity of the photo resistor layer to the conducting layer is enhanced, and the conducting layer coated by the photo resistor layer is prevented from being damaged during wet etching.
Description
Technical field
The present invention relates to the lithographic method of conductive layer in a kind of semiconductor device preparation process.
Background technology
In the conventional semiconductor device, aluminium is because have low resistance, be easy to deposition and advantages such as etching, and is widely used as the conductive layer of semiconductor device.The preparation method of the conductive layer of the semiconductor device of prior art generally includes following steps: the conductive layer that forms semiconductor device; Form on the surface of described conductive layer photoresist layer (Photo Resistor, PR); The described photoresist layer of photoetching; With the described photoresist layer after the photoetching is mask, the described conductive layer of wet etching (Wet Etch).
Yet; in the process of the described conductive layer of wet etching; because described photoresist layer and conductive layer are not strong in part adhesiveness at the interface; in these positions; described photoresist layer can not well be protected conductive layer, causes the conductive layer of these positions liquid that is etched to destroy, and forms conductive layer defective 11; as shown in Figure 1, and then influence the performance of described semiconductor device.
Summary of the invention
The object of the present invention is to provide the lithographic method of conductive layer in a kind of semiconductor device preparation process of avoiding the conductive layer defective.
The lithographic method of conductive layer in a kind of semiconductor device preparation process comprises the steps: to form the conductive layer of described semiconductor device; Utilize the nitrous oxide plasma that described conductive layer surface is handled; The surface of the described conductive layer after surface treatment forms photoresist layer; The described photoresist layer of photoetching; With the described photoresist layer after the photoetching is mask, the described conductive layer of wet etching.
The preferred a kind of technical scheme of said method, described conductive layer is the aluminium conductive layer.
The preferred a kind of technical scheme of said method, described conductive layer are titanium/titanium nitride/aluminium conductive layer.
The preferred a kind of technical scheme of said method behind the described photoresist layer of photoetching, detects the described semiconductor device back of developing.
The preferred a kind of technical scheme of said method after the detection step is finished after the described development, is carried out ultraviolet curing to described photoresist layer and is handled.
The preferred a kind of technical scheme of said method behind the intact described conductive layer of etching, adopts the mode of ashing treatment to remove described photoresist layer.
The preferred a kind of technical scheme of said method, remove described photoresist layer after, to the described conductive layer clean that wets.
The preferred a kind of technical scheme of said method, clean described conductive layer after, described semiconductor device is carried out detecting after the etching.
The preferred a kind of technical scheme of said method under 400 ℃ condition, utilizes the nitrous oxide plasma that described conductive layer surface is handled.
The preferred a kind of technical scheme of said method, the time span of utilizing the nitrous oxide plasma that described conductive layer surface is handled is 60 seconds.
Compared with prior art, the lithographic method of conductive layer in the semiconductor device preparation process of the present invention, before forming photoresist layer, utilize the nitrous oxide plasma that conductive layer surface is handled, to change the surface characteristic of conductive layer, thereby strengthen the adhesiveness of photoresist layer, avoid the conductive layer that covered by photoresist layer destroyed in wet etching conductive layer.
Description of drawings
Fig. 1 is the defective schematic diagram of conductive layer in the semiconductor device of prior art.
Fig. 2 is the schematic diagram that adopts the conductive layer of method formation of the present invention.
Fig. 3 is the flow chart of the lithographic method of conductive layer in the semiconductor device preparation process of the present invention.
Embodiment
The lithographic method of conductive layer in the semiconductor device preparation process of the present invention, before forming photoresist layer, utilize the nitrous oxide plasma that conductive layer surface is handled, to change the surface characteristic of conductive layer, thereby strengthen the adhesiveness of photoresist layer to conductive layer, the conductive layer of avoiding being covered by photoresist layer forms defective in wet etching, as shown in Figure 2.For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing.
See also Fig. 3, Fig. 3 is the lithographic method flow chart of conductive layer in the semiconductor device preparation process of the present invention.The lithographic method of conductive layer comprises the steps: in the semiconductor device preparation process of the present invention
Form the conductive layer of semiconductor device.Described semiconductor device can be for the metal-insulator-metal type semiconductor device, as metal-insulator-metal capacitor.Described conductive layer can be the bottom electrode of described metal-insulator-metal capacitor.Concrete, described conductive layer can be titanium (TI)/titanium nitride (TIN)/aluminium conductive layer, described conductive layer also can be the aluminium conductive layer, if described conductive layer is titanium/titanium nitride/aluminium conductive layer, then the thickness of described titanium can be 400 dusts, the thickness of described titanium nitride can be 1000 dusts, and the thickness of described aluminium can be 40000 dusts.
Utilize nitrous oxide (N
2O) plasma (plasma) is handled described conductive layer surface.Preferably, under 400 ℃ condition, utilize the nitrous oxide plasma that described conductive layer surface is handled, the time span of processing is 60 seconds.The surface characteristic of the conductive layer after the nitrous oxide plasma treatment changes, thereby can strengthen the adhesiveness of photoresist layer to conductive layer.This step can (Plasma Enhanced Chemical Vapor Deposition PECVD) finishes in the equipment at plasma enhanced chemical vapor deposition.
The surface of the described conductive layer after surface treatment forms photoresist layer.Because the surface of described conductive layer is by the nitrous oxide plasma treatment, therefore the surface characteristic of described conductive layer is changed, and the adhesiveness between described photoresist layer and the described conductive layer strengthens.
The described photoresist layer of photoetching.This step can adopt the method for the photoetching photoresist layer of prior art, does not repeat them here.
To described semiconductor device develop the back detect (After-Develop Inspection, ADI).This step can adopt the method for prior art, does not repeat them here.
Described photoresist layer is carried out ultraviolet curing (UV Curing) to be handled.This step can adopt the method for prior art, does not repeat them here.
With the described photoresist layer after the photoetching is mask, the described conductive layer of wet etching.Because the adhesiveness between described photoresist layer and the described conductive layer strengthens; therefore; in the process of the described conductive layer of wet etching; described photoresist layer can be good at protecting described conductive layer; etching liquid can't destroy described conductive layer; thereby avoided the formation of conductive layer defective, and then improved the performance of semiconductor device.
The mode that adopts ashing (Ashing) to handle is removed described photoresist layer.This step can adopt the method for prior art, does not repeat them here.
The described conductive layer cleaning (solvent clean) that wets is handled.This step can adopt the method for prior art, does not repeat them here.
To described semiconductor device carry out detecting after the etching (After-Etch Inspection, AEI).This step can adopt the method for prior art, does not repeat them here.
Under situation without departing from the spirit and scope of the present invention, can also constitute many very embodiment of big difference that have.Should be appreciated that except as defined by the appended claims, the present invention is not limited at the specific embodiment described in the specification.
Claims (10)
1. the lithographic method of conductive layer in the semiconductor device preparation process is characterized in that, comprises the steps:
Form the conductive layer of described semiconductor device;
Utilize the nitrous oxide plasma that described conductive layer surface is handled;
The surface of the described conductive layer after surface treatment forms photoresist layer;
The described photoresist layer of photoetching;
With the described photoresist layer after the photoetching is mask, the described conductive layer of wet etching.
2. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 1, and described conductive layer is the aluminium conductive layer.
3. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 1, and described conductive layer is titanium/titanium nitride/aluminium conductive layer.
4. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 1, behind the described photoresist layer of photoetching, the described semiconductor device back of developing is detected.
5. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 4, after described development back detection step is finished, described photoresist layer is carried out ultraviolet curing handle.
6. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 1, behind the intact described conductive layer of etching, adopts the mode of ashing treatment to remove described photoresist layer.
7. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 6, remove described photoresist layer after, to the described conductive layer clean that wets.
8. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 6, clean described conductive layer after, described semiconductor device is carried out detecting after the etching.
9. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 1, under 400 ℃ condition, utilizes the nitrous oxide plasma that described conductive layer surface is handled.
10. the lithographic method of conductive layer is characterized in that in the semiconductor device preparation process as claimed in claim 1, and the time span of utilizing the nitrous oxide plasma that described conductive layer surface is handled is 60 seconds.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101870658A CN102254815A (en) | 2011-07-05 | 2011-07-05 | Etching method for conducting layer during preparation of semiconductor device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011101870658A CN102254815A (en) | 2011-07-05 | 2011-07-05 | Etching method for conducting layer during preparation of semiconductor device |
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| CN102254815A true CN102254815A (en) | 2011-11-23 |
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| CN2011101870658A Pending CN102254815A (en) | 2011-07-05 | 2011-07-05 | Etching method for conducting layer during preparation of semiconductor device |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5324683A (en) * | 1993-06-02 | 1994-06-28 | Motorola, Inc. | Method of forming a semiconductor structure having an air region |
| US20020000629A1 (en) * | 2000-06-21 | 2002-01-03 | Kim Tae Kyun | MOSFET device fabrication method capable of allowing application of self-aligned contact process while maintaining metal gate to have uniform thickness |
| CN1405797A (en) * | 2001-08-03 | 2003-03-26 | 雅马哈株式会社 | Method for forming noble metal film pattern |
| JP2007013128A (en) * | 2005-05-31 | 2007-01-18 | Semiconductor Energy Lab Co Ltd | Manufacturing method for semiconductor device |
-
2011
- 2011-07-05 CN CN2011101870658A patent/CN102254815A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5324683A (en) * | 1993-06-02 | 1994-06-28 | Motorola, Inc. | Method of forming a semiconductor structure having an air region |
| US20020000629A1 (en) * | 2000-06-21 | 2002-01-03 | Kim Tae Kyun | MOSFET device fabrication method capable of allowing application of self-aligned contact process while maintaining metal gate to have uniform thickness |
| CN1405797A (en) * | 2001-08-03 | 2003-03-26 | 雅马哈株式会社 | Method for forming noble metal film pattern |
| JP2007013128A (en) * | 2005-05-31 | 2007-01-18 | Semiconductor Energy Lab Co Ltd | Manufacturing method for semiconductor device |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140428 |
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Effective date of registration: 20140428 Address after: 201203 Shanghai Zhangjiang hi tech park Zuchongzhi Road No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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Application publication date: 20111123 |
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