CN102244038B - Thin film transistor and manufacturing method thereof - Google Patents
Thin film transistor and manufacturing method thereof Download PDFInfo
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- CN102244038B CN102244038B CN2011101970800A CN201110197080A CN102244038B CN 102244038 B CN102244038 B CN 102244038B CN 2011101970800 A CN2011101970800 A CN 2011101970800A CN 201110197080 A CN201110197080 A CN 201110197080A CN 102244038 B CN102244038 B CN 102244038B
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- 239000010409 thin film Substances 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 38
- 230000008569 process Effects 0.000 claims abstract description 12
- 239000004065 semiconductor Substances 0.000 claims description 96
- 230000004888 barrier function Effects 0.000 claims description 43
- 239000000758 substrate Substances 0.000 claims description 21
- 239000002019 doping agent Substances 0.000 claims description 5
- 210000004877 mucosa Anatomy 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 abstract description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 4
- 229920005591 polysilicon Polymers 0.000 abstract description 3
- 239000007769 metal material Substances 0.000 abstract description 2
- 230000005611 electricity Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000002178 crystalline material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
Abstract
The invention provides a thin film transistor and a manufacturing method thereof. A through hole is formed in the surface of a data wire of the thin film transistor, so that a source and a drain of the thin film transistor are electrically connected with the data wire directly during forming, and the process cost is saved; furthermore, the source and the drain of the thin film transistor are made from polysilicon materials instead of metal materials in the prior art, so the process step is simplified and the process cost is further saved.
Description
Technical field
The present invention relates to liquid crystal display and manufacture field, relate in particular to manufacture method and the thin-film transistor of thin-film transistor.
Background technology
Organic Light Emitting Diode (OLED) more and more receives people's concern.The OLED screen adopts amorphous silicon film transistor as driving usually, and amorphous silicon membrane transistor switch device electron mobility is low, can not meet the current drives mode of OLED screen.Therefore amorphous silicon is converted to polysilicon, the electrical characteristics that the raising electron mobility is improved the TFT switching device seem particularly important.
The shortcoming of prior art is, thin-film transistor directly is formed at the transparent substrates surface, needs growth multiple-level stack structure, and the electricity syndeton that needs to make thin-film transistor and external module, and technical process is loaded down with trivial details, and cost is higher.
Summary of the invention
For solving many technical problems of above reflection, the invention provides a kind of manufacture method and thin-film transistor of thin-film transistor, can save process costs.
In order to address the above problem, the invention provides a kind of manufacture method of thin-film transistor, comprise the steps: to provide transparent substrates; On described transparent substrates surface, form grid and data wire; On described transparent substrates surface, form the first insulating barrier that covers described grid and described data wire; The zone corresponding with described grid at described the first surface of insulating layer forms noncrystal semiconductor layer; The zone corresponding with described data wire at described the first surface of insulating layer forms through hole; At described the first surface of insulating layer, form the conductive layer that covers described noncrystal semiconductor layer and described through hole; The part that described conductive layer is corresponding with described grid removes to cut apart conductive layer, thereby forms source electrode and the drain electrode of thin-film transistor; At described the first surface of insulating layer, form the second insulating barrier that covers described noncrystal semiconductor layer, through hole and source electrode and drain electrode; And adopt the described noncrystal semiconductor layer of Ear Mucosa Treated by He Ne Laser Irradiation, to increase the degree of order of noncrystal semiconductor layer lattice arrangement.
The present invention further provides a kind of thin-film transistor, having comprised: transparent substrates; Grid and data wire, described grid and data wire are arranged on the surface of described transparent substrates; The first insulating barrier, described the first insulating barrier covers described grid and described data wire; Noncrystal semiconductor layer, described noncrystal semiconductor layer are arranged on the zone that described the first surface of insulating layer is corresponding with described grid; Through hole, described through hole are arranged on the zone that described the first surface of insulating layer is corresponding with described data wire; Source electrode and drain electrode, described source electrode and drain electrode are arranged on the two ends of described noncrystal semiconductor layer, and one of source electrode and drain electrode are connected to described data wire by described through hole; And second insulating barrier, described the second insulating barrier is at described the first surface of insulating layer, and covers described noncrystal semiconductor layer, through hole and source electrode and drain electrode.
The invention has the advantages that, by on the data wire surface, through hole being set, the source electrode of thin-film transistor or drain electrode are directly connected in forming process with data wire electricity, saved process costs.Further, source electrode and drain electrode also adopt the polycrystalline silicon material preparation, but not metal material of the prior art has been simplified processing step, thereby have further saved process costs.
The accompanying drawing explanation
It shown in accompanying drawing 1, is the flow chart of steps of the described method of the specific embodiment of the invention.
Accompanying drawing 2A is to shown in accompanying drawing 2J, being the process schematic representation of the described method of the specific embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing, the manufacture method of thin-film transistor provided by the invention and the embodiment of thin-film transistor are elaborated.
For purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and coordinate specification appended graphic, be described in detail.Specification of the present invention provides different embodiment that the technical characterictic of the different execution modes of the present invention is described.Wherein, the configuration of each assembly in embodiment is the content that discloses for clearly demonstrating the present invention, not in order to limit the present invention.And in different embodiment, the part of reference numerals repeats, and is for the purpose of simplifying the description, not means the relevance between different embodiment.
Shown in accompanying drawing 1, be the flow chart of steps of the described method of the specific embodiment of the invention, comprise: step S100 provides transparent substrates; Step S110, form grid and data wire on described transparent substrates surface; Step S120, form on described transparent substrates surface the first insulating barrier that covers described grid and described data wire; Step S130, the zone corresponding with described grid at described the first surface of insulating layer forms noncrystal semiconductor layer, wherein, described noncrystal semiconductor layer comprises the first noncrystal semiconductor layer and the second noncrystal semiconductor layer, and the second noncrystal semiconductor layer is stacked on the first noncrystal semiconductor layer; Step S140, the zone corresponding with described data wire at described the first surface of insulating layer forms through hole; Step S150, form at described the first surface of insulating layer the conductive layer that covers described noncrystal semiconductor layer and described through hole; Step S160, by described conductive layer and the second noncrystal semiconductor layer part corresponding with described grid, remove to cut apart conductive layer and the second noncrystal semiconductor layer, thereby form source electrode and the drain electrode of thin-film transistor, and the first noncrystal semiconductor layer of attenuate correspondence position; Step S170, form at described the first surface of insulating layer the second insulating barrier that covers described noncrystal semiconductor layer, through hole and source electrode and drain electrode; Step S180, remove described the second insulating barrier part between described source electrode and drain electrode; Step S190, adopt the described noncrystal semiconductor layer of Ear Mucosa Treated by He Ne Laser Irradiation, to increase the degree of order of noncrystal semiconductor layer lattice arrangement.
Accompanying drawing 2A is to shown in accompanying drawing 2J, being the process schematic representation of the described method of the specific embodiment of the invention.
Shown in accompanying drawing 2A, refer step S100, provide transparent substrates 200.The material of described transparent substrates 200 can be any one common materials that comprises glass.
Shown in accompanying drawing 2B, refer step S110, form grid 210 and data wire 230 on the surface of described transparent substrates 200.The material of grid 210 and data wire 230 can be the electric conducting materials such as polysilicon or metal.This embodiment has been made grid 210 and data wire 230 simultaneously in this step, and in subsequent step, pass through process integration, the electricity that forms when forming thin-film transistor between data wire 230 and thin-film transistor source electrode or drain electrode connects, to save processing step.
Shown in accompanying drawing 2C, refer step S120, form on described transparent substrates 200 surfaces the first insulating barrier 251 that covers described grid 210 and described data wire 230.The material of described the first insulating barrier 251 can be silica, silicon nitride or other insulating material, and the formation method can be any common technology methods such as chemical vapour deposition (CVD) or physical vapour deposition (PVD).
Shown in accompanying drawing 2D, refer step S130, form noncrystal semiconductor layer 270 in described the first zone corresponding with described grid 210, insulating barrier 251 surfaces.The material of described noncrystal semiconductor layer 270 can be for example amorphous silicon, can be also such as GaAs or germanium silicon etc. of other common semi-conducting materials.The formation method can be at first in the surperficial extension of the first insulating barrier 251 or deposit continuous noncrystal semiconductor layer, and the method by photoetching corrosion keeps appointed area and forms the noncrystal semiconductor layer 270 shown in accompanying drawing 2D.The doping content that can regulate noncrystal semiconductor layer 270 by the dopant quantity delivered of controlling in extension or depositing operation.
Continuation is with reference to accompanying drawing 2D, in present embodiment, noncrystal semiconductor layer 270 further comprises the first noncrystal semiconductor layer 271 and the second noncrystal semiconductor layer 272 that the conduction type of stacking setting is identical, described the first noncrystal semiconductor layer 271 and described the first insulating barrier 251 laminatings, described the second noncrystal semiconductor layer 272 is exposed to surface in this step, and with described source electrode and drain electrode, fits in subsequent step.The conductivity of described the second noncrystal semiconductor layer 272 is higher than the conductivity of described the first noncrystal semiconductor layer 271.High conductivity means high-dopant concentration, the N-type doped amorphous silicon of high-dopant concentration for example, and high-dopant concentration is conducive to same source electrode electrode and drain electrode forms good ohmic contact, the semiconductor layer of low doping concentration more easily is subjected to grid control and change conduction type, therefore present embodiment selects further noncrystal semiconductor layer 270 have been resolved into the first low-doped noncrystal semiconductor layer 271 and the second highly doped noncrystal semiconductor layer 272.
Shown in accompanying drawing 2E, refer step S140, form through hole 231 in described the first zone corresponding with described data wire 230, insulating barrier 251 surfaces.The step that forms through hole 231 can be by the method for photoetching corrosion.The effect of through hole 231 is to be connected into follow-up data line 230 forms electricity with source electrode or drain electrode.
Shown in accompanying drawing 2F, refer step S150, form on described the first insulating barrier 251 surfaces the conductive layer 290 that covers described noncrystal semiconductor layer 270 and described through hole 231.The material of conductive layer 290 can be for example to be selected from a kind of in indium tin oxide (ITO) and indium-zinc oxide (IZO), and the formation method is such as being spin-coating method or spraying process etc.Conductive layer 290 covers through hole 231, and fits with the data wire 230 of through hole 231 belows, to realize electricity, connects.
Shown in accompanying drawing 2G, refer step S160, by part corresponding with described grid 210 in described conductive layer 290 and the second noncrystal semiconductor layer 272, remove to cut apart conductive layer 290 and the second noncrystal semiconductor layer 272, thereby form source electrode 291 and the drain electrode 292 of thin-film transistor, and the first noncrystal semiconductor layer 271 of attenuate correspondence position.Wherein the position of source electrode 291 and drain electrode 292 can exchange.Cut apart conductive layer 290 and the second noncrystal semiconductor layer 272, and the processing procedure of attenuate the first noncrystal semiconductor layer 271 can adopt the method for photoetching corrosion to realize.Because conductive layer in abovementioned steps 290 has been set up the electricity connection with data wire 230, therefore the source electrode 291 that forms in this embodiment is without the electricity syndeton between extra making and data wire 230.
Shown in accompanying drawing 2H, refer step S170, form on described the first insulating barrier 251 surfaces the second insulating barrier 252 that covers described noncrystal semiconductor layer 270, through hole 231 and source electrode 291 and drain electrode 292.The material of the second insulating barrier 252 can be any one insulating material that comprises silica and silicon nitride, and effect is noncrystal semiconductor layer 270, through hole 231 and source electrode 291 and the drain electrode 292 of protective covering lid.
Shown in accompanying drawing 2I, refer step S180, remove described the second insulating barrier 252 part between described source electrode 291 and drain electrode 292.This step is used to form pixel electrode pattern.
Shown in accompanying drawing 2J, refer step S190, adopt the described noncrystal semiconductor layer 270 of Ear Mucosa Treated by He Ne Laser Irradiation, to increase the degree of order of noncrystal semiconductor layer 270 lattice arrangement.Noncrystal semiconductor layer 270 is annealed under the irradiation of laser, by non-crystalline material, to polycrystalline material, transformed, and is enough large in laser power, and in the situation of lasting long enough irradiation time, non-crystalline material very person can change into polycrystalline material.The lattice degree of order of polycrystalline material is better, therefore have higher carrier mobility, can improve the electric property of thin-film transistor.Due to the thickness of the second insulating barrier 252, usually be far smaller than the thickness of transparent substrates 200, thus laser preferably from the second insulating barrier 252 1 side incidents, the wavelength of laser should penetrate the second insulating barrier 252 and conductive layer 290.Material at the second insulating barrier 252 is silicon nitride or silica, and the material of conductive layer 290 is in the situation of ITO or IZO, and the laser of visible light wave range and infrared band is all transparent for these materials.
Continuation is with reference to accompanying drawing 2J, and above-mentioned steps is implemented complete rear institute acquisition thin-film transistor and comprised following structure: transparent substrates 200; Grid 210 and data wire 230, grid 210 and data wire 230 are arranged on the surface of transparent substrates 200; The first insulating barrier 251, described the first insulating barrier 251 cover gate 210 and data wire 230; Noncrystal semiconductor layer 270, comprise the first noncrystal semiconductor layer 271 and the second noncrystal semiconductor layer 272, and described noncrystal semiconductor layer 270 is arranged on the first insulating barrier 251 zones corresponding with grid 210, surface; Through hole 231, described through hole 231 are arranged on the first insulating barrier 251 zones corresponding with described data wire 230, surface; Source electrode 291 and drain electrode 292, described source electrode 291 and drain electrode 292 are arranged on the two ends of noncrystal semiconductor layer 270, and one of source electrode 291 and drain electrode 292 are connected to data wire 230 by through hole 231; And second insulating barrier 252, described the second insulating barrier 252 is on the first insulating barrier 251 surfaces, and cover noncrystal semiconductor layer 270, through hole 231 and source electrode 291 and drain electrode 292, the second insulating barriers 252 part between source electrode 291 and drain electrode 292 is hollow out.Wherein, the second noncrystal semiconductor layer 272 between source electrode 291 and drain electrode 292 is hollow outs, and the thickness of the first noncrystal semiconductor layer 271 part between source electrode 291 and drain electrode 292 is less than the thickness of the first noncrystal semiconductor layer 271 remainders.
Be below only the preferred embodiment of the present invention, it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (10)
1. the manufacture method of a thin-film transistor, is characterized in that, comprises the steps:
Transparent substrates is provided;
On described transparent substrates surface, form grid and data wire;
On described transparent substrates surface, form the first insulating barrier that covers described grid and described data wire;
The zone corresponding with described grid at described the first surface of insulating layer forms noncrystal semiconductor layer, described noncrystal semiconductor layer comprises the first noncrystal semiconductor layer and the second noncrystal semiconductor layer, described the first noncrystal semiconductor layer and described the first insulating barrier laminating, described the second noncrystal semiconductor layer is stacked on described the first noncrystal semiconductor layer, and the doping content of described the second noncrystal semiconductor layer is higher than the doping content of described the first noncrystal semiconductor layer;
The zone corresponding with described data wire at described the first surface of insulating layer forms through hole;
At described the first surface of insulating layer, form the conductive layer that covers described noncrystal semiconductor layer and described through hole;
The part that described conductive layer is corresponding with described grid removes to cut apart conductive layer, thereby forms source electrode and the drain electrode of thin-film transistor;
At described the first surface of insulating layer, form the second insulating barrier that covers described noncrystal semiconductor layer, through hole and source electrode and drain electrode; And
Adopt the described noncrystal semiconductor layer of Ear Mucosa Treated by He Ne Laser Irradiation, to increase the degree of order of noncrystal semiconductor layer lattice arrangement.
2. the manufacture method of thin-film transistor according to claim 1, is characterized in that, the conductivity of described the second noncrystal semiconductor layer is higher than the conductivity of described the first noncrystal semiconductor layer.
3. the manufacture method of thin-film transistor according to claim 2, it is characterized in that, described noncrystal semiconductor layer adopts the method for extension to form, and in the process of extension the concentration by changing dopant to form the first noncrystal semiconductor layer and the second noncrystal semiconductor layer.
4. the manufacture method of thin-film transistor according to claim 2, is characterized in that, in cutting apart the step of conductive layer, further comprises the step that removes simultaneously described the second noncrystal semiconductor layer and grid corresponding part.
5. the manufacture method of thin-film transistor according to claim 4, is characterized in that, in the step that removes described the second noncrystal semiconductor layer and grid corresponding part, further comprises the step of the first noncrystal semiconductor layer that attenuate comes out.
6. the manufacture method of thin-film transistor according to claim 1, is characterized in that, after the step that forms the second insulating barrier, further comprises the step of removing described the second insulating barrier part between described source electrode and drain electrode.
7. a thin-film transistor, is characterized in that, comprising:
Transparent substrates;
Grid and data wire, described grid and data wire are arranged on the surface of described transparent substrates;
The first insulating barrier, described the first insulating barrier covers described grid and described data wire;
Noncrystal semiconductor layer, described noncrystal semiconductor layer is arranged on the zone that described the first surface of insulating layer is corresponding with described grid, and comprise the first noncrystal semiconductor layer and the second noncrystal semiconductor layer, described the first noncrystal semiconductor layer and described the first insulating barrier laminating, described the second noncrystal semiconductor layer is stacked on described the first noncrystal semiconductor layer, and the doping content of described the second noncrystal semiconductor layer is higher than the doping content of described the first noncrystal semiconductor layer;
Through hole, described through hole are arranged on the zone that described the first surface of insulating layer is corresponding with described data wire;
Source electrode and drain electrode, described source electrode and drain electrode are arranged on the two ends of described noncrystal semiconductor layer, and one of source electrode and drain electrode are connected to described data wire by described through hole; And second insulating barrier, described the second insulating barrier is at described the first surface of insulating layer, and covers described noncrystal semiconductor layer, through hole and source electrode and drain electrode.
8. thin-film transistor according to claim 7, is characterized in that, the conductivity of described the second noncrystal semiconductor layer is higher than the conductivity of described the first noncrystal semiconductor layer, and described the second noncrystal semiconductor layer between described source electrode and drain electrode is hollow out.
9. thin-film transistor according to claim 8, is characterized in that, the thickness of described the first noncrystal semiconductor layer part between described source electrode and drain electrode is less than the thickness of described the first noncrystal semiconductor layer remainder.
10. thin-film transistor according to claim 7, is characterized in that, described the second insulating barrier part between described source electrode and drain electrode is hollow out.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101970800A CN102244038B (en) | 2011-07-14 | 2011-07-14 | Thin film transistor and manufacturing method thereof |
| PCT/CN2011/080158 WO2013007066A1 (en) | 2011-07-14 | 2011-09-26 | Thin film transistor manufacturing method and thin film transistor |
| US13/376,970 US8629507B2 (en) | 2011-07-14 | 2011-09-26 | Thin film transistor |
| US14/071,284 US8829523B2 (en) | 2011-07-14 | 2013-11-04 | Thin film transistor manufacturing method |
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| CN2011101970800A CN102244038B (en) | 2011-07-14 | 2011-07-14 | Thin film transistor and manufacturing method thereof |
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| CN102244038A CN102244038A (en) | 2011-11-16 |
| CN102244038B true CN102244038B (en) | 2013-11-20 |
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| US20170294459A1 (en) * | 2016-04-08 | 2017-10-12 | Innolux Corporation | Display device |
| CN106019752B (en) * | 2016-07-29 | 2020-05-05 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and manufacturing method thereof |
| CN106773401A (en) * | 2016-12-28 | 2017-05-31 | 深圳市华星光电技术有限公司 | The preparation method and array base palte of array base palte |
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| KR20120060664A (en) * | 2010-12-02 | 2012-06-12 | 삼성전자주식회사 | Display apparatus and fabrication method of the same |
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- 2011-07-14 CN CN2011101970800A patent/CN102244038B/en active Active
- 2011-09-26 WO PCT/CN2011/080158 patent/WO2013007066A1/en active Application Filing
- 2011-09-26 US US13/376,970 patent/US8629507B2/en active Active
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2013
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Also Published As
| Publication number | Publication date |
|---|---|
| US8629507B2 (en) | 2014-01-14 |
| WO2013007066A1 (en) | 2013-01-17 |
| CN102244038A (en) | 2011-11-16 |
| US20140057400A1 (en) | 2014-02-27 |
| US20130015446A1 (en) | 2013-01-17 |
| US8829523B2 (en) | 2014-09-09 |
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