CN102185038A - Method for improving weak light response of amorphous silicon film battery - Google Patents

Method for improving weak light response of amorphous silicon film battery Download PDF

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CN102185038A
CN102185038A CN2011101006478A CN201110100647A CN102185038A CN 102185038 A CN102185038 A CN 102185038A CN 2011101006478 A CN2011101006478 A CN 2011101006478A CN 201110100647 A CN201110100647 A CN 201110100647A CN 102185038 A CN102185038 A CN 102185038A
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deposition
amorphous silicon
sih
gas
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CN102185038B (en
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吴兴坤
李媛
曹松峰
叶志高
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AMPLESUN POWER HOLDINGS Co Ltd
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Abstract

The invention discloses a method for improving weak light response of an amorphous silicon film battery, belonging to the field of semiconductors. In the prior art, the heterojunction of a-SiC of a P layer and a-Si of an I layer causes stress concentration and defect density of a P/I interface. In the method, when raw materials containing gaseous H2 and gaseous SiH4 are used for depositing the P layer and the I layer on the basis of the decomposition reaction of the gaseous SiH4 to perform carbon element doping. The carbon element doping is to dope gaseous CH4 in the deposited raw materials. An a-Si layer of the I layer is converted into an a-SiC layer in a carbon doping mode, and the heterojunction of the a-SiC of the P layer and the a-Si of the I layer is further converted into a homojunction of the a-SiC of the P layer and the a-SiC of the I layer, thereby eliminating the heterojunction, and eliminating the stress concentration and defect density of the interface greatly, and finally improving the weak light response of the amorphous silicon film battery remarkably.

Description

A kind of method that improves the response of the amorphous silicon membrane battery low light level
Technical field
The present invention relates to a kind of method that improves the response of the amorphous silicon membrane battery low light level, specially refer to a kind of intrinsic layer doping carbon element, belong to semiconductor applications with the method that the low light level that improves the amorphous silicon membrane battery responds.
Background technology
The amorphous silicon membrane battery is because of manufacturing cost is lower than crystal silicon body battery, energy recovery term short, identical power output energy output is many, and development rapidly, be widely used at present in the outdoor various electricity generation systems, as photovoltaic plant, cladding glass, roof electricity generation system etc.Comparatively speaking, the indoor application of current amorphous silicon membrane battery is also fewer, exists wide application potential, as can be used as the remote controller of various household electrical appliances, the internal layer of double-deck sound control glass etc.
Obviously, indoor intensity of illumination is far below the outdoor intensity of illumination under the terrestrial solar radiation, can become very poor at amorphous silicon membrane battery power generation performance under indoor weak light that power generation performance is good under the outdoor high light, this shows that mainly the open circuit voltage of amorphous silicon membrane battery can become very poor under the low light level, cause it at 50W/m 2Under the following irradiance, can not utilize optical energy power.Its reason is that the conventional amorphous silicon membrane battery internal defects of outdoor use is more, causes leakage current bigger, and the two ends that the photo-generated carrier that produces under the low light level does not have enough time to arrive battery have as yet just been fallen by defective is compound, do not generate electricity under the low light level.Therefore the defective that how to reduce the amorphous silicon membrane battery is most important.The structure of widespread commercial amorphous silicon membrane battery is the structure (the P layer is a Window layer, is the hole conduction layer, and I is an intrinsic layer, and N is the electron conduction layer) of glass/TCO film/P layer a-SiC/I layer a-Si/N layer a-Si/ZnO/Al now.As shown in Figure 1, P layer a-SiC and I layer a-Si interface are heterojunction, exist numerous defectives and stress to concentrate at the P/I interface, are the major reasons of difference in response under the hull cell low light level.For reducing this boundary defect, conventional way is to insert one deck to mix the resilient coating of C (the Buffer layer is called for short the B layer) at the P/I interface, forms the battery structure of glass/TCO film/P layer a-SiC/B layer a-SiC/I layer a-Si/N layer a-Si/ZnO/Al, as shown in Figure 2.Though the way of this insertion resilient coating B layer can be alleviated the phenomenon that the heterojunction stress at P/I interface is concentrated, reduce some boundary defects, the power generation performance of amorphous silicon membrane battery under outdoor sunlight that makes is good, but power generation performance is still very poor under the low light level, and the P/I defect concentration is still too big.The response problem of amorphous silicon membrane battery under the low light level do not solved in said method yet at all.
Summary of the invention
The technical assignment of the technical problem to be solved in the present invention and proposition is that the heterojunction that overcomes existing P layer a-SiC and I layer a-Si causes the stress at P/I interface to concentrate and the defective of interface defect density, and a kind of method that the amorphous silicon membrane battery low light level responds that improves is provided.
For this reason, the method for the raising amorphous silicon membrane battery low light level of the present invention response is with comprising H 2Gas, SiH 4The raw material of gas passes through SiH 4Carrying out carbon when the decomposition reaction deposition P layer of gas and I layer mixes.
As the optimization technique measure, it is the CH that mixes in the deposition raw material that described carbon mixes 4Gas.
As the optimization technique measure, deposit the I layer according to following parameter:
Temperature is 180-260 ℃;
Deposition power density is 0.006-0.03W/cm 2
Deposition pressure is 60-330Pa;
H 2: SiH 4Thinner ratio be 2-20:1;
CH 4: SiH 4Gas flow ratio 7-70) 100.Especially: described CH 4: SiH 4Gas flow ratio be 13-20:100.Described deposition pressure is 60-150Pa.
The invention has the beneficial effects as follows: by changing the a-Si layer of the I layer mode by carbon dope into the a-SiC layer, thereby the heterojunction of P layer a-SiC/I layer a-Si is changed into the homojunction of P layer a-SiC/I layer a-SiC, eliminated heterojunction, thereby the stress of having eliminated the interface is dramatically concentrated and defect concentration, and the low light level response of amorphous silicon membrane battery has finally also obtained significant raising.
Description of drawings
Fig. 1 is the structural representation of the amorphous silicon membrane battery of routine.
Fig. 2 is the structural representation that inserts the amorphous silicon membrane battery of resilient coating.
Fig. 3 is the structural representation of novel amorphous silicon membrane battery of the present invention.
Fig. 4 is that the intrinsic layer that conventional amorphous silicon contains resilient coating B layer is the a-Si(amorphous silicon) the normalized voltage-light intensity curve figure of amorphous silicon membrane battery.
Fig. 5 is that I layer CH4:SiH4 gas flow ratio is 7-10:100, and the H2:SiH4 gas dilution is than being 2-20:1, the normalized voltage-light intensity curve figure of amorphous silicon membrane battery when deposition pressure is 60Pa-150Pa.
Fig. 6 is 13-20:100 for I layer CH4:SiH4 gas flow ratio, and the H2:SiH4 gas dilution is than being 2-20:1, the normalized voltage-light intensity curve figure of amorphous silicon membrane battery when deposition pressure is 60Pa-150Pa.
Fig. 7 is 23-33:100 for I layer CH4:SiH4 gas flow ratio, and the H2:SiH4 gas dilution is than being 2-20:1, the normalized voltage-light intensity curve figure of amorphous silicon membrane battery when deposition pressure is 60Pa-150Pa.
Fig. 8 is 50-60:100 for I layer CH4:SiH4 gas flow ratio, and the H2:SiH4 gas dilution is than being 2-20, the normalized voltage-light intensity curve figure of amorphous silicon membrane battery when deposition pressure is 60Pa-150Pa.
Fig. 9 is 13-20:1 for I layer CH4:SiH4 gas flow ratio, and the H2:SiH4 gas dilution is than being 2-20:1, the normalized voltage-light intensity curve figure of amorphous silicon membrane battery when deposition pressure is 160Pa-220Pa.
Figure 10 is 13-20:100 for I layer CH4:SiH4 gas flow ratio, and the H2:SiH4 gas dilution is than being 2-20:1, the normalized voltage-light intensity curve figure of amorphous silicon membrane battery when deposition pressure is 230Pa-330Pa.
Among Fig. 4-10, transverse axis is represented the normalization light intensity, and the 1.0 places light radiation illumination of transverse axis is 100W/m 2The longitudinal axis is represented the normalization open circuit voltage; From figure, can find out amorphous silicon membrane battery that the inventive method makes under the low light level voltage obviously than conventional batteries height.
Number in the figure explanation: 1-glass, 2-transparent conductive oxide (TCO) substrate, the P type layer of 3-a-SiC structure, 4-B type layer, the I layer of 51-a-Si structure, the I layer of 52-a-SiC structure, 6-N type layer, 7-ZnO layer, 8-Al layer.
Embodiment
The present invention will be further described by the following examples.
The method of the raising amorphous silicon membrane battery low light level of the present invention response is with comprising H 2Gas, SiH 4The raw material of gas passes through SiH 4Carrying out carbon when the decomposition reaction deposition P layer of gas and I layer mixes.It is the CH that mixes in the deposition raw material that carbon mixes 4Gas.Especially according to following parameter deposition I layer: temperature is 180-260 ℃; Deposition power density is 0.006-0.03W/cm 2Deposition pressure is 60-330Pa; H 2: SiH 4Thinner ratio be 2-20:1; CH 4: SiH 4Gas flow ratio 7-70:100.CH wherein 4: SiH 4Gas flow ratio be that 13-20:100, deposition pressure are that 60-150Pa is good.
When the whole amorphous silicon membrane battery of deposition, be that to deposit P type layer successively on transparent conductive oxide (TCO) substrate (as transparent conducting glass or transparent metal or transparent organic polymer material) (be Window layer, be the hole conduction layer), I layer (intrinsic layer), N type layer (electron conduction layer), plate back electrode ZnO layer and Al layer at last, obtain amorphous silicon thin-film solar cell, wherein: the deposition process parameters of P layer is: feed SiH 4, H 2, CH 4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100; The I layer feeds SiH 4, H 2, CH 4Mist, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 40-300Pa, CH4:SiH4 gas flow ratio 7-70:100.
Reference examples 1
(1) cleans transparent conductive oxide (TCO) substrate;
(2) on the TCO substrate, adopt plasma reinforced chemical vapour deposition equipment deposition of amorphous silicon films.Wherein P layer deposition parameter is as follows:
Deposition P type layer on transparent conducting glass, the deposition process parameters of P layer is: feed SiH 4, H 2, CH 4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100, deposit thickness are 10-20nm.
Deposit one deck resilient coating B layer subsequently, reacting gas is SiH 4, CH 4And H 2, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 80-300Pa, deposit thickness is 5-10nm.
The I layer feeds SiH 4, H 2Gas, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-150Pa, deposit thickness is 150-500nm.
N layer depositing temperature is 180～260 ℃, feeds SiH successively 4, PH 3, H 2Gas, deposit thickness are 15～40nm;
(3) deposit the composite back electrode of ZnO layer and Al layer subsequently.
Open circuit voltage performance parameter under the amorphous silicon membrane battery low light level that makes as shown in Figure 4.
Embodiment 1
(1) cleans transparent conductive oxide (TCO) substrate;
(2) on the TCO substrate, adopt plasma reinforced chemical vapour deposition equipment deposition of amorphous silicon films.Wherein P layer deposition parameter is as follows:
Deposition P type layer on transparent conducting glass, the deposition process parameters of P layer is: feed SiH 4, H 2, CH 4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100, deposit thickness are 10-20nm.
The I layer feeds SiH 4, H 2, CH 4Gas, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-150Pa, CH 4: SiH 4Gas flow ratio 7-10:100, deposit thickness are 150-500nm.
N layer depositing temperature is 180～260 ℃, feeds SiH successively 4, PH 3, H 2Gas, deposit thickness are 15～40nm;
(3) deposit the composite back electrode of ZnO and Al subsequently.
Open circuit voltage performance parameter under the amorphous silicon membrane battery low light level that makes as shown in Figure 5.
Embodiment 2
(1) cleans transparent conductive oxide (TCO) substrate;
(2) on the TCO substrate, adopt plasma reinforced chemical vapour deposition equipment deposition of amorphous silicon films.Wherein P layer deposition parameter is as follows:
Deposition P type layer on transparent conducting glass, the deposition process parameters of P layer is: feed SiH 4, H 2, CH 4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100, deposit thickness are 10-20nm.
The I layer feeds SiH 4, H 2, CH 4Gas, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-150Pa, CH 4: SiH 4Gas flow ratio 13-20:100, deposit thickness are 150-500nm.
N layer depositing temperature is 180～260 ℃, feeds SiH successively 4, PH 3, H 2Gas, deposit thickness are 15～40nm;
(3) deposit the composite back electrode of ZnO and Al subsequently.
Open circuit voltage performance parameter under the amorphous silicon membrane battery low light level that makes as shown in Figure 6.
Embodiment 3
(1) cleans transparent conductive oxide (TCO) substrate;
(2) on the TCO substrate, adopt plasma reinforced chemical vapour deposition equipment deposition of amorphous silicon films.Wherein P layer deposition parameter is as follows:
Deposition P type layer on transparent conducting glass, the deposition process parameters of P layer is: feed SiH 4, H 2, CH 4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100, deposit thickness are 10-20nm.
The I layer feeds SiH 4, H 2, CH 4Gas, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-150Pa, CH 4: SiH 4Gas flow ratio 23-33:100, deposit thickness are 150-500nm.
N layer depositing temperature is 180～260 ℃, feeds SiH successively 4, PH 3, H 2Gas, deposit thickness are 15～40nm;
(3) deposit the composite back electrode of ZnO and Al subsequently.
Open circuit voltage performance parameter under the amorphous silicon membrane battery low light level that makes as shown in Figure 7.
Embodiment 4
(1) cleans transparent conductive oxide (TCO) substrate;
(2) on the TCO substrate, adopt plasma reinforced chemical vapour deposition equipment deposition of amorphous silicon films.Wherein P layer deposition parameter is as follows:
Deposition P type layer on transparent conducting glass, the deposition process parameters of P layer is: feed SiH 4, H 2, CH 4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100, deposit thickness are 10-20nm.
The I layer feeds SiH 4, H 2, CH 4Gas, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-150Pa, CH4:SiH 4Gas flow ratio 50-60:100, deposit thickness are 150-500nm.
N layer depositing temperature is 180～260 ℃, feeds SiH successively 4, PH 3, H 2Gas, deposit thickness are 15～40nm;
(3) deposit the composite back electrode of ZnO and Al subsequently.
Open circuit voltage performance parameter under the amorphous silicon membrane battery low light level that makes as shown in Figure 8.
Embodiment 5
(1) cleans transparent conductive oxide (TCO) substrate;
(2) on the TCO substrate, adopt plasma reinforced chemical vapour deposition equipment deposition of amorphous silicon films.Wherein P layer deposition parameter is as follows:
Deposition P type layer on transparent conducting glass, the deposition process parameters of P layer is: feed SiH 4, H 2, CH4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100, deposit thickness are 10-20nm.
The I layer feeds SiH 4, H 2, CH 4Gas, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 160-220Pa, CH 4: SiH 4Gas flow ratio 13-20:100, deposit thickness are 150-500nm.
N layer depositing temperature is 180～260 ℃, feeds SiH successively 4, PH 3, H 2Gas, deposit thickness are 15～40nm;
(3) deposit the composite back electrode of ZnO and Al subsequently.
Open circuit voltage performance parameter under the amorphous silicon membrane battery low light level that makes as shown in Figure 9.
Embodiment 6
(1) cleans transparent conductive oxide (TCO) substrate;
(2) on the TCO substrate, adopt plasma reinforced chemical vapour deposition equipment deposition of amorphous silicon films.Wherein P layer deposition parameter is as follows:
Deposition P type layer on transparent conducting glass, the deposition process parameters of P layer is: feed SiH 4, H 2, CH 4, TMB(trimethyl borine or diethyl alkane) gas, depositing temperature is 180-260 ℃, deposition power density is 0.006-0.03W/cm 2, deposition pressure is 60-300Pa, CH 4: SiH 4Gas flow ratio 40-70:100, deposit thickness are 10-20nm.
The I layer feeds SiH 4, H 2, CH 4Gas, depositing temperature are 180-260 ℃, H 2: SiH 4Thinner ratio is 2-20:1, and deposition power density is 0.006-0.03W/cm 2, deposition pressure is 230-330Pa, CH 4: SiH 4Gas flow ratio 13-20:100, deposit thickness are 150-500nm.
N layer depositing temperature is 180～260 ℃, feeds SiH successively 4, PH 3, H 2Gas, deposit thickness are 15～40nm;
(3) deposit the composite back electrode of ZnO and Al subsequently.
Open circuit voltage performance parameter under the amorphous silicon membrane battery low light level that makes as shown in figure 10.

Claims (5)

1. method that improves amorphous silicon membrane battery low light level response is characterized in that with comprising H 2Gas, SiH 4The raw material of gas passes through SiH 4Carrying out carbon when the decomposition reaction deposition P layer of gas and I layer mixes.
2. a kind of method that improves the response of the amorphous silicon membrane battery low light level according to claim 1 is characterized in that it is the CH that mixes that described carbon mixes in the deposition raw material 4Gas.
3. a kind of method that improves the response of the amorphous silicon membrane battery low light level according to claim 1 and 2 is characterized in that according to following parameter deposition I layer:
Temperature is 180-260 ℃;
Deposition power density is 0.006-0.03W/cm 2
Deposition pressure is 60-330Pa;
H 2: SiH 4Thinner ratio be 2-20:1;
CH 4: SiH 4Gas flow ratio 7-70:100.
4. a kind of method that improves the response of the amorphous silicon membrane battery low light level according to claim 3 is characterized in that described CH 4: SiH 4Gas flow ratio be 13-20:100.
5. a kind of method that improves the response of the amorphous silicon membrane battery low light level according to claim 3 is characterized in that described deposition pressure is 60-150Pa.
CN2011101006478A 2011-04-21 2011-04-21 Method for improving weak light response of amorphous silicon film battery Expired - Fee Related CN102185038B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5213628A (en) * 1990-09-20 1993-05-25 Sanyo Electric Co., Ltd. Photovoltaic device
CN101236794A (en) * 2007-01-29 2008-08-06 北京行者多媒体科技有限公司 Non-crystal silicon carbon film nucleus battery
CN101562220A (en) * 2009-05-22 2009-10-21 河南新能光伏有限公司 Process for manufacturing amorphous silicon thin film solar cell

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5213628A (en) * 1990-09-20 1993-05-25 Sanyo Electric Co., Ltd. Photovoltaic device
CN101236794A (en) * 2007-01-29 2008-08-06 北京行者多媒体科技有限公司 Non-crystal silicon carbon film nucleus battery
CN101562220A (en) * 2009-05-22 2009-10-21 河南新能光伏有限公司 Process for manufacturing amorphous silicon thin film solar cell

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