CN101785093A - 半导体组合件及制造所述组合件的方法 - Google Patents

半导体组合件及制造所述组合件的方法 Download PDF

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Publication number
CN101785093A
CN101785093A CN200880104410A CN200880104410A CN101785093A CN 101785093 A CN101785093 A CN 101785093A CN 200880104410 A CN200880104410 A CN 200880104410A CN 200880104410 A CN200880104410 A CN 200880104410A CN 101785093 A CN101785093 A CN 101785093A
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groove
opening
wire
bonded
molded wafer
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CN101785093B (zh
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蔡瑞光
文传勇
谢永富
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Micron Technology Inc
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Micron Technology Inc
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Abstract

本文中揭示包括互连的半导体装置及组合件及用于形成所述互连的方法。一种制造半导体装置的方法的一个实施例包括在具有成行及列布置的多个裸片(106)的模制晶片(110)的模制部分中形成到中间深度的多个第一侧面沟槽(210)。所述方法还包括从位于与所述第一侧面沟槽对准的区域处的所述模制部分的第二侧面(220)移除材料，其中移除所述材料形成穿过所述模制部分的开口(224)。所述方法进一步包括在所述模制部分的所述第二侧面于所述开口处形成多个电触点及将所述第二侧面触点电连接到所述裸片上的对应接合位点(109)。

Description

半导体组合件及制造所述组合件的方法
技术领域
本发明涉及半导体装置及组合件，以及用于制造所述装置及组合件的方法。
背景技术
半导体处理及封装技术正持续演进以满足对改进的性能以及减小的大小及成本的产业需求。电子产品需要在相对较小空间中具有高装置密度的封装半导体组合件。举例来说，可用于存储器装置、处理器、显示器及其它微特征装置的空间在个人电子装置(例如，手机、膝上型计算机及许多其它产品)中持续减小。因此，存在在仍维持或改进性能且降低成本的同时减小微特征装置的总体大小的需要。
一种用以改进这些微特征装置的性能且减小其大小及成本的技术涉及晶片级封装(“WLP”)。WLP通常指微特征装置在晶片级的封装，而非在从晶片分割装置之后处理及封装个别装置。WLP的一个益处在于其产生具有最小形状因数的芯片大小封装。WLP通过将封装的组件(例如互连元件)限制在装置的占据面积或扇入区域内来实现所述较小大小。这些组件被限制在装置占据面积内，因为所述组件是在将所述装置单一化之前以晶片级形成。WLP还提供制造归因于封装的总体减小的大小及互连的相对较短长度而具有极佳电及热性能的封装的益处。由WLP提供的额外优点包括归因于在晶片级的同时或并行处理及测试的制造容易性及减小的组合件成本。即使WLP可提供以上列出的益处，其仍可能不适于具有高引脚计数或高输入/输出要求的装置。举例来说，装置占据面积的空间限制约束封装中的互连元件的数目及间距。
为了克服此问题，可分割裸片并将其电镀在包括环绕裸片且延伸穿过模制聚合物的互连的组装封装中。虽然将这些互连定位在裸片的占据面积之外可增加互连的数目及/或间距，但此可显著增加处理的成本及复杂性。举例来说，在某些情况下，填充过程可将空气捕集在通孔(via)中，其可导致互连或封装在填充材料及封装硬化时破裂。通孔中的所述非均匀性提供不一致的电连接且损害互连的完整性及封装的性能。另外，通过切除或钻孔过程来形成通孔通常需要以顺序方式形成个别通孔，从而增加处理时间。通过蚀刻过程同时形成通孔可快得多，但蚀刻可导致不一致的通孔大小。还可能难以用蚀刻过程实现通孔的密集分布。此外，通孔形成之后的电镀及填充处理步骤需要额外处理时间。
附图说明
图1A为常规半导体晶片的等角视图。
图1B为根据本发明实施例配置的模制晶片的等角视图。
图2A为根据本发明实施例配置的半导体组合件的侧视横截面图。
图2B及图2C为说明制造根据本发明实施例配置的半导体组合件的方法中的各种阶段的侧视横截面图。
图2D为说明制造根据本发明实施例配置的半导体组合件的方法中的阶段的俯视图。
图2E到图2I为说明制造根据本发明实施例配置的半导体组合件的方法中的各种阶段的侧视横截面图。
图2J为说明制造根据本发明实施例配置的半导体组合件的方法中的阶段的俯视图。
图3A为根据本发明实施例配置的半导体组合件的侧视横截面图。
图3B及图3C为说明制造根据本发明实施例配置的半导体组合件的方法中的各种阶段的侧视横截面图。
图4A为根据本发明另一实施例配置的半导体组合件的侧视横截面图。
图4B为说明制造根据本发明实施例配置的半导体组合件的方法中的阶段的俯视图。
图4C为说明制造根据本发明实施例配置的半导体组合件的方法中的阶段的侧视横截面图。
图4D为根据本发明实施例配置的堆叠半导体组合件的等角视图。
图5为制造根据本发明又一实施例配置的半导体组合件的过程的流程图。
图6为并入有根据本发明其它实施例配置的半导体组合件的系统的示意图。
具体实施方式
本发明的若干实施例针对封装的半导体装置、组合件及形成所述装置及组合件的方法。下文参考特定结构及形成所述装置及组合件的方法描述本发明的许多细节。术语“半导体装置”及“半导体组合件”始终用以包括多种制品，包括(例如)具有有源组件的半导体晶片、个别集成电路裸片、封装的裸片及呈堆叠配置的半导体装置或组合件。在图1A到图6及随后的正文中陈述某些实施例的许多特定细节以提供对这些实施例的透彻理解。在图1A到图6中，相同参考字符指代相同组件，且因此，将不参考图式重复对这些组件中的许多者的描述。若干其它实施例可具有不同于此部分中所描述的配置、组件或过程的配置、组件或过程。因此，所属领域的技术人员将了解，可存在额外实施例，或所述实施例可在无下文所描述的若干细节的情况下实践。
图1A为具有第一侧面102、第二侧面104及多个半导体装置或裸片106的常规半导体晶片100的等角视图。裸片106可包括(例如)动态或静态随机存取存储器、快闪存储器、微处理器、成像器或另一类型的专用集成电路。个别裸片106可包括位于第一侧面102处的多个接合位点108，其用以电连接裸片106与其它组件。如下文所阐释，接合位点108可包括裸片106的第一侧面102处的交错配置。通过边界线107描绘裸片106，且在沿边界线107进行分割以单一化裸片106之前处理裸片106并将其组装在晶片100上。
在从晶片100单一化裸片106之后，可将裸片106嵌入以晶片形式配置的模料中，如图1B中所说明。更明确地说，图1B为包括第一侧面112及第二侧面114的模制晶片110的等角视图。模制晶片110由模料116构成，模料116可包括(例如)热固性物、热塑性物、热固性物及热塑性物的杂化型式，或其它适合模料。模制晶片110还包括单一化的裸片106(个别地识别为第一裸片106a、第二裸片106b等)。在所说明的实施例中，接合位点108位于模制晶片110的第一侧面112，且裸片106以栅格状图案定位且彼此由模料116中的通路(lane)隔开。举例来说，如图1B中所说明，裸片之间的通路可包括于第一方向上在裸片106之间延展的行118a及大致横穿行118a的于第二方向上在裸片106之间延展的列118b。所属领域的技术人员将了解，将裸片之间的通路或间隔描述为“行”及“列”是出于说明的目的且未必要求行及列的水平或垂直配置。模料116中的行118a及列118b提供环绕裸片106的额外空间以形成互连结构或其它组件。归因于晶片100材料的成本约束，在晶片100级(展示于图1A中)，这些互连结构通常不形成于裸片106之间。因此，下文描述的组合件及方法利用图1B中所说明的模制晶片110配置来形成与裸片106相关联的互连结构。
图2A说明经处理且从模制晶片110单一化的半导体组合件200的一个实施例。更明确地说，图2A为包括嵌入模料116中的裸片106中的一者的半导体组合件200的侧视横截面图。组合件200包括从组合件200的第一侧面202延伸到第二侧面204的互连结构或电连接器248(个别地识别为第一电连接器248a及第二电连接器248b)。在此实施例中，电连接器248可具有延伸穿过模料116中的凹陷或开口224的引线接合250。
个别引线接合250可由导电材料构成，例如镍、铜、金、银、铂、这些金属的合金及/或适于引线接合或类似技术的任何其它导电材料。可基于装置特定处理器或性能需要来选择引线接合250的特性。举例来说，引线接合250可具有经选择以满足性能及集成要求的直径、几何形状(例如，圆形横截面或平坦横截面)及/或弹性模数。引线接合250将位于第一侧面202处的个别对应接合位点108(个别地识别为接合位点108a及以虚线展示的第二接合位点108b)连接到位于第二侧面204处的对应触点230。图2A中所说明的第二接合位点108b在图2A的平面外，但其出于说明的目的而以虚线展示。如图2D及图2J中所说明，在某些实施例中，接合位点108可彼此交错或对准。
触点230可包括安置在紧接第二侧面204的开口224中的导电材料232(例如，焊料)。在某些实施例中，触点230可大致与第二侧面204共面，如图2A所示。然而，在其它实施例中，触点230可从第二侧面204凹入，或从第二侧面204突出且形成凸块以促进组合件的堆叠。触点230可安置于形成于第一侧面202中的沟槽210与形成于第二侧面204中的沟道220(其中仅一者展示于图2A中)之间的相交处。在图2A中所说明的实施例中，沟槽210大致垂直于图2A的平面延展且沟道220大致平行于图2A的平面延展。引线接合250的第一部分252附接到触点230或嵌入触点230中，且引线接合250的第二部分254附接到对应接合位点108。组合件200进一步包括安置在组合件200的第一侧面202上的介电囊封剂258，其至少部分地覆盖引线接合250及接合位点108。介电材料258可使连接器248电隔离且支撑引线接合250。
如下文所详细阐释，组合件200并入有来自WLP及重新配置的模制晶片110的处理益处，同时仍提供可以相对简化的处理步骤形成的高质量互连。举例来说，并非切除、蚀刻或钻出个别通孔，而是在第一侧面沟槽210与对应第二侧面沟道220的相交处形成穿过模料116的开口224。另外，在图2A所示的实施例中，电连接器248包括连续的引线接合250，其提供穿过组合件200的均匀电连接，而不需要形成、电镀及填充与常规互连相关联的通孔的复杂过程。
在图2A中所说明的实施例中，组合件200及电连接器248已完全形成。以下描述的图2B到图2J说明形成图2A的组合件200的方法中的各种技术及阶段。图2B为沿图1B的线A-A的组合件200的横截面图，其说明处理环绕第一裸片106a及第二裸片106b的模料116的阶段。在此阶段，移除模料116的一部分以在第一裸片106a与第二裸片106b之间的行118a中形成一个或一个以上沟槽210(个别地识别为第一沟槽210a及第二沟槽210b)。沟槽210形成于第一侧面202处且延伸到模料中的中间深度。更明确地说，模料116具有第一厚度T1，且第一裸片106a及第二裸片106b各自具有小于第一厚度T1的第二厚度T2。第一沟槽210a及第二沟槽210b各自具有小于模料116的第一厚度T1且等于或大于裸片106的第二厚度T2的模料116中的第一深度D1。因此，个别沟槽210可比个别裸片106深地延伸到模料116中，而不一路延伸穿到组合件200的第二侧面204。
在某些实施例中，形成沟槽210可包括用切割装置(未图示)(例如，晶片锯、刀片、激光、流体喷射、蚀刻剂或适于移除模料116的受控制部分的其它工具)部分地分割模料116。举例来说，为了形成第一沟槽210a及第二沟槽210b，两个隔开的切割装置可在单次轮回中移除行118a中的对应模料116。在其它实施例中，单一切割装置可通过进行多次轮回且在轮回之间重新定位切割装置及/或晶片来移除模料116。在某些实施例中，可在行118a中形成单一沟槽210(而非第一沟槽210a及第二沟槽210b)，其具有与第一沟槽210a与第二沟槽210b的外壁之间的宽度大致相同的宽度(如图2B中的虚线所示)。另外，虽然图2B中所说明的沟槽210具有大致直线的横截面，但所属领域的技术人员将了解，沟槽210可包括其它配置，包括(但不限于)弯曲侧壁或沟槽210的侧壁之间的平滑过渡。
图2C说明在于第一侧面202中形成沟槽210之后的阶段，在所述阶段中从第二侧面204选择性地移除模料116以在与沟槽210的相交处形成开口224。更明确地说，图2C为沿图1B的线B-B的组合件200的横截面图。出于说明的目的，将图2C所示的组合件200倒置，使得第二侧面204面朝上。另外，裸片106及接合位点108在图2C的平面外且以虚线展示以便于参考。在此配置中，在大致横穿上述沟槽210(仅第一沟槽210a展示于图2C中)的方向上形成多个第二侧面沟道220。可以大致类似于上文关于沟槽210所描述的方式的方式形成沟道220。在某些实施例中，沟道220可大致类似于沟槽210，且出于在两者之间进行区分的清楚性目的称其为沟道而非沟槽。
在图2C中所说明的实施例中，沟道220不形成于第一裸片106a与第二裸片106b之间的列118b中，而是以预选定间距形成于个别裸片106的占据面积内。在其它实施例中，沟道220可形成于第二侧面204处的任何预选定位置处。沟道220具有从第二侧面204起的到模料116中的第二深度D2，所述深度不贯穿裸片106。然而，沟槽210的第一深度D1与沟道220的第二深度D2的组合等于或大于模料116的第一厚度T1。因此，第一侧面沟槽210与第二侧面沟道220之间的相交形成开口224且提供穿过模料116的通道(access)。
图2D为模制晶片110的俯视图，其参考个别裸片106说明沟槽210及相交沟道220的配置。在处理中的此阶段，开口224已形成于裸片106之间的行118a中。在图2D中所说明的实施例中，第一侧面沟槽210在裸片106之间的行118a中相互平行地延展且彼此隔开。第二侧面沟道220(以虚线展示)大致垂直于沟槽210且在个别裸片106的占据面积内延展。沟槽210与沟道220之间的相交因此在行118a中形成开口224。然而，在其它实施例中，沟道220及沟槽210可经配置以在个别裸片106的外围周围而不仅在其之间的行118a中形成开口224。
上述形成开口的配置及方法提供形成穿过模料116的开口224的相对较快且节省成本的方法。举例来说，在形成第一侧面沟槽210之后切割单一第二侧面沟道220通过穿过模料116的仅单次轮回于相交处产生多个开口224。另外，移除沟槽210及沟道220的模料116使用现存方法且避免与常规通孔技术相关联的挑战中的一些。举例来说，用激光钻孔可产生具有大于出口直径的入口直径的非均匀通孔。与钻出通孔相关联的另一挑战包括不合需要的熔融且重新固化的模料，其可保持在通孔的入口侧。此外，充分电镀并填充通过钻孔技术形成的具有小纵横比的通孔还可提供重大挑战。
在形成沟槽210及沟道220之后，图2E及图2F说明于组合件200的第二侧面204处形成触点230的阶段。更明确地说，图2E为沿图1B的线B-B的组合件200的侧视横截面图，且图2F为沿图1B的线A-A的组合件200的侧视横截面图。一起参看图2E及图2F，触点230是通过将导电材料232安置在与对应开口224对准的沟道220中而形成。
出于说明的目的，图2E说明将导电材料232安置在同一组合件200中的不同方法。举例来说，在某些实施例中，导电材料232可通过印刷、以导电喷墨安置、溅镀或其它方法而沉积在或嵌入开口224中。如关于图2E的左侧所示，印刷组合件236将导电材料232沉积在沟道220中。印刷组合件236可包括刮刀238及具有与沟道220及对应开口224对准的孔242的模板240。随着刮刀238通过模板240，穿过模板240中的对应孔242来安置离散量的导电材料232以形成触点230。在其它实施例中且如关于图2E的右侧所示，导电喷墨234可将离散量的导电材料232嵌入开口224中以形成触点230。
如图2F中所说明，导电材料232不填充整个沟道220(沟道中的一者展示于图2F中)，且触点230大致与对应开口224对准。因此，触点230是可达到的以从第一侧面202穿过沟槽210进行进一步处理。形成触点230的导电材料232可包括焊料膏或可经配置以在开口224处大致保持在离散位置中的其它导电材料。举例来说，为了防止导电材料232延展或涂抹到沟槽210或沟道220中，可修改导电材料232的冶金术。此外，凸块下金属化(未图示)可应用于沟道220中的模料116的侧壁，以确保导电材料232与模料116及与组合件200相关联的其它金属化粘附。
在图2E及图2F中所说明的实施例中，触点230大致与第二侧面204共面，且因此可提供对组合件200的外部电存取。举例来说，在某些实施例中，例如焊料球的导电部件(未图示)可附接到触点230。然而，在其它实施例中，触点230可凹入第二侧面204中或从第二侧面204突出。举例来说，触点232可为凸块或凸起触点，其从第二侧面204突出以促进组合件200与其它装置或组合件的堆叠。
如图2G及图2H中所说明，在形成紧接第二侧面204的触点230之后，继续电连接器248的处理。更明确地说，图2G及图2H为沿图1B的线A-A的组合件200的侧视横截面图，其说明连接第一侧面202与第二侧面204之间的引线接合250的过程。参考关于图2G的右侧所示的第二裸片106b，引线接合250经附接到触点230且延伸穿过开口224及第二沟槽210b以连接到接合位点108。如关于图2G的左侧所示，引线接合工具256处于进行此连接的过程中。举例来说，工具256的颈状部分258可插入第一沟槽210a中且穿过开口224以将引线接合250直接附接到触点230。在某些实施例中，工具256可将引线接合250的第一部分252嵌入触点230中。举例来说，工具256可用引线接合250的第一部分252刺穿导电材料232。然而，在其它实施例中，接合工具256本身可刺穿导电材料232且接着将引线接合250的第一部分252注入到触点230中。工具256接着缠绕引线接合250且将引线接合250的第二部分254附接到裸片106a的接合位点108。
在某些实施例中，在将引线接合250附接在对应触点230与接合位点108之间之后，触点230可经回流，如图2H中所说明。回流触点230可帮助确保触点230与引线接合250的插入或嵌入的第一部分252的充分附接。在形成电连接器248之后，可将介电囊封剂258安置于第一侧面202处，如图2H中所说明。囊封剂258可保护裸片106不受污染(例如，归因于湿气、粒子等)。囊封剂258还可使引线接合250及第一侧面202处的其它导电特征稳定化且电隔离。在某些实施例中，所述囊封剂可由介电材料构成且在模制过程中安置在组合件200上。
接下来转向图2I及图2J，从模制晶片110单一化具有对应裸片106及组件的个别组合件200。更明确地说，图2I为沿图1B的线A-A的单一化的组合件200的侧视横截面图，且图2J为单一化的组合件200的俯视图。然而，出于说明的目的，图2J不展示第一侧面202处的囊封剂258以更好地说明个别电连接器248。一起参看图2I及图2J，可单一化组合件200，以使电连接器248在组合件200的外围处被封闭或暴露。举例来说，可通过沿个别裸片106之间的行118a及列118b切割图1B的模制晶片110而将组合件200单一化。在某些实施例中，行118a在对应沟槽210之间被大致平分。然而，在其它实施例中，可沿行118a(或列118b)单一化个别裸片106，以在个别裸片106及电连接器248的外围周围留下预订量的模制材料116。举例来说，如关于图2I及图2J的左侧所示，单一化的组合件200包括侧壁部分258，其将引线接合250封闭在第一侧面202与第二侧面204之间的模料116内。然而，在其它实施例中，可单一化组合件200，以使所述连接器未被模料116封闭且在组合件200的外围处暴露。举例来说，如出于说明的目的关于图2I及图2J的右侧在同一组合件200上所示，在于单一化过程期间将模制材料116移除之后，暴露电连接器248。暴露组合件200的侧面处的电连接器248提供用以在处理的稍后阶段中电连接到的另一位置的益处。
图3A为根据另一实施例配置的组合件300的横截面侧视图。组合件300大致类似于以上关于图1A到图2J描述的组合件200；然而，在此实施例中，组合件300具有电连接器348(个别地识别为第一电连接器348a及第二电连接器348b)，其包括具有形成第二侧面204处的触点330的对应变形的第一部分352的引线接合350。胜于通过将导电材料232沉积在开口224中来形成上述触点230，图3A中所说明的触点330是用引线接合350的第一部分352形成。因此，电连接器348包括将第一侧面202连接到第二侧面204的连续且不中断的引线接合350。
出于说明的目的，关于图3A的右侧展示第一电连接器348a，且关于图3A的左侧在同一组合件300上展示第二电连接器348b。第一电连接器348a包括延伸穿过组合件300且具有大致变形成勾状部件358的第一部分352(具有大致弯曲或永久偏转的配置)的引线接合350。引线接合350延伸穿过沟槽210与沟道220的相交处的开口224，且引线接合350的第二部分354经附接到对应接合位点108a。引线接合350的第一部分352无需形成实际勾状物，然而，第一部分352可变形且经配置以使得其至少部分地使引线接合350保持紧接第二侧面204。因此，引线接合350的变形的第一部分352在第二侧面204处形成触点330且提供对组合件300的外部电存取。
除了引线接合350的第一部分352变形以大致包括球状部件356之外，关于图3A的左侧说明的第二电连接器348b大致类似于第一电连接器348a。球状部件356是由引线接合350的第一部分352形成且具有至少与开口224的横截面尺寸一样大的横截面尺寸。因此，球状部件256可经配置以至少部分地使引线接合350的第一部分352保持紧接第二侧面204以形成触点330。
在以上所述且在图3A中说明的实施例中，触点330可大体上与第二侧面204共面或从第二侧面204突出。举例来说，勾状部件358可经形成以大致与第二侧面204共面，且球状部件356可经形成以从第二侧面204突出。然而，在其它实施例中，引线接合350的第一部分352(包括勾状部件358或球状部件356)可经配置以形成至少部分地凹入组合件300的第二侧面204中的触点330。
如下文所阐释且关于图3B及图3C更详细描述，电连接器348可提供穿过组合件300且在组合件300内的高质量互连，其可以节省成本的方式制造。举例来说，电连接器348可用现存半导体处理及引线接合技术形成。另外，电连接器348包括连续且固态的引线接合350(包括第一部分352处的触点330)，以形成从第一侧面202延伸到第二侧面204的电连接器348。
图3B说明处理阶段，在所述阶段，将引线接合350的第一部分352偏转或以其它方式变形成引线接合350的第一部分352处的勾状部件358。如上文关于图1A到图2J所描述，开口224形成于第一侧面沟槽210与第二侧面沟道220之间的相交处。因此，引线接合工具256可定位在沟槽210中紧接开口224处且使引线接合350的第一部分352延伸以从第二侧面204突出。偏转部件370可使第一部分352永久偏转以在第二侧面204上形成触点330。举例来说，偏转部件370可在由箭头372指示的方向上在第二侧面204处移动以使引线接合350的第一部分352弯曲。在其它实施例中，偏转部件370可在其它方向上移动以形成第一部分352的勾状部件358。在使第一部分352变形之后，将引线接合350的第二部分354附接到第一侧面202处的对应接合位点108。
图3C说明电连接器348的处理阶段，其中在引线接合350的第一部分352处形成球状部件356。在此实施例中，紧接从第二侧面204突出的引线接合350的第一部分352定位电子火焰熄灭(electronic flame off)(“EFO”)工具360。EFO工具362紧接第一部分352发出火花362或其它热源且形成无空气球或第一部分352处的球状部件356。随后，引线接合工具256将引线接合350的第二部分354附接到第一侧面202处的对应接合位点108。因此，球状部件356在第二侧面204处形成触点330。
对组合件300的处理可以类似于上文关于图1A到图2J描述的技术及实施例的方式继续。举例来说，可将囊封剂258安置在组合件300的第一侧面202处，且可使用上述技术从模制晶片110(展示于图1B中)单一化个别组合件。
图4A为根据另一实施例配置的组合件400的横截面图。图4A所示的组合件400的某些方面大致类似于上述组合件；然而，在此实施例中，组合件400具有电连接器448，其包括将第一侧面202电连接到第二侧面204的重新分配结构450，而非引线接合250。更明确地说，每一重新分配结构450可包括导电层452，其经由第一侧面沟槽410而电连接到第二侧面触点430。在某些实施例中，第一侧面沟槽410的侧壁部分可包括导电镀层454以促进导电层452与触点430之间的电连接。然而，在其它实施例中，导电层452可至少部分地填充与触点430对准的每一沟槽410的一部分，以直接连接到触点430。类似于上述实施例，组合件400还可包括安置在重新分配结构450上紧接第一侧面202处的囊封剂258。
与图4A中所说明的组合件400相关联的处理步骤可大致类似于上述处理步骤；然而，在此实施例中，形成穿过模料116的开口424可为不同的。举例来说，如下文参考说明代表性处理阶段的图4B到图4D所描述，单一沟槽410(而非第一平行沟槽210a及第二平行沟槽210b)可在个别裸片106之间形成于第一侧面202中。另外，个别孔420(而非第二侧面沟道220)形成于第二侧面204中以横断沟槽410且形成开口424。
更明确地说，图4B为模制晶片110的仰视图，其参考个别裸片106(以虚线展示)说明沟槽410(以虚线展示)及相交孔420的配置。在处理的此阶段中，于第一侧面202处在行118a中形成单一沟槽410。在形成沟槽410之后，以预选定间距在第二侧面204中形成孔420以横断沟槽410。在某些实施例中，用钻孔、激光、蚀刻剂、流体喷射或其它适合技术形成孔420。孔420可具有大致横穿沟槽410定向的椭圆形形状。类似于上述实施例，沟槽410及孔420的组合深度(未图示)可大于或等于模料116的厚度以产生开口424。
在形成开口424之后，图4C说明紧接第一侧面202形成重新分配结构450的阶段。在某些实施例中，将导电层452直接耦合到对应接合位点108及位于沟槽410的侧壁部分处的导电镀层454(以虚线展示)。然而，在其它实施例中，导电层452可至少部分地填充与开口424对准的沟槽410的一部分(以虚线展示)以与第二侧面204处的触点430(图4C中未展示)直接连接。在沉积导电层452以保护裸片106且使组合件的组件(例如，重新分配结构450的导电层452)电隔离之后，可将介电囊封剂258(图4C中未展示)安置在第一侧面202处。
在紧接第一侧面202安置重新分配结构450之后，可将个别触点430嵌入于第二侧面204处以完成穿过组合件400的电连接器448。为了形成触点430，可将导电材料432(展示于图4A中)的离散部分安置在从第二侧面204起且与开口424对准的个别孔420中。导电材料432可包括类似材料且可以大致类似于上文参考图2E描述的方式的方式安置。
图4D为呈堆叠配置的单一化组合件400(个别地识别为第一组合件400a及第二组合件400b)的等角视图。在所说明的实施例中，第二组合件400b的第一表面202b可堆叠在第一组合件400a的第二表面204a上。可使用上述方法单一化第一组合件400a及第二组合件400b。在某些实施例中，从模制晶片110(例如，参见图4B)单一化裸片106可包括沿行118a大致平分沟槽410及孔420。因此，在单一化组合件400之后，电连接器448可在组合件400的侧面部分处暴露以电连接到其它组件、装置及组合件。
在某些实施例中，可以不同次序执行上文参考图4B到图4D描述的处理步骤。举例来说，可在于第一侧面202中形成沟槽410之前在第二侧面204中形成孔420。因此，孔420可从第二侧面204钻到中间深度且随后以导电材料432填充而形成触点430。在填充孔420之后，可在第一侧面202中形成沟槽410以横断嵌入的触点430。重新分配结构450可接着被安置在第一侧面202处且使第一侧面202与第二侧面204之间的电连接器448完整。
图4A到图4D中所说明的电连接器448还并入有WLP益处且利用裸片106周围的间隔以通过相对简化的处理步骤提供可靠且高质量的互连。举例来说，在沟槽410与孔420的相交处形成开口424，而非钻孔或蚀刻穿过整个组合件。另外，用孔420横断沟槽410(或反之亦然)减小这些个别特征的深度及纵横比，此可减小稍后处理步骤的复杂性。因此，所说明的实施例可通过使用简化过程来改进电连接器448的可制造性及可靠性。
图5为用于形成半导体组合件的方法或过程500的实施例的流程图。在此实施例中，过程500包括在具有成行及列布置的多个裸片的模制晶片的模制部分中形成到中间深度的多个第一侧面沟槽(框505)。在某些实施例中，此步骤可包括在裸片之间的每一行或列中形成单一沟槽。然而，在其它实施例中，此步骤可包括在裸片之间的每一行或列中形成两个或两个以上平行且隔开的沟槽。
所述过程进一步包括从位于与第一侧面沟槽对准的区域处的模制部分的第二侧面移除材料(框510)。从第二侧面移除材料形成穿过模制晶片的模制部分的开口。在某些实施例中，此步骤可包括形成到中间深度的第二侧面沟槽或沟道。所述第二侧面沟道可大致横穿所述第一侧面沟槽。然而，在其它实施例中，此步骤可包括在模料中与所述第一侧面沟槽对准的个别位置处形成从第二侧面到中间深度的孔。第一侧面沟槽与第二侧面沟道(或第二侧面孔)的深度的组合大于模制晶片的模料的厚度以形成穿过模料的开口。
所述过程进一步包括在模制部分的第二侧面于开口处形成多个电触点(框515)。在某些实施例中，此步骤可包括将离散量的导电材料(例如，焊料)从第二侧面安置在所述开口中。然而，在其它实施例中，此步骤可包括穿过开口插入引线接合的一部分及使引线接合的所述部分在第二侧面处变形。所述过程进一步包括将第二侧面触点电连接到裸片上的对应接合位点(框520)。在某些实施例中，此步骤可包括将引线接合附接到第二侧面处的触点且附接到第一侧面处的对应接合位点。在包括第二侧面处的引线接合的变形部分的实施例中，此步骤可包括将引线接合的远离变形部分的一部分附接到第一侧面处的对应接合位点。在又一其它实施例中，此步骤可包括将重新分配结构安置于第一侧面处。
图5中所说明的过程可在相对较短的时间周期中完成，因为不必形成、镀敷及填充个别通孔以产生组合件的第一侧面与第二侧面之间的电连接。而是，相交的沟槽与沟道可快速地产生穿过模料的多个开口。举例来说，在形成第一侧面沟槽之后，形成单一第二侧面沟道在单次轮回中于相交处产生多个开口。
可将具有上文参考图1A到图5描述的电连接器的组合件中的任一者并入到各种各样较大及/或较为复杂的系统中的任一者中，所述系统的代表性实例为图6中示意展示的系统600。系统600可包括处理器602、存储器604(例如，SRAM、DRAM、快闪及/或其它存储器装置)、输入/输出装置606及/或其它子系统或组件608。具有上文参考图1A到图5描述的电连接器的组合件可包括于图6所示的组件中的任一者中。所得系统600可执行广泛多种计算、处理、存储、感测、成像及/或其它功能中的任一者。因此，代表性系统600包括(但不限于)计算机及/或其它数据处理器，例如，桌上型计算机、膝上型计算机、因特网设备、手持式装置(例如，掌上型计算机、可佩戴计算机、蜂窝式或移动电话、个人数字助理、音乐播放器等)、多处理器系统、基于处理器的或可编程的消费电子产品、网络计算机及小型计算机。其它代表性系统600可容纳于单一单元中或分布在多个互连的单元中(例如，经由通信网络)。系统600的组件因此可包括局部及/或远程存储器存储装置及广泛多种计算机可读媒体中的任一者。
从前述内容将了解，虽然为说明起见本文中已描述特定实施例，但在不偏离本发明的情况下可进行各种修改。举例来说，可将一个或一个以上额外组合件堆叠在上述实施例中的任一者中的组合件上以形成堆叠组合件。在上下文允许的情况下，单数或复数术语还可分别包括复数或单数术语。此外，除非词语“或”明确限制为仅意味着单一项而排除关于列表或者两个或两个以上项中的其它项，否则“或”在所述列表中的使用将被解释为包括(a)所述列表中的任一单一项，(b)所述列表中的所有项，或(c)所述列表中的项的任何组合。另外，术语“包含”始终用以意味着包括至少所陈述的特征，以使得并不排除任何更大数目的相同特征或额外类型的特征。
在不偏离本文中所揭示的实施例的情况下可进行各种修改。举例来说，可在其它实施例中组合或消除特定实施例的背景下描述的特征。此外，尽管已在某些实施例的背景下描述与所述实施例相关联的优点，但其它实施例也可展现所述优点，且并非所有实施例需要必要地展现所述优点以处于本发明的范围内。举例来说，可在模料中形成具有变化宽度及深度的沟槽或沟道。因此，本发明不受除如由随附权利要求书所限制之外的限制。

Claims (35)

1.一种制造半导体装置的方法，其包含：
在模制晶片的第一侧面处的模制材料中在嵌入所述模制材料中的第一半导体裸片与第二半导体裸片之间的通路中形成至少一个沟槽，其中所述第一及第二裸片具有位于所述第一侧面处的接合位点；
在与所述沟槽重叠的部分处从所述模制晶片的与所述第一侧面相对的第二侧面移除材料，其中移除所述材料形成穿过所述模制晶片的多个第一开口；
形成经由穿过所述模制晶片的对应第一开口而从所述第一及第二裸片的个别接合位点延伸到所述模制晶片的所述第二侧面的电连接器；以及
单一化所述第一及第二裸片。
2.根据权利要求1所述的方法，其中：
所述沟槽为第一沟槽且所述方法进一步包含在所述模制晶片的所述第一侧面中在所述通路中形成第二沟槽，其中所述第二沟槽与所述第一沟槽隔开且大致平行于所述第一沟槽；且
从所述第二侧面移除材料包括在大致横穿所述第一及第二沟槽的方向上在所述模制晶片的所述第二侧面中形成沟道，其中形成所述沟道分别在所述沟道与所述第一及第二沟槽之间的相交处形成穿过所述模制晶片的所述第一开口及多个第二开口。
3.根据权利要求2所述的方法，其中所述第一沟槽、所述第二沟槽及所述沟道在所述模制晶片中各自具有小于所述模制晶片的厚度的深度。
4.根据权利要求2所述的方法，其中形成电连接器包含用穿过所述第一开口的第一引线接合将所述第一裸片的对应接合位点耦合到所述第二侧面及用穿过所述第二开口的第二引线接合将所述第二裸片的对应接合位点耦合到所述第二侧面。
5.根据权利要求4所述的方法，其进一步包含将介电材料安置在所述模制晶片的所述第一侧面处及在所述第一及第二引线接合的至少一部分及所述第一及第二裸片上。
6.根据权利要求4所述的方法，其中：
所述第一开口包括侧壁部分且所述第二开口包括侧壁部分；且
单一化所述裸片包含切开所述第一与第二沟槽之间的所述模制晶片及至少部分地移除所述第一开口的所述侧壁部分及所述第二开口的所述侧壁部分，以使得所述第一及第二引线接合分别在所述单一化的第一及第二裸片的外围处暴露。
7.根据权利要求2所述的方法，其进一步包含用导电材料至少部分地填充所述第一开口及所述第二开口，且其中将所述第一及第二裸片的所述接合位点电连接到所述模制晶片的所述第二侧面包括：
将第一引线接合的第一部分嵌入对应第一开口中的所述导电材料中且穿过所述第一开口将所述第一引线接合的与所述第一部分相对的第二部分连接到所述第一裸片的对应接合位点；以及
将第二引线接合的第一部分嵌入对应第二开口中的所述导电材料中且穿过所述第二开口将所述第二引线接合的与所述第一部分相对的第二部分连接到所述第二裸片的对应接合位点。
8.根据权利要求7所述的方法，其中将所述第一引线接合的所述第一部分嵌入所述导电材料中包括用所述第一引线接合的所述第一部分刺穿所述导电材料。
9.根据权利要求7所述的方法，其中将所述第一引线接合的所述第一部分嵌入所述导电材料中包括用引线接合工具刺穿所述导电材料及将所述第一部分注入到所述导电材料中。
10.根据权利要求7所述的方法，其中至少部分地填充所述第一开口及所述第二开口包括将离散量的所述导电材料安置在所述第一及第二开口中的每一者中。
11.根据权利要求7所述的方法，其中所述第一及第二开口中的所述导电材料大体上与所述第二侧面共面。
12.根据权利要求2所述的方法，其中形成电连接器包括：
将第一引线接合插入到所述第一开口中的一者中，以使得所述第一引线接合的第一部分穿过所述模制晶片从所述第二侧面突出；
使所述第一引线接合的所述第一部分变形，其中所述变形的第一部分至少部分地防止所述引线接合穿过所述第一开口收缩；以及
将所述第一引线接合的与所述第一部分相对的第二部分连接到所述第一裸片的对应接合位点。
13.根据权利要求12所述的方法，其中使所述第一引线接合的所述第一部分变形包括用电子火焰熄灭在所述第一部分处形成球状部件。
14.根据权利要求13所述的方法，其中所述球状部件从所述模制晶片的所述第二侧面突出。
15.根据权利要求12所述的方法，其中使所述第一引线接合的所述第一部分变形包括永久偏转所述第一部分。
16.根据权利要求1所述的方法，其中从所述第二侧面移除材料包括移除与所述沟槽对准的个别位置处的所述模制晶片的离散部分。
17.根据权利要求16所述的方法，其中移除所述模制晶片的离散部分包括用激光钻穿所述模制晶片。
18.根据权利要求16所述的方法，其中形成电连接器包括：
将导电材料安置在所述第一开口中紧接所述模制晶片的所述第二侧面处；以及
在所述第一裸片的所述接合位点与所述对应第一开口之间形成重新分配结构。
19.根据权利要求18所述的方法，其中所述重新分配结构至少部分地填充所述第一开口。
20.根据权利要求18所述的方法，其中在形成所述第一开口之后且在将所述导电材料安置在所述第一开口中之后形成所述沟槽。
21.根据权利要求18所述的方法，其中所述沟槽横断安置在所述第一开口中的所述导电材料。
22.一种制造半导体装置的方法，其包含：
在具有成行及列布置的多个裸片的模制晶片的模制部分中形成到中间深度的多个第一侧面沟槽，其中个别裸片包括多个接合位点且所述第一侧面沟槽沿所述裸片之间的所述行或列中的一者彼此平行；
从位于与所述第一侧面沟槽对准的区域处的所述模制部分的背面移除材料，其中移除所述材料形成穿过所述模制部分的开口；
在所述模制部分的所述背面于所述开口处形成多个电触点；以及
将所述背面触点电连接到所述裸片上的对应接合位点。
23.一种在嵌入模制晶片中的两个或两个以上半导体裸片之间形成完全延伸穿过所述模制晶片的厚度的一个或一个以上孔的方法，所述方法包含：
在所述两个或两个以上裸片之间在第一方向上部分地分割所述模制晶片的第一侧面，其中部分地分割所述第一侧面形成具有小于所述模制晶片的所述厚度的深度的沟槽；以及
从所述模制晶片的与所述第一侧面相对的第二侧面移除所述模制晶片的一部分且从所述第二侧面横断所述沟槽。
24.根据权利要求23所述的方法，其中：
所述沟槽为第一沟槽，且其中所述方法进一步包含：
在所述两个或两个以上裸片之间平行于所述第一沟槽且与所述第一沟槽隔开地部分分割所述模制晶片的所述第一侧面以形成第二沟槽；且其中
移除所述模制晶片的所述部分包括在大致横穿所述第一方向的第二方向上部分地分割所述第二侧面及形成横断所述第一及第二沟槽的沟道。
25.根据权利要求24所述的方法，其中：
所述第一沟槽具有第一深度；
所述第二沟槽具有所述第一深度；且
所述沟道具有第二深度，其中所述第一深度与所述第二深度的组合至少等于所述模制晶片的所述厚度。
26.根据权利要求23所述的方法，其中从所述第二侧面移除所述模制晶片的一部分包含引导激光、引导流体喷射及将蚀刻剂安置在所述第二侧面的所述部分上中的至少一者。
27.一种中间制造物件，其包含：
模制晶片，其具有成形为具有第一侧面及第二侧面的晶片的模制材料、在所述模制材料中的第一半导体裸片及在所述模制材料中的与所述第一裸片隔开的第二半导体裸片；
第一沟槽，其位于所述模制晶片的所述第一侧面中在所述第一与第二裸片之间，其中所述第一沟槽具有小于所述模制晶片的厚度的深度；以及
凹陷，其位于与所述第一沟槽对准的所述模制晶片的所述第二侧面中，其中所述凹陷具有小于所述模制晶片的所述厚度的深度且在与所述第一与第二裸片之间的所述第一沟槽的相交处形成穿过所述模制晶片的第一开口。
28.根据权利要求27所述的物件，其进一步包含：
第二沟槽，其位于所述模制晶片的所述第一侧面中在所述第一与第二裸片之间，其中所述第二沟槽大致平行于所述第一沟槽并与所述第一沟槽隔开且具有近似等于所述第一沟槽的所述深度的深度；且其中
所述凹陷包括在所述模制晶片的所述第二侧面中的大致横穿所述第一及第二沟槽的沟道；其中所述沟道在与所述第一沟槽的所述相交处形成所述第一开口且所述沟道在与所述第二沟槽的相交处形成第二开口。
29.根据权利要求28所述的物件，其进一步包含：
第一触点，其在所述模制晶片的所述第二侧面处定位于所述第一开口中；
第二触点，其在所述模制晶片的所述第二侧面处定位于所述第二开口中；
第一引线接合，其延伸穿过所述第一开口且连接到所述第一裸片及所述第一触点；以及
第二引线接合，其延伸穿过所述第二开口且连接到所述第二裸片及所述第二触点。
30.根据权利要求29所述的物件，其中：
所述第一触点包括安置在所述第一开口中紧接所述第二侧面处的导电材料，且其中所述第一引线接合被嵌入所述第一导电材料中；且
所述第二触点包括安置在所述第二开口中紧接所述第二侧面处的所述导电材料，且其中所述第二引线接合被嵌入所述第二导电材料中。
31.根据权利要求28所述的物件，其进一步包含：
第一引线接合，其连接到所述第一裸片，其中所述第一引线接合延伸穿过所述第一开口且在所述第一引线接合的紧接所述模制晶片的所述第二侧面的末端部分处变形；以及
第二引线接合，其连接到所述第二裸片，其中所述第二引线接合延伸穿过所述第二开口且在所述第二引线接合的紧接所述模制晶片的所述第二侧面的末端部分处变形。
32.根据权利要求31所述的物件，其中所述第一引线接合的所述变形的末端部分包括具有大于所述第一开口的横截面尺寸的横截面尺寸的球状部件，且所述第二引线接合的所述变形的末端部分包括具有大于所述第二开口的横截面尺寸的横截面尺寸的球状部件。
33.根据权利要求31所述的物件，其中所述第一引线接合的所述变形的末端部分包括至少部分地保持所述第一引线的所述末端部分紧接所述模制晶片的所述第二侧面的勾状部件，且所述第二引线接合的所述变形的末端部分包括至少部分地保持所述第二引线接合的所述末端部分紧接所述模制晶片的所述第二侧面的勾状部件。
34.根据权利要求27所述的物件，其中所述第一半导体、所述第一沟槽及所述第一开口形成并入到半导体系统中的半导体组合件的一部分，所述半导体系统包括处理器、存储器装置及输入或输出装置中的至少一者。
35.一种半导体组合件，其包含：
模料，其具有第一侧面、第二侧面及厚度；
裸片，其嵌入所述模料中，所述裸片具有位于所述模料的所述第一侧面处的接合位点；
沟槽，其位于所述模料中与所述裸片隔开，所述沟槽具有从所述模料的所述第一侧面起的第一深度；
沟道，其位于所述模料中，具有从所述模料的所述第二侧面起的第二深度，其中所述第一与第二深度的组合至少等于所述模料的所述厚度，且其中所述沟道大致横穿所述沟槽且横断所述沟槽以形成穿过所述模料的开口；
触点，其位于所述模料的所述第二侧面处，所述触点定位于所述沟道中且与所述开口对准；以及
电连接器，其延伸穿过所述开口，所述电连接器具有连接到所述裸片的所述接合位点的第一末端部分及连接到所述触点的第二末端部分。
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US7915711B2 (en) 2011-03-29
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JP2010538469A (ja) 2010-12-09
US8362594B2 (en) 2013-01-29
SG150404A1 (en) 2009-03-30
US7674655B2 (en) 2010-03-09
WO2009032539A2 (en) 2009-03-12
KR20100041874A (ko) 2010-04-22
KR101192084B1 (ko) 2012-10-17
TWI387021B (zh) 2013-02-21
WO2009032539A3 (en) 2009-06-04
US20090057843A1 (en) 2009-03-05
US20110175206A1 (en) 2011-07-21
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EP2195831B1 (en) 2021-01-20
EP2195831A2 (en) 2010-06-16

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