CN101540299B

CN101540299B - Device mounting board, semiconductor module and manufacturing method thereof , and portable equipment

Info

Publication number: CN101540299B
Application number: CN2009101346932A
Authority: CN
Inventors: 小林初; 柳瀬康行; 山本哲也; 冈山芳央
Original assignee: Sanyo Electric Co Ltd
Current assignee: Sanyo Electric Co Ltd
Priority date: 2008-01-31
Filing date: 2009-02-01
Publication date: 2013-04-24
Anticipated expiration: 2029-02-01
Also published as: JP5028291B2; JP2009182274A; CN101540299A

Abstract

The invention provides a device mounting board and manufacturing method therefor, a semiconductor module, and portable equipment. The device mounting board includes: an insulating resin layer; a wiring layer disposed on one main surface of the insulating resin layer; and a bump electrode connected electrically to the wiring layer and protruding on a side of the insulating resin layer from the wiring layer. A side surface of the bump electrode is curved inwardly toward the center axis of the bump electrode as viewed in a cross section including the center axis of the bump electrode, and the radius of curvature of the side surface changes continuously from a wiring layer end to a head end of the bump electrode.

Description

Element mounting substrate, semiconductor subassembly and manufacture method thereof and portable set

Technical field

The present invention relates to a kind of element mounting substrate and manufacture method thereof, semiconductor subassembly and manufacture method thereof and portable set.

Background technology

As the method for surface mounting of semiconductor element, known have the electrode at semiconductor element to form solder bump and connect solder bump and the flip-chip installation method of the electrode pad of printed circuit substrate.In addition, as the structure that adopts the flip-chip installation method, known have a for example CSP (Chip Size Package: chip size packages) structure.

In the semiconductor subassembly of CSP structure, poor because of the thermal coefficient of expansion of printed circuit substrate and semiconductor subassembly produces thermal stress between printed circuit substrate and semiconductor subassembly in environment for use etc.Relative therewith, known have a following structure, namely leaving because of the roughly the same direction of the flexible direction of thermal stress with semiconductor chip, and the structure of a plurality of recesses is set at distribution.This is the thermal stress that produces between printed circuit substrate and semiconductor subassembly in environment for use etc. for the difference that relaxes because of the thermal coefficient of expansion of printed circuit substrate and semiconductor subassembly.

On the other hand, in recent years, be accompanied by miniaturization, the high performance of electronic equipment, require the further miniaturization of semiconductor element.Be accompanied by the miniaturization of semiconductor element, the interelectrode thin space that is used for being installed on the printed circuit substrate is indispensable.But in the flip-chip installation method, the bridge joint generation (Block リ Shao ジ development is given birth to) the when size of solder bump self, solder etc. becomes restriction, has limited the thin space of electrode.As the structure that is used for overcoming this restriction, known have a following structure: to be formed on raised structures on the base material as electrode or path, via the insulating resin layers such as epoxy resin with semiconductor element mounting on base material, and the electrode of semiconductor element is connected with raised structures.

In addition, as the structure that is used for overcoming this restriction, known have a following structure: with the raised structures that is formed at the wiring layer that is consisted of by metals such as copper as electrode or path, at base material semiconductor element is installed across insulating resin layers such as epoxy resin, and the electrode of semiconductor element is connected with raised structures.

In addition, known have a following structure: the metal paste projection structure outstanding to seal members such as epoxy resin from the circuit terminal electrode of a first type surface being located at base material, cover circuit terminal electrode and metal paste projection with Ni coating and Au coating.

But, being connected to form in the said structure of the electrode of the raised structures of base material and semiconductor element, the thermal stress that probably can cause the difference because of the thermal coefficient of expansion of base material and semiconductor element to produce concentrates on raised structures.And, thus, probably can crack (be full of cracks) at raised structures, the connection reliability between semiconductor element and the printed circuit substrate is descended.

In addition, being connected to form in the said structure of the electrode of the raised structures of wiring layer and semiconductor element, usually as the material that consists of raised structures, adopt the metals such as copper with conductivity.Therefore, in wiring layer or raised structures and insulating resin layer, thermal coefficient of expansion is different.Consequently, because the variations in temperature in heat treatment or the environment for use produces thermal stress, probably can cause this thermal stress to concentrate on raised structures.And, thus, probably can crack (be full of cracks) at raised structures, the connection reliability between semiconductor element and the printed circuit substrate is descended.

In addition, at the raised structures of the wiring layer of being located at element mounting substrate across the insulating resin layer crimping and the electrode of semiconductor element, and in the structure of superimposed elements board for mounting electronic and semiconductor element, use in the situation of the above-mentioned structure that is covered by Ni coating and Au coating, the connection reliability between wiring layer and the raised structures improves.But, in the structure of superimposed elements board for mounting electronic and semiconductor element, probably can cause concentrating near the connecting portion of electrode of the raised structures that comprises semiconductor component surfaces and semiconductor element because of thermal stress that the variations in temperature in heat treatment or the environment for use produces.And, probably can cause thus the connection reliability of the electrode of raised structures and semiconductor element to descend.

Summary of the invention

The present invention makes in view of such situation, and one of its advantage, purpose are to provide a kind of technology, in the structure of the electrode that connects raised structures and semiconductor element, the connection reliability between semiconductor element and the printed circuit substrate is improved.

A certain mode of the present invention is element mounting substrate.This element mounting substrate has: insulating resin layer, be arranged on insulating resin layer a first type surface wiring layer and be electrically connected with wiring layer and the side-prominent projected electrode from wiring layer to insulating resin layer, cross section at the central shaft that comprises projected electrode is seen, the side of projected electrode changes to the front end from the wiring layer side end continuously to the radius of curvature of central axis direction bending and side, described projected electrode along with from described wiring layer side end near described front end, the variation in diameter of this projected electrode.

According to this mode, be laminated with in the situation of semiconductor element at the element mounting substrate of aforesaid way, the connection reliability between semiconductor element and the printed circuit substrate improves.

In aforesaid way, and to compare near wiring layer side end and the front end, the radius of curvature of side is less at middle section.

In aforesaid way, the diameter at the top of projected electrode is 0.25～0.60 with respect to the ratio of the diameter of basal part.

Another way of the present invention also is element mounting substrate.This element mounting substrate has: insulating resin layer, be arranged on insulating resin layer a first type surface wiring layer and be electrically connected with wiring layer and from wiring layer to insulating resin layer side-prominent projected electrode, projected electrode is approximate Fuji shape.

An again mode of the present invention is semiconductor subassembly.This semiconductor subassembly has the element mounting substrate of above-mentioned arbitrary mode and is provided with semiconductor element with the opposed element electrode of projected electrode, and projected electrode connects insulating resin layer, and projected electrode and element electrode are electrically connected.

An again mode of the present invention is portable set.This portable set is equipped with the semiconductor subassembly of aforesaid way.

An again mode of the present invention is the manufacture method of element mounting substrate.The manufacture method of this element mounting substrate comprises following operation: the operation that forms projected electrode, under the state of the regulation region division mask of a first type surface of metallic plate, spray etching solution, cross section at the central shaft that comprises mask is seen, the side of this projected electrode is crooked to central axis direction, and the radius of curvature of side changes to the front end continuously from the metallic plate side end; Operation at the stacked insulating resin layer of first type surface of the metallic plate of a side that is formed with projected electrode; And selectively remove metallic plate and form the operation of wiring layer.

An again mode of the present invention is the manufacture method of semiconductor subassembly.The manufacture method of this semiconductor subassembly comprises following operation: the operation that forms projected electrode, under the state of the regulation region division mask of a first type surface of metallic plate, spray etching solution, cross section at the central shaft that comprises mask is seen, the side of this projected electrode is crooked to central axis direction, and the radius of curvature of side changes to the front end continuously from the metallic plate side end; Across insulating resin layer crimping metallic plate and the semiconductor element that is provided with the element electrode corresponding with projected electrode, connect insulating resin layer by making projected electrode, be electrically connected the crimping process of projected electrode and element electrode; And selectively remove metallic plate and form the operation of wiring layer.

In aforesaid way, insulating resin layer also can produce Plastic Flow by pressurization.

In addition, a certain mode of the present invention structure that is projected electrode.The structure of this projected electrode is characterised in that, it is the structure that is electrically connected with the wiring layer of composed component board for mounting electronic and gives prominence to from wiring layer in the end of wiring layer, the side of the projected electrode of the side that wiring layer extends, the side of the opposition side of one side of extending with wiring layer is compared, and tilts milder.

In aforesaid way, the side of the projected electrode of the side that wiring layer extends, its curvature also can be larger than the curvature of the side of opposition side.

In aforesaid way, also can be following situation, be in the projected electrode side of wiring layer one side of extending, from the front end to the distance in the direction vertical with the projected direction of projected electrode of wiring layer side end, with respect in the side of opposition side, from the front end to the distance in the direction vertical with the projected direction of projected electrode of wiring layer side end, larger and be below 3.5 times than 1.0 times.

In aforesaid way, also integratedly shaped projection electrode and wiring layer.

Another way of the present invention is element mounting substrate.This element mounting substrate is characterised in that, have: insulating resin layer, be arranged on insulating resin layer a first type surface wiring layer and be electrically connected with wiring layer and at the end of the wiring layer projected electrode side-prominent from wiring layer to insulating resin layer, projected electrode has above-mentioned arbitrary mode.

In aforesaid way, also can be insulating resin layer and be the approximate quadrangle form when overlooking, projected electrode is configured in the circumference of insulating resin layer, is at least apart from the projected electrode of the beeline in the bight of insulating resin layer to have above-mentioned arbitrary mode.

An again mode of the present invention is semiconductor subassembly.This semiconductor subassembly has the element mounting substrate of above-mentioned arbitrary mode and is provided with semiconductor element with the opposed element electrode of projected electrode, and projected electrode connects insulating resin layer, and is electrically connected projected electrode and element electrode.

An again mode of the present invention is the manufacture method of element mounting substrate.The manufacture method of this element mounting substrate is characterised in that, comprises following operation: form the operation of projected electrode at first type surface of metallic plate, the side of opposition side is compared in a side of this projected electrode, tilts milder; Operation at the stacked insulating resin layer of first type surface of the metallic plate of a side that is formed with projected electrode; And selectively remove metallic plate, form the operation of wiring layer in the mode of extending to a side.

In addition, a certain mode of the present invention structure that is projected electrode.The structure of this projected electrode is characterised in that, it is to be electrically connected with the wiring layer of composed component board for mounting electronic and from the outstanding structure of wiring layer, constriction (drawing together れ section) to be set in the prescribed limit of projected electrode side.

In aforesaid way, also can further have metal level, this metal level covers the top surface of projected electrode and the part to specified altitude from the front end of projected electrode side.

In addition, in aforesaid way, also can make the end position of wiring layer side of the end position of projected electrode front of constriction and metal level consistent.Perhaps also can make the end position of wiring layer side of the end position of projected electrode front of constriction and metal level inconsistent.

In addition, in aforesaid way, also can form micro concavo-convex on the surface of constriction, compare the top surface of projected electrode, the surface roughness on constriction surface is larger.

Another way of the present invention is element mounting substrate.This element mounting substrate is characterised in that, have: insulating resin layer, be arranged on insulating resin layer a first type surface wiring layer and be electrically connected with wiring layer and from wiring layer to insulating resin layer side-prominent projected electrode, projected electrode has above-mentioned arbitrary mode.

An again mode of the present invention is the manufacture method of element mounting substrate.The manufacture method of this element mounting substrate is characterised in that, comprises following operation: the projected electrode formation operation that forms projected electrode at a first type surface of metallic plate; The constriction that forms constriction in the prescribed limit of projected electrode side forms operation; Laminated resin operation at the stacked insulating resin layer of first type surface of the metallic plate of a side that is formed with projected electrode; And selectively remove metallic plate and the wiring layer that forms wiring layer forms operation.

In aforesaid way, further comprise the metal level covering process, it is at the top surface of projected electrode and the partial coverage metal level to specified altitude from the front end of projected electrode side, form in the operation in constriction, by take the side of metal level as the mask etching projected electrode, form constriction.

Description of drawings

Fig. 1 is the summary section of the structure of the expression element mounting substrate of execution mode 1 and semiconductor subassembly;

Fig. 2 (A)～Fig. 2 (D) is the process profile of the formation method of expression projected electrode;

Fig. 3 (A)～Fig. 3 (E) is the process profile of method of attachment of formation method, projected electrode and the element electrode of expression wiring layer;

Fig. 4 (A)～Fig. 4 (D) changes under 125 ℃ the atmosphere temperature for explanation from 25 ℃, the structure of projected electrode and form the schematic diagram of relation of the maximum stress of region generating at the projected electrode of projected electrode or wiring layer;

Fig. 5 (A)～Fig. 5 (C) is the chart of variation of the radius of curvature of expression projected electrode side;

Fig. 6 is the summary section of the structure of the expression element mounting substrate of execution mode 2 and semiconductor subassembly;

Fig. 7 (A), Fig. 7 (B) are the skeleton diagrams for the shape of explanation projected electrode;

Fig. 8 (A)～Fig. 8 (F) is the process profile of the formation method of expression projected electrode;

Fig. 9 is the general view of resist;

Figure 10 (A)～Figure 10 (F) is the process profile of method of attachment of formation method, projected electrode and the element electrode of expression wiring layer;

Figure 11 (A), Figure 11 (B) are the figure for the side view of explanation projected electrode;

Figure 12 is illustrated in temperature is changed under 125 ℃ the atmosphere from 25 ℃, the chart of the relation of the variation of the side view of projected electrode and the thermal stress that produces at projected electrode;

Figure 13 is the floor map of the element mounting substrate seen from the outstanding side of projected electrode;

Figure 14 is the summary section of the structure of the element mounting substrate of structure of the expression projected electrode that possesses execution mode 3 and semiconductor subassembly;

Figure 15 is that summary section is amplified near the part of the projected electrode of Figure 14;

Figure 16 (A)～Figure 16 (G) is the process profile of the formation method of expression projected electrode and constriction;

Figure 17 (A)～Figure 17 (E) is the process profile of method of attachment of formation method, projected electrode and the element electrode of expression wiring layer;

Figure 18 (A)～Figure 18 (D) is illustrated in temperature is changed under 125 ℃ the atmosphere from 25 ℃, goes out the result's of the relation between the variation of thermal stress of the scope of constriction and generation schematic diagram by analog computation;

Figure 19 (A)～Figure 19 (C) is illustrated in temperature is changed under 125 ℃ the atmosphere from 25 ℃, goes out the result's of the relation between the variation of thermal stress of the scope of constriction and metal level and generation schematic diagram by analog computation;

Figure 20 (A)～Figure 20 (D) is the process profile of the method for attachment of the projected electrode of execution mode 4 and element electrode;

Figure 21 (A)～Figure 21 (G) is the process profile of formation method of the constriction of expression execution mode 5;

Figure 22 is the structure chart of the mobile phone of expression execution mode 6;

Figure 23 is the part sectioned view of mobile phone.

Embodiment

Now, with reference to preferred implementation the present invention is described.This does not limit the scope of the invention, and just illustration the present invention.

Below, as the basis and with reference to accompanying drawing the present invention is described take preferred forms.To identical or equal inscape, parts, the processing shown in each figure, mark identical Reference numeral, suitably the repetitive description thereof will be omitted.In addition, execution mode does not limit invention, is a kind of illustration, and it is essence of the present invention that whole features of describing in the execution mode or its combination are not necessarily limited to.

(execution mode 1)

Fig. 1 is the summary section of the structure of the element mounting substrate 10 of expression execution mode 1 and the semiconductor subassembly 30 that uses it.Semiconductor subassembly 30 comprises element mounting substrate 10 and is equipped on the semiconductor element 50 of this element mounting substrate 10.

Element mounting substrate 10 has: insulating resin layer 12, be arranged on insulating resin layer 12 a first type surface S1 wiring layer 14 and be electrically connected with wiring layer 14 and the 12 side-prominent projected electrodes 16 from wiring layer 14 to insulating resin layer.

Insulating resin layer 12 is made of insulative resin, causes that the material of Plastic Flow forms during for example by pressurization.Cause the material of Plastic Flow during as pressurization, can enumerate the epoxies thermosetting resin.Insulating resin layer 12 employed epoxies thermosetting resins are so long as for example to have viscosity under the condition of 160 ℃ of temperature, pressure 8Mpa be that the material of the characteristic of 1kPas gets final product.In addition, this epoxies thermosetting resin for example under the condition of 160 ℃ of temperature, in the situation that pressurize with pressure 5～15Mpa, is compared with uninflated situation, and the reduced viscosity of resin is to approximately 1/8.Relative therewith, the epoxy resin in the B stage before the hot curing is under the condition below the glass transition temperature Tg, and the situation same degree ground with resin not being pressurizeed does not have viscosity, even pressurization can not produce viscosity yet.In addition, this epoxies thermosetting resin is to have the dielectric that is about 3～4 dielectric constant.

Wiring layer 14 is located at a first type surface S1 of insulating resin layer 12, by electric conducting material, preferred rolled metal, more preferably rolling copper consists of.Perhaps also can be formed by cathode copper etc.At wiring layer 14, in insulating resin layer 12 sides, the outstanding projected electrode 16 that is provided with.In the present embodiment, wiring layer 14 forms with projected electrode 16, but without particular limitation of in this.First type surface in the side opposite with insulating resin layer 12 of wiring layer 14 is provided with the protective layer 18 be used to oxidation that prevents wiring layer 14 etc.Can enumerate anti-flux layer etc. as protective layer 18.Regulation zone at protective layer 18 is formed with peristome 18a, utilizes peristome 18a to expose the part of wiring layer 14.In peristome 18a, form the solder bump 20 as external connecting electrode, solder bump 20 and wiring layer 14 are electrically connected.Form solder bump 20 the position, be that the formation zone of peristome 18a for example is the end of the front end placed with distribution again.

The global shape of projected electrode 16 is for along with near the top variation in diameter, and its section shape is for becoming curvilinear approximate Fuji shape.Shape when projected electrode 16 is overlooked is in the present embodiment for comprising oval-shaped sub-circular, but is not limited to this, such as also being the polygons such as quadrangle.The side of projected electrode 16 is following shape, namely sees in the cross section of the central shaft 16z that comprises projected electrode 16, and is crooked to central shaft 16z direction, and the shape that changes continuously to front end 16b from wiring layer side end 16a of the radius of curvature of side.At this, and to compare near wiring layer side end 16a and the front end 16b, the radius of curvature of side is less at middle section.That is, the side of projected electrode 16 is from wiring layer side end 16a forward end side end 16b, its radius of curvature by greatly → little → shape that large mode changes.In addition, the diameter at projected electrode 16 tops is about scope of 0.25～about 0.60 with respect to the ratio of the diameter of basal part.

In addition, although there is the situation of the micro concavo-convex that is formed with about 2 μ m～below about 5 μ m in the side of projected electrode 16, but the side of the projected electrode 16 of present embodiment is being ignored under the state of this micro concavo-convex, consists of the radius of curvature continually varying shape of side.In addition, also can be on the surface of projected electrode 16, cover such as formed by electrolytic plating method or non-electrolytic plating method, nickel (the Ni)/metal levels such as gold (Au) coating.

Form semiconductor subassembly 30 at element mounting substrate 10 semiconductor element mounted thereons 50 that possess said structure.The semiconductor subassembly 30 of present embodiment is following structure, namely across the structure of the element electrode 52 of the projected electrode 16 of insulating resin layer 12 electrical connecting element board for mounting electronic 10 and semiconductor element 50.

Semiconductor element 50 has respectively and projected electrode 16 opposed element electrodes 52.In addition, the first type surface at the semiconductor element 50 of a side of joining with insulating resin layer 12 is laminated with element protection layer 54, and this element protection layer 54 is provided with opening, in order to expose element electrode 52.Also can be at metal levels such as the surface coverage Ni/Au of element electrode 52 coating.As the concrete example of semiconductor element 50, enumerate the semiconductor chips such as integrated circuit (IC), large scale integrated circuit (LSI).As the concrete example of element protection layer 54, enumerate polyimide layer.In addition, element electrode 52 for example can use aluminium (Al).

In the present embodiment, between element mounting substrate 10 and semiconductor element 50, insulating resin layer 12 is set, element mounting substrate 10 is crimped on a first type surface S1 of insulating resin layer 12, semiconductor element 50 is crimped on another first type surface.Then, make projected electrode 16 connect insulating resin layer 12, and be electrically connected with the element electrode 52 that is arranged on semiconductor element 50.Because insulating resin layer 12 is made of the material that produces Plastic Flow by pressurization, so element mounting substrate 10, insulating resin layer 12 and semiconductor element 50 with this order shape all-in-one-piece state under, the residual film that accompanies insulating resin layer 12 between projected electrode 16 and the element electrode 52 can be suppressed at, connection reliability can be sought to improve.In addition, surface coverage at projected electrode 16 and element electrode 52 has in the situation of Ni/Au coating, because making between the gold of each other surface configuration, projected electrode 16 and element electrode 52 engage (Jin-Jin engages), therefore, the connection reliability of projected electrode 16 and element electrode 52 further improves.

(manufacture method of element mounting substrate and semiconductor subassembly)

Fig. 2 (A)～Fig. 2 (D) is the process profile of the formation method of expression projected electrode 16.

Shown in Fig. 2 (A), prepare thickness larger than the thickness sum of the height of projected electrode 16 and wiring layer 14 at least and as the copper coin 13 of metallic plate.

Then, shown in Fig. 2 (B), by lithography, coincide with the pattern of projected electrode 16 and selectively form resist 70.Specifically, use laminater to attach the resist film of regulation thickness at copper coin 13, use the photomask exposure of the pattern with projected electrode 16 after, by developing, selectively form resist 70 at copper coin 13.For the adhesion of raising with resist, the pre-treatments such as before the lamination resist film, hope is ground on the surface of copper coin 13 as required, cleaning.

Then, shown in Fig. 2 (C), take resist 70 as mask, form the projected electrode 16 of predetermined pattern at copper coin 13.Specifically, by to the first type surface that is formed with resist 70 1 sides by the copper coin 13 of conveyer belt carrying, implement injection (the シヤワ one) etch processes of the etching solutions such as spraying ferric chloride solution, etching copper coin 13 forms the projected electrode 16 with predetermined pattern.According to spraying etch processes, the anisotropic etching of copper coin 13 becomes possibility, can make the side of projected electrode 16 become central shaft 16z (central shaft of mask) direction bending to projected electrode 16 and the radius of curvature continually varying shape of side.In addition, according to spraying etch processes, for example also can make the side of projected electrode 16 form following shape, namely compare perpendicular to the wiring layer side end 16a of the direction of central shaft 16z and the distance X 1 between the 16b of front end, wiring layer side end 16a and the distance X 2 between the 16b of front end of direction that is parallel to central shaft 16z is larger.The transporting velocity of the copper coin 13 of present embodiment, the spray pressure of etching solution are respectively 4～7m/min, 200～500kPa.

Then, shown in Fig. 2 (D), use remover to peel off resist 70.By operation described above, form projected electrode 16 at copper coin 13.The diameter of the basal part of the projected electrode 16 of present embodiment, the diameter at top, highly for example be respectively φ 100～140 μ m, φ 50 μ m, 30 μ m.Have, transporting velocity, the transport distance by change copper coin 13, the spray pressure of etching solution, nozzle number, nozzle diameter etc. can form the projected electrode 16 of various shape again.Above-mentioned each condition also can be determined by experiment.

Fig. 3 (A)～3 (E) is the process profile of method of attachment of formation method, projected electrode 16 and the element electrode 52 of expression wiring layer 14.

Shown in Fig. 3 (A), make projected electrode 16 towards insulating resin layer 12 sides, copper coin 13 is configured in a first type surface S1 side of insulating resin layer 12.In addition, another first type surface that is configured in insulating resin layer 12 with the semiconductor element 50 of projected electrode 16 opposed element electrodes 52 will be provided with.The thickness of insulating resin layer 12 is roughly the height of projected electrode 16, is about 30 μ m.Then, use pressue device, across insulating resin layer 12 crimping copper coins 13 and semiconductor element 50.Add the pressure in man-hour and temperature and be about respectively 5Mpa and 180 ℃.

By pressurization processing, make insulating resin layer 12 produce Plastic Flow, projected electrode 16 connects insulating resin layer 12.Then, shown in Fig. 3 (B), copper coin 13, insulating resin layer 12 and semiconductor element 50 are integrally formed, crimping projected electrode 16 and element electrode 52, and be electrically connected projected electrode 16 and element electrode 52.Because the global shape of projected electrode 16 is for along with near the such shape of front end variation in diameter, so projected electrode 16 connects insulating resin layer 12 swimmingly.In the present embodiment, copper coin 13 is crimped on insulating resin layer 12, at the stacked insulating resin layer 12 of the first type surface of the copper coin 13 that is formed with projected electrode 16 1 sides.

Then, shown in Fig. 3 (C), by lithography, at the first type surface of the copper coin 13 of a side opposite with insulating resin layer 12, coincide with the pattern of wiring layer 14 and selectively form resist 71.

Then, shown in Fig. 3 (D), take the first type surface of resist 71 as mask etching copper coin 13, form the wiring layer 14 of predetermined pattern at copper coin 13.After this, peel off resist.The thickness of the wiring layer 14 of present embodiment is about 20 μ m.

Then, shown in Fig. 3 (E), by lithography, the first type surface at the wiring layer 14 of a side opposite with insulating resin layer 12 is formed on the protective layer 18 that the zone corresponding with the formation position of solder bump 20 has peristome 18a.Then, in peristome 18a, form solder bump 20.

According to manufacturing process described above, form semiconductor subassembly 30.In addition, in the situation that semiconductor element mounted thereon 50 not obtains element mounting substrate 10.

Fig. 4 (A)～Fig. 4 (D) changes under 125 ℃ the atmosphere temperature for explanation from 25 ℃, the structure of projected electrode 16 and form the schematic diagram of relation of the maximum stress of region generating at the projected electrode 16 of projected electrode 16 or wiring layer 14.Fig. 5 (A)～Fig. 5 (C) is the chart of variation of radius of curvature of the side of expression projected electrode 16.

The side of the projected electrode 16 shown in Fig. 4 (A) is linearities, and this is the shape of existing projected electrode.On the other hand, the side of the projected electrode 16 shown in Fig. 4 (B)～Fig. 4 (D), be approximately by wiring layer side end 16a, front end 16b and the spline curve that is in transit point 16c between the two, this is equivalent to the shape of projected electrode of the present invention.

In Fig. 4 (B)～Fig. 4 (D), diameter R3, the transit point 16c of the basal part of projected electrode 16 is different apart from the height h1 of wiring layer 14.The diameter R2 of the At The Height of the height h2 of projected electrode 16, diameter R1, the transit point 16c at top fixes.The size of the projected electrode shown in Fig. 4 (A)～Fig. 4 (D) and the diameter at top are as shown in table 1 with respect to the ratio of the diameter of basal part.

[table 1]

But this table 1 and Fig. 4 are as can be known, and the projected electrode 16 of Fig. 4 (C) is compared the projected electrode 16 of Fig. 4 (B) and Fig. 4 (D), and the diameter R3 of basal part is larger, and the diameter at top diminishes with respect to the ratio of the diameter of basal part.That is, the projected electrode 16 of Fig. 4 (C) is compared the projected electrode 16 of Fig. 4 (B) and D, and the distance of the X-direction between wiring layer side end 16a and the front end 16b is longer, that is, radius of curvature continually varying zone broadens extensively.In other words, the projected electrode 16 of Fig. 4 (C) is compared the projected electrode 16 of Fig. 4 (B) and Fig. 4 (D), and par at the foot of the hill (full front of a Chinese gown is wild) is broader, laterally inclined milder.On the other hand, the projected electrode of the projected electrode 16 of comparison diagram 4 (B) and Fig. 4 (D), then the height of the transit point 16c of the projected electrode 16 of Fig. 4 (B) uprises.

In addition, Fig. 5 (A)～Fig. 5 (C) illustrates respectively the position of direction (X-direction) in the side of the projected electrode 16 shown in Fig. 4 (B)～Fig. 4 (D), that be parallel to the first type surface of wiring layer 14 and the relation of radius of curvature r.In chart, front end 16b consists of starting point (X=0).By Fig. 5 (A)～Fig. 5 (C) as can be known, the side of projected electrode 16, its radius of curvature r changes to front end 16b continuously from wiring layer side end 16b.In addition, can see the minimum of radius of curvature r between front end 16b and wiring layer side end 16a, compare as can be known with near wiring layer side end 16a and the front end 16b, radius of curvature r is less at middle section.

Temperature is changed to from 25 ℃ under 125 ℃ the atmosphere, and the maximum stress that produces at the projected electrode 16 shown in Fig. 4 (A)～Fig. 4 (D) is respectively 291MPa, 244MPa, 222MPa, 248MPa.That is, the side is the projected electrode 16 of curvilinear present embodiment, is that the existing projected electrode of linearity is compared with the side, has reduced the maximum stress that produces at projected electrode.In addition, in the projected electrode 16 of present embodiment, a side of the distance of the X-direction between wiring layer side end 16a and the front end 16b has further reduced maximum stress.

Explanation as previously discussed, the element mounting substrate 10 of present embodiment is for being made as following shape, namely, the side of projected electrode 16 is seen in the cross section of the central shaft 16z that comprises projected electrode 16 to the bending of central shaft 16z direction, and the radius of curvature of side change continuously to front end 16b from wiring layer side end 16a.Thus, even if in the manufacturing process of semiconductor subassembly 30, semiconductor subassembly 30 to the installation procedure of printed circuit substrate or in the situation that produced thermal stress in the environment for use etc., also can relax thermal stress concentrating to projected electrode 16.Therefore, can suppress because thermal stress causes to the generation of the crackle (be full of cracks) of the joint portion of projected electrode 16 or projected electrode 16 and wiring layer 14 or destruction etc., the connection reliability of element mounting substrate 10 and semiconductor element 50 improves.And in the situation that semiconductor subassembly 30 is installed in printed circuit substrate, the connection reliability between semiconductor element 50 and the printed circuit substrate improves.In addition, because the destruction that can prevent projected electrode 16 grades so can improve the fabrication yield of semiconductor subassembly, can be reduced the manufacturing cost of semiconductor subassembly.

The present inventors are found that of effort with keen determination, compares the side of opposition side, and thermal stress more concentrates on the side of the projected electrode of the side that wiring layer extends.In addition, be in the situation of the quadrangle form when overlooking at insulating resin layer, find that thermal stress concentrates on the side of the side that the wiring layer of the projected electrode that is configured in the insulating resin layer bight extends.The present inventors based on these knowledge, thereby finish present embodiment.

Fig. 6 be the expression projected electrode that possesses execution mode 2 structure element mounting substrate 1010 and use the summary section of structure of its semiconductor subassembly 1030.Semiconductor subassembly 1030 has element mounting substrate 1010 and is equipped on the semiconductor element 1050 of this element mounting substrate 1010.

Element mounting substrate 1010 has: insulating resin layer 1012, be arranged on insulating resin layer 1012 a first type surface S1001 wiring layer 1014 and be electrically connected with wiring layer 1014 and in the end of wiring layer 1014 from wiring layer 1014 to insulating resin layer 1012 side-prominent projected electrodes 1016.

Insulating resin layer 1012 is made of insulative resin, causes that the material of Plastic Flow forms during for example by pressurization.Cause the material of Plastic Flow during as pressurization, can enumerate the epoxies thermosetting resin.Insulating resin layer 1012 employed epoxies thermosetting resins are so long as for example to have viscosity under the condition of 160 ℃ of temperature, pressure 8Mpa be that the material of the characteristic of 1kPas gets final product.In addition, this epoxies thermosetting resin for example under the condition of 160 ℃ of temperature, in the situation that pressurize with pressure 5～15Mpa, is compared with uninflated situation, and the reduced viscosity of resin is to approximately 1/8.Relative therewith, the epoxy resin in the B stage before the hot curing is under the condition below the glass transition temperature Tg, and the situation same degree ground with resin not being pressurizeed does not have viscosity, even pressurization can not produce viscosity yet.

Wiring layer 1014 is located at a first type surface S1001 of insulating resin layer 1012, by electric conducting material, preferred rolled metal, more preferably rolling copper consists of.Perhaps also can be formed by cathode copper etc.At wiring layer 1014, in its end and in insulating resin layer 1012 sides, the outstanding projected electrode 1016 that is provided with.Wiring layer 1014 is preferably one-body molded with projected electrode 1016.Thus, can prevent from causing at generation of interfaces crackle of wiring layer 1014 and projected electrode 1016 etc. because of thermal stress, in addition, compare for the situation of Split type structure with projected electrode 1016 with wiring layer 1014, both connections are reliable, and, because element electrode 1052 and wiring layer 1014 are electrically connected, do not increase the such effect of process number so have.First type surface in the side opposite with insulating resin layer 1012 of wiring layer 1014 is provided with the protective layer 1018 be used to oxidation that prevents wiring layer 1014 etc.Can enumerate anti-flux layer etc. as protective layer 1018.Regulation zone at protective layer 1018 is formed with peristome 1018a, utilizes peristome 1018a to expose the part of wiring layer 1014.In peristome 1018a, form the solder bump 1020 as external connecting electrode, solder bump 1020 and wiring layer 1014 are electrically connected.Form solder bump 1020 the position, be that the formation zone of peristome 1018a for example is the end of the front end placed with distribution again.

Fig. 7 (A), Fig. 7 (B) are the skeleton diagrams for the shape of explanation projected electrode 1016.Fig. 7 (A) is the approximate three-dimensional map of projected electrode 1016 and wiring layer 1014, and Fig. 7 (B) is the summary section of projected electrode 1016.

Shown in Fig. 7 (A), Fig. 7 (B), the global shape of projected electrode 1016 is for along with the shape near the top variation in diameter, and the side 1016a of the side that wiring layer 1014 extends compares the side 1016b of opposition side, tilts milder.Although the shape when projected electrode 1016 is overlooked for comprising oval-shaped sub-circular, is not particularly limited in this in the present embodiment, such as the polygon that yet can be quadrangle etc.In addition, side opposite with projected electrode 1016 (left side among the figure) at wiring layer 1014, be formed with engaging zones 1014a, this engaging zones 1014a has solder bump 1020 and doubles as distribution in the surface configuration with the opposition side of a side that forms projected electrode 1016.

The projected electrode 1016 outstanding in the end of wiring layer 1014 producing in the situation of thermal stress because of the variations in temperature in heat treatment or the environment for use, the tendency of the side that the wiring layer 1014 that exists thermal stress to concentrate on projected electrode 1016 extends.Therefore, side 1016a projected electrode 1016, wiring layer 1014 extensions one side compares the side 1016b that wiring layer 1014 extends the opposition side of a side, tilts milder.In addition, be preferably, the curvature of the side 1016b of the ratio of curvature opposition side of side 1016a projected electrode 1016, wiring layer 1014 extensions one side is large.Have at side 1016a in the situation of the curvature larger than side 1016b, be in the some 1016ar on the side 1016a of height h position, from the front end of side 1016a 1016ap to put 1016ar, be included in the scope that satisfies following formula at the distance R ar of the direction vertical with the projected direction of projected electrode 1016.

0≤Rar≤Raq·(1-h/H)

At this, Raq be from the front end of side 1016a 1016ap to wiring layer side end 1016aq, in the distance of the direction vertical with the projected direction of projected electrode 1016, H is the height of projected electrode 1016.

In addition, wiring layer 1014 extend a side side 1016a, the distance R aq in the direction vertical with the projected direction of projected electrode 1016 from front end 1016ap to wiring layer side end 1016aq, with respect to the distance R bq in the direction vertical with the projected direction of projected electrode 1016 side 1016b, from front end 1016bp to wiring layer side end 1016bq of opposition side, be preferably than approximately 1.0 times large and for approximately below 3.5 times.

In addition, also can on the surface of projected electrode 1016, cover, nickel (the Ni)/metal levels 1017 such as gold (Au) coating that electrolytic plating method or non-electrolytic plating method form such as utilizing.Although the overlay area of the metal level 1017 of present embodiment is a part and the top surface of the side of projected electrode 1016, is not particularly limited in this, can only be top surface also for example.

At element mounting substrate 1010 semiconductor element mounted thereons 1050 that possess said structure, form semiconductor subassembly 1030.The semiconductor subassembly 1030 of present embodiment has following structure, namely across the structure of the element electrode 1052 of the projected electrode 1016 of insulating resin layer 1012 electrical connecting element board for mounting electronic 1010 and semiconductor element 1050.

Semiconductor element 1050 has respectively and projected electrode 1016 opposed element electrodes 1052.In addition, the first type surface at the semiconductor element 1050 of a side of joining with insulating resin layer 1012 is laminated with element protection layer 1054, this element protection layer 1054 is provided with opening, in order to expose element electrode 1052.Also can be at metal levels such as the surface coverage Ni/Au of element electrode 1052 coating.As the concrete example of semiconductor element 1050, can enumerate the semiconductor chips such as integrated circuit (IC), large scale integrated circuit (LSI).As the concrete example of element protection layer 1054, can enumerate polyimide layer.In addition, element electrode 1052 for example uses aluminium (Al).

In the present embodiment, between element mounting substrate 1010 and semiconductor element 1050, insulating resin layer 1012 is set, element mounting substrate 1010 is crimped on a first type surface S1001 of insulating resin layer 1012, semiconductor element 1050 is crimped on another first type surface.Then, make projected electrode 1016 connect insulating resin layer 1012, and be electrically connected with the element electrode 1052 that is arranged at semiconductor element 1050.Because insulating resin layer 1012 is made of the material that produces Plastic Flow by pressurization, so element mounting substrate 1010, insulating resin layer 1012 and semiconductor element 1050 with this order shape all-in-one-piece state under, the residual film that accompanies insulating resin layer 1012 between projected electrode 1016 and the element electrode 1052 can be suppressed at, connection reliability can be sought to improve.

Fig. 8 (A)～Fig. 8 (F) is the process profile of the formation method of expression projected electrode 1016.

Shown in Fig. 8 (A), prepare thickness larger than the thickness sum of the height of projected electrode 1016 and wiring layer 1014 at least and as the copper coin 1013 of metallic plate.

Then, shown in Fig. 8 (B), by lithography, coincide with the pattern of projected electrode 1016 and selectively form resist 1070.Specifically, use laminater to attach the resist film of regulation thickness at copper coin 1013, use the photomask exposure of the pattern with projected electrode 1016 after, by developing, selectively form resist 70 at copper coin 1013.For the adhesion of raising with resist, the pre-treatments such as before the lamination resist film, hope is ground on the surface of copper coin 1013 as required, cleaning.

Fig. 9 is the general view of resist 1070.As shown in Figure 9, be approximate tear-drop shape when resist 1070 is overlooked, its jut 1070a faces the predetermined bearing of trend configuration of the wiring layer 1014 that after this forms.

Then, shown in Fig. 8 (C), take resist 1070 as mask, form the projected electrode 1016 of predetermined pattern at copper coin 1013.Specifically, by take resist 1070 as mask etching copper coin 1013, form the projected electrode 1016 with predetermined pattern.Be the existence of the jut 1070a of the resist 1070 of approximate tear-drop shape when overlooking, therefore a side 1016a of projected electrode 1016 compares the side 1016b of opposition side, tilt to become milder.After forming projected electrode 1016, use remover to peel off resist 1070.

Then, shown in Fig. 8 (D), at the stacked resist 1071 of first type surface of the side that is formed with projected electrode 1016 of copper coin 1013 until specified altitude.The height of stacked resist 1071 is the height corresponding to the overlay area of metal level 1017.

Then, shown in Fig. 8 (E), at the exposed portions serve formation metal level 1017 of projected electrode 1016.Metal level 1017 for example utilizes electrolytic plating method or non-electrolytic plating method, as the metal level of Ni/Au and form.If form metal level 1017 by electrolytic plating method or non-electrolytic plating method, then form the direction of crystal grain of the metal of metal level 1017, with respect to the contact-making surface of element electrode 1052, arrange in the vertical direction.Therefore, metal level 1017 imposes on the pressure of element electrode 1052 in the time of can being absorbed in element electrode 1052 crimping, can reduce thus the worry to element electrode 1052 injuries.In addition, consist of the following formation of metal level of metal level 1017, that is, make the Ni layer become a side of joining with projected electrode 1016, the Au layer becomes a side of joining with element electrode 1052.Have again, as the formation method of metal level 1017, without particular limitation of, such as using the conductive pastes such as copper cream, silver paste, gold paste.

Then, shown in Fig. 8 (F), use remover to peel off resist 1071.By operation described above, form projected electrode 1016 at copper coin 1013.The diameter of the basal part of the projected electrode 1016 of present embodiment, the diameter at top, highly for example be respectively φ 100～225 μ m, φ 60 μ m, 40 μ m.

Figure 10 (A)～Figure 10 (F) is the process profile of method of attachment of formation method, projected electrode 1016 and the element electrode 1052 of expression wiring layer 1014.

Shown in Figure 10 (A), make projected electrode 1016 towards insulating resin layer 1012 sides, copper coin 1013 is configured in a first type surface S1001 side of insulating resin layer 1012.In addition, another first type surface that is configured in insulating resin layer 1012 with the semiconductor element 1050 of projected electrode 1016 opposed element electrodes 1052 will be provided with.The thickness of insulating resin layer 1012 is roughly the height of projected electrode 1016, is about 40 μ m.Then, use pressue device, across insulating resin layer 1012 crimping copper coins 1013 and semiconductor element 1050.Add the pressure in man-hour and temperature and be about respectively 5Mpa and 200 ℃.

By pressurization processing, insulating resin layer 1012 produces Plastic Flow, and projected electrode 1016 connects insulating resin layer 1012.Then, shown in Figure 10 (B), make copper coin 1013, insulating resin layer 1012 and semiconductor element 1050 integrated, crimping projected electrode 1016 and element electrode 1052, and be electrically connected projected electrode 1016 and element electrode 1052.Because the global shape of projected electrode 1016 is for along with near the such shape of front end variation in diameter, so projected electrode 1016 connects insulating resin layer 1012 swimmingly.In the present embodiment, by copper coin 1013 is crimped on insulating resin layer 1012, thereby at the stacked insulating resin layer 1012 of the first type surface of the copper coin 1013 that is formed with projected electrode 1,016 one sides.

Then, shown in Figure 10 (C), by lithography, at the first type surface of the copper coin 1013 of a side opposite with insulating resin layer 1012, coincide with the pattern of wiring layer 1014 and selectively form resist 1072.

Then, shown in Figure 10 (D), take the first type surface of resist 1072 as mask etching copper coin 1013, form the wiring layer 1014 of predetermined pattern at copper coin 1013.After this, peel off resist.The thickness of the wiring layer 1014 of present embodiment is about 20 μ m.

Then, shown in Figure 10 (E), by lithography, the first type surface at the wiring layer 1014 of a side opposite with insulating resin layer 1012 is formed on the protective layer 1018 that the zone corresponding with the formation position of solder bump 1020 has peristome 1018a.

Then, shown in Figure 10 (F), in the peristome 1018a as the engaging zones 1014a of the part of wiring layer 1014, form solder bump 1020.

According to operation described above, form semiconductor subassembly 1030.In addition, in the situation that semiconductor element mounted thereon 1050 not obtains element mounting substrate 1010.

Figure 11 (A), Figure 11 (B) are the figure for the shape of the side 1016a of explanation projected electrode 1016.The longitudinal axis of Figure 11 (A) is apart from the height that is provided with wiring layer 1014 surfaces of projected electrode 1,016 one sides, transverse axis be the direction vertical with the projected direction of projected electrode 1016, apart from the distance (for side 1016b, being the distance of distance front end 1016bp) of front end 1016ap.In addition, the longitudinal axis of Figure 11 (B) is curvature, and transverse axis is apart from the height that is provided with wiring layer 1014 surfaces of projected electrode 1,016 one sides.

Shown in Figure 11 (A), Figure 11 (B), the projected electrode 1016 of present embodiment for example has the side 1016a of 3 patterns of A～C.That is, shown in Figure 11 (A), the side 1016a of pattern A～C, the distance R aq that illustrates respectively among Fig. 7 (B) are 45 μ m, and the height h of some 1016ar is 20 μ m, and distance R ar is 5,8,10 μ m.In addition, the height H of projected electrode 1016 is 40 μ m.Wiring layer 1014 extends the side 1016a of the projected electrode 1016 of a side, compares the side 1016b of opposition side, tilts to become milder.And, shown in Figure 11 (B), the side 1016a of each pattern, the curvature of the side 1016b of its ratio of curvature opposition side is large.Like this, it is milder that the wiring layer 1014 by making projected electrode 1016 extends the inclination of side 1016b of rake ratio opposition side of side 1016a of a side, thereby can disperse to concentrate on the thermal stress of side 1016a.In addition, the curvature of the ratio of curvature side 1016b by making side 1016a is large, thereby can further disperse thermal stress.

Figure 12 is illustrated in temperature is changed under 125 ℃ the atmosphere from 25 ℃, the chart of the relation of the variation of the shape of the side 1016a of projected electrode 1016 and the thermal stress that produces at projected electrode 1016.Figure 12 illustrates following situation, the thermal stress that produces at the wiring layer side end 1016aq of side 1016a when namely establishing side 1016a and side 1016b and being symmetric shape is 1.0, when the distance R ar shown in Fig. 7 (B) is changed with distance R aq in the relative variation of the thermal stress of wiring layer side end 1016aq generation.Have, result shown in Figure 7 is again, from the formation zone of the solder bump 1020 of wiring layer 1014 to the formation zone of projected electrode 1016, has the structure of wiring layer 1014 linearly extensions shown in Fig. 7 (A).In addition, the set up an office height h of 1016ar is 20 μ m.

As shown in figure 12 as can be known, even the value of distance R ar is any situation among 5,8, the 10 μ m, from front end 1016ap to wiring layer side end 1016aq, at the distance R aq of the direction vertical with the projected direction of projected electrode 1016, distance R bq with respect to the correspondence of the side 1016b of opposition side, than approximately 1.0 times large and be approximately below 3.5 times the time, also diminish in the thermal stress of wiring layer side end 1016aq generation.Therefore, in the case, can further be reduced in the thermal stress of the side 1016a generation of projected electrode 1016.

Figure 13 is the floor map of the element mounting substrate 1010 seen from the outstanding sides of projected electrode 1016.

As shown in figure 13, be approximate quadrangle form when insulating resin layer 1012 is overlooked, projected electrode 1016 is configured in the circumference of insulating resin layer 1012.As mentioned above, under such shape, side 1016a projected electrode 1016, wiring layer 1014 extensions one side that causes thermal stress to concentrate on especially in the bight of insulating resin layer 1012 1012a configuration.Therefore, preferred at least for being in apart from the projected electrode 1016 of the bight 1012a beeline of insulating resin layer 1012, the side 1016a that extends a side at wiring layer 1014 has above-mentioned such structure.

Explanation as previously discussed, the structure of the projected electrode 1016 of present embodiment are that the side 1016b that the side 1016a that wiring layer 1014 extends a side compares opposition side tilts milder.In addition, the curvature of the ratio of curvature side 1016b of preferred side 1016a is large.And, preferably from front end 1016ap to wiring layer side end 1016aq, at the distance R aq of the direction vertical with the projected direction of projected electrode 1016, with respect to the distance R bq of the correspondence of the side 1016b of opposition side, than approximately 1.0 times large and be approximately below 3.5 times.Thus, even if produced in the situation of thermal stress in the installation procedure of printed circuit substrate or environment for use etc. in the manufacturing process of semiconductor subassembly 1030, semiconductor subassembly 1030, also can relax thermal stress concentrating to projected electrode 1016.Therefore, can suppress because of the generation of the crackle to projected electrode 1016 (be full of cracks) that thermal stress causes or destruction etc., the connection reliability of element mounting substrate 1010 and semiconductor element 1050 improves.And in the situation that semiconductor subassembly 1030 is installed in printed circuit substrate, the connection reliability between semiconductor element 1050 and the printed circuit substrate improves.In addition, because the destruction that can prevent projected electrode 1016 grades so can improve the fabrication yield of semiconductor subassembly, can be reduced the manufacturing cost of semiconductor subassembly.

Figure 14 is the summary section of the structure of the element mounting substrate 2010 of structure of the expression projected electrode that possesses execution mode 3 and semiconductor subassembly 2030.Semiconductor subassembly 2030 has element mounting substrate 2010 and carries semiconductor element 2050 at element mounting substrate 2010.

Element mounting substrate 2010 has: insulating resin layer 2012, be arranged on insulating resin layer 2012 a first type surface S2001 wiring layer 2014 and be electrically connected with wiring layer 2014 and the 2012 side-prominent projected electrodes 2016 from wiring layer 2014 to insulating resin layer.

Insulating resin layer 2012 is made of insulative resin, causes that the material of Plastic Flow forms during for example by pressurization.Cause the material of Plastic Flow during as pressurization, can enumerate the epoxies thermosetting resin.Insulating resin layer 2012 employed epoxies thermosetting resins are so long as for example to have viscosity under the condition of 160 ℃ of temperature, pressure 8Mpa be that the material of the characteristic of 1kPas gets final product.In addition, this epoxies thermosetting resin for example under the condition of 160 ℃ of temperature, in the situation that pressurize with pressure 5～15Mpa, is compared with uninflated situation, and the reduced viscosity of resin is to approximately 1/8.Relative therewith, the epoxy resin in the B stage before the hot curing is under the condition below the glass transition temperature Tg, and the situation same degree ground with resin not being pressurizeed does not have viscosity, even pressurization can not produce viscosity yet.

Wiring layer 2014 is located at a first type surface S2001 of insulating resin layer 2012, by electric conducting material, preferred rolled metal, more preferably rolling copper consists of.Perhaps also can be formed by cathode copper etc.In insulating resin layer 2012 sides of wiring layer 2014, with state that wiring layer 2014 is electrically connected under, outstanding being provided with projected electrode 2016.Wiring layer 2014 is preferably one-body molded with projected electrode 2016.Thus, can prevent from causing in the generation of interfaces of wiring layer 2014 and projected electrode 2016 be full of cracks (crackle) etc. because of thermal stress, in addition, compare for the situation of Split type structure with projected electrode 2016 with wiring layer 2014, both connections are reliable.And, because element electrode 2052 and wiring layer 2014 are electrically connected, do not increase the such effect of process number so have.End regions in the side opposite with projected electrode 2016 of wiring layer 2014 is formed with engaging zones, and this engaging zones is in the surface configuration aftermentioned solder bump 2020 of the opposition side that is formed with projected electrode 2,016 one sides and double as distribution.

First type surface in the side opposite with insulating resin layer 2012 of wiring layer 2014 is provided with the protective layer 2018 be used to oxidation that prevents wiring layer 2014 etc.Can enumerate anti-flux layer etc. as protective layer 2018.Regulation zone at the protective layer corresponding with the engaging zones of wiring layer 2,014 2018 is formed with peristome 2018a, utilizes peristome 2018a to expose the engaging zones of wiring layer 2014.In peristome 2018a, form the solder bump 2020 as external connecting electrode, and be electrically connected solder bump 2020 and wiring layer 2014.Form solder bump 2020 the position, be that the formation zone of peristome 2018a for example is the end regions of the front end placed by distribution again.

Figure 15 is that summary section is amplified near projected electrode 2016 parts of Figure 14.

As shown in figure 15, projected electrode 2016 is provided with constriction 2022 in the prescribed limit of its side.In the present embodiment, constriction 2022 is arranged in the scope of regulation projected direction from the wiring layer side end 2016a of projected electrode 2016 to projected electrode 2016 (the figure, top) height.The regulation projected direction height that the projected electrode 2016 of constriction 2022 is set for example is about 1/4～3/4 of the whole height of projected electrode 2016.The side of the constriction 2022 of projected electrode 2016, more the central axis direction to projected electrode 2016 is crooked to compare side with the zone of constriction 2022 adjacency, and in constriction 2022, the diameter of projected electrode 2016 is thinner than the diameter of adjacent area.

In other words, the side of projected electrode 2016 is take the end 2022a of the projected electrode front of constriction 2022 as basic point, in wiring layer side and the larger variation of its curvature of front, for example, with respect to the curvature of the side of the front of end 2022a adjacency, it is large that the curvature of the side of wiring layer side sharply becomes.In addition, the side of projected electrode 2016, in the front of constriction 2022 with along with near front end and the mode of variation in diameter forms; In constriction 2022, compare the central shaft side that extends to the outer plug wire 2016e of wiring layer side along the side of the front of constriction 2022 and be positioned at projected electrode 2016.Constriction 2022 both can be arranged on the whole zone of the circumferencial direction of projected electrode 2016, also can be arranged in the prescribed limit of circumferencial direction.In addition, the shape during the overlooking of projected electrode 2016 although be to comprise oval-shaped sub-circular in the present embodiment, is not particularly limited in this, such as being the polygons such as quadrangle yet.In element mounting substrate 2010, because insulating resin layer 2012 enters constriction 2022, so utilize the anchoring effect (ア Application カ one effect) of constriction 2022 to improve the adhesion of constriction 2022 and insulating resin layer 2012.

In addition, on the surface of projected electrode 2016, be provided with metal level 2024, this metal level cover the top surface of projected electrode 2016 and projected electrode 2016 sides from front end 2016b to the part of stipulating the projected direction height.As metal level 2024, such as enumerating Ni (nickel)/Au (gold) coating, Ni/Au/Sn (tin) coating etc.It perhaps also can be conductive paste layer.In addition, metal level 2024 both can be that single layer structure also can be sandwich construction.The coverage of the metal level 2024 of projected electrode 2106 sides is decided to be the zone that constriction 2022 is not set in the present embodiment.That is, in the present embodiment, the position of the end 2024a of the wiring layer side of metal level 2024 is roughly consistent with the position of the end 2022a of the projected electrode front of constriction 2022.

In the constriction 2022 of projected electrode 2016, form micro concavo-convex on its surface, compare the top surface of projected electrode 2016, it is larger that surface roughness also can become.By the surface in constriction 2022 micro concavo-convex is set, utilizes the anchoring effect of micro concavo-convex to improve adhesion between projected electrode 2016 and the insulating resin layer 2012.The concavo-convex degree that can obtain desirable anchoring effect can be obtained by experiment, for example is 0.5～3 μ m.

At element mounting substrate 2010 semiconductor element mounted thereons 2050 that possess said structure, form semiconductor subassembly 2030.The structure of the semiconductor subassembly 2030 of present embodiment is across the projected electrode 2016 of insulating resin layer 2012 electrical connecting element board for mounting electronic 2010 and the element electrode 2052 of semiconductor element 2050.

Semiconductor element 2050 has respectively and projected electrode 2016 opposed element electrodes 2052.In addition, the first type surface at the semiconductor element 2050 of a side of joining with insulating resin layer 2012 is laminated with element protection layer 2054, and this element protection layer is provided with opening in order to expose element electrode 2052.Also can be at metal levels such as the surface coverage Ni/Au of element electrode 2052 coating.As the concrete example of semiconductor element 2050, can enumerate the semiconductor chips such as integrated circuit (IC), large scale integrated circuit (LSI).As the concrete example of element protection layer 2054, can enumerate polyimide layer.In addition, element electrode 2052 for example can use aluminium (Al).

In the present embodiment, between element mounting substrate 2010 and semiconductor element 2050, insulating resin layer 2012 is set, element mounting substrate 2010 is crimped on a first type surface S2001 of insulating resin layer 2012, semiconductor element 2050 is crimped on another first type surface.Then, make projected electrode 2016 connect insulating resin layer 2012, and be electrically connected with the element electrode 2052 that is arranged on semiconductor element 2050.Because insulating resin layer 2012 is made of the material that produces Plastic Flow by pressurization, so element mounting substrate 2010, insulating resin layer 2012 and semiconductor element 2050 with this order shape all-in-one-piece state under, the residual film that accompanies insulating resin layer 2012 between projected electrode 2016 and the element electrode 2052 can be suppressed at, connection reliability can be sought to improve.In addition, for example cover in the situation of Ni/Au coating on the surface of element electrode 2052, because making between the gold of each other surface configuration, projected electrode 2016 and element electrode 2052 engage (Jin-Jin engages), therefore, the connection reliability of projected electrode 2016 and element electrode 2052 further improves.

Figure 16 (A)～Figure 16 (G) is the process profile of the formation method of expression projected electrode 2016 and constriction 2022.

Shown in Figure 16 (A), prepare thickness larger than the thickness sum of the height of projected electrode 2016 and wiring layer 2014 at least and as the copper coin 2013 of metallic plate.

Then, shown in Figure 16 (B), by photoetching process, coincide with the pattern of projected electrode 2016 and selectively form resist 2071.Particularly, use laminater to attach the resist film of regulation thickness at copper coin 2013, use the photomask exposure of the pattern with projected electrode 2016 after, by developing, selectively form resist 70 at copper coin 2013.For the adhesion of raising with resist, the pre-treatments such as before the lamination resist film, hope is ground on the surface of copper coin 2013 as required, cleaning.

Then, shown in Figure 16 (C), take resist 2071 as mask, form the projected electrode 2016 of predetermined pattern at copper coin 2013.Particularly, by take resist 2071 as mask etching copper coin 2013, form the projected electrode 2016 with predetermined pattern.After forming projected electrode 2016, use remover to peel off resist 2071.

Then, shown in Figure 16 (D), at the first type surface that is formed with projected electrode 2,016 one sides of copper coin 2013, stacked have the resist 2072 of anti-plate until specified altitude.The height of resist 2072 is above height in position of end 2024a of the wiring layer side of metal level 2024.

Then, shown in Figure 16 (E), implement by O at the first type surface of resist 2072 as required ₂The ashing that plasma etc. carry out is processed or the liquid of regulation is processed, and only removes the resist 2072 of ormal weight, and only exposes the projected electrode 2016 of ormal weight.At this, projected electrode 2016 is height of the overlay area of corresponding metal level 2024 apart from the projecting height of resist 2072.

Then, shown in Figure 16 (F), in the exposed portions serve of projected electrode 2016, form metal level 2024.Metal level 2024 for example utilizes electrolytic plating method or non-electrolytic plating method, forms the Ni/Au metal level.In the situation that form metal level 2024 by electrolytic plating method or non-electrolytic plating method, the direction of the crystal grain of the metal of formation metal level 2024 is arranged in the vertical direction with respect to the contact-making surface of element electrode 2052.Thus, metal level 2024 imposes on the pressure of element electrode 2052 in the time of can being absorbed in element electrode 2052 crimping, thus, can reduce the worry to element electrode 2052 injuries.In addition, the metal level that consists of metal level 2024 forms, and the Ni layer is a side of joining with projected electrode 2016, and the Au layer is a side of joining with element electrode 2052.Have again, as the formation method of metal level 2017, without particular limitation of, such as using the conductive pastes such as copper cream, silver paste, gold paste.After metal level 2024 forms, use remover to peel off resist 2072.

Then, shown in Figure 16 (G), by take metal level 2024 as mask etching copper coin 2013, form constriction 2022 in the zone of the not covering metal layer 2024 of projected electrode 2016.By using metal level 2024 as mask, do not need to append the mask process that is used to form constriction 2022, can suppress the increase of process number.In addition, also can be when forming constriction 2022, in order to form concavo-convex in constriction 2022 to implementing roughening treatment in the surface of projected electrode 2016, so that the surface roughness of constriction 2022 is larger than the surface roughness of projected electrode 2016 top surfaces.As roughening treatment, process the processing such as (registered trade mark) liquid, plasma treatment etc. such as enumerating CZ.

According to operation described above, form projected electrode 2016 at copper coin 2013.The basal part diameter of the projected electrode 2016 of present embodiment, top diameter, highly for example be respectively about φ 40 μ m, approximately φ 30 μ m, about 40 μ m.In addition, the thickness of metal level 2024 for example is about 5 μ m, and the deflation degree of depth of constriction 2022 for example is approximately about 5 μ m.

Figure 17 (A)～Figure 17 (E) is the process profile of method of attachment of formation method, projected electrode 2016 and the element electrode 2052 of expression wiring layer 2014.

Shown in Figure 17 (A), make projected electrode 2016 towards insulating resin layer 2012 sides, copper coin 2013 is configured in a first type surface S2001 side of insulating resin layer 2012.In addition, another first type surface that is configured in insulating resin layer 2012 with the semiconductor element 2050 of projected electrode 2016 opposed element electrodes 2052 will be provided with.The thickness of insulating resin layer 2012 is the degree that the thickness of the height of projected electrode 2016 and metal level 2024 is added together, and is about 45 μ m.Then, use pressue device, across insulating resin layer 2012 crimping copper coins 2013 and semiconductor element 2050.Add the pressure in man-hour and temperature and be about respectively 5Mpa and 200 ℃.

By pressurization processing, insulating resin layer 2012 produces Plastic Flow, makes projected electrode 2016 connect insulating resin layer 2012.Then, shown in Figure 17 (B), make copper coin 2013, insulating resin layer 2012 and semiconductor element 2050 integrated, crimping projected electrode 2016 and element electrode 2052, and be electrically connected projected electrode 2016 and element electrode 2052.Because projected electrode 2016 is, compare its constriction 2022, the side view of front is along with near front end and the such shape of variation in diameter, so projected electrode 2016 connects insulating resin layer 2012 swimmingly.In the present embodiment, by copper coin 2013 is crimped on insulating resin layer 2012, thereby at the stacked insulating resin layer 2012 of the first type surface of the copper coin 2013 that is formed with projected electrode 2,016 one sides.

Then, shown in Figure 17 (C), by photoetching process, at the first type surface of the copper coin 2013 of a side opposite with insulating resin layer 2012, coincide with the pattern of wiring layer 2014 and selectively form resist 2073.

Then, shown in Figure 17 (D), take the first type surface of resist 2073 as mask etching copper coin 2013, form the wiring layer 2014 of predetermined pattern at copper coin 2013.After this, peel off resist 2073.The thickness of the wiring layer 2014 of present embodiment is about 15 μ m.

Then, shown in Figure 17 (E), by photoetching process, the first type surface at the wiring layer 2014 of a side opposite with insulating resin layer 2012 is formed on the protective layer 2018 that the zone corresponding with the formation position of solder bump 2020 has peristome 2018a.Then, in peristome 2018a, form solder bump 2020.

According to manufacturing process described above, form semiconductor subassembly 2030.In addition, in the situation that semiconductor element mounted thereon 2050 not obtains element mounting substrate 2010.

Figure 18 (A)～Figure 18 (D) is illustrated in temperature is changed under 125 ℃ the atmosphere from 25 ℃, goes out the result's of the relation between the variation of thermal stress of the scope of constriction 2022 and generation schematic diagram by analog computation.Figure 19 (A)～Figure 19 (C) is illustrated in temperature is changed under 125 ℃ the atmosphere from 25 ℃, goes out the result's of the relation between the variation of thermal stress of the scope of constriction 2022 and metal level 2024 and generation schematic diagram by analog computation.Figure 18 (D) illustrates the structure of the conventional example that constriction 2022 is not set.Figure 18 (A), Figure 18 (B), Figure 18 (C) illustrate respectively 3/4,1/2, the 1/4 i.e. structure of 30 μ m, 20 μ m, 10 μ m of height h2001, the h2002 of the end 2022a of constriction 2022, whole height that h2003 is projected electrode 2016.In addition, Figure 19 (A), Figure 19 (B), Figure 19 (C) illustrate respectively 3/4,1/2, the 1/4 i.e. structure of 30 μ m, 20 μ m, 10 μ m of height h2001, the h2002 of the end 2024a of the height of end 2022a of constriction 2022 and metal level 2024, whole height that h2003 is projected electrode 2016.Have again, omit the diagram of element electrode 2052.

Shown in Figure 18 (D), in the situation that constriction 2022 is not set, thermal stress concentrates near the connecting portion of projected electrode 2016 (metal level 2024) and semiconductor element 2050 (element electrode 2052).And thermal stress is concentrated, until in the semiconductor element 2050.On the other hand, shown in Figure 18 (A)～Figure 18 (C), in the situation that constriction 2022 is set, near concentrated projected electrode 2016 inside that move to of the thermal stress of the connecting portion of projected electrode 2016 (metal level 2024) and semiconductor element 2050 (element electrode 2052), seeing.And, almost can't see thermal stress in semiconductor element 2050 inside and concentrate.Namely, near the connecting portion of projected electrode 2016 (metal level 2024) and semiconductor element 2050 (element electrode 2052), move to projected electrode 2016 inside by constriction 2022 being set, can making the concentrated zone of thermal stress that produces because of variations in temperature.Thus, can disperse to be applied near the thermal stress of connecting portion of projected electrode 2016 (metal level 2024) and semiconductor element 2050 (element electrode 2052), reduce to put on the maximum stress of connecting portion.

In addition, respectively relatively when each (A) of Figure 18 (A)～Figure 18 (D) and Figure 19 (A)～Figure 19 (C) figure, each (B) figure, each (C) figure, following situation as can be known.Namely, except constriction 2022, also be provided with the metal level 2024 of the prescribed limit that covers projected electrode 2016 sides, thereby make near concentrated projected electrode 2016 inside that further move to of the thermal stress of the connecting portion of projected electrode 2016 (metal level 2024) and semiconductor element 2050 (element electrode 2052), seeing.Therefore, can further disperse to be applied near the thermal stress of connecting portion of projected electrode 2016 (metal level 2024) and semiconductor element 2050 (element electrode 2052), further reduce to put on the maximum stress of connecting portion.

If summarize the action effect of structure described above, the structure of the projected electrode 2016 of present embodiment is provided with constriction 2022 for the prescribed limit at projected electrode 2016 projected directions of its side.Thus, even if inferior and produced in the situation of thermal stress to the installation procedure of printed circuit substrate or environment for use in the manufacturing process of semiconductor subassembly 2030, semiconductor subassembly 2030, also can relax thermal stress to concentrating near the connecting portion of projected electrode 2016 and element electrode 2052.In addition, by the surface at projected electrode 2016 metal level 2024 is set, can further relax thermal stress to concentrating near the connecting portion of projected electrode 2016 and element electrode 2052, this metal level 2024 cover the top surface of projected electrodes 2016 and projected electrode 2016 sides from front end 2016b to the part of stipulating the projected direction height.And, owing to relax thermal stress near the concentrating connecting portion of projected electrode 2016 and element electrode 2052, so, be equipped at semiconductor element 2050 under the state of element mounting substrate 2010, reduce the worry to element electrode 2052 injuries.Therefore, the connection reliability of projected electrode 2016 and element electrode 2052 improves.Consequently, in the situation that semiconductor subassembly 2030 is installed in printed circuit substrate, the connection reliability between semiconductor element 2050 and the printed circuit substrate improves.In addition, because the destruction that can prevent semiconductor element 2050 so can improve the fabrication yield of semiconductor subassembly 2030, can be reduced the manufacturing cost of semiconductor subassembly 2030.

In addition, connect under the state of insulating resin layer 2012 at projected electrode 2016, because insulating resin layer 2012 enters constriction 2022, so utilize the anchoring effect of constriction 2022, the adhesion of constriction 2022 and insulating resin layer 2012 improves.Therefore, the adhesion between projected electrode 2016 and the insulating resin layer 2012 improves.In addition, by the surface in constriction 2022 micro concavo-convex is set, utilizes the anchoring effect of micro concavo-convex, the adhesion between projected electrode 2016 and the insulating resin layer 2012 further improves.And, because the raising of the adhesion between projected electrode 2016 and the insulating resin layer 2012, even if because the manufacturing process of semiconductor subassembly 2030, semiconductor subassembly 2030 have produced in the situation of thermal stress to the variations in temperature in the installation procedure of printed circuit substrate or environment for use etc., also can suppress peeling off of projected electrode 2016 and insulating resin layer 2012.Consequently, in the situation that semiconductor element 2050 is laminated in element mounting substrate 2010, be difficult to produce broken string between projected electrode 2016 and element electrode 2052, the connection reliability between projected electrode 2016 and the element electrode 2052 improves.

(execution mode 4)

In above-mentioned execution mode 3, clamping insulating resin layer 2012 between copper coin 2013 and semiconductor element 2050 by extrusion forming, has formed semiconductor subassembly 2030, but also can formation semiconductor subassembly 2030 as described below.Present embodiment below is described.The manufacture method of projected electrode 2016 and metal level 2024 is basically identical with execution mode 1, and for the structure mark identical Reference numeral identical with execution mode 1, suitably the description thereof will be omitted.

Figure 20 (A)～Figure 20 (D) is the process profile of the method for attachment of expression projected electrode 2016 and element electrode 2052.

Shown in Figure 20 (A), by the method identical with execution mode 1, make projected electrode 2016 towards insulating resin layer 2012 sides, the copper coin 2013 that will be formed with projected electrode 2016 and metal level 2024 is configured in a first type surface S2001 side of insulating resin layer 2012.

Then, shown in Figure 20 (B), give prominence to the stacked insulating resin layer 2012 of first type surface of sides at the projected electrode 2016 of copper coin 2013.As required, the first type surface by etching removal insulating resin layer 2012 exposes metal level 2024.Thus, projected electrode 2016 connects insulating resin layer 2012.

Then, shown in Figure 20 (C), configuration is laminated with copper coin 2013 and the semiconductor element 2050 of insulating resin layer 2012, so that projected electrode 2016 and element electrode 2052 are opposed.And, use pressue device, crimping copper coin 2013 and semiconductor element 2050.Thus, shown in Figure 20 (D), make copper coin 2013, insulating resin layer 2012 and semiconductor element 2050 integrated, crimping projected electrode 2016 and element electrode 2052, and be electrically connected projected electrode 2016 and element electrode 2052.

After this, use the method identical with execution mode 3, form wiring layer 2014, protective layer 2018, and solder bump 2020, finish semiconductor subassembly 2030.

Above, according to execution mode 4, except the above-mentioned effect of execution mode 3, can also obtain following effect.That is, in the present embodiment, owing to metal level 2024 exposes from insulating resin layer 2012, so the location in the time of correctly carrying out copper coin 2013 and semiconductor element 2050 crimping.Therefore, the connection reliability of projected electrode 2016 and element electrode 2052 further improves, and then the connection reliability of element mounting substrate 2010 and semiconductor element 2050 further improves.

(execution mode 5)

Above-mentioned execution mode 3 and 4 is by forming constriction 2022 take metal level 2024 as mask etching copper coin 2013, but also can formation constriction 2022 as described below.Present embodiment below is described.For the structure mark identical Reference numeral identical with execution mode 3, suitably the description thereof will be omitted.

Figure 21 (A)～Figure 21 (G) is the process profile of the formation method of expression constriction 2022.

Shown in Figure 21 (A), prepare to use the method identical with execution mode 3 to be formed with the copper coin 2013 of projected electrode 2016.

Then, shown in Figure 21 (B), has the resist 2074 of anti-plate until specified altitude the first type surface that is formed with projected electrode 2,016 one sides of copper coin 2013 is stacked.The height of resist 2074 is above height in position of end 2024a of the wiring layer side of metal level 2024.In the present embodiment because only at the top surface covering metal layer 2024 of projected electrode 2016, so stacked resist 2074 so that projected electrode 2016 imbed fully.

Then, shown in Figure 21 (C), implement by O at the first type surface of resist 2074 as required ₂The ashing that plasma etc. carry out is processed or the liquid of regulation is processed, and only removes the resist 2074 of ormal weight, thereby only exposes the projected electrode 2016 of ormal weight.At this, projected electrode 2016 is height corresponding with the overlay area of metal level 2024 from resist 2074 outstanding projecting heights.In the present embodiment, the top surface that only exposes projected electrode 2016.

Then, shown in Figure 21 (D), at the exposed portions serve formation metal level 2024 of projected electrode 2016.In the present embodiment, the top surface at projected electrode 2016 forms metal level 2024.After forming metal level 2024, use remover to peel off resist 2074.

Then, shown in Figure 21 (E), at the stacked resist 2075 of the first type surface that is formed with projected electrode 2,016 one sides of copper coin 2013 so that projected electrode 2016 and metal level 2024 imbed fully.

Then, shown in Figure 21 (F), utilize photoetching process selectively to remove resist 2075 in order to expose the zone of the formation constriction 2022 of projected electrode 2016.

Then, shown in Figure 21 (G), by take resist 2075 as mask etching copper coin 2013, form constriction 2022 in the zone that does not cover resist 2075 of projected electrode 2016.Because constriction 2022 is not to use metal level 2024 as mask, form but carry out etching take resist 2075 as mask, so the position of the end 2024a of the wiring layer side of the position of the end 2022a of the projected electrode front of constriction 2022 and metal level 2024 is inconsistent.Perhaps, identical with execution mode 1, by at the top surface of projected electrode 2016 and the part of side metal level 2024 being set, and form against corrosion 2075 with covering metal layer 2024, carry out etching take resist 2075 as mask, thereby also can make the position consistency of end 2022a of the projected electrode front of the position of end 2024a of wiring layer side of metal level 2024 and constriction 2022.In the situation of the position consistency of the end 2022a of the position that makes metal level 2024 end 2024a and constriction 2022, since continuous to the face of the wiring layer side of metal level 2024 from the end of constriction 2022, so can increase the deflation amount of projected electrode 2016.

According to operation described above, form constriction 2022 at projected electrode 2016.Copper coin 2013 with the projected electrode 2016 that is formed with as mentioned above constriction 2022 can utilize the method identical with execution mode 1 or 2 to be connected with element electrode 2052 and consists of semiconductor subassembly 2030.

Above, according to execution mode 5, except the above-mentioned effect of execution mode 3 and 4, can also obtain following effect.That is, in the present embodiment, when forming constriction 2022, do not use metal level 2024 as mask, and the resist 2075 that forms the zone beyond the zone take the constriction that covers projected electrode 2016 as carrying out etching, mask has formed constriction 2022.Therefore, the degree of freedom of the formation scope of metal level 2024 and the formation scope of constriction 2022 improves, and the two is made as the scope that is more suitable for.Thus, can further improve the connection reliability of projected electrode 2016 and element electrode 2052.In addition, also can consist of the structure that metal level 2024 is not set.

(execution mode 6)

Then, the portable set that possesses semiconductor subassembly of the present invention is described.Having, although show the example that carries on mobile phone as portable set, for example also can be personal portable data assistance (PDA), digital camera (DVC) and the such electronic equipment of digital camera (DSC) again.

Figure 22 is that expression possesses the

semiconductor subassembly

30,1030 of embodiments of the present invention, the structure chart of 2030 mobile phone.Mobile phone 2111 is the structure that is connected the first framework 2112 and the second framework 2114 by movable part 2120.The first framework 2112 and the second framework 2114 can be rotated take movable part 2120 as axle.In the first framework 2112, be provided with display part 2118 and the loud speaker section 2124 of the information such as display text or image.In the second framework 2114, be provided with and operate with the operating portions such as button 2122 and microphone section 2126.The

semiconductor subassembly

30,1030 of the embodiments of the present invention, 2030 inside of carrying at such mobile phone 2111.

Figure 23 is the part sectioned view (profile of the first framework 2112) of mobile phone shown in Figure 22.The

semiconductor subassembly

30,1030,2030 of the embodiments of the present invention is equipped on printed base plate 2128 via

solder bump

20,1020,2020, is electrically connected with display part 2118 grades via such printed base plate 2128.In addition, be provided with the heat-radiating substrates 2116 such as metal substrate at

semiconductor subassembly

30,1030,2030 rear side (with the face of

solder bump

20,1020,2020 opposite sides), for example, make the heats that produce from

semiconductor subassembly

30,1030,2030 not accumulate in the first framework 2112 inside, can be effectively to the external cooling of the first framework 2112.

According to element mounting substrate 10 and the semiconductor subassembly 30 of execution mode 1, semiconductor subassembly 30 improves to the installation reliability of printed circuit substrate.Therefore, for the portable set of the present embodiment that is equipped with such semiconductor subassembly 30, its Reliability Enhancement.

According to element mounting substrate 1010 and the semiconductor subassembly 1030 of the structure of the projected electrode 1016 with execution mode 2, semiconductor subassembly 1030 improves to the installation reliability of printed circuit substrate.Therefore, for the portable set of the present embodiment that is equipped with such semiconductor subassembly 1030, its Reliability Enhancement.

According to the element mounting substrate 2010 with structure of each projected electrode 2016 in the execution mode 3～5 and semiconductor subassembly 2030, semiconductor subassembly 2030 improves to the installation reliability of printed circuit substrate.Therefore, for the portable set of the present embodiment that is equipped with such semiconductor subassembly 2030, its Reliability Enhancement.

The invention is not restricted to the respective embodiments described above, can also carry out the distortion such as various design alterations based on those skilled in the art's knowledge, the execution mode that increases these distortion is also contained in the scope of the present invention.

For example, in the above-described embodiment, the wiring layer of element mounting substrate is individual layer, but is not limited to this, and wiring layer also can be the wiring layer after the multiple stratification.

In addition, structure of the present invention goes for being called wafer level chip size package (Chip Size Package: the chip size packages) manufacturing process of the semiconductor packages of technique.Can seek thus slimming, the miniaturization of semiconductor subassembly.

In addition, in each above-mentioned execution mode 3～5, although constriction 2022 is arranged in the prescribed limit that the wiring layer side end 2016a of projected electrode 2016 begins, but also can be arranged on the scope that does not comprise wiring layer side end 2016a, i.e. projected direction zone line of projected electrode 2016 sides etc.

The application based on and require the priority of the formerly Japanese patent application No.2008-080994 of the formerly Japanese patent application No.2008-022013 of on January 31st, 2008 application, the formerly Japanese patent application No.2008-050473 of application on February 29th, 2008, application on March 26th, 2008, its full content is by with reference to being incorporated in this.

Claims

1. element mounting substrate is characterized in that having:

Insulating resin layer,

Be arranged on described insulating resin layer a first type surface wiring layer and

Be electrically connected with described wiring layer and from described wiring layer to the side-prominent projected electrode of described insulating resin layer,

Cross section at the central shaft that comprises projected electrode is seen, the side of described projected electrode is crooked to described central axis direction, and the front end of the radius of curvature of this side from the wiring layer side end to this projected electrode changes continuously, the global shape of described projected electrode along with from described wiring layer side end near described front end, the variation in diameter of this projected electrode.

2. element mounting substrate according to claim 1 is characterized in that,

With compare near described wiring layer side end and the described front end, the radius of curvature of described side is less at middle section.

3. element mounting substrate according to claim 1 is characterized in that,

The diameter at the top of described projected electrode is 0.25～0.60 with respect to the ratio of the diameter of basal part.

4. element mounting substrate according to claim 1 is characterized in that,

The side of the opposition side of one side of extending with described wiring layer is compared, and the inclination of the side of the described projected electrode of the side that described wiring layer extends is milder.

5. element mounting substrate according to claim 4 is characterized in that,

The side of the described projected electrode of the side that described wiring layer extends, the curvature in the side of the described opposition side of its ratio of curvature is large.

6. element mounting substrate according to claim 4 is characterized in that,

In the side of the described projected electrode of the side that wiring layer extends, from the front end to the distance in the direction vertical with the projected direction of projected electrode of wiring layer side end, with respect in the side of described opposition side, from the front end to the distance in the direction vertical with the projected direction of projected electrode of wiring layer side end, larger and be below 3.5 times than 1.0 times.

7. element mounting substrate according to claim 4 is characterized in that,

Described projected electrode is positioned at such as lower area, is at least folding corner region in the circumference of the described insulating resin layer of approximate quadrangle form when namely overlooking.

8. element mounting substrate according to claim 1 is characterized in that,

In the prescribed limit of described projected electrode side, be provided with constriction.

9. element mounting substrate according to claim 8 is characterized in that,

Also have metal level, this metal level covers the part to specified altitude from the front end in the side of the top surface of described projected electrode and described projected electrode.

10. element mounting substrate according to claim 9 is characterized in that,

The end position of the projected electrode front of described constriction is consistent with the end position of the wiring layer side of described metal level.

11. element mounting substrate according to claim 9 is characterized in that,

The end position of the end position of the projected electrode front of described constriction and the wiring layer side of described metal level is inconsistent.

12. element mounting substrate according to claim 8 is characterized in that,

Surface in described constriction forms micro concavo-convex, compares the top surface of described projected electrode, and the surface roughness on described constriction surface is larger.

13. element mounting substrate according to claim 1 is characterized in that,

Described projected electrode and described wiring layer are one-body molded.

14. a semiconductor subassembly is characterized in that having:

Each described element mounting substrate in the claim 1 to 13, and

Be provided with the semiconductor element with the opposed element electrode of described projected electrode;

Described projected electrode connects described insulating resin layer, and described projected electrode and the electrical connection of described element electrode.

15. the manufacture method of an element mounting substrate is characterized in that, comprises following operation:

Form the operation of projected electrode, under the state of the regulation region division mask of a first type surface of metallic plate, spray etching solution, cross section at the central shaft that comprises described mask sees, the side of this projected electrode and radius of curvature described side crooked to described central axis direction changes to the front end continuously from the metallic plate side end;

Operation at the stacked insulating resin layer of first type surface of the described metallic plate of a side that is formed with described projected electrode; And

Selectively remove described metallic plate and form the operation of wiring layer.

16. the manufacture method of element mounting substrate according to claim 15 is characterized in that, the interior constriction that forms constriction of prescribed limit that is included in described projected electrode side forms operation.

17. the manufacture method of element mounting substrate according to claim 16, it is characterized in that, also comprise the metal level covering process, it is at the top surface of described projected electrode and the partial coverage metal level to specified altitude from the front end of described projected electrode side

Form operation in described constriction, by take the side of described metal level as the described projected electrode of mask etching, form constriction.

18. the manufacture method of a semiconductor subassembly is characterized in that, comprises following operation:

Across the described metallic plate of insulating resin layer crimping and the semiconductor element that is provided with the element electrode corresponding with described projected electrode, by making described projected electrode connect described insulating resin layer, thereby be electrically connected the crimping process of described projected electrode and described element electrode; And

19. a portable set is characterized in that,

Carried the described semiconductor subassembly of claim 14.