CN101426096B - Device for ordering device having horizontal division data and method thereof - Google Patents
Device for ordering device having horizontal division data and method thereof Download PDFInfo
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- CN101426096B CN101426096B CN2007101671906A CN200710167190A CN101426096B CN 101426096 B CN101426096 B CN 101426096B CN 2007101671906 A CN2007101671906 A CN 2007101671906A CN 200710167190 A CN200710167190 A CN 200710167190A CN 101426096 B CN101426096 B CN 101426096B
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Abstract
The present invention proposes a device for arranging data with horizontal segmentation, including a frame memory and a frame data arrangement device. The frame data arrangement device is coupled with the frame memory. The frame memory is used to store frame data with m vertical fields, and each vertical field has n horizontal fields. The frame data arrangement device is used to cover the first data block by the arranged first data block and cover the second data block by the arranged second data block, wherein, the frame data of the first data block with Vstripe line are arranged according to the n values, and the frame data of the second data block with Hstripe line are arranged according to the m values.
Description
Technical field
The present invention relates to a kind of apparatus and method of data arrangement, and particularly relate to a kind of devices and methods therefor that is used to arrange with horizontal partition data.
Background technology
Along with the progress of semiconductor and photoelectric technology, there are increasing digital camera, data monitor or digital camera etc. to be full of in the middle of life at present.Cameras such as digital camera, data monitor or digital camera need photo-sensitive cell that the light signal that is sensed is converted to signal of telecommunication output, generally speaking, photo-sensitive cell is sensitization coupling element (Charge Coupled Device) or complement metal oxide semiconductor image sensing element (CMOS Image Sensor) mostly, and the image quality of CCD comes goodly than the camera of cmos image sensing element.
Please refer to Fig. 1, Fig. 1 shows the form schematic diagram of the view data that traditional C CD produced.As shown in Figure 1, the view data 10 that this CCD produced has 5 perpendicualr field Field1～Field5.The size of supposing this view data is the view data of 45 * 60 pixels (pixel), and then each perpendicualr field Field1～Field5 has the data of 9 row, and the data of each row have 60 pixels.Then after the CCD imaging, perpendicualr field Fieldi has the data of 5*k+i row, and wherein, k is 0 integer to (45/5-1)=8, and i is from 1 to 5 integer.
Yet above-mentioned data format also can't make view data successfully be presented in the display frame, therefore, the action that above-mentioned view data must rearrange the view data work when showing, this arranges action and can arrange by software or hardware mode.Please refer to Fig. 2, Fig. 2 shows the aligning method schematic diagram of the view data 20 that traditional C CD produced.The view data 20 that frame memory is stored has 5 perpendicualr field Field1～Field5, at first, when arranging for the 1st time, the method can be taken out the capable data block of Hstripe each time, and according to the number of perpendicualr field the data block of taking out is made row and arrange, and override the data block of being read with the data block after arranging.Afterwards, repeat above-mentioned step till the arrangement of finishing entire frame data 20, can make that just the frame data after arranging may be displayed on the display unit.
Please refer to Fig. 2, when arranging for the first time, can the data block 201 that top Hstripe is capable read, according to the number (having 5 perpendicualr fields) of perpendicualr field the data block 201 of being read is made row afterwards and arrange, and the data block after will arranging 211 overrides the data block 201 of being read at this embodiment.Arrangement next time then is that data block 202 is read, and it is made row arrange, and the data block after will arranging then overrides data block 202.Then the rest may be inferred for arrangement mode afterwards, till the arrangement of finishing entire frame data 20, can make that just the frame data after arranging can be shown on the display unit.
Explain orally with an example at this, suppose that the size of this view data 20 is the view data of 45 * 60 pixels, Hstripe equals 20, and each perpendicualr field Field1～Field5 has the data of 9 row, and each row has 60 pixels.After the CCD imaging, perpendicualr field Fieldi has the data of 5*k+i row, and wherein, k is from 0 to 8 integer, and i is from 1 to 5 integer.At first, traditional aligning method can be read the data block of preceding 20 row.Afterwards, the data block of reading is made row according to the perpendicualr field number arranges, make perpendicualr field Field1 have the data of the 1st～9 row, perpendicualr field Field2 has the data of the 10th～18 row, perpendicualr field Field3 has the data of the 19th～27 row, perpendicualr field Field4 has the data of the 28th～36 row, and perpendicualr field Field5 has the data of the 37th～45 row, and the data of these each row comprise the 1st～20 pixel.Afterwards, the data block after arranging is override the data block of being read.
Then, the data block of the 21st～40 row is read, and the data block of reading is made row according to the perpendicualr field number arrange, make perpendicualr field Field1 have the data of the 1st～9 row, perpendicualr field Field2 has the data of the 10th～18 row, and perpendicualr field Field3 has the data of the 19th～27 row, and perpendicualr field Field4 has the data of the 28th～36 row, perpendicualr field Field5 has the data of the 37th～45 row, and the data of these each row comprise the 21st～40 pixel.Afterwards, the data block after arranging is override the data block of being read before.
At last, the data block of the 41st～60 row is read, and the data block of reading is made row according to the perpendicualr field number arrange, make perpendicualr field Field1 have the data of the 1st～9 row, perpendicualr field Field2 has the data of the 10th～18 row, and perpendicualr field Field3 has the data of the 19th～27 row, and perpendicualr field Field4 has the data of the 28th～36 row, perpendicualr field Field5 has the data of the 37th～45 row, and the data of these each row comprise the 41st～60 pixel.Afterwards, the data block after arranging is override the data block of being read before, just can finish the arrangement of entire frame data.
Yet,, have another kind to be suggested by the form of the view data of CCD generation in order to obtain better image quality.Please refer to Fig. 3, Fig. 3 shows the another kind of form schematic diagram of the view data that CCD produces.These frame data 30 comprise 5 perpendicualr fields, first perpendicualr field comprises 3 level field Field1-1, Field1-2 and Field1-3 again, second perpendicualr field also comprises 3 level field Field2-1, Field2-2 and Field2-3, and the level field that other vertical place comprises please refer to Fig. 3, and the rest may be inferred.The size of supposing this view data is the view data of 445 * 60 pixels, and then i perpendicualr field has the data of 5*k+i row, and wherein, k is from 0 to 8 integer, and i is from 1 to 5 integer; And the data of n level field Fieldi-n of i perpendicualr field comprise n+3*m pixel in the 5*k+i row, and wherein, n is from 1 to 3 integer, and m is from 0 integer to (60/3-1)=19.
These frame data 30 can't adopt the sortord of similar Fig. 2 frame data 30 to be rearranged the form that becomes may be displayed on the display unit, but, but can utilize software to add the computing of central microprocessor (CPU), frame data 30 are arranged in the form that may be displayed on the display unit.
Please refer to Fig. 4, Fig. 4 shows aligning method and the spended time schematic diagram of computing to having horizontal divided frame data 30 that utilizes central microprocessor (CPU).At first, as each vertical synchronizing signal VD (Vertical Synchronous) when reducing to low level by high level, the level field Field i-1～Field i-3 of frame data can be read, wherein, i is from 1 to 5 integer.By the time after all frame data all were read out, CPU can do the frame data of reading according to the algorithm of ordering and be arranged in the form that may be displayed on the display unit.
Yet above-mentioned method not only needs to spend the cycle time of 5 vertical synchronizing signal VD, and CPU Tcpu operation time that more will spend a section very long could become the entire frame data arrangement form may be displayed on the display unit.And frame data be read fully needs huge memory, the space of this memory will make the area of hardware increase again.Therefore, Fig. 3 be had horizontal divided frame data 30 and be arranged in the form that may be displayed on the display unit and not only need huge operation time, more need huge storage space.
For solving the above problems, the present invention proposes a kind of collating unit and method of revising the existing hardware structure, can the form that may be displayed on the display unit be can be arranged in so that have horizontal divided frame data, a large amount of operation time and storage space do not needed again.
Summary of the invention
The invention provides a kind of method that is used to arrange, it is characterized in that using its arrangement speed of collating unit of the method very fast, register and hardware space be less with data that level cuts apart.
The present invention proposes a kind of device with data that level cuts apart that is used to arrange, and this device comprises frame memory and frame data arrangement.Wherein, frame data arrangement is coupled to frame memory.Frame memory is used to store the frame data with m perpendicualr field, and each perpendicualr field has n level field.Frame data arrangement is used for arranging according to the n value first data block with Vstripe row of frame data, and first data block after will arranging overrides first data block, and have second a capable data block of Hstripe according to what the m value was arranged frame data, and second data block after will arranging overrides second data block.
In an embodiment of the present invention, above-mentioned frame data arrangement comprises first order device and second order device.The first order device is used for reading first data block from frame memory, and arranges first data block according to the n value, and first data block after will arranging is delivered to frame memory and override first data block.The second order device is used for reading second data block from frame memory, and arranges second data block according to the m value, and second data block after will arranging is delivered to frame memory and override second data block.
In an embodiment of the present invention, above-mentioned first order device comprises first whirligig, row collating unit and second whirligig.Wherein, the row collating unit is coupled to first whirligig, and second whirligig is coupled to collating unit.First whirligig is used to read first data block, and first data block revolved turn 90 degrees.The row collating unit is used for according to the n value postrotational first data block being listed as arrangement.Second whirligig is used for first data block after arranging revolved and turn 90 degrees, and will be through rotation, arrange and deliver to frame memory with first data block of rotating and override first data block.
The present invention proposes a kind of method with data that level cuts apart that is used to arrange, and may further comprise the steps: (1) reads first data block of Vstripe row in the frame data, and wherein, frame data have m perpendicualr field, and each perpendicualr field has n level field; (2) according to the n value first data block is arranged; (3) first data block after will arranging overrides first data block in the frame data; (4) read the second capable data block of Hstripe in the frame data; (5) according to the m value second data block is arranged; (6) this second data block after will arranging override second data block in these frame data.
In an embodiment of the present invention, according to the n value to this first data block arrange comprise the following steps: (a) rotation first data block, wherein, the angle of rotation be 90 the degree; (b) postrotational first data block is listed as arrangement according to the n value; (c) first data block after rotation is arranged, wherein, the angle of rotation is 90 degree.
In addition, in an embodiment of the present invention, after above-mentioned method each row in frame data are all arranged and override, just read second data block and arrange.And above-mentioned method can also be after each provisional capital in frame data is arranged and override, and just reads first data block and arranges.
Aligning method with data that level cuts apart provided by the present invention can be revised existing structure with device and implement, and the time ratio that is spent tradition time of using CPU to arrange to be spent few.In addition, partly hardware can utilize control signal to use jointly, so hardware space is also reduced.And above-mentioned Vstripe and Hstripe can design according to register size, in acceptable processing time scope, Vstripe and Hstripe can be set at smaller numerical value, to save storage space.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 shows the form schematic diagram of the view data that traditional C CD produced.
Fig. 2 shows the aligning method schematic diagram of the view data 20 that traditional C CD produced.
Fig. 3 shows the another kind of form schematic diagram of the view data that CCD produces.
Fig. 4 shows aligning method and the spended time schematic diagram of computing to having horizontal divided frame data 30 that utilizes central microprocessor.
Fig. 5 A shows the method schematic diagram of in the method provided by the present invention level field being arranged.
Fig. 5 B shows the method schematic diagram of in the method provided by the present invention perpendicualr field being arranged.
Fig. 6 A shows a kind of embodiment circuit diagram of the collating unit with horizontal divided frame data.
Fig. 6 B shows a kind of embodiment circuit diagram of level field data arrangement device 62.
Fig. 6 C shows the another kind of embodiment circuit diagram with collating unit of horizontal divided frame data provided by the present invention.
Fig. 7 A shows the method flow diagram of the aligning method of the present invention in carrying.
Fig. 7 B shows the detail flowchart of step S72.
Fig. 8 shows and uses aligning method of the present invention and the time diagram that installs required cost.
The reference numeral explanation
20,30,50,55: view data
201,202,211: data block
501,511,551,552,561: data block
501R90,511R90: data block
60,65: collating unit
61,66: frame memory
64,67: frame data arrangement
62: level field data arrangement device
621,623: whirligig
622: the row collating unit
63: perpendicualr field data arrangement device
670,672: selector
671: whirligig
673: the row collating unit
S71～S78: steps flow chart
S721～S723: steps flow chart.
Embodiment
The present invention proposes aligning method and device, please refer to Fig. 5 A and 5B with data that level cuts apart.Fig. 5 A shows the method schematic diagram of in the method provided by the present invention level field being arranged, and Fig. 5 B then shows the method schematic diagram of in the method provided by the present invention perpendicualr field being arranged.Method provided by the present invention can be done frame data 50 level field earlier and arrange, and will make perpendicualr field through the frame data 55 that level field is arranged again afterwards and arrange.
Please refer to Fig. 5 A, frame data 50 have 5 perpendicualr fields, and i perpendicualr field has level field Fieldi-1～Field i-3.In Fig. 5 A, method provided by the present invention is taken out the data block of Vstripe row each time, revolves then to turn 90 degrees, and makes row according to the number of level field again and arranges, and the data block after will arranging is again afterwards revolved and turn 90 degrees and override the data block of before being taken out.Among the embodiment of Fig. 5 A, the size of Vstripe is the same with the column number that level field Field i-1～Field i-3 is had, yet, the size of Vstripe column number unnecessary and that flat field Field i-1～Field i-3 is had is the same, and the size of Vstripe can be set according to the size of register.
Among Fig. 5 A, the data block 501 of Vstripe row is read out, be rotated by 90 degrees the back afterwards and produce data block 501R90, and then data block 501R90 is made row according to the number of level field arrange back generation data block 511R90, again data block 511R90 is revolved afterwards to turn 90 degrees and produce data block 511, the data block 501 of being read before again data block 511 being override.Fig. 5 A has represented the schematic diagram of level field arrangement for the first time, and the rest may be inferred afterwards does the level field arrangement to other parts of not arranging again, after each row of frame data 50 all carry out the level field arrangement, just can produce the frame data 55 of Fig. 5 B.
Please refer to Fig. 5 B, treat level field arrange finish after, frame data 55 can carry out the arrangement of perpendicualr field.In Fig. 5 B, the data block that method provided by the present invention is capable with Hstripe is each time taken out, and makes row according to the number of perpendicualr field again and arranges, and the data block after will arranging again afterwards overrides the data block of before being taken out.Among the embodiment of Fig. 5 B, the size of Hstripe can be set according to the size of register.
Among Fig. 5 B, the data block 551 that Hstripe is capable is read out, and then data block 551 is made row according to the number of perpendicualr field arrange back generation data block 561, the data block 561 of being read before then data block 561 being override.Fig. 5 A has represented the schematic diagram of perpendicualr field arrangement for the first time, and the rest may be inferred afterwards does the perpendicualr field arrangement to other parts of not arranging again, after each line data of frame data 50 is all arranged, just can produce the frame data 55 of Fig. 5 B.
Suppose that frame data 50 are the frame data of 10*6 pixel, the value of Vstripe is 2, and method then provided by the present invention can be read the data blocks 501 of preceding 2 row earlier, and data block 501 revolved to turn 90 degrees produces data block 501R90.Then, data block 501R90 is made row arrange, because the number of level field is 3, so when arranging, the 1st and 6 row of data block 501R90 are constant, the 2nd row then become the 4th row, and the 3rd row become the 2nd row, and the 4th row become the 5th row, and the 5th row become the 3rd row.Afterwards, arrange data block 511R90 later and can become data block 511, the data block 501 of being read before data block 511 can override through 90 rotations of spending.
Then repeat above-mentioned aligning method, after each row of frame data 50 all carry out the level field arrangement, just can produce frame data 55.Please note at this, because frame data 55 have passed through the level field arrangement, therefore the data of being deposited in each perpendicualr field Field1-Field5 rearrange into simple columns certificate, and unlike each columns in the frame data 50 according to being the columns certificate of breaing up.In other words, frame data 55 only need carry out aforesaid perpendicualr field to be arranged, and just can make frame data after the arrangement meet the form of display unit.
In the present embodiment, when carrying out the perpendicualr field arrangement, can read the data blocks 551 of preceding 2 row of frame data 55 earlier.Then, number according to perpendicualr field is arranged data block 551, its arrangement mode is that the 1st and 10 row are constant, and the 2nd row become the 6th row, and the 3rd row become the 2nd row, the 4th row become the 7th row, the 5th row become the 3rd row, and the 6th row become the 8th row, and the 7th row become the 4th row, the 8th row become the 9th row, and the 9th row become the 5th row.Data block 561 after will arranging then overrides data block 551, continues to repeat above-mentioned arrangement mode afterwards, finishes perpendicualr field up to each provisional capital of frame data 55 and arranges, and has just finished the arrangement of entire frame data 50.
By the method conceptual schematic view of above-mentioned Fig. 5 A and 5B, can utilize existing structure to implement collating unit with horizontal divided frame data.Wherein, it is identical that the device that is listed as arrangement and conventional frame data are carried out the device that perpendicualr field arranges, and general conventional digital video camera, digital camera all have whirligig, therefore, the collating unit with horizontal divided frame data provided by the present invention can utilize existing structure to make an amendment the collating unit of implementing to have horizontal divided frame data.
In addition, please note at this, because existing structure only has row to arrange the ability of (perpendicualr field arrangement), so the mode that aforesaid embodiment adopts rotation and row to arrange is carried out the level field arrangement, to meet existing structure, so just need not increase any hardware newly and be equipped with, also can finish the operation that level field is arranged.Yet the aforesaid practice is not restriction of the present invention, and the dealer also can increase the device with level field alignment capabilities newly, and to reach the purpose of data arrangement, so corresponding variation also belongs to category of the present invention.
In addition, though among the embodiment in front, be to carry out level field earlier to arrange, carry out perpendicualr field again and arrange; Yet such order is not to be restriction of the present invention, in actual applications, also can carry out the arrangement of perpendicualr field earlier, carries out the arrangement of level field again, and this also belongs to category of the present invention.
Please refer to Fig. 6 A, Fig. 6 A shows a kind of embodiment circuit diagram of the collating unit with horizontal divided frame data.As shown in Figure 6A, collating unit 60 comprises frame memory 61 and frame data arrangement 64.Wherein, frame data arrangement 64 is coupled to frame memory 61, and frame data arrangement 64 has comprised level field data arrangement device 62 and perpendicualr field data arrangement device 63.Level field and perpendicualr field data arrangement device 62 and 63 are controlled by control signal control_sig.When 62 runnings of control signal control_sig indication level field data arrangement device, the data block that level field data arrangement device 62 can be listed as the Vstripe of frame data in the frame memory 61 is taken out, revolve then and turn 90 degrees, make row according to the number of level field again and arrange, the data block after will arranging is again afterwards revolved and is turn 90 degrees and override the data block of before being taken out.After each row of frame data are all arranged, control signal control_sig can indicate 63 runnings of perpendicualr field data arrangement device, perpendicualr field data arrangement device 63 can the data block that the Hstripe of frame memory 61 is capable be read, and then the data block of reading is made row according to the number of perpendicualr field arrange the back and produce data block after arranging, the data block after then will arranging overrides the data block of being read before.Perpendicualr field data arrangement device 63 can continue above-mentioned action, and each line data of the frame data in frame memory 61 all is arranged, and has just finished rearranging of entire frame data,
Then, please refer to Fig. 6 B, Fig. 6 B shows a kind of embodiment circuit diagram of level field data arrangement device 62.Wherein, level field data arrangement device 62 comprises whirligig 621,623 and row collating unit 622.Wherein, row collating unit 622 is coupled to whirligig 621 and 623.Whirligig 621 is used to rotate the data block of the Vstripe row of reading from frame memory, and its anglec of rotation is 90 degree.Row collating unit 622 is used for according to the number of level field postrotational data block being made row and arranges.Whirligig 623 is used for the data block after arranging is rotated, and its anglec of rotation is 90 degree.
Above-mentioned Fig. 6 A and Fig. 6 B only are embodiments of the invention; be not to be used to limit the present invention; the people who generally knows this field can utilize extra control signal that two whirligigs are simplified to a whirligig, yet this execution mode is also when in the scope that the present invention protected.
Please refer to Fig. 6 C, Fig. 6 C shows the another kind of embodiment circuit diagram with collating unit of horizontal divided frame data provided by the present invention.This collating unit 65 comprises frame memory 66 and frame data arrangement 67.Wherein, frame data arrangement 67 is coupled to frame memory 66.Frame data arrangement 67 is controlled by control signal control_sig, and frame data arrangement 67 comprises selector 670,672, whirligig 671 and row collating unit 673.Selector 670 is coupled to whirligig 671, and whirligig 671 is coupled to selector 672, and selector 672 is coupled to row collating unit 673, and the row collating unit is coupled to selector 670.
At first, control signal control_sig can control whirligig and in regular turn the data block of the row of the Vstripe in the frame memory 66 be read, and the data block of reading is done the rotations of 90 degree, deliver to row collating unit 673 via selector 672, the data block that row collating unit 673 is exported selector 672 according to the number of level field is made row and is arranged, and after the data block after will arranging delivers to whirligig 671 and does the rotations of 90 degree, deliver to frame memory 66 by selector 670, the data block that selector 670 is exported overrides the data block of being read before at last.
After each row all finishes the level field arrangement in frame memory, control signal control_sig can allow whirligig no longer operate, the data block that selector 672 is capable with the Hstripe in the frame memory is read, and deliver to row collating unit 673, row collating unit 673 is arranged the data block of being read according to the number of perpendicualr field, deliver to frame memory 66 by selector 670 again, the data block of being read before the data block that selector 670 is exported can override.After the perpendicualr field arrangement is finished in each provisional capital in frame memory 66, just can finish the arrangement of the frame data in the frame memory 66.
Then, please refer to Fig. 7 A, Fig. 7 A shows and proposes the aligning method schematic flow sheet in a preferred embodiment of the present invention.At first, in step S71, the data block of frame data Vstripe row is read.Afterwards, in step S72, the data block of reading is done the rotation of 90 degree, and postrotational data block is made row according to the number of level field arrange, the data block after will arranging is done the rotation of 90 degree afterwards.Then, in step S73, the data block after rotation and the arrangement is override the data block of the Vstripe row of being read.Then, in step S74, whether each row in the judgment frame data all are read and arrange.If not, then get back to step S71, the data block that Vstripe afterwards is listed as is done the processing of step S71 to S73; If, then entering step S75, the data block that the Hstripe of frame data is capable is read.Then, in step S76, the data block of reading is listed as arrangement according to the number of perpendicualr field.Then in step S77, the data block after arranging is override the data block of reading.Then enter step S78, the judgment frame data each the row whether all is read out and arranges, if not, then get back to step S75, to after the capable data block of Hstripe do the processing of step S75 to S77; If, represent then that frame data have been arranged to finish, can deliver to display unit and normally show.
Please refer to Fig. 7 B, Fig. 7 B shows the detail flowchart of step S72.In step S721, the data block of reading is done the rotation of 90 degree.In step S722 postrotational data block being made row according to the number of level field afterwards arranges.Last data block of in step S723 step S722 being arranged is done the rotation of 90 degree.
Please refer to Fig. 8 at last, Fig. 8 shows and uses aligning method of the present invention and the time diagram that installs required cost.Among this embodiment, the size of Vstripe equals the column number that horizontal place has, yet this embodiment only is for convenience of description, is not to be used to limit the present invention.When vertical synchronizing signal VD reduces to low level by high level, the data block of Vstripe row can be read out, in this embodiment, the data block that is exactly level field Field 1-1～Field 1-3 can be read out, then simultaneously, can (just level field Field 1-1～Field1-3) be rotated and be listed as the action (S71 is described to S73 as step) of arrangement to Field 1 in the data block of reading horizontal field Field2-1～Field 2-3.By the time after each row of frame data all are arranged, then can make perpendicualr field to the frame data after arranging through row in regular turn and arrange (S75 is described to S77 as step), to finish the required arrangement action of entire frame data.It is arranged the time T cost that is spent and comprises the time of a level field arrangement and the time that several perpendicualr fields are arranged, and the time of its cost can come to such an extent that lack than utilizing CPU to arrange the time T cpu that is spent among Fig. 4.
In sum, the aligning method with data that level cuts apart provided by the present invention can be revised existing structure with device and implement, and the time ratio that is spent tradition time of using CPU to arrange to be spent few.In addition, partly hardware can utilize control signal to use jointly, so hardware space is also reduced.And above-mentioned Vstripe and Hstripe can design according to register size, in acceptable processing time scope, Vstripe and Hstripe can be set at smaller numerical value, to save storage space.
Though the present invention discloses as above with preferred embodiment; so it is not to be used to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining of the present invention.
Claims (7)
1. one kind is used to arrange the device with horizontal partition data, comprising:
One frame memory is used to store the frame data with m perpendicualr field, and each this perpendicualr field has n level field, and wherein, m and n are integer; And
One frame data arrangement, be coupled to this frame memory, be used for arranging at least one first data block with one first number columns of these frame data according to the n value, and this first data block after will arranging overrides this first data block, and at least one second data block with one second number line number of arranging these frame data according to the m value, and this second data block after will arranging overrides this second data block
Wherein, this frame data arrangement is after each row in these frame data are all arranged and override, and just arranges this second data block according to the m value,
Wherein, this frame data arrangement is after each provisional capital in these frame data is arranged and override, and just arranges this first data block according to the n value.
2. as claimed in claim 1ly be used to arrange the device with horizontal partition data, wherein, this frame data arrangement comprises:
One first order device is used for reading this first data block from this frame memory, and arranges this first data block according to the n value, and this first data block after will arranging is delivered to this frame memory and override this first data block; And
One second order device is used for reading this second data block from this frame memory, and arranges this second data block according to the m value, and this second data block after will arranging is delivered to this frame memory and override this second data block.
3. as claimed in claim 2ly be used to arrange the device with horizontal partition data, wherein, this frame data arrangement is controlled by a control signal, this control signal control this frame data arrangement when carry out this first with the arrangement of this second data block.
4. as claimed in claim 3ly be used to arrange the device with horizontal partition data, wherein, this first order device comprises:
One first whirligig is used to read this first data block, and this first data block revolved turn 90 degrees;
One row collating unit is coupled to this first whirligig, is used for according to the n value postrotational this first data block being listed as arrangement; And
One second whirligig is coupled to this collating unit, be used for this first data block after arranging revolved turning 90 degrees, and will be through rotation, arrange and deliver to this frame memory with this first data block of rotating and override this first data block.
5. as claimed in claim 1ly be used to arrange the device with horizontal partition data, wherein, this frame data arrangement comprises:
One first selector is controlled by a control signal;
One second selector is controlled by this control signal;
One whirligig is coupled to this first and second selector, is controlled by this control signal, is used for this first data block revolved turning 90 degrees; And
One row collating unit is coupled to this first and second selector, is controlled by this control signal;
Wherein, this first selector is selected this second data block according to this control signal or is revolved this first data block after turning 90 degrees; This collating unit is listed as arrangement or according to the m value this second data block is listed as arrangement postrotational this first data block according to the n value according to this control signal; This first data block after this whirligig more will be arranged according to this control signal is revolved and is turn 90 degrees,
This second data block or process rotation, arrangement and postrotational this first data block after this second selector is selected to arrange according to this control signal.
6. one kind is used to arrange the method with horizontal partition data, comprising:
Read in the frame data, have one first data block of a plurality of columns, wherein, these frame data have m perpendicualr field, and each this perpendicualr field has n level field;
According to the n value this first data block is arranged;
This first data block after arranging is override first data block in these frame data;
Read in these frame data, have one second data block of a plurality of line numbers;
According to the m value this second data block is arranged; And
This second data block after arranging is override second data block in these frame data,
Wherein, after each row in these frame data are all arranged and override, just read this second data block and this second data block arranged,
Wherein after each provisional capital in these frame data is arranged and override, just read this first data block and this first data block is arranged.
7. as claimed in claim 6ly be used to arrange method, wherein, according to the n value this first data block arranged and to comprise the following steps: with horizontal partition data
(a) rotate this first data block, wherein, the angle of rotation is 90 degree;
(b) postrotational this first data block is listed as arrangement according to the n value; And
(c) this first data block after rotation is arranged, wherein, the angle of rotation is 90 degree.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007101671906A CN101426096B (en) | 2007-11-02 | 2007-11-02 | Device for ordering device having horizontal division data and method thereof |
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| CN2007101671906A CN101426096B (en) | 2007-11-02 | 2007-11-02 | Device for ordering device having horizontal division data and method thereof |
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| CN101426096B true CN101426096B (en) | 2010-07-28 |
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| CN105302863B (en) * | 2015-09-22 | 2018-08-14 | 北京空间飞行器总体设计部 | A kind of telemetry storage method based on data pair |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5438369A (en) * | 1992-08-17 | 1995-08-01 | Zenith Electronics Corporation | Digital data interleaving system with improved error correctability for vertically correlated interference |
| EP0866502A2 (en) * | 1997-03-21 | 1998-09-23 | Dalsa Inc. | Architecture for a CCD-imager with multiple readout registers |
| CN1543210A (en) * | 2003-04-28 | 2004-11-03 | ���ǵ�����ʽ���� | Image data processing system and image data reading and writing method |
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2007
- 2007-11-02 CN CN2007101671906A patent/CN101426096B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5438369A (en) * | 1992-08-17 | 1995-08-01 | Zenith Electronics Corporation | Digital data interleaving system with improved error correctability for vertically correlated interference |
| EP0866502A2 (en) * | 1997-03-21 | 1998-09-23 | Dalsa Inc. | Architecture for a CCD-imager with multiple readout registers |
| CN1543210A (en) * | 2003-04-28 | 2004-11-03 | ���ǵ�����ʽ���� | Image data processing system and image data reading and writing method |
Non-Patent Citations (2)
| Title |
|---|
| JP特开2006-203437A 2006.08.03 |
| JP特开平11-32320A 1999.02.02 |
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