A kind of TFT LCD panel electrostatic discharge protecting circuit and LCD
Technical field
The present invention relates to a kind of peripheral circuit of liquid crystal display device and have the LCD of this peripheral circuit, particularly a kind of Thin Film Transistor-LCD (TFT LCD) panel electrostatic discharge protecting circuit and have the LCD of this circuit.
Background technology
Compare with the cathode ray tube (CRT) in past, extremely thin and have Thin Film Transistor-LCD (TFT LCD) high development of fabulous chromatic characteristic, and become generally.Usually, liquid crystal display device is a kind of being used for according to being applied to the equipment that comes display image with the data-signal on the pixel of arranged separately, these pixel control transmittances are to produce piece image, and therefore a liquid crystal display device comprises a picture element matrix and the driver IC (IC) that is used to drive these pixels.
Because the last lower glass substrate of above-mentioned Thin Film Transistor-LCD (TFT LCD) is an insulator, so the static that produces during the manufacture process of thin film transistor (TFT) array can be in this gathering on glass, and static can be produced by the various processing procedures that are applied on the various substrates.This static can cause the damage of electrostatic discharge to thin film transistor (TFT) array.In addition, static can cause dust granules to be adsorbed on the glass substrate, and this can pollute thin film transistor (TFT) array and colorful optical filter array.In order to reduce static, can handle the manufacturing equipment that is used to produce Thin Film Transistor-LCD and adopt various technologies so that static minimizes.Yet the thin film transistor (TFT) array of a good design still must comprise the protection to static discharge.
Fig. 1 is the ESD protection circuit synoptic diagram of prior art, and this ESD protection circuit comprises: one group of gate line lead-in wire liner 8 that applies signal to gate line; One group of data cable lead wire liner 9 that applies signal to data line; One group of gate line 3 is formed on the thin-film transistor array base-plate; One group of data line 4 is formed on the thin-film transistor array base-plate; Your Majesty's common electrode distribution 2 is formed at thin-film transistor array base-plate and places outward; One group of public electrode (Cst on Common) that is used to form memory capacitance is formed on the thin-film transistor array base-plate, and is connected with Your Majesty's common electrode distribution 2; One group of first electrostatic discharge protector 5 connects gate line 3 and Your Majesty's common electrode distribution 2; One group of second electrostatic discharge protector 6 connects data line 4 and Your Majesty's common electrode distribution 2.
The process for dispersing of the high electric static that ESD protection circuit will produce in Thin Film Transistor-LCD in the prior art (TFT LCD) the panel manufacture process is as follows:
If high voltage static occurs on the data line 4; then this high voltage static can be dispersed to this data line 4 and further by on the Your Majesty's common electrode distribution on second whole front panel that electrostatic discharge protector 6 is dispersed to data line is connected 2, make whole front panel keep same current potential.The resistance of second electrostatic discharge protector 6 is tens thousand of kilohms (K Ω), so 6 on-off actions of second electrostatic discharge protector of this moment.With occurring on the gate line 3 by high voltage static; then this high voltage static can be dispersed to this gate line 3 and further by on the Your Majesty's common electrode distribution 2 on second whole front panel that electrostatic discharge protector 5 is dispersed to data line is connected, make whole front panel keep same current potential.
Above-mentioned electrostatic protection method of the prior art can prevent the inner electrostatic breakdown phenomenon that takes place of panel effectively.But, relatively more fragile for the static that the outside flows into, especially short circuits such as local initiation easily such as online and line juxtaposition position and via hole etc., cause the short circuit (Gate-Common Short) between gate line and the public electrode, short circuit between data line and the public electrode (Data Common Short) and picture element flaw (Pixel Defect) etc. are bad.
Summary of the invention
The objective of the invention is defective at prior art; a kind of Thin Film Transistor-LCD (TFT LCD) panel electrostatic discharge protecting circuit is proposed; by the electrostatic induced current of prior cut-out entering surface intralamellar part, effectively prevent the influence of counter plate driving and the short circuit phenomenon between the electrode distribution.
To achieve these goals, the invention provides a kind of TFT LCD panel electrostatic discharge protecting circuit, comprising:
One substrate;
One group of gate line is formed on the described substrate;
One group of data line is formed on the described substrate, and is arranged in a crossed manner with described gate line, and defines a pixel region, and wherein each pixel region includes film transistor device and pixel electrode;
One gate line lead-in wire liner is formed at described substrate edges, is connected with described gate line;
One data cable lead wire liner is formed at described substrate edges, is connected with described data line;
One Your Majesty's common electrode distribution is formed at described substrate peripheral;
One buffering public electrode distribution is formed at described substrate peripheral;
One first electrostatic discharge protector connects described gate line and buffering public electrode distribution;
One second electrostatic discharge protector connects described data line and buffering public electrode distribution;
One the 3rd electrostatic discharge protector connects described Your Majesty's common electrode distribution and buffering public electrode distribution, is used to control the conducting between described Your Majesty's common electrode distribution and the buffering public electrode distribution; Described buffering public electrode distribution and the 3rd electrostatic discharge protector are used to cut off the static of entering surface intralamellar part, avoid static directly to impact described gate line and data line.
In the such scheme, be formed with the memory capacitance of being made up of jointly public electrode lead-in wire and pixel electrode on the described pixel electrode, wherein the public electrode lead-in wire is connected with described public electrode distribution.Described first electrostatic discharge protector, second electrostatic discharge protector, the 3rd electrostatic discharge protector have identical structure, form by four thin film transistor (TFT)s respectively, the source electrode of first thin film transistor (TFT) and its gate electrode link together, and form an input end of electrostatic discharge protector; The source electrode of the 4th thin film transistor (TFT) and its gate electrode link together, and form an output terminal of electrostatic discharge protector; The source electrode of first thin film transistor (TFT) is connected with second thin film transistor (TFT) drain electrode; The source electrode of the source electrode of the drain electrode of first thin film transistor (TFT), second thin film transistor (TFT), the 3rd thin film transistor (TFT), and the drain electrode of the 4th thin film transistor (TFT) link together, and be connected with the gate electrode of second thin film transistor (TFT) and the gate electrode of the 3rd thin film transistor (TFT); The 3rd thin film transistor (TFT) drain electrode is connected with the 4th thin film transistor (TFT) source electrode.
To achieve these goals, the invention provides a kind of LCD, comprising:
One thin-film transistor array base-plate, wherein said thin-film transistor array base-plate comprises the ESD protection circuit of describing in the aforementioned schemes;
One colored filter substrate is oppositely arranged with described thin-film transistor array base-plate, injects liquid crystal therebetween;
One public electrode is formed on described colored filter substrate or the thin-film transistor array base-plate;
The public electrode distribution of wherein said ESD protection circuit is electrically connected with described public electrode.
The present invention has set up one deck buffering public electrode distribution and one group of the 3rd electrostatic discharge protector with respect to prior art in Your Majesty's common electrode distribution periphery.Buffering public electrode distribution of the present invention and the 3rd electrostatic discharge protector have cut off the static of entering surface intralamellar part in advance, have effectively prevented the influence of counter plate driving and the short circuit phenomenon between the electrode distribution.
Below in conjunction with the drawings and specific embodiments the present invention is further illustrated in more detail.
Description of drawings
Fig. 1 is the ESD protection circuit synoptic diagram of prior art;
Fig. 2 is an ESD protection circuit synoptic diagram of the present invention;
Fig. 3 is the electrostatic discharge protector of four thin film transistor (TFT)s of a kind of use of the present invention.
Mark among the figure: 1, buffering public electrode distribution; 2, Your Majesty's common electrode distribution; 3, gate line; 4, data line; 5, first electrostatic discharge protector; 6, second electrostatic discharge protector; 7, the 3rd electrostatic discharge protector; 8, gate line lead-in wire liner; 9, data cable lead wire liner; 10, the gate electrode of first thin film transistor (TFT); 11, the source electrode of first thin film transistor (TFT); 12, the drain electrode of first thin film transistor (TFT); 13, the gate electrode of second thin film transistor (TFT); 14, the source electrode of second thin film transistor (TFT); 15, the drain electrode of second thin film transistor (TFT); 16, the gate electrode of the 3rd thin film transistor (TFT); 17, the source electrode of the 3rd thin film transistor (TFT); 18, the drain electrode of the 3rd thin film transistor (TFT); 19, the gate electrode of the 4th thin film transistor (TFT); 20, the source electrode of the 4th thin film transistor (TFT); 21, the drain electrode of the 4th thin film transistor (TFT); 22, first outer lead; 23, second outer lead.
Embodiment
Fig. 2 is a kind of ESD protection circuit synoptic diagram that Thin Film Transistor-LCD of the present invention (TFT LCD) panel uses.As shown in Figure 2, ESD protection circuit of the present invention comprises: one group of gate line lead-in wire liner 8 that applies signal to gate line; One group of data cable lead wire liner 9 that applies signal to data line; One group of gate line 3 that is formed on the thin-film transistor array base-plate; One group of data line 4 that is formed at thin-film transistor array base-plate; Form Your Majesty's common electrode distribution 2 with the thin-film transistor array base-plate periphery, these ingredients and of the prior art similar, the present invention is different from prior art and is characterised in that: in the periphery of thin-film transistor array base-plate, increased buffering public electrode distribution 1; First electrostatic discharge protector 5 connects gate line 3 and buffering Your Majesty common electrode distribution 1; Second electrostatic discharge protector 6 connects data line 4 and buffering Your Majesty common electrode distribution 1; Near Your Majesty's common electrode distribution 2 and buffering public electrode distribution 1 link position, be provided with the 3rd electrostatic discharge protector 7.
Below in conjunction with ESD protection circuit shown in Figure 2, the course of work and the mechanism of holding circuit of the present invention is described in detail.
If high voltage static occurs on the data line 4, then this high voltage static can be dispersed to this data line 4 and further be distributed on the buffering public electrode distribution 1 by second electrostatic discharge protector 6; Then be dispersed on Your Majesty's common electrode distribution 1 by the 3rd electrostatic discharge protector 7, thus the high voltage electrostatic dispersion to whole front panel.If high voltage static occurs on the gate line 3, then this high voltage static can be dispersed to this data line 3 and be distributed on the buffer electrode distribution 1 by first electrostatic discharge protector 5; Then be dispersed on Your Majesty's common electrode distribution 1 by the 3rd electrostatic discharge protector 7, thus the high voltage electrostatic dispersion to whole front panel.If high voltage static occurs in the panel outside; high voltage static at first looses to public electrode distribution 2; and further be distributed on the buffering public electrode distribution 1 by the 3rd electrostatic discharge protector 7; and then pass through first or second electrostatic discharge protector and disperse to data line or gate line, avoid directly driving circuit of high voltage static from impacting gate line, data line or directly being connected with them.
Because the resistance of each electrostatic discharge protector is tens thousand of kilohms (K Ω), so second electrostatic discharge protector 6 and 7 on-off actions of the 3rd electrostatic discharge protector of this moment make whole front panel keep same current potential.Even it is inoperative that buffering public electrode distribution 1 opens circuit.Also have Your Majesty's common electrode distribution 2 to shield, make ESD protection circuit that double shielding be arranged.
Electrostatic discharge protector embodiment of the present invention:
Fig. 3 is the circuit diagram of a kind of specific embodiment of electrostatic discharge protector.As shown in the figure, this electrostatic discharge protector is made of four thin film transistor (TFT)s, can form simultaneously with the thin film transistor (TFT) of thin-film transistor array base-plate.Wherein, the gate electrode 11 of first thin film transistor (TFT) and the source electrode 12 of first thin film transistor (TFT) link together, and form first outer lead 23 of electrostatic discharge protector.Simultaneously, the drain electrode 16 of second thin film transistor (TFT) is connected with the source electrode 12 of first thin film transistor (TFT).Similarly, the source electrode 15 of the gate electrode 14 of second thin film transistor (TFT) and second thin film transistor (TFT) links together.Simultaneously, the drain electrode 13 of first thin film transistor (TFT) is connected with the source electrode 15 of second thin film transistor (TFT).The source electrode 18 of the gate electrode 17 of the 3rd thin film transistor (TFT) and the 3rd thin film transistor (TFT) links together, and links together with drain electrode 13 and second the transistorized gate electrode 14 of Bomi, source electrode 15 of first thin film transistor (TFT).The drain electrode 22 of the 4th thin film transistor (TFT) is connected with the source electrode 18 of the 3rd thin film transistor (TFT).With preceding similar, the source electrode 21 of the gate electrode 20 of the 4th thin film transistor (TFT) and the 4th thin film transistor (TFT) links together, and forms second outer lead 24 of electrostatic discharge protector.The drain electrode 19 of the 3rd thin film transistor (TFT) is connected with the source electrode 21 of the 4th thin film transistor (TFT) simultaneously.
Electrostatic discharge protector shown in Fig. 3 can be used as and connects second electrostatic discharge protector between gate line and the Your Majesty's common electrode distribution; and, also can be used as Your Majesty's common electrode distribution and cushion the 3rd electrostatic discharge protector that is connected between the public electrode distribution as connecting first electrostatic protection device between data line and the Your Majesty's common electrode distribution.Its above-mentioned implementation column only is a kind of of electrostatic protection ring in the prior art, and in fact, first, second, third electrostatic discharge protector can adopt any protection structure of the prior art, the three can be identical also can be different.
The summary speech, the invention provides a kind of Thin Film Transistor-LCD (TFT LCD) panel electrostatic discharge protecting circuit, enhanced film transistor liquid crystal display (TFT-LCD) (TFT LCD) is to the protective capability of static discharge effectively.The static that in Thin Film Transistor-LCD (TFT LCD) manufacture process, produces; by this ESD protection circuit; cut off the static of entering surface intralamellar part in advance, can effectively prevent the influence of counter plate driving and the short circuit phenomenon between the electrode distribution.
The present invention discloses a kind of LCD simultaneously, wherein comprises the thin film transistor (TFT) array pole plate, and above-mentioned ESD protection circuit is applied on this thin-film transistor array base-plate; Colored filter substrate and thin-film transistor array base-plate are oppositely arranged, and inject liquid crystal therebetween; Be formed with a public electrode on colored filter substrate or the thin-film transistor array base-plate; Public electrode is electrically connected with the public electrode distribution utmost point of described ESD protection circuit.
Explanation is at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to most preferred embodiment, those skilled in the art is to be understood that, can use different materials and equipment to realize it as required, promptly can make amendment or be equal to replacement, and not break away from the spirit and the scheme of technical solution of the present invention technical scheme of the present invention.