CN100585842C - Chip and its manufacture method - Google Patents

Chip and its manufacture method Download PDF

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Publication number
CN100585842C
CN100585842C CN 200710165130 CN200710165130A CN100585842C CN 100585842 C CN100585842 C CN 100585842C CN 200710165130 CN200710165130 CN 200710165130 CN 200710165130 A CN200710165130 A CN 200710165130A CN 100585842 C CN100585842 C CN 100585842C
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China
Prior art keywords
chip
conductive
conductive gasket
gaskets
gasket
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Expired - Fee Related
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CN 200710165130
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Chinese (zh)
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CN101425490A (en
Inventor
左克扬
王威
徐嘉宏
周忠诚
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Raydium Semiconductor Corp
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Raydium Semiconductor Corp
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Priority to CN 200710165130 priority Critical patent/CN100585842C/en
Publication of CN101425490A publication Critical patent/CN101425490A/en
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Publication of CN100585842C publication Critical patent/CN100585842C/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

The invention discloses a chip and a manufacturing method thereof. The manufacturing method of the chip comprises the following steps: arranging a plurality of first conducting gaskets on the chip along one direction, wherein the first conducting gasket comprises a first part and a second part relative to the first part, and the length of the first part along the direction is larger than that of the second part along the direction; and arranging a plurality of second conducting gaskets arranged with the first conducting gaskets in a staggered manner on the chip, wherein each second conducting gasket comprises a third part and a fourth part relative to the third part, and the length of each third part along the direction is larger than that of the fourth part along the direction. The direction from the third part to the fourth part is opposite to the direction from the first part to the second part. The chip and the manufacturing method thereof can ensure that the conducting gaskets are densely arranged on the chip; and the design of the conducting gaskets at the corner can reduce the pressure damage of the chip generated during the encapsulation process.

Description

Chip and manufacture method thereof
Technical field
The present invention relates to a kind of chip and manufacture method thereof, and especially, the present invention relates to a kind of chip and manufacture method thereof of conductive gasket design that closeer conductive gasket is arranged and can be reduced the pressure damage of chip corner that have.
Background technology
Because semiconductor science and technology is fast-developing, the function of chip is more and more diversified in recent years.Correspondingly, the required circuit design of chip effect is also complicated day by day, and therefore, on one chip, the quantity of playing the part of the conductive gasket that the electronic signal contact is provided increases thereupon.When the quantity of conductive gasket surpasses to a certain degree, certainly will directly have influence on the size of chip, and the number of chips that brilliant unit of the unit of making can cut out reduces.So, the cost of chip production correspondingly improves.Moreover excessive chip also runs in the opposite direction with the product trend toward miniaturization of electronic industry now.Therefore, arrangement and the layout of conductive gasket on chip becomes cost-effective important directions.
In the prior art, United States Patent (USP) notification number the 6th, 040,984 and 6,780 has disclosed the conductive gasket of have dislocation (staggered pattern) and differing heights or thickness for No. 749, in order to reduce chip size.Referring to Fig. 1, Fig. 1 is the schematic diagram that the 6th, 040, No. 984 disclosed chips of United States Patent (USP) notification number are connected with circuit board.As shown in Figure 1, the conductive gasket A2 that has differing heights (that is, dislocation) on conductive gasket A1 on the chip C1 and the circuit board B1 is connected.Note that for the conductive gasket on discrimination circuit plate and the chip, represent the conductive gasket that is positioned on the circuit board with " contact " speech in this manual.In addition, United States Patent (USP) notification number the 6th, then power line-ground wire (power line-ground line) and holding wire (I/O) are made separate design 291, No. 898, so that the circuit board connection design corresponding to the conductive gasket of dislocation design to be provided at the conductive gasket of above-mentioned dislocation design.
On the other hand, the corner regions of chip is usually because of the stress that canned program produced sustains damage, and then makes the chip yield influenced.Therefore, if can solve the problem of chip corner unbalanced stress, can make and to utilize the space to become big on the chip and stable maintenance yield preferably.
Summary of the invention
Therefore, the object of the present invention is to provide a kind of manufacturing method of chip, to solve foregoing problems.
According to a specific embodiment, manufacturing method of chip of the present invention comprises the following step: at first, on chip, a plurality of first conductive gaskets (bondingpad) are set along preset direction, each first conductive gasket comprises first and with respect to the second portion of first, and, each first along the length on the preset direction greater than each second portion along the length on the preset direction.Then, a plurality of second conductive gaskets are set on chip and these first conductive gaskets are staggered, each second conductive gasket comprises third part and with respect to the 4th part of third part, and, each third part along the length on the preset direction greater than each the 4th part along the length on the preset direction.Especially, from the tetrameric second direction of third part to the with the first direction to second portion is opposite from first.
Manufacturing method of chip of the present invention, wherein this chip is connected in corresponding a plurality of contacts of circuit board by these these conductive gaskets, and each conductive gasket is connected with corresponding this contact by a wiring.
Manufacturing method of chip of the present invention, further comprise the following step: according on each first conductive gasket and second conductive gasket with this circuit board on the distance of these corresponding a plurality of contacts far and near, adjustment is arranged at the solder sphere on each conductive gasket and each contact or the size of projection, so that respectively the resistance value of the respectively equivalent conductive path between this contact that this conductive gasket is corresponding with it is approaching basically.
Manufacturing method of chip of the present invention, wherein according to the area of each first conductive gasket and second conductive gasket, these these solder sphere or this these projections with different resistance values are set, so that respectively the resistance value of the respectively equivalent conductive path between this contact that this conductive gasket is corresponding with it is approaching basically on these these conductive gaskets.
Manufacturing method of chip of the present invention, wherein these these first conductive gasket has the drops outward appearance.
Manufacturing method of chip of the present invention, wherein these these second conductive gasket has the drops outward appearance.
Another object of the present invention is to provide a kind of chip, it has closeer conductive gasket and arranges.
According to a specific embodiment, chip of the present invention comprises a plurality of first conductive gaskets and a plurality of second conductive gasket.These first conductive gaskets and second conductive gasket are along the interlaced arrangement of preset direction.Each first conductive gasket comprises first and with respect to the second portion of first, and, each first along the length on the preset direction greater than each second portion along the length on the preset direction.Similarly, each second conductive gasket comprises third part and with respect to the 4th part of third part, and, each third part along the length on the preset direction greater than each the 4th part along the length on the preset direction.Especially, opposite to the first direction of second portion from the tetrameric second direction of third part to the with first.
Chip of the present invention, wherein this chip is connected in corresponding a plurality of contacts of circuit board by these these conductive gaskets, and each conductive gasket is connected with corresponding this contact by wiring.
Chip of the present invention, wherein according on each first conductive gasket and second conductive gasket with this circuit board on the distance of these corresponding a plurality of contacts far and near, adjustment is arranged at this solder sphere on each conductive gasket and each contact or the size of this projection, so that respectively the resistance value of the respectively equivalent conductive path between this contact that this conductive gasket is corresponding with it is approaching basically.
Chip of the present invention, wherein according to the area of each first conductive gasket and second conductive gasket, these these solder sphere or this these projections with different resistance values are set, so that respectively the resistance value of the respectively equivalent conductive path between this contact that this conductive gasket is corresponding with it is approaching basically on these these conductive gaskets.
Chip of the present invention, wherein these these first conductive gasket has the drops outward appearance.
Chip of the present invention, wherein these these second conductive gasket has the drops outward appearance.
Another object of the present invention is to provide a kind of manufacturing method of chip, to solve foregoing problems.
According to a specific embodiment, manufacturing method of chip of the present invention is provided with a plurality of conductive gaskets near the corner of chip.Especially, these conductive gaskets are zonal and arc to be arranged, and big more the closer to the area of the conductive gasket in corner.
Manufacturing method of chip of the present invention, further comprising the following step is a plurality of blocks with near the zonal and arc area dividing this corner, and big more the closer to the area of the block in this corner; And one of on each block, being provided with respectively in these these conductive gaskets, and the size in the zone of corresponding its setting of the size of each conductive gasket.
Manufacturing method of chip of the present invention, wherein these these conductive gaskets are with respect to this line symmetric arrays in center to this corner of arc belt-like zone roughly.
Manufacturing method of chip of the present invention, wherein the shape of these these conductive gaskets is selected from by rectangle, circle, ellipse, rhombus, trapezoidal and group that triangle is formed.
Another object of the present invention is to provide a kind of chip, it has the conductive gasket design of the pressure damage that can reduce chip corner.
According to a specific embodiment, chip of the present invention comprises a plurality of conductive gaskets, and these conductive gaskets are arranged near the chip corner, and the setting that distributes along this corner in a predefined manner.Especially, its area of conductive gasket the closer to the corner is big more.
Chip of the present invention, wherein this predetermined way is arc ribbon-like manner roughly.
Chip of the present invention, wherein these these conductive gaskets are with respect to this line symmetric arrays in center to this corner of arc belt-like zone roughly.
Chip of the present invention, wherein the shape of these these conductive gaskets is selected from by rectangle, circle, ellipse, rhombus, trapezoidal and group that triangle is formed.
Chip of the present invention, wherein these these conductive gaskets further comprise first conductive gasket and at least two second conductive gaskets, and wherein this these second conductive gasket is respectively with respect to this first conductive gasket setting.
Chip of the present invention, wherein this first conductive gasket is positioned at this roughly on the line in center to this corner of arc belt-like zone, and this these second conductive gasket is with respect to this line symmetric arrays.
Chip of the present invention, wherein each second conductive gasket to the distance in this corner equates.
Chip of the present invention, wherein this first conductive gasket is shaped as rectangle.
Chip of the present invention, wherein this these second conductive gasket is shaped as right-angled triangle.
Can be further understood by following embodiment and accompanying drawing about the advantages and spirit of the present invention.
Description of drawings
Fig. 1 is the schematic diagram that the chip of prior art is connected with circuit board.
Fig. 2 A is the schematic diagram according to the chip of a specific embodiment of the present invention.
Fig. 2 B is the schematic diagram that the conductive gasket of another specific embodiment of the present invention is arranged
Fig. 2 C is according to first conductive gasket of another specific embodiment of the present invention and the schematic diagram of second conductive gasket.
Fig. 2 D is the schematic appearance according to conductive gasket of the present invention.
Fig. 2 E is the schematic appearance according to conductive gasket of the present invention.
Fig. 2 F is the schematic appearance according to conductive gasket of the present invention.
Fig. 3 is the flow chart of steps of manufacturing method of chip according to an embodiment of the invention.
Fig. 4 A is the schematic diagram according to the chip of a specific embodiment of the present invention.
Fig. 4 B is the flow chart of steps of manufacturing method of chip according to an embodiment of the invention.
Fig. 4 C is the schematic diagram according to the chip of another specific embodiment of the present invention.
Embodiment
Referring to Fig. 2 A, Fig. 2 A is the schematic diagram according to the chip 1 of a specific embodiment of the present invention.Shown in Fig. 2 A, chip 1 comprises and has a plurality of first conductive gaskets 10 of approximate drop-shaped and a plurality of second conductive gasket 12.First conductive gasket 10 and second conductive gasket 12 are staggered on preset direction D respectively.Each first conductive gasket 10 comprises the P1 of first and with respect to the second portion P2 of the P1 of first, and, the P1 of first along the length on the preset direction D greater than second portion P2 along the length on the preset direction D.Each second conductive gasket 12 comprises third part P3 and with respect to the 4th part P4 of third part P3, and third part P3 along the length on the preset direction D greater than the 4th part P4 along the length on this preset direction D.Wherein, the second direction D2 from third part P3 to the four part P4 is opposite to the first direction D1 of second portion P2 with the P1 of first.In this specific embodiment, the line L of the second portion P2 of each first conductive gasket 10 is parallel to preset direction D.The 4th part P4 of each second conductive gasket 12 extends and surpasses line L to second direction D2 in 10 of two adjacent first conductive gaskets.Thus, but the conductive gasket dense arrangement.
Referring to Fig. 2 B, Fig. 2 B is the schematic diagram that the conductive gasket of another specific embodiment of the present invention is arranged.Shown in Fig. 2 B, in this specific embodiment, each first conductive gasket 10 ' has P1 ' of first and second portion P2 ' as aforementioned specific embodiment, and each second conductive gasket 12 ' has third part P3 ' and the 4th part P4 ' as aforementioned specific embodiment.The P1 ' of first in the length on the preset direction D ' greater than the length of second portion P2 ' on predetermined direction D ', and third part P3 ' in the length on the preset direction D ' greater than the length of the 4th part P4 ' on preset direction D '.From the P1 ' of first toward second portion P2 ' is first direction D1 ', and from third part P3 ' toward the 4th part P4 ' be second direction D2 '.The line L ' of the second portion P2 ' of each first conductive gasket 10 ' is parallel to preset direction D '.In this specific embodiment, the 4th part P4 ' of each second conductive gasket 12 ' extends and surpasses line L ' to second direction D2 ' between two adjacent first conductive gaskets 10 '.Thus, but the conductive gasket dense arrangement.
In addition, in a specific embodiment, chip of the present invention can be connected in corresponding a plurality of contacts on the circuit board by these conductive gaskets, and each conductive gasket can be connected with corresponding contact by wiring.In actual applications, for the resistance value that makes the equivalent conductive path between each conductive gasket each contact corresponding with it approaching basically, distance between the corresponding contact with it of visual each conductive gasket is far and near, adjust the solder sphere (solder ball) on each contact and each conductive gasket or the size of projection (bump), adjusting its equivalent conductive path length, and then the resistance value of the equivalent conductive path between the corresponding contact with it of each conductive gasket that furthers basically.Especially, by solder sphere or size of lug difference, there is the difference of height the position of each wiring, therefore can avoid the situation of cross-talk (cross-talk) to take place.
Be noted that, solder sphere or projection specific demand according to area, other parameter and the designer of the distance between conductive gasket and corresponding contact, conductive gasket is set, be not limited to status.For example, according to the area difference of each conductive gasket, solder sphere on each conductive gasket or projection can use the material of different resistance values, with the resistance value of the equivalent conductive path between the corresponding contact with it of each conductive gasket that furthers basically.
Referring to Fig. 2 C, Fig. 2 C is according to first conductive gasket 100 of another specific embodiment of the present invention and the schematic diagram of second conductive gasket 120.Shown in Fig. 2 C, this specific embodiment is that with last specific embodiment difference the area of second conductive gasket 120 is less than first conductive gasket 100, in addition, as above-mentioned specific embodiment, the P1 of first of first conductive gasket 100 " at predetermined direction D " on length greater than second portion P2 " at preset direction D " and on length, the third part P3 of second conductive gasket " at predetermined direction D " on length greater than the 4th part P4 " at preset direction D " and on length.Therefore, just have living space between each two first adjacent conductive gasket 100 and hold second conductive gasket 120, make the arrangement between each conductive gasket can be more intensive.
And referring to Fig. 2 D to Fig. 2 F, Fig. 2 D to Fig. 2 F is the schematic appearance according to conductive gasket of the present invention.Note that the conductive gasket that is illustrated all comprises aforesaid first conductive gasket 10 and second conductive gasket 12 in Fig. 2 D to Fig. 2 F.Shown in Fig. 2 D to Fig. 2 F, the conductive gasket on the chip of the present invention except the drops outward appearance shown in the front, also visual demand and having as circular (shown in Fig. 2 D), trapezoidal (shown in Fig. 2 E) and hexagon outward appearances such as (shown in Fig. 2 F).In addition, these conductive liner are paid somebody's debt and expected repayment later visual demand and are had the outward appearance of Else Rule or irregular polygon.
Referring to Fig. 3, Fig. 3 is the flow chart of steps of manufacturing method of chip according to an embodiment of the invention.As shown in Figure 3, manufacturing method of chip of the present invention, comprise following steps: at first, among the step S10, on chip, a plurality of drops first conductive gaskets that are are set along preset direction, each first conductive gasket comprises first and with respect to the second portion of first, and, each first along the length on the preset direction greater than each second portion along the length on the preset direction; Then, among the step S12, on chip, be provided with and staggered a plurality of drop-shaped second conductive gaskets that are of first conductive gasket, each second conductive gasket comprises third part and with respect to the 4th part of third part, and, each third part along the length on the preset direction greater than each the 4th part along the length on the preset direction.Wherein, from the tetrameric second direction of third part to the with the first direction to second portion is opposite from first.
In the present embodiment, chip is connected in the corresponding a plurality of contacts of circuit board by these conductive gaskets, and each conductive gasket is connected with corresponding contact by wiring.In order to make the total conductive path between each conductive gasket each contact corresponding approaching basically with it, according on each first conductive gasket and second conductive gasket with circuit board on the distance of corresponding a plurality of contacts far and near, the solder sphere or the projection of different size are set on contact and conductive gasket, to adjust the resistance value of the equivalent conductive path between the corresponding contact of each conductive gasket, make it approaching basically with it.
It should be noted that first conductive gasket of the various embodiments described above and the external form of second conductive gasket are drops.Yet in actual applications, first conductive gasket and second conductive gasket can be other external form, and only the first of satisfied first conductive gasket of need gets final product greater than tetrameric principle greater than the third part of the second portion and second conductive gasket.For example, the external form of first conductive gasket of the present invention and second conductive gasket can be, but is not subject to, rhombus, trapezoidal, triangle, ellipse, or Else Rule or irregular polygon.
Referring to Fig. 4 A, Fig. 4 A is the schematic diagram according to the chip 2 of a specific embodiment of the present invention.Shown in Fig. 4 A, chip 2 comprises a plurality of conductive gaskets 20, is arranged near the corner of chip, and distributing along the corner in a predefined manner is provided with, and big more the closer to its area of conductive gasket in corner.In addition, shown in Fig. 4 A, chip 2 of the present invention can further comprise zonal and arc zone 22, and zonal and arc zone 22 is divided into a plurality of blocks 220 again, and big more the closer to the area of the block 220 in corner.Conductive gasket 20 is arranged at the district respectively and determines on 220, and, the size of the block 220 of corresponding its setting of the size of each conductive gasket 20.Thus, can reduce in the encapsulation process and may the pressure that chip causes be damaged.
In this specific embodiment, the both wings in zonal and arc zone 22 are with respect to the line in center to the corner in zonal and arc zone 22 and symmetry.Similarly, conductive gasket 20 also is symmetric arrays with respect to the line in center to the corner in zonal and arc zone 22.In addition, the conductive gasket of this specific embodiment is shaped as circle, but in practical application, and the conductive gasket shape can the demand of looking be, but is not subject to rectangle, circle, ellipse, rhombus, trapezoidal, triangle, or Else Rule or irregular polygon.
Referring to Fig. 4 B, Fig. 4 B is the flow chart of steps of manufacturing method of chip according to an embodiment of the invention.Shown in Fig. 4 B, manufacturing method of chip comprises the following step: at first, among the step S20, the zonal and arc zone is set near the corner of chip, and is a plurality of blocks the zonal and arc area dividing, and wherein, big more the closer to the area of the block in corner; Then, among the step S22, conductive gasket is set respectively on each block, and the size in the zone of corresponding its setting of the size of each conductive gasket.
In the present embodiment, the both wings in zonal and arc zone are with respect to the line in center to the corner in zonal and arc zone and symmetry.Similarly, the conductive gasket that is arranged on each block in zonal and arc zone also is symmetric arrays with respect to the line in center to the corner in zonal and arc zone.In addition, the conductive gasket shape can the demand of looking be, but is not subject to rectangle, circle, ellipse, rhombus, trapezoidal, triangle, or Else Rule or irregular polygon.
Referring to Fig. 4 C, Fig. 4 C is the schematic diagram according to the chip 3 of another specific embodiment of the present invention.Shown in Fig. 4 C, chip 3 comprises first conductive gasket 30 and at least two second conductive gaskets 32.First conductive gasket 30 is positioned on the line in center to corner in zonal and arc zone, and second conductive gasket 32 is symmetric arrays with respect to zonal and arc regional center to the line in corner, and each second conductive gasket 32 to the distance in corner equates.
In this specific embodiment, first conductive gasket 30 is a rectangle, and 32 of second conductive gaskets are right-angled triangle.But in actual applications, the external form of first conductive gasket 30 and second conductive gasket 32 is not limited to rectangle or right-angled triangle, need only meet the closer to the big more principle of its area of conductive gasket in corner to get final product.Thus, can reduce in the encapsulation process and may the pressure that chip causes be damaged.
With respect to prior art, chip of the present invention and manufacture method thereof can make conductive gasket present the arrangement of comparatively dense on chip, the not complicated day by day chip design of reason and the size of chip is strengthened, and then save cost.In addition, the conductive gasket in corner design can reduction chip improves the yield of chip because of the pressure damage that encapsulation process produces.
By the detailed description of above preferred specific embodiment, hope can be known description feature of the present invention and spirit more, and is not to come category of the present invention is limited with above-mentioned disclosed preferred specific embodiment.On the contrary, its objective is that hope can be encompassed in the interior various changes and the equivalence arrangement of scope of patent protection of institute of the present invention desire application.Therefore, the category of the scope of patent protection that the present invention applied for should be done the broadest explanation according to above-mentioned explanation, contains the arrangement of all possible change and equivalence to cause it.
The primary clustering symbol description
A1: conductive gasket A2: conductive gasket
B1: circuit board C1: chip
1,2,3: chip 20: conductive gasket
10,10 ', 100,30: the first conductive gaskets
12,12 ', 120,32: the second conductive gaskets
D, D ', D ": predetermined direction D1, D1 ': first direction
D2, D2 ': second direction P1, P1 ', P1 ": first
P2, P2 ', P2 ": second portion P3, P3 ', P3 ": third part
P4, P4 ', P4 ": the 4th part L, L ': line
S10, S12, S20, S22: steps flow chart.

Claims (6)

1. chip comprises:
A plurality of first conductive gaskets, be arranged on the described chip along preset direction, each first conductive gasket comprises first and with respect to the second portion of described first, and each described first along the length on the described preset direction greater than each described second portion along the length on the described preset direction; And
A plurality of second conductive gaskets, be arranged on the described chip along described preset direction, and described these first conductive gaskets are staggered, each second conductive gasket comprises third part and with respect to the 4th part of described third part, and each described third part along the length on the described preset direction greater than each described the 4th part along the length on the described preset direction;
Wherein opposite to the first direction of described second portion to described tetrameric second direction with described first from described third part, and each described the 4th part extends beyond the line of described these second portions to described second direction.
2. chip according to claim 1, wherein said chip is connected in corresponding a plurality of contacts of circuit board by described these conductive gaskets, and each conductive gasket is connected with corresponding described contact by wiring.
3. chip according to claim 2, wherein according on each first conductive gasket and second conductive gasket with described circuit board on the distance of described corresponding a plurality of contacts far and near, adjustment is arranged at the solder sphere on each conductive gasket and each contact or the size of projection, so that the resistance value of the equivalent conductive path between each described conductive gasket each described contact corresponding with it is approaching.
4. chip according to claim 2, wherein according to the area of each first conductive gasket and second conductive gasket, described these solder sphere or described these projections with different resistance values are set, so that the resistance value of the equivalent conductive path between each described conductive gasket each described contact corresponding with it is approaching on described these conductive gaskets.
5. chip according to claim 1, wherein said these first conductive gaskets have the drops outward appearance.
6. chip according to claim 1, wherein said these second conductive gaskets have the drops outward appearance.
CN 200710165130 2007-10-29 2007-10-29 Chip and its manufacture method Expired - Fee Related CN100585842C (en)

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* Cited by examiner, † Cited by third party
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US6780749B2 (en) * 2000-07-26 2004-08-24 Texas Instruments Incorporated Method of manufacturing a semiconductor chip comprising multiple bonding pads in staggard rows on edges

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6040984A (en) * 1996-02-27 2000-03-21 Fuji Machinery Mfg. & Electronics Co., Ltd. Printed circuit board with opposed bonding shelves for semiconductor chip wire bonding at different levels
US6780749B2 (en) * 2000-07-26 2004-08-24 Texas Instruments Incorporated Method of manufacturing a semiconductor chip comprising multiple bonding pads in staggard rows on edges

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