CN100521130C - 在引线框上形成倒装芯片半导体封装的方法 - Google Patents

在引线框上形成倒装芯片半导体封装的方法 Download PDF

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CN100521130C
CN100521130C CNB028038002A CN02803800A CN100521130C CN 100521130 C CN100521130 C CN 100521130C CN B028038002 A CNB028038002 A CN B028038002A CN 02803800 A CN02803800 A CN 02803800A CN 100521130 C CN100521130 C CN 100521130C
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reflux
electric conducting
conducting material
solder
projection
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CN1486510A (zh
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周辉星吉米
陈锦辉
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Advanpack Solutions Pte Ltd
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Advanpack Solutions Pte Ltd
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    • H01L2924/181—Encapsulation

Abstract

将预定量的焊料(315)淀积在从半导体管芯(305)的管芯焊盘伸出的铜柱(310)的自由端上。焊料(315)涂敷有焊剂(320)，半导体管芯(305)位于引线框(100)上，引线框(100)具有毗邻内引线部分(101)上的互连位置(335)的焊料沉积物(315)。当回流时，焊料沉积物(315)熔化，在焊剂(320)的协助下，在铜柱(310)的自由端和互连位置(335)之间形成焊料互连。由于在铜柱(310)的自由端上淀积预定量的焊料(315)，因此熔化的焊料(315)不容易从互连位置(335)流走。因此，有利地允许焊料沉积物(315)的主要部分保持在互连位置(335)以形成焊料互连。

Description

在引线框上形成倒装芯片半导体封装的方法
技术领域
本发明涉及在引线框上形成倒装芯片半导体封装，更具体涉及在引线框上形成具有凸起的半导体管芯的倒装芯片半导体封装。
背景技术
在半导体封装中，相对敏感和难以处理的半导体管芯包封在具有外部连接的封装中。封装允许半导体管芯更方便地处理，也允许外部电路容易与其耦接。
在引线框上形成倒装芯片(FCOL)半导体封装的公知方法采用电镀的引线框。引线框是构图的金属片，一般是铜，通常用银、镍、或钯电镀。常规情况下，将引线框电镀用以防止铜氧化，并用以提供一个将粘附焊料的表面。金属片图形提供用于形成半导体封装的引线框。
目前，用于形成FCOL半导体封装的引线框具有内引线部分和外引线部分。内引线部分布置在内引线部分上具有互连位置的图形中，以匹配半导体管芯上焊盘的图形。在封装工序过程中，一般在互连位置上淀积低熔点焊料。此外，半导体管芯上的焊盘凸起。凸起可以包括从半导体管芯的焊盘伸出的金属柱，半导体管芯的焊盘具有在金属柱的自由端上的焊球。一般，焊球用高铅焊料制成。
由Francisca Tung申请的美国专利申请序列号No.09/564,382，申请日2000年4月27日，题目“Improved Pillar Connections For SemiconductorChip”，由Francisca Tung申请的继续部分美国专利申请序列号No.09/843,248，申请日2001年4月27日，题目“Pillar Connections ForSemiconductor Chips and Method Of Manufacture”，以及被指定为该专利申请的公共受让人，对于形成如这里所述的柱状凸块结构进行了讲解。在此引入这些专利申请作为参考。
接下来，管芯上的焊球以及半导体管芯被反转，并被放置在引线框上，焊球毗邻在互连位置上的焊料膏淀积物。然后使用适当的回流面(profile)回流该组件。
在升高的回流温度条件下，焊料膏沉积物熔化，且在焊剂的协助下，低熔点焊料粘附到引线框上的互连位置和铜柱上的高铅焊球，从而在金属柱的自由端上的高铅焊球和引线框上的互连位置之间形成焊料互连。回流之后，当使用普通焊剂时，清洁该组件，以除去残余的焊剂，并且该组件用模制复合剂包封。但是，当使用没有清洁的焊剂时，不需要清洁步骤。以致最终的封装为FCOL半导体封装。
该工艺的一个缺点是当焊料膏熔化时，熔化的焊料易于流经引线部分的表面。焊料的这种流动常常称为溢流，该种流动在FCOL半导体封装中产生多种副作用。
第一关注的是，当焊料从互连位置流走时，各个焊料互连包括的焊料比在焊球和互连位置之间提供可靠的电连接所要求的焊料少。第二关注的是，采用减少小的焊料量而形成的焊料互连无法在引线框上均匀支持半导体管芯。因此，引线框上的多个半导体管芯受到不利影响，且非平面的管芯可能引起管芯上的金属柱之间短路。这些情况有时称为破裂(collapsed)管芯。
第三关注的是，溢流导致焊料溢出边缘，并流到引线部分的相对表面上。之后，在模制过程中，模制复合剂不会很好的粘附到受影响的表面。第四关注的是毛细作用(wicking)，当引线框上的引线部分如此形成时产生毛细作用：下管芯侧面和引线部分有小间隙，且互连位置靠近管芯边缘。在该布置中，来自互连位置的焊料可能沿引线部分流动，通过毛细管作用，向上流动通过小间隙。
进一步的，使用印刷工艺将低熔点焊料剂布置在互连位置上。已知分配焊料的这个工艺经受更多的工艺变化。因此，分配在引线框上的焊料膏的量可能显著地变化。用于实际的半导体封装而被分配的焊料膏量的这种变化导致最终的焊点变化，从而不利地影响半导体封装的可靠性。
在试图降低制造FCOL半导体封装的成本的努力中，被简单地称为铜引线框的未电镀或裸铜引线框已经被尝试。但是，在很大程度上，铜引线框与电镀引线框一样存在上述同样的缺点，并且在有些情况下，铜引线框存在更大程度的缺点。
发明内容
本发明试图提供一种在引线框上形成倒装芯片半导体封装的方法，克服或至少减小现有技术的上述问题。
由此，一方面，本发明提供一种形成倒装芯片半导体封装的方法，该方法包括以下步骤：
a)提供金属导体的构图层，该金属导体的构图层具有其上提供互连位置图形的第一表面；
b)提供一个具有第一表面的半导体管芯，该第一表面具有一个相应的的焊盘图形，各个焊盘具有一个形成在其上的不可回流的凸块；
c)在各个不可回流的凸块的自由端上布置预定量的可回流导电材料；
d)将半导体管芯放置在金属导体的图形层上，其中可回流的导电材料毗接着所述互连位置；以及
e)回流所述可回流的导电材料，其中可回流导电材料的主要部分基本上保持在互连位置处，以在不可回流的凸块和互连位置之间形成导电互连。
本发明另一方面提供一种用于决定待布置在半导体管芯上的不可回流的凸块上的可回流材料量，以将半导体管芯安装在其上具有互连位置的引线框上的方法，该方法包括以下步骤：
a)确定不可回流的凸块之一的表面积；
b)在引线框上限定相应的互连位置使其具有与不可回流的凸起之一的圆周界定的面积基本相同的面积；以及
c)选择可回流的材料量以使得回流过程中所选数量的可回流材料的主要部分保持在各个互连位置处。
附图说明
通过例子，参考以下附图，本发明的一个实施例将得到更完全地描述：
图1示出了部分引线框的俯视图；
图2示出了采用半导体管芯和引线框形成FCOL半导体封装的详细工艺的流程图；以及
图3A-D示出了在图1的工艺过程中部分引线框和半导体管芯的剖面图。
具体实施方式
在从半导体管芯的管芯焊盘延伸出的铜柱的自由端上更均匀地淀积预定量的焊料。焊料沉积物涂有焊剂，然后将半导体管芯放置在引线框上，焊料沉积物毗邻引线框的内引线部分上的互连位置。当回流时，焊料沉积物熔化，且在焊剂的协助下，在铜柱的自由端和互连位置之间形成焊料互连。由于预定量的焊料更均匀地淀积在铜柱的自由端上，熔化的焊料不易于从互连位置流走。因此，有利地允许焊料的主要部分留在互连位置处，从而导致更均匀的焊料互连。形成焊料互连之后，半导体管芯和引线框的组件被包封在模制复合剂中，外引线部分露出和/或从FCOL半导体封装伸出。无引线型的最终封装常常称为四边无引线封装(QFN)。
图1示出了部分引线框100，具有内引线部分101、外引线部分102以及浇口料头(dam bar)部分103。框线104指用于在引线框100上放置倒装半导体管芯(未示出)的位置。在引线框100上形成FCOL半导体封装(未示出)之后，耦接到半导体管芯的内引线部分101与半导体管芯密封在FCOL半导体封装中，外引线部分102从封装伸出。浇口料头(dam bar)部分103限定FCOL封装的外形，并且在模制工艺过程中提供密封，包封FCOL封装中的半导体管芯和内引线部分102。在随后修整过程中和包封后的形成操作或当FCOL半导体封装从引线框100单分出来(singulated)时，除去浇口料头(dam bar)部分103和引线框100的其他多余部分。一般，作为公知技术，引线框100由供应厂商以条的形式提供，在一个条上可以形成几个FCOL半导体封装。更普通的，引线框包括铜且采用银、镍或钯电镀，但是本发明也扩展到使用没有电镀的引线框，例如裸铜引线框。
引线框100是构图的金属引线框，提供金属导体的构图层，且可以包括来自金属片的印记，比如铜。另外，可以通过腐蚀铜片制造引线框100。当金属厚度相对小时，引线框100可以包括含柔性基片的柔性电路，亦称为挠性电路。除在这里所指的引线框100之外，还扩展到包括陶瓷的基片、迭片、聚酰亚胺基片以及带。
参考图2和图3A-D，根据本发明，用于形成FCOL半导体封装的工艺200开始于步骤205，步骤210提供铜引线框100。为了便于描述，在图3A-D中仅仅示出了引线框100的一部分和半导体管芯305的一部分。但是，本领域技术人员应当明白，作为描述的工艺200应用于形成FCOL半导体封装的半导体管芯305上的所有铜柱310，以及引线框100的所有内引线部分101。
然后，步骤215提供半导体管芯305，其中，半导体管芯305包括从半导体管芯305上的焊盘(未示出)伸出的铜柱310，如图3A所示。当管芯是半导体晶片的一部分时，在半导体管芯305上形成铜柱310的工艺是早先提到过的。可以使用各种其他晶片的凸起技术，以在晶片上形成不可回流的凸块，根据本发明，可以使用这种晶片的组成凸起半导体管芯，以形成FCOL半导体封装。这种不可回流的凸块的例子包括金、铟、锡、无铅锡铋、无铅锡铜、无铅锡银等等。
此外，图3A示出了引线框100的两个相邻引线的内引线部分101，每个内引线部分101具有在其上的互连位置335。在这里，当铜柱310与内引线部分101对准时，互连位置限定为内引线部分101上的区域，亦即，当铜柱310与内引线部分101对准时，由铜柱310的圆周界定的区域，这里铜柱的圆周投影到内引线部分101上。图3A和3C中的虚线限定内引线部分101上的互连位置335。当半导体管芯305与内引线部分101对准时，内引线部分101上互连位置335的图形对应于从半导体管芯305伸出的铜柱310的图形。
接着，可回流的导电沉积物315，例如焊料，以焊球的形式电镀或附加在铜柱310的自由端上。以这种方法，步骤220将焊料沉积物315布置在铜柱310的自由端上。可以通过本领域的技术人员公知的各种技术布置焊料沉积物315。先前引证的参考文献描述了当通过电镀形成铜凸块时，在铜柱上布置焊料的工艺。
布置在半导体管芯305的每个铜柱310的端上的焊料量是预定的，并且无论用什么工艺布置焊料，该工艺必须保证预定量的焊料布置在每个铜柱310上。这里，电镀工艺被用作比焊料印刷工艺具有低工艺变化的电镀工艺。这些允许在铜柱的自由端上布置的焊料量被很好控制并且在半导体管芯上更均匀。布置的焊料量取决于各种因素，可以包括：焊料类型、铜柱尺寸、互连位置的材料、半导体管芯的质量、铜柱的数目、当回流焊料沉积物315时的回流外形(profile)、回流焊料和铜柱的预期最终尺寸以及焊剂类型。在回流过程中，当焊料沉积物315处于熔融状态时，焊料的这些被调节的量有利地允许布置的焊料沉积物315的主要部分留在互连位置335处。
之后，步骤225在焊料沉积物315上应用或涂敷焊剂320。这些通常通过暂时将具有焊料沉积物315的半导体管芯305浸入焊剂320的储存器中来实现。在升高温度时，焊剂320清洁它涂敷的表面以增强焊料沉积物315的粘附力。清洁的表面包括焊料沉积物315和互连位置335的表面。
涂敷焊剂320之后，准备将半导体管芯305安装在引线框100上。另外，焊剂320可以印刷或布置在互连位置335上，尽管这相对于单个处理者的以下操作需要附加设备：提取具有焊料的半导体管芯305，用焊剂320浸渍铜柱310上的焊料沉积物315，然后将半导体管芯305放置在引线框100上。
在涂敷该焊剂320之后，半导体管芯305位于引线框100上，焊料沉积物315与引线框100上的互连位置335对准。然后，步骤230将半导体管芯305放置在引线框100上。这里，放置的步骤可以包括在半导体管芯305上相对于引线框100加压和保持预定的压力。
当半导体管芯305位于引线框100上时，焊料沉积物315的下表面毗邻互连位置335，焊料沉积物315上的焊剂320围绕焊料沉积物315流动且在互连位置335上。如图3B所示，焊料沉积物315上的焊剂320浸润或粘附到互连位置335上，为下一步作准备。
然后，步骤235回流半导体管芯305、引线框100、和焊剂320的组件。回流工艺对于在倒装芯片半导体封装相关领域的技术人员公知的，在此不提供更多细节，除非这种细节有助于提高本发明的理解。步骤235回流过程中，焊剂320清洁引线框100上的互连位置335，焊料沉积物315变为熔融状态。熔化的焊料流动到清洁的互连位置335上，并粘附到互连位置335，以在每个铜柱310和相应的互连位置335之间形成焊料互连340，如图3C所示。
焊料互连340有时叫作倒角(fillet)。淀积的预定量的焊料315决定焊料互连340的形成，从而确保沉积的焊料315的主要部分保持在互连位置335处。
因此，有更多的焊料在互连位置335处，从而增加铜柱310和引线框100之间耦接的机械强度，得以制造更可靠的电连接。
因此，如上所述，本发明有利地减小焊料离开互连位置的流动，从而，提高铜柱和由所得的焊料互连所形成的引线框之间的耦接。
在步骤235回流之后，当使用普通焊剂时，清洁组件，以除去任何过量的焊剂320，且步骤240用模制复合剂345包封组件，如图3D所示，以在引线框100上制造倒装芯片半导体封装(未示出)。另外，当使用没有清洁的焊剂时，不需要清洁步骤。接着，在FCOLF半导体封装从引线框100单分出来(singulating)的最后步骤之后，步骤245结束工艺200，其中，在所述最后步骤中，浇口料头(dam bar)部分103被隔断。如本领域的技术人员所公知，在单分步骤之前，可能有形成外部引线102和测试半导体管芯320的功能性的附加步骤。
根据本发明形成的半导体封装的例子包括具有250微米间距铜柱的半导体管芯，其中，该铜柱具有70微米长和100微米直径。在铜柱的自由端上电镀的焊料具有30微米的厚度，并且半导体管芯安装在裸铜引线框上。
如上所述，本发明提供一种在引线框上形成倒装芯片半导体封装的方法，其中，预定量的焊料布置在半导体管芯上的铜柱上，易于保持在引线框上的互连位置处。
通过考虑各种因素，包括，焊料类型、金属柱尺寸、互连位置处的材料(引线框具有电镀层时，还包括电镀层的材料成分)、管芯的质量、金属柱的数目、回流外形(profile)、回流焊料和铜柱的预期最终尺寸以及焊剂类型(和焊剂的材料成分)，以决定待布置的焊料量，完成本发明。
因此，如上所述，本发明提供一种在引线框上形成倒装芯片半导体封装的方法，克服或至少减小现有技术的上述问题。
应当明白，尽管仅仅详细描写本发明的一个具体实施例，但是所属领域的技术人员可以进行各种修改和改进，而不脱离本发明的范围。

Claims (25)

1.一种用于形成倒装芯片半导体封装的方法，该方法包括以下步骤：
a)提供金属导体的构图层，该构图层具有用于在其上提供互连位置图形的第一表面；
b)提供一个具有第一表面的半导体管芯，该第一表面上具有一个相应的焊盘图形，各个焊盘具有一个形成在其上的不可回流的凸块；
c)在各个不可回流的凸块的自由端上布置预定量的可回流的导电材料；
d)将半导体管芯放置在金属导体的构图层上，其中可回流的导电材料毗接着所述互连位置；以及
e)回流所述可回流的导电材料，其中可回流的导电材料的主要部分基本上保持在互连位置处，以在不可回流的凸块和互连位置之间形成导电互连。
2.根据权利要求1的方法，其中步骤(c)包括根据可回流的导电材料的材料成分确定可回流的导电材料的预定量的步骤。
3.根据权利要求1的方法，其中步骤(c)包括根据互连位置的材料成分确定可回流的导电材料的预定量的步骤。
4.根据权利要求1的方法，其中步骤(c)包括根据不可回流的材料的材料成分确定可回流的导电材料的预定量的步骤。
5.根据权利要求1的方法，其中步骤(c)包括根据不可回流的凸块的尺寸确定可回流的导电材料的预定量的步骤。
6.根据权利要求1的方法，其中步骤(c)包括根据半导体管芯的质量确定可回流的导电材料的预定量的步骤。
7.根据权利要求1的方法，其中步骤(c)包括根据在其上具有不可回流的凸块的焊盘数目确定可回流的导电材料的预定量的步骤。
8.根据权利要求1的方法，其中步骤(c)包括根据回流的可回流材料的预期最终尺寸确定可回流的导电材料的预定量的步骤。
9.根据权利要求1的方法，其中步骤(c)包括在不可回流的凸块上电镀预定量的可回流的导电材料的步骤。
10.根据权利要求1的方法，进一步包括在步骤(c)之后和步骤(d)之前，涂敷焊剂的步骤。
11.根据权利要求10的方法，其中涂敷的步骤包括涂敷焊剂到可回流的导电材料上的步骤。
12.根据权利要求10的方法，其中步骤(c)包括根据焊剂的材料成分确定可回流的导电材料的预定量的步骤。
13.根据权利要求1的方法，其中步骤(a)包括提供具有第一表面的金属导体的构图层的步骤，第一表面上有电镀层。
14.根据权利要求13的方法，其中步骤(c)包括根据电镀层的材料成分确定可回流的导电材料的预定量的步骤。
15.根据权利要求1的方法，其中步骤(a)包括提供铜导体的构图层的步骤。
16.根据权利要求15的方法，其中步骤(a)进一步包括在铜导体的构图层的第一表面上提供电镀层的步骤。
17.根据权利要求15的方法，其中步骤(b)包括提供具有第一表面的半导体管芯的步骤，第一表面上具有相应的焊盘图形，焊盘上具有铜柱并从焊盘延伸。
18.根据权利要求17的方法，其中步骤(c)包括在铜柱的自由端上布置预定量的焊料的步骤。
19.根据权利要求18的方法，在步骤(c)之后和步骤(d)之前包括涂敷焊剂到焊料的步骤。
20.根据权利要求19的方法，进一步包括在涂敷焊剂到焊料的步骤后，清洁半导体管芯和铜导体的构图层的步骤。
21.根据权利要求20的方法，进一步包括清洁步骤之后，包封半导体管芯的至少一部分和铜导体构图层的至少一部分以形成半导体封装的步骤。
22.根据权利要求21的方法，进一步包括在包封步骤之后，从引线框单分出(singulating)半导体封装的步骤。
23.一种用于确定待布置在半导体管芯上的不可回流的凸块上的可回流材料量，以将半导体管芯安装在其上具有互连位置的引线框上的方法，该方法包括以下步骤：
a)确定不可回流的凸块之一的表面积；
b)在引线框上限定相应的互连位置使其具有与不可回流的凸块之一的圆周界定的面积基本相同的面积；以及
c)选择可回流的材料量以使得回流过程中所选量的可回流材料的主要部分保持在各个互连位置处。
24.根据权利要求23的方法，其中步骤(b)包括将不可回流的凸块之一的圆周界定的面积投影到引线框上的步骤。
25.根据权利要求24的方法，进一步包括在不可回流的凸块上电镀选择量的可回流的材料的步骤。
CNB028038002A 2001-08-21 2002-08-20 在引线框上形成倒装芯片半导体封装的方法 Ceased CN100521130C (zh)

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