CN100511639C - 线路组件结构制造方法及其结构 - Google Patents
线路组件结构制造方法及其结构 Download PDFInfo
- Publication number
- CN100511639C CN100511639C CNB2006100901200A CN200610090120A CN100511639C CN 100511639 C CN100511639 C CN 100511639C CN B2006100901200 A CNB2006100901200 A CN B2006100901200A CN 200610090120 A CN200610090120 A CN 200610090120A CN 100511639 C CN100511639 C CN 100511639C
- Authority
- CN
- China
- Prior art keywords
- layer
- metal
- microns
- manufacture method
- metal level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
- H01L23/5223—Capacitor integral with wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/0347—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04073—Bonding areas specifically adapted for connectors of different types
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05173—Rhodium [Rh] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05176—Ruthenium [Ru] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05183—Rhenium [Re] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
- H01L2224/05572—Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05639—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05664—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05669—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13022—Disposition the bump connector being at least partially embedded in the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45139—Silver (Ag) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45155—Nickel (Ni) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45164—Palladium (Pd) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45169—Platinum (Pt) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45173—Rhodium (Rh) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45176—Ruthenium (Ru) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45183—Rhenium (Re) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48639—Silver (Ag) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48644—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48647—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48663—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/48664—Palladium (Pd) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48663—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/48669—Platinum (Pt) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48839—Silver (Ag) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48844—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48847—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48863—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/48864—Palladium (Pd) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0494—4th Group
- H01L2924/04941—TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0495—5th Group
- H01L2924/04953—TaN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Semiconductor Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (25)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US69354905P | 2005-06-24 | 2005-06-24 | |
US60/693,549 | 2005-06-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1921085A CN1921085A (zh) | 2007-02-28 |
CN100511639C true CN100511639C (zh) | 2009-07-08 |
Family
ID=37189408
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006100901215A Active CN100573846C (zh) | 2005-06-24 | 2006-06-23 | 线路组件结构制造方法及其结构 |
CN2010105080771A Active CN102054788B (zh) | 2005-06-24 | 2006-06-23 | 线路组件 |
CN200610090122XA Active CN1885532B (zh) | 2005-06-24 | 2006-06-23 | 线路组件结构制造方法及其结构 |
CNB2006100901200A Active CN100511639C (zh) | 2005-06-24 | 2006-06-23 | 线路组件结构制造方法及其结构 |
Family Applications Before (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006100901215A Active CN100573846C (zh) | 2005-06-24 | 2006-06-23 | 线路组件结构制造方法及其结构 |
CN2010105080771A Active CN102054788B (zh) | 2005-06-24 | 2006-06-23 | 线路组件 |
CN200610090122XA Active CN1885532B (zh) | 2005-06-24 | 2006-06-23 | 线路组件结构制造方法及其结构 |
Country Status (6)
Country | Link |
---|---|
US (2) | US7468545B2 (zh) |
EP (3) | EP1737037B1 (zh) |
JP (9) | JP5435524B2 (zh) |
CN (4) | CN100573846C (zh) |
SG (2) | SG162733A1 (zh) |
TW (3) | TWI336098B (zh) |
Families Citing this family (119)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI245402B (en) * | 2002-01-07 | 2005-12-11 | Megic Corp | Rod soldering structure and manufacturing process thereof |
CN100468792C (zh) * | 2004-11-24 | 2009-03-11 | 杨秋忠 | 整合型发光二极管及其制造方法 |
US7468545B2 (en) * | 2005-05-06 | 2008-12-23 | Megica Corporation | Post passivation structure for a semiconductor device and packaging process for same |
US7582556B2 (en) * | 2005-06-24 | 2009-09-01 | Megica Corporation | Circuitry component and method for forming the same |
CN1901163B (zh) * | 2005-07-22 | 2011-04-13 | 米辑电子股份有限公司 | 连续电镀制作线路组件的方法及线路组件结构 |
US8158510B2 (en) | 2009-11-19 | 2012-04-17 | Stats Chippac, Ltd. | Semiconductor device and method of forming IPD on molded substrate |
US8409970B2 (en) * | 2005-10-29 | 2013-04-02 | Stats Chippac, Ltd. | Semiconductor device and method of making integrated passive devices |
US8791006B2 (en) * | 2005-10-29 | 2014-07-29 | Stats Chippac, Ltd. | Semiconductor device and method of forming an inductor on polymer matrix composite substrate |
KR100763224B1 (ko) * | 2006-02-08 | 2007-10-04 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US8420520B2 (en) * | 2006-05-18 | 2013-04-16 | Megica Corporation | Non-cyanide gold electroplating for fine-line gold traces and gold pads |
US7960825B2 (en) * | 2006-09-06 | 2011-06-14 | Megica Corporation | Chip package and method for fabricating the same |
TWI370515B (en) | 2006-09-29 | 2012-08-11 | Megica Corp | Circuit component |
US8749021B2 (en) * | 2006-12-26 | 2014-06-10 | Megit Acquisition Corp. | Voltage regulator integrated with semiconductor chip |
WO2009013826A1 (ja) * | 2007-07-25 | 2009-01-29 | Fujitsu Microelectronics Limited | 半導体装置 |
TWI368286B (en) | 2007-08-27 | 2012-07-11 | Megica Corp | Chip assembly |
US8946873B2 (en) | 2007-08-28 | 2015-02-03 | Micron Technology, Inc. | Redistribution structures for microfeature workpieces |
US20090079072A1 (en) * | 2007-09-21 | 2009-03-26 | Casio Computer Co., Ltd. | Semiconductor device having low dielectric insulating film and manufacturing method of the same |
TWI419268B (zh) * | 2007-09-21 | 2013-12-11 | Teramikros Inc | 半導體裝置及其製造方法 |
US8587124B2 (en) * | 2007-09-21 | 2013-11-19 | Teramikros, Inc. | Semiconductor device having low dielectric insulating film and manufacturing method of the same |
US7863742B2 (en) * | 2007-11-01 | 2011-01-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Back end integrated WLCSP structure without aluminum pads |
JP4666028B2 (ja) * | 2008-03-31 | 2011-04-06 | カシオ計算機株式会社 | 半導体装置 |
US7932170B1 (en) | 2008-06-23 | 2011-04-26 | Amkor Technology, Inc. | Flip chip bump structure and fabrication method |
US8058163B2 (en) * | 2008-08-07 | 2011-11-15 | Flipchip International, Llc | Enhanced reliability for semiconductor devices using dielectric encasement |
US7709956B2 (en) * | 2008-09-15 | 2010-05-04 | National Semiconductor Corporation | Copper-topped interconnect structure that has thin and thick copper traces and method of forming the copper-topped interconnect structure |
KR101003678B1 (ko) * | 2008-12-03 | 2010-12-23 | 삼성전기주식회사 | 웨이퍼 레벨 패키지와 그 제조방법 및 칩 재활용방법 |
US7982311B2 (en) * | 2008-12-19 | 2011-07-19 | Intel Corporation | Solder limiting layer for integrated circuit die copper bumps |
JP2010278040A (ja) * | 2009-05-26 | 2010-12-09 | Renesas Electronics Corp | 半導体装置の製造方法および半導体装置 |
EP2443653A1 (en) * | 2009-06-19 | 2012-04-25 | Imec | Crack reduction at metal/organic dielectric interface |
US8313659B2 (en) * | 2009-07-10 | 2012-11-20 | Seagate Technology Llc | Fabrication of multi-dimensional microstructures |
US8227916B2 (en) * | 2009-07-22 | 2012-07-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method for reducing dielectric layer delamination |
US7977783B1 (en) * | 2009-08-27 | 2011-07-12 | Amkor Technology, Inc. | Wafer level chip size package having redistribution layers |
TW201113993A (en) * | 2009-10-01 | 2011-04-16 | Anpec Electronics Corp | Pre-packaged structure |
EP2312641A1 (en) * | 2009-10-13 | 2011-04-20 | Ecole Polytechnique Fédérale de Lausanne (EPFL) | Device comprising electrical contacts and its production process |
US8502394B2 (en) * | 2009-12-31 | 2013-08-06 | Stmicroelectronics Pte Ltd. | Multi-stacked semiconductor dice scale package structure and method of manufacturing same |
US20110156240A1 (en) * | 2009-12-31 | 2011-06-30 | Stmicroelectronics Asia Pacific Pte. Ltd. | Reliable large die fan-out wafer level package and method of manufacture |
US8884422B2 (en) | 2009-12-31 | 2014-11-11 | Stmicroelectronics Pte Ltd. | Flip-chip fan-out wafer level package for package-on-package applications, and method of manufacture |
US8466997B2 (en) | 2009-12-31 | 2013-06-18 | Stmicroelectronics Pte Ltd. | Fan-out wafer level package for an optical sensor and method of manufacture thereof |
US8659170B2 (en) | 2010-01-20 | 2014-02-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device having conductive pads and a method of manufacturing the same |
US8610270B2 (en) | 2010-02-09 | 2013-12-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and semiconductor assembly with lead-free solder |
US8922021B2 (en) | 2011-12-30 | 2014-12-30 | Deca Technologies Inc. | Die up fully molded fan-out wafer level packaging |
US9177926B2 (en) | 2011-12-30 | 2015-11-03 | Deca Technologies Inc | Semiconductor device and method comprising thickened redistribution layers |
US9576919B2 (en) | 2011-12-30 | 2017-02-21 | Deca Technologies Inc. | Semiconductor device and method comprising redistribution layers |
US10373870B2 (en) | 2010-02-16 | 2019-08-06 | Deca Technologies Inc. | Semiconductor device and method of packaging |
US8237272B2 (en) * | 2010-02-16 | 2012-08-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Conductive pillar structure for semiconductor substrate and method of manufacture |
US8587119B2 (en) * | 2010-04-16 | 2013-11-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Conductive feature for semiconductor substrate and method of manufacture |
WO2012023394A1 (ja) * | 2010-08-18 | 2012-02-23 | 株式会社村田製作所 | Esd保護デバイス |
FR2965659B1 (fr) * | 2010-10-05 | 2013-11-29 | Centre Nat Rech Scient | Procédé de fabrication d'un circuit intégré |
US8987897B2 (en) * | 2010-11-24 | 2015-03-24 | Mediatek Inc. | Semiconductor package |
US8513814B2 (en) | 2011-05-02 | 2013-08-20 | International Business Machines Corporation | Buffer pad in solder bump connections and methods of manufacture |
CN102412143A (zh) * | 2011-05-23 | 2012-04-11 | 上海华力微电子有限公司 | 一种聚酰亚胺基底上覆阻挡层的铝垫制造工艺 |
US8963334B2 (en) * | 2011-08-30 | 2015-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Die-to-die gap control for semiconductor structure and method |
US8916421B2 (en) | 2011-08-31 | 2014-12-23 | Freescale Semiconductor, Inc. | Semiconductor device packaging having pre-encapsulation through via formation using lead frames with attached signal conduits |
US9142502B2 (en) | 2011-08-31 | 2015-09-22 | Zhiwei Gong | Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits |
US9013037B2 (en) * | 2011-09-14 | 2015-04-21 | Stmicroelectronics Pte Ltd. | Semiconductor package with improved pillar bump process and structure |
US8916481B2 (en) | 2011-11-02 | 2014-12-23 | Stmicroelectronics Pte Ltd. | Embedded wafer level package for 3D and package-on-package applications, and method of manufacture |
US8779601B2 (en) | 2011-11-02 | 2014-07-15 | Stmicroelectronics Pte Ltd | Embedded wafer level package for 3D and package-on-package applications, and method of manufacture |
US8597983B2 (en) * | 2011-11-18 | 2013-12-03 | Freescale Semiconductor, Inc. | Semiconductor device packaging having substrate with pre-encapsulation through via formation |
US20130146345A1 (en) * | 2011-12-12 | 2013-06-13 | Kazuki KAJIHARA | Printed wiring board and method for manufacturing the same |
US9613830B2 (en) | 2011-12-30 | 2017-04-04 | Deca Technologies Inc. | Fully molded peripheral package on package device |
US10050004B2 (en) | 2015-11-20 | 2018-08-14 | Deca Technologies Inc. | Fully molded peripheral package on package device |
US9831170B2 (en) | 2011-12-30 | 2017-11-28 | Deca Technologies, Inc. | Fully molded miniaturized semiconductor module |
WO2013102146A1 (en) | 2011-12-30 | 2013-07-04 | Deca Technologies, Inc. | Die up fully molded fan-out wafer level packaging |
US10672624B2 (en) | 2011-12-30 | 2020-06-02 | Deca Technologies Inc. | Method of making fully molded peripheral package on package device |
US8912087B2 (en) * | 2012-08-01 | 2014-12-16 | Infineon Technologies Ag | Method of fabricating a chip package |
US8952530B2 (en) * | 2012-09-14 | 2015-02-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Post passivation interconnect structures and methods for forming the same |
US9343442B2 (en) | 2012-09-20 | 2016-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Passive devices in package-on-package structures and methods for forming the same |
JP2014086651A (ja) * | 2012-10-26 | 2014-05-12 | Ibiden Co Ltd | プリント配線板及びプリント配線板の製造方法 |
WO2014132939A1 (ja) | 2013-02-28 | 2014-09-04 | 株式会社村田製作所 | 半導体装置 |
WO2014132938A1 (ja) * | 2013-02-28 | 2014-09-04 | 株式会社村田製作所 | 半導体装置 |
JP5796692B2 (ja) * | 2013-02-28 | 2015-10-21 | 株式会社村田製作所 | Esd保護デバイス |
US9368460B2 (en) * | 2013-03-15 | 2016-06-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fan-out interconnect structure and method for forming same |
JP5826782B2 (ja) * | 2013-03-19 | 2015-12-02 | 株式会社東芝 | 半導体装置の製造方法 |
WO2014162795A1 (ja) | 2013-04-05 | 2014-10-09 | 株式会社村田製作所 | Esd保護デバイス |
US9583424B2 (en) * | 2013-05-23 | 2017-02-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit structure and method for reducing polymer layer delamination |
KR101488606B1 (ko) * | 2013-07-17 | 2015-02-03 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
US9263405B2 (en) * | 2013-12-05 | 2016-02-16 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device |
CN103762182B (zh) * | 2013-12-11 | 2017-08-01 | 上海交通大学 | 基于水玻璃‑陶瓷复合介质的tsv封装再分布层制备方法 |
US20150187728A1 (en) * | 2013-12-27 | 2015-07-02 | Kesvakumar V.C. Muniandy | Emiconductor device with die top power connections |
US9642261B2 (en) * | 2014-01-24 | 2017-05-02 | Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. | Composite electronic structure with partially exposed and protruding copper termination posts |
JP2015142009A (ja) * | 2014-01-29 | 2015-08-03 | サンケン電気株式会社 | 半導体装置 |
KR20150091932A (ko) * | 2014-02-04 | 2015-08-12 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스의 제조 방법 및 이에 따른 반도체 디바이스 |
US20150276945A1 (en) | 2014-03-25 | 2015-10-01 | Oy Ajat Ltd. | Semiconductor bump-bonded x-ray imaging device |
CN104124205B (zh) * | 2014-07-18 | 2018-03-16 | 华进半导体封装先导技术研发中心有限公司 | 一种rdl布线层的制备方法 |
US9606142B2 (en) | 2014-09-24 | 2017-03-28 | International Business Machines Corporation | Test probe substrate |
TWI569365B (zh) * | 2014-09-30 | 2017-02-01 | 欣興電子股份有限公司 | 封裝基板與其製造方法 |
US9515111B2 (en) * | 2014-10-20 | 2016-12-06 | Semiconductor Components Industries, Llc | Circuitry for biasing light shielding structures and deep trench isolation structures |
US9583462B2 (en) * | 2015-01-22 | 2017-02-28 | Qualcomm Incorporated | Damascene re-distribution layer (RDL) in fan out split die application |
CN104851860B (zh) | 2015-04-30 | 2018-03-13 | 华为技术有限公司 | 一种集成电路管芯及制造方法 |
US9847287B2 (en) | 2015-06-17 | 2017-12-19 | Semiconductor Components Industries, Llc | Passive tunable integrated circuit (PTIC) and related methods |
CN105261611B (zh) | 2015-10-15 | 2018-06-26 | 矽力杰半导体技术(杭州)有限公司 | 芯片的叠层封装结构及叠层封装方法 |
JP6862087B2 (ja) * | 2015-12-11 | 2021-04-21 | 株式会社アムコー・テクノロジー・ジャパン | 配線基板、配線基板を有する半導体パッケージ、およびその製造方法 |
US20170373032A1 (en) * | 2016-06-24 | 2017-12-28 | Qualcomm Incorporated | Redistribution layer (rdl) fan-out wafer level packaging (fowlp) structure |
CN108122820B (zh) * | 2016-11-29 | 2020-06-02 | 中芯国际集成电路制造(上海)有限公司 | 互连结构及其制造方法 |
CN108807295A (zh) * | 2017-04-28 | 2018-11-13 | 中芯长电半导体(江阴)有限公司 | 一种封装结构及封装方法 |
CN107424978A (zh) * | 2017-05-16 | 2017-12-01 | 杭州立昂东芯微电子有限公司 | 一种化合物半导体层间介电导线及其制备方法 |
US20190035715A1 (en) * | 2017-07-31 | 2019-01-31 | Innolux Corporation | Package device and manufacturing method thereof |
US10420211B2 (en) * | 2017-08-09 | 2019-09-17 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device |
US10818584B2 (en) * | 2017-11-13 | 2020-10-27 | Dyi-chung Hu | Package substrate and package structure |
US10522501B2 (en) * | 2017-11-17 | 2019-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and method of forming the same |
KR102511543B1 (ko) * | 2018-03-09 | 2023-03-17 | 삼성디스플레이 주식회사 | 표시 장치 |
CN108807290B (zh) * | 2018-06-15 | 2019-11-01 | 南通鸿图健康科技有限公司 | 一种半导体功率器件封装模块及其制造方法 |
US10665523B2 (en) * | 2018-07-17 | 2020-05-26 | Advance Semiconductor Engineering, Inc. | Semiconductor substrate, semiconductor package, and method for forming the same |
CN108663865A (zh) * | 2018-07-24 | 2018-10-16 | 武汉华星光电技术有限公司 | Tft阵列基板及其制造方法与柔性液晶显示面板 |
JP7147517B2 (ja) * | 2018-11-30 | 2022-10-05 | 富士通オプティカルコンポーネンツ株式会社 | 光部品、及びこれを用いた光モジュール |
CN109994438B (zh) * | 2019-03-29 | 2021-04-02 | 上海中航光电子有限公司 | 芯片封装结构及其封装方法 |
US11721657B2 (en) | 2019-06-14 | 2023-08-08 | Stmicroelectronics Pte Ltd | Wafer level chip scale package having varying thicknesses |
US11056453B2 (en) | 2019-06-18 | 2021-07-06 | Deca Technologies Usa, Inc. | Stackable fully molded semiconductor structure with vertical interconnects |
CN112234030B (zh) * | 2019-07-15 | 2023-07-21 | 珠海格力电器股份有限公司 | 一种三相逆变功率芯片及其制备方法 |
CN110373693A (zh) * | 2019-08-30 | 2019-10-25 | 上海戴丰科技有限公司 | 一种晶圆级封装滤波器电极的制备方法 |
CN110544679B (zh) * | 2019-08-30 | 2021-05-18 | 颀中科技(苏州)有限公司 | 芯片重布线结构及其制备方法 |
US11088141B2 (en) * | 2019-10-03 | 2021-08-10 | Nanya Technology Corporation | Semiconductor device and method for fabricating the same |
KR20210073809A (ko) | 2019-12-11 | 2021-06-21 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
US20210257290A1 (en) * | 2020-02-19 | 2021-08-19 | Nanya Technology Corporation | Semiconductor device with connecting structure and method for fabricating the same |
JP7424157B2 (ja) * | 2020-03-25 | 2024-01-30 | Tdk株式会社 | 電子部品及びその製造方法 |
KR20220030051A (ko) | 2020-09-02 | 2022-03-10 | 삼성전자주식회사 | 배선 구조체 및 이를 포함하는 반도체 패키지 |
TWI780500B (zh) * | 2020-10-12 | 2022-10-11 | 龍華科技大學 | 感應加熱應用於重佈線路的方法 |
US11670594B2 (en) | 2021-01-14 | 2023-06-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Redistribution layer features |
TWI785566B (zh) * | 2021-04-19 | 2022-12-01 | 欣興電子股份有限公司 | 封裝結構及其製作方法 |
US11710690B2 (en) | 2021-04-19 | 2023-07-25 | Unimicron Technology Corp. | Package structure and manufacturing method thereof |
Family Cites Families (132)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5421290A (en) * | 1977-07-19 | 1979-02-17 | Mitsubishi Electric Corp | Integrated circuit device and its manufacture |
JP2717835B2 (ja) * | 1989-02-22 | 1998-02-25 | 富士通株式会社 | 半導体装置の製造方法 |
US5226232A (en) | 1990-05-18 | 1993-07-13 | Hewlett-Packard Company | Method for forming a conductive pattern on an integrated circuit |
JPH0496254A (ja) * | 1990-08-03 | 1992-03-27 | Fujitsu Ltd | 薄膜多層回路基板とその製造方法 |
TW256013B (en) | 1994-03-18 | 1995-09-01 | Hitachi Seisakusyo Kk | Installation board |
JP3361881B2 (ja) | 1994-04-28 | 2003-01-07 | 株式会社東芝 | 半導体装置とその製造方法 |
US5615824A (en) | 1994-06-07 | 1997-04-01 | Tessera, Inc. | Soldering with resilient contacts |
US6828668B2 (en) * | 1994-07-07 | 2004-12-07 | Tessera, Inc. | Flexible lead structures and methods of making same |
IL110261A0 (en) | 1994-07-10 | 1994-10-21 | Schellcase Ltd | Packaged integrated circuit |
US5542174A (en) | 1994-09-15 | 1996-08-06 | Intel Corporation | Method and apparatus for forming solder balls and solder columns |
JPH08191104A (ja) * | 1995-01-11 | 1996-07-23 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP3400164B2 (ja) | 1995-01-23 | 2003-04-28 | 三井金属鉱業株式会社 | 多層プリント配線板およびその製造方法 |
US5801446A (en) | 1995-03-28 | 1998-09-01 | Tessera, Inc. | Microelectronic connections with solid core joining units |
US5745984A (en) | 1995-07-10 | 1998-05-05 | Martin Marietta Corporation | Method for making an electronic module |
JPH0945691A (ja) | 1995-07-27 | 1997-02-14 | Oki Electric Ind Co Ltd | チップ部品用ハンダバンプ及びその製造方法 |
US6020220A (en) * | 1996-07-09 | 2000-02-01 | Tessera, Inc. | Compliant semiconductor chip assemblies and methods of making same |
US5883435A (en) | 1996-07-25 | 1999-03-16 | International Business Machines Corporation | Personalization structure for semiconductor devices |
US5960316A (en) | 1997-03-31 | 1999-09-28 | Intel Corporation | Method to fabricate unlanded vias with a low dielectric constant material as an intraline dielectric |
US6162661A (en) | 1997-05-30 | 2000-12-19 | Tessera, Inc. | Spacer plate solder ball placement fixture and methods therefor |
US6144100A (en) | 1997-06-05 | 2000-11-07 | Texas Instruments Incorporated | Integrated circuit with bonding layer over active circuitry |
US6013571A (en) | 1997-06-16 | 2000-01-11 | Motorola, Inc. | Microelectronic assembly including columnar interconnections and method for forming same |
US6335222B1 (en) | 1997-09-18 | 2002-01-01 | Tessera, Inc. | Microelectronic packages with solder interconnections |
US6064114A (en) | 1997-12-01 | 2000-05-16 | Motorola, Inc. | Semiconductor device having a sub-chip-scale package structure and method for forming same |
US6253992B1 (en) | 1998-03-18 | 2001-07-03 | Tessera, Inc. | Solder ball placement fixtures and methods |
US6324754B1 (en) | 1998-03-25 | 2001-12-04 | Tessera, Inc. | Method for fabricating microelectronic assemblies |
US6329605B1 (en) | 1998-03-26 | 2001-12-11 | Tessera, Inc. | Components with conductive solder mask layers |
US6642136B1 (en) | 2001-09-17 | 2003-11-04 | Megic Corporation | Method of making a low fabrication cost, high performance, high reliability chip scale package |
US6077726A (en) | 1998-07-30 | 2000-06-20 | Motorola, Inc. | Method and apparatus for stress relief in solder bump formation on a semiconductor device |
US6284656B1 (en) | 1998-08-04 | 2001-09-04 | Micron Technology, Inc. | Copper metallurgy in integrated circuits |
US6103552A (en) | 1998-08-10 | 2000-08-15 | Lin; Mou-Shiung | Wafer scale packaging scheme |
JP3420076B2 (ja) | 1998-08-31 | 2003-06-23 | 新光電気工業株式会社 | フリップチップ実装基板の製造方法及びフリップチップ実装基板及びフリップチップ実装構造 |
US6187680B1 (en) * | 1998-10-07 | 2001-02-13 | International Business Machines Corporation | Method/structure for creating aluminum wirebound pad on copper BEOL |
JP4462664B2 (ja) * | 1998-11-27 | 2010-05-12 | 三洋電機株式会社 | チップサイズパッケージ型の半導体装置 |
JP3416545B2 (ja) * | 1998-12-10 | 2003-06-16 | 三洋電機株式会社 | チップサイズパッケージ及びその製造方法 |
JP3389517B2 (ja) * | 1998-12-10 | 2003-03-24 | 三洋電機株式会社 | チップサイズパッケージ及びその製造方法 |
JP3408172B2 (ja) * | 1998-12-10 | 2003-05-19 | 三洋電機株式会社 | チップサイズパッケージ及びその製造方法 |
US6495442B1 (en) | 2000-10-18 | 2002-12-17 | Magic Corporation | Post passivation interconnection schemes on top of the IC chips |
US6383916B1 (en) | 1998-12-21 | 2002-05-07 | M. S. Lin | Top layers of metal for high performance IC's |
US7381642B2 (en) | 2004-09-23 | 2008-06-03 | Megica Corporation | Top layers of metal for integrated circuits |
US6479900B1 (en) * | 1998-12-22 | 2002-11-12 | Sanyo Electric Co., Ltd. | Semiconductor device and method of manufacturing the same |
TW444288B (en) | 1999-01-27 | 2001-07-01 | Shinko Electric Ind Co | Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device |
JP2000228423A (ja) * | 1999-02-05 | 2000-08-15 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP3465617B2 (ja) | 1999-02-15 | 2003-11-10 | カシオ計算機株式会社 | 半導体装置 |
US6707159B1 (en) | 1999-02-18 | 2004-03-16 | Rohm Co., Ltd. | Semiconductor chip and production process therefor |
US6326701B1 (en) * | 1999-02-24 | 2001-12-04 | Sanyo Electric Co., Ltd. | Chip size package and manufacturing method thereof |
JP3677409B2 (ja) * | 1999-03-05 | 2005-08-03 | 京セラ株式会社 | 弾性表面波装置及びその製造方法 |
US6651321B2 (en) | 1999-03-10 | 2003-11-25 | Tessera, Inc. | Microelectronic joining processes |
US6495916B1 (en) | 1999-04-06 | 2002-12-17 | Oki Electric Industry Co., Ltd. | Resin-encapsulated semiconductor device |
EP1050905B1 (en) | 1999-05-07 | 2017-06-21 | Shinko Electric Industries Co. Ltd. | Method of producing a semiconductor device with insulating layer |
EP1194022B1 (en) | 1999-06-02 | 2006-11-02 | Ibiden Co., Ltd. | Multilayer printed wiring board and method of manufacturing multilayer printed wiring board |
US6387734B1 (en) * | 1999-06-11 | 2002-05-14 | Fujikura Ltd. | Semiconductor package, semiconductor device, electronic device and production method for semiconductor package |
KR101384035B1 (ko) | 1999-09-02 | 2014-04-09 | 이비덴 가부시키가이샤 | 프린트배선판 및 그 제조방법 |
JP2001110828A (ja) * | 1999-10-13 | 2001-04-20 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP3455762B2 (ja) | 1999-11-11 | 2003-10-14 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
US6154366A (en) | 1999-11-23 | 2000-11-28 | Intel Corporation | Structures and processes for fabricating moisture resistant chip-on-flex packages |
JP3287346B2 (ja) | 1999-11-29 | 2002-06-04 | カシオ計算機株式会社 | 半導体装置 |
JP2001168126A (ja) * | 1999-12-06 | 2001-06-22 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
US6303486B1 (en) * | 2000-01-28 | 2001-10-16 | Advanced Micro Devices, Inc. | Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer and an unconstrained copper anneal |
EP1990831A3 (en) | 2000-02-25 | 2010-09-29 | Ibiden Co., Ltd. | Multilayer printed circuit board and multilayer printed circuit board manufacturing method |
JP2001244372A (ja) * | 2000-03-01 | 2001-09-07 | Seiko Epson Corp | 半導体装置およびその製造方法 |
US6380060B1 (en) | 2000-03-08 | 2002-04-30 | Tessera, Inc. | Off-center solder ball attach and methods therefor |
US6387793B1 (en) * | 2000-03-09 | 2002-05-14 | Hrl Laboratories, Llc | Method for manufacturing precision electroplated solder bumps |
JP3772066B2 (ja) | 2000-03-09 | 2006-05-10 | 沖電気工業株式会社 | 半導体装置 |
JP3548082B2 (ja) * | 2000-03-30 | 2004-07-28 | 三洋電機株式会社 | 半導体装置及びその製造方法 |
JP3968554B2 (ja) | 2000-05-01 | 2007-08-29 | セイコーエプソン株式会社 | バンプの形成方法及び半導体装置の製造方法 |
JP4480108B2 (ja) * | 2000-06-02 | 2010-06-16 | 大日本印刷株式会社 | 半導体装置の作製方法 |
US6580170B2 (en) * | 2000-06-22 | 2003-06-17 | Texas Instruments Incorporated | Semiconductor device protective overcoat with enhanced adhesion to polymeric materials |
US6683380B2 (en) * | 2000-07-07 | 2004-01-27 | Texas Instruments Incorporated | Integrated circuit with bonding layer over active circuitry |
JP3440070B2 (ja) | 2000-07-13 | 2003-08-25 | 沖電気工業株式会社 | ウェハー及びウェハーの製造方法 |
US6678952B2 (en) | 2000-08-03 | 2004-01-20 | Tessera, Inc. | Method of making a microelectronic package including a component having conductive elements on a top side and a bottom side thereof |
US6847066B2 (en) | 2000-08-11 | 2005-01-25 | Oki Electric Industry Co., Ltd. | Semiconductor device |
JP4394266B2 (ja) * | 2000-09-18 | 2010-01-06 | カシオ計算機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2002198374A (ja) | 2000-10-16 | 2002-07-12 | Sharp Corp | 半導体装置およびその製造方法 |
EP1207555A1 (en) * | 2000-11-16 | 2002-05-22 | Texas Instruments Incorporated | Flip-chip on film assembly for ball grid array packages |
JP2002158312A (ja) * | 2000-11-17 | 2002-05-31 | Oki Electric Ind Co Ltd | 3次元実装用半導体パッケージ、その製造方法、および半導体装置 |
US20020070443A1 (en) | 2000-12-08 | 2002-06-13 | Xiao-Chun Mu | Microelectronic package having an integrated heat sink and build-up layers |
SG99877A1 (en) * | 2001-01-04 | 2003-11-27 | Inst Materials Research & Eng | Forming an electrical contact on an electronic component |
US6291268B1 (en) * | 2001-01-08 | 2001-09-18 | Thin Film Module, Inc. | Low cost method of testing a cavity-up BGA substrate |
US6426281B1 (en) | 2001-01-16 | 2002-07-30 | Taiwan Semiconductor Manufacturing Company | Method to form bump in bumping technology |
US6818545B2 (en) | 2001-03-05 | 2004-11-16 | Megic Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
JP3939504B2 (ja) * | 2001-04-17 | 2007-07-04 | カシオ計算機株式会社 | 半導体装置並びにその製造方法および実装構造 |
JP3850260B2 (ja) * | 2001-04-27 | 2006-11-29 | イビデン株式会社 | 半導体チップの製造方法 |
JP2002343861A (ja) * | 2001-05-21 | 2002-11-29 | Mitsubishi Electric Corp | 半導体集積回路およびその製造方法 |
JP4092890B2 (ja) * | 2001-05-31 | 2008-05-28 | 株式会社日立製作所 | マルチチップモジュール |
US6547124B2 (en) * | 2001-06-14 | 2003-04-15 | Bae Systems Information And Electronic Systems Integration Inc. | Method for forming a micro column grid array (CGA) |
US20030006062A1 (en) | 2001-07-06 | 2003-01-09 | Stone William M. | Interconnect system and method of fabrication |
JP2003078006A (ja) * | 2001-09-04 | 2003-03-14 | Ibiden Co Ltd | 半導体チップおよびその製造方法 |
US6853076B2 (en) | 2001-09-21 | 2005-02-08 | Intel Corporation | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US6762122B2 (en) | 2001-09-27 | 2004-07-13 | Unitivie International Limited | Methods of forming metallurgy structures for wire and solder bonding |
US6864565B1 (en) * | 2001-12-06 | 2005-03-08 | Altera Corporation | Post-passivation thick metal pre-routing for flip chip packaging |
US6798073B2 (en) * | 2001-12-13 | 2004-09-28 | Megic Corporation | Chip structure and process for forming the same |
US6673698B1 (en) * | 2002-01-19 | 2004-01-06 | Megic Corporation | Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers |
TW503496B (en) | 2001-12-31 | 2002-09-21 | Megic Corp | Chip packaging structure and manufacturing process of the same |
TWI245402B (en) | 2002-01-07 | 2005-12-11 | Megic Corp | Rod soldering structure and manufacturing process thereof |
JP3775499B2 (ja) * | 2002-01-08 | 2006-05-17 | 株式会社リコー | 半導体装置及びその製造方法、並びにdc−dcコンバータ |
US6709897B2 (en) | 2002-01-15 | 2004-03-23 | Unimicron Technology Corp. | Method of forming IC package having upward-facing chip cavity |
US6864118B2 (en) * | 2002-01-28 | 2005-03-08 | Hewlett-Packard Development Company, L.P. | Electronic devices containing organic semiconductor materials |
TW577160B (en) * | 2002-02-04 | 2004-02-21 | Casio Computer Co Ltd | Semiconductor device and manufacturing method thereof |
JP2003243394A (ja) * | 2002-02-19 | 2003-08-29 | Fuji Electric Co Ltd | 半導体装置の製造方法 |
US6921979B2 (en) * | 2002-03-13 | 2005-07-26 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
US6740577B2 (en) | 2002-05-21 | 2004-05-25 | St Assembly Test Services Pte Ltd | Method of forming a small pitch torch bump for mounting high-performance flip-flop devices |
US20030218246A1 (en) | 2002-05-22 | 2003-11-27 | Hirofumi Abe | Semiconductor device passing large electric current |
US6770971B2 (en) | 2002-06-14 | 2004-08-03 | Casio Computer Co., Ltd. | Semiconductor device and method of fabricating the same |
US20040007779A1 (en) * | 2002-07-15 | 2004-01-15 | Diane Arbuthnot | Wafer-level method for fine-pitch, high aspect ratio chip interconnect |
JP3918681B2 (ja) * | 2002-08-09 | 2007-05-23 | カシオ計算機株式会社 | 半導体装置 |
JP3580803B2 (ja) | 2002-08-09 | 2004-10-27 | 沖電気工業株式会社 | 半導体装置 |
JP4100227B2 (ja) * | 2002-09-06 | 2008-06-11 | 日立電線株式会社 | 半導体装置及び配線板 |
JP2004140037A (ja) | 2002-10-15 | 2004-05-13 | Oki Electric Ind Co Ltd | 半導体装置、及びその製造方法 |
US7285867B2 (en) * | 2002-11-08 | 2007-10-23 | Casio Computer Co., Ltd. | Wiring structure on semiconductor substrate and method of fabricating the same |
JP4170735B2 (ja) * | 2002-11-13 | 2008-10-22 | 信越化学工業株式会社 | ゼオライトゾルとその製造方法、多孔質膜形成用組成物、多孔質膜とその製造方法、層間絶縁膜及び半導体装置 |
US20050176233A1 (en) * | 2002-11-15 | 2005-08-11 | Rajeev Joshi | Wafer-level chip scale package and method for fabricating and using the same |
JP3808030B2 (ja) | 2002-11-28 | 2006-08-09 | 沖電気工業株式会社 | 半導体装置及びその製造方法 |
JP2004273591A (ja) * | 2003-03-06 | 2004-09-30 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JP4434606B2 (ja) * | 2003-03-27 | 2010-03-17 | 株式会社東芝 | 半導体装置、半導体装置の製造方法 |
US6924551B2 (en) * | 2003-05-28 | 2005-08-02 | Intel Corporation | Through silicon via, folded flex microelectronic package |
JP3721175B2 (ja) * | 2003-06-03 | 2005-11-30 | 沖電気工業株式会社 | 半導体装置の製造方法 |
JP3983205B2 (ja) * | 2003-07-08 | 2007-09-26 | 沖電気工業株式会社 | 半導体装置及びその製造方法 |
US7158425B2 (en) | 2003-07-28 | 2007-01-02 | Mosaic Systems, Inc. | System and method for providing a redundant memory array in a semiconductor memory integrated circuit |
JP4623949B2 (ja) * | 2003-09-08 | 2011-02-02 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
WO2005024912A2 (en) * | 2003-09-09 | 2005-03-17 | Intel Corporation | Methods of processing thick ild layers using spray coating or lamination for c4 wafer level thick metal integrated flow |
JP4012496B2 (ja) * | 2003-09-19 | 2007-11-21 | カシオ計算機株式会社 | 半導体装置 |
JP4442181B2 (ja) * | 2003-10-07 | 2010-03-31 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
JP2005129862A (ja) * | 2003-10-27 | 2005-05-19 | Fujikura Ltd | 半導体パッケージの製造方法、半導体パッケージ |
JP4232613B2 (ja) * | 2003-11-20 | 2009-03-04 | カシオ計算機株式会社 | 半導体装置の製造方法 |
JP3929966B2 (ja) * | 2003-11-25 | 2007-06-13 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
EP1536469A1 (en) | 2003-11-28 | 2005-06-01 | EM Microelectronic-Marin SA | Semiconductor device with connecting bumps |
CN1560911B (zh) | 2004-02-23 | 2010-05-12 | 威盛电子股份有限公司 | 电路载板的制造方法 |
KR100619367B1 (ko) | 2004-08-26 | 2006-09-08 | 삼성전기주식회사 | 고유전율을 갖는 커패시터를 내장한 인쇄회로기판 및 그제조 방법 |
US7196014B2 (en) * | 2004-11-08 | 2007-03-27 | International Business Machines Corporation | System and method for plasma induced modification and improvement of critical dimension uniformity |
JP2006179570A (ja) * | 2004-12-21 | 2006-07-06 | Renesas Technology Corp | 半導体装置の製造方法 |
US7468545B2 (en) | 2005-05-06 | 2008-12-23 | Megica Corporation | Post passivation structure for a semiconductor device and packaging process for same |
US8836146B2 (en) * | 2006-03-02 | 2014-09-16 | Qualcomm Incorporated | Chip package and method for fabricating the same |
-
2006
- 2006-05-08 US US11/430,513 patent/US7468545B2/en active Active
- 2006-06-23 TW TW095122893A patent/TWI336098B/zh active
- 2006-06-23 JP JP2006173778A patent/JP5435524B2/ja active Active
- 2006-06-23 EP EP06012984A patent/EP1737037B1/en active Active
- 2006-06-23 JP JP2006173775A patent/JP2007005809A/ja not_active Withdrawn
- 2006-06-23 EP EP11003815.5A patent/EP2421036B1/en active Active
- 2006-06-23 CN CNB2006100901215A patent/CN100573846C/zh active Active
- 2006-06-23 TW TW097146146A patent/TWI398903B/zh not_active IP Right Cessation
- 2006-06-23 CN CN2010105080771A patent/CN102054788B/zh active Active
- 2006-06-23 EP EP06013044A patent/EP1737038B1/en active Active
- 2006-06-23 SG SG201003764-6A patent/SG162733A1/en unknown
- 2006-06-23 TW TW095122894A patent/TWI371059B/zh active
- 2006-06-23 CN CN200610090122XA patent/CN1885532B/zh active Active
- 2006-06-23 CN CNB2006100901200A patent/CN100511639C/zh active Active
- 2006-06-23 JP JP2006173769A patent/JP2007005808A/ja not_active Withdrawn
- 2006-06-23 SG SG200604348A patent/SG128640A1/en unknown
-
2008
- 2008-11-04 US US12/264,271 patent/US8558383B2/en active Active
-
2013
- 2013-07-05 JP JP2013141588A patent/JP5908437B2/ja active Active
-
2014
- 2014-01-17 JP JP2014007143A patent/JP2014103411A/ja not_active Withdrawn
-
2016
- 2016-06-15 JP JP2016119070A patent/JP6700111B2/ja active Active
-
2018
- 2018-11-02 JP JP2018207349A patent/JP2019047129A/ja active Pending
-
2021
- 2021-11-26 JP JP2021191889A patent/JP2022019819A/ja active Pending
-
2023
- 2023-02-15 JP JP2023021229A patent/JP2023057129A/ja active Pending
Also Published As
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100511639C (zh) | 线路组件结构制造方法及其结构 | |
US7582556B2 (en) | Circuitry component and method for forming the same | |
CN1901163B (zh) | 连续电镀制作线路组件的方法及线路组件结构 | |
US7323784B2 (en) | Top via pattern for bond pad structure | |
KR20100121447A (ko) | 범프 패드 구조 및 그 제조방법 | |
CN101958288A (zh) | 半导体组件 | |
CN101312174B (zh) | 线路组件 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: MEIGETE ACQUIRING CORPORATION Free format text: FORMER OWNER: MEGICA CORP. Effective date: 20131202 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20131202 Address after: American California Patentee after: MEGICA CORP Address before: Taiwan, China Patentee before: Megica Corp. |
|
ASS | Succession or assignment of patent right |
Owner name: QUALCOMM INC. Free format text: FORMER OWNER: MEIGETE ACQUIRING CORPORATION Effective date: 20140820 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20140820 Address after: American California Patentee after: Qualcomm Inc. Address before: American California Patentee before: MEGICA CORP |