CN100495666C - Encapsulation method of crystal-covered integrated circuit - Google Patents
Encapsulation method of crystal-covered integrated circuit Download PDFInfo
- Publication number
- CN100495666C CN100495666C CNB2006100915701A CN200610091570A CN100495666C CN 100495666 C CN100495666 C CN 100495666C CN B2006100915701 A CNB2006100915701 A CN B2006100915701A CN 200610091570 A CN200610091570 A CN 200610091570A CN 100495666 C CN100495666 C CN 100495666C
- Authority
- CN
- China
- Prior art keywords
- integrated circuit
- chip
- crystal
- support plate
- adhesive tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
Abstract
The invention relates to a covering type integrated circuit composing method. the method includes following steps: provide a loading board with a top surface and a bottom surface, then provide several integrated circuit chips, every integrated circuit chip possesses a back surface, the integrated circuit chips are connected to the top surface of the loading board in mode of back surface towards outer, the first adhesive tape is adhibited to back of the integrated circuit chips, encapsulating material is filled to encapsulate the integrated circuit chips and loading board top surface; at last a cutting step is executed to obtain several integrated circuit encapsulation structure. The encapsulation method of the invention can use back of the integrated circuit chips to contact with radiating module; heat generated by the integrated circuit chips can be given out quickly.
Description
[technical field]
The present invention relates to a kind of encapsulation method of crystal-covered integrated circuit, refer in particular to the exposed construction method in a kind of integrated circuit (IC) chip back side.
[background technology]
Along with the integrated level of integrated circuit (IC) chip or the increase of electronic building brick, the heat that produces during the integrated circuit running increases immediately, and the heat how effective loss integrated circuit (IC) chip is produced when running becomes the big problem of semiconductor packages dealer on structural design.
At present, integrated circuit package structure, particularly crystal covering type does not have pin quad flat package structure (FC-QFN, Flip Chip-Quad Flat Packages No-lead) flip chip p1 encapsulates whole integrated circuit (IC) chip p20 with encapsulating material p30, (please refer to shown in Figure 1) sealed on surface together with lead frame p10, and be the heat dissipation problem that solves this structure, the dealer adds a radiating module (not shown) mostly on flip chip p1, make this radiating module near integrated circuit (IC) chip p20, with provide heat that integrated circuit (IC) chip p20 produces by the radiating module transmission loss to extraneous approach.Yet, because the encapsulating material p30 of existing flip chip p1 coats its integrated circuit (IC) chip p20 fully, its radiating module only can be installed on the encapsulating material p30 of back side top of integrated circuit (IC) chip p20, see through encapsulating material p30 and indirectly the heat of integrated circuit (IC) chip p20 is conducted out, its heat radiation is imitated inevitable not ideal enough.
Therefore the present invention proposes a kind of encapsulation method of crystal-covered integrated circuit, to solve the existing existing deficiency of method.
[summary of the invention]
The object of the present invention is to provide a kind of encapsulation method of crystal-covered integrated circuit, it will be by will be exposed in order to the back side of the integrated circuit (IC) chip that forms packaging part, thereby can directly install thereon as radiating modules such as fin, directly heat is passed to radiating module by the back side of integrated circuit (IC) chip, obtain heat dissipation preferably, avoid its radiating module to see through the encapsulating material heat radiation, and form the meaningless loss of heat dissipation.
According to above-mentioned purpose, the invention provides a kind of encapsulation method of crystal-covered integrated circuit, it comprises the following steps: at first to provide a support plate, and it has an end face and a bottom surface; Several integrated circuit (IC) chip are provided again, and to the support plate end face, and each integrated circuit (IC) chip all has a back side with each integrated circuit (IC) chip chip bonding; The continuous back side of one first adhesive tape that attaches again in integrated circuit (IC) chip; Then insert encapsulating material, with the end face of sealing integrated circuit (IC) chip and this support plate subregion at least; At last, carry out a cutting step again, to obtain several ic core chip packages.
Before or after the aforementioned cutting step, comprise that more one removes the step of first adhesive tape.
In the aforementioned step that support plate is provided, this support plate comprises that one is attached at second adhesive tape of support plate bottom surface.
Wherein, support plate is the lead frame of crystal covering type encapsulation.
Moreover support plate also can be crystal covering type four limit flat non-connection pins (quad flat no lead; QFN) Feng Zhuan lead frame.
[description of drawings]
Fig. 1 is the flip chip generalized section of prior art;
Fig. 2 A, 2B, 2C, 2D and 2E are the schematic flow sheet of encapsulation method of crystal-covered integrated circuit embodiment of the present invention;
Fig. 3 is the schematic top plan view of Fig. 2 C;
Fig. 4 is the schematic top plan view of Fig. 2 E;
Fig. 5 is the support plate of encapsulation method of crystal-covered integrated circuit embodiment of the present invention and the schematic top plan view of ic core chip bonding;
The part schematic diagram of Fig. 6 for cutting open along A-A line among Fig. 5; And
Fig. 7 is the schematic diagram of the removal first adhesive tape step of encapsulation method of crystal-covered integrated circuit embodiment of the present invention.
[embodiment]
At first please refer to the schematic flow sheet of the encapsulation method of crystal-covered integrated circuit embodiment of the present invention shown in Fig. 2 A, 2B, 2C, 2D and the 2E.This construction method comprises the steps: at first, please refer to Fig. 2 A, one support plate 10 is provided, lead frame that this support plate 10 can be the chip bonding formula or crystal covering type four limit flat non-connection pins (Quad Flat No-lead, QFN) Feng Zhuan forms such as lead frame, and it has an end face 11 for the required semiconductor subassembly such as the usefulness of integrated circuit (IC) chip are set, and is a bottom surface 12 on the opposite with respect to end face 11.
Please refer to Fig. 2 A again, several integrated circuit (IC) chip 20 are provided, and, are soldered on end face 11 prepositions of support plate 10 technology of each integrated circuit (IC) chip 20 with chip bonding, and electrically conducted, and each integrated circuit (IC) chip 10 all has a back side 21.
Afterwards, see also Fig. 2 B, utilize a larger area first adhesive tape 30 lining and be fitted on the back side 21 of each integrated circuit (IC) chip 20, this first adhesive tape 30 can be one can bear the heat resistant adhesive tape of high heat, so that in successive process, when first adhesive tape 30 when entering high thermal environment, still can keep attaching functions such as fixing.
See also Fig. 2 C and Fig. 3, then between first adhesive tape 30 and support plate 10 bottom surfaces 12, insert encapsulating material 50, because of pasting first adhesive tape 30 in the back side 21 of integrated circuit (IC) chip 20, so can form a barricade effect, encapsulating material 50 is blocked in the back side of integrated circuit (IC) chip 20 below 21, and under the bottom surface 12 of support plate 10, prop up with mould (not shown) in addition, also can be covered on the bottom surface 12 (shown in Fig. 2 B and 2C) of support plate 10 in addition with large-area second adhesive tape 40, seal so that be all encapsulating material 50 from the zone (subregion that comprises end face 11) between bottom surface to the back side 21 of integrated circuit (IC) chip 20 of support plate 10.In the present embodiment, this second adhesive tape 40 comprises heat resistant adhesive tape.
The zone that above-mentioned support plate 10 summit portions are not enclosed, promptly can be support plate 10 four limit pins (not shown) expose the zone.
Please refer to afterwards shown in Fig. 2 D, remove (if in abovementioned steps, using second adhesive tape 40) after second adhesive tape 40, carry out a cutting step, cut out several ic core chip packages along Cutting Road S.
Again next, please refer to shown in 2E figure and the 4th figure, remove first adhesive tape 30.
The crystal-covered integrated circuit that is obtained behind above-mentioned processing procedure is adorned 1 (shown in Fig. 5 and 6), can be directly contacts a radiating module (not shown) with the back side 21 of exposed integrated circuit (IC) chip 20, to obtain best heat sinking benefit.
Certainly, above-mentioned first adhesive tape 30 and/or second adhesive tape 40 can all be removed (as shown in Figure 7) before step is cut in execution.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to claim scope of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (6)
1. encapsulation method of crystal-covered integrated circuit, this method comprises:
One support plate is provided, and it has an end face and a bottom surface;
Several integrated circuit (IC) chip are provided, and with the end face of each integrated circuit (IC) chip chip bonding to this support plate, and each integrated circuit (IC) chip all has a back side;
One first adhesive tape is attached to the back side of those integrated circuit (IC) chip;
Insert encapsulating material to seal the subregion at least of those integrated circuit (IC) chip and this support plate end face;
Carry out a cutting step, to obtain several ic core chip packages; And
Carry out after the described cutting step, comprise that also one removes the step of this first adhesive tape.
2. encapsulation method of crystal-covered integrated circuit as claimed in claim 1 is characterized in that: in the described step that support plate is provided, this support plate includes the bottom surface that one second adhesive tape is attached at this support plate.
3. encapsulation method of crystal-covered integrated circuit as claimed in claim 2 is characterized in that: described second adhesive tape comprises heat resistant adhesive tape.
4. encapsulation method of crystal-covered integrated circuit as claimed in claim 1 is characterized in that: described support plate is the lead frame of crystal covering type encapsulation.
5. encapsulation method of crystal-covered integrated circuit as claimed in claim 1 is characterized in that: described support plate is the lead frame of crystal covering type four limit flat non-connection pin encapsulation.
6. encapsulation method of crystal-covered integrated circuit as claimed in claim 1 is characterized in that: described first adhesive tape comprises heat resistant adhesive tape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100915701A CN100495666C (en) | 2006-06-06 | 2006-06-06 | Encapsulation method of crystal-covered integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100915701A CN100495666C (en) | 2006-06-06 | 2006-06-06 | Encapsulation method of crystal-covered integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101086971A CN101086971A (en) | 2007-12-12 |
| CN100495666C true CN100495666C (en) | 2009-06-03 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100915701A Expired - Fee Related CN100495666C (en) | 2006-06-06 | 2006-06-06 | Encapsulation method of crystal-covered integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100495666C (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101281875B (en) * | 2008-05-26 | 2010-06-02 | 日月光半导体制造股份有限公司 | Sstack type encapsulation structure as well as manufacturing method thereof |
| CN101281874B (en) * | 2008-05-26 | 2010-06-02 | 日月光半导体制造股份有限公司 | Encapsulation structure as well as manufacturing method thereof |
| CN102136459B (en) * | 2010-01-25 | 2014-02-26 | 矽品精密工业股份有限公司 | Packaging structure and manufacture method thereof |
| CN104392940A (en) * | 2014-10-31 | 2015-03-04 | 南通富士通微电子股份有限公司 | Method of forming flip-chip semiconductor encapsulation device |
-
2006
- 2006-06-06 CN CNB2006100915701A patent/CN100495666C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101086971A (en) | 2007-12-12 |
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