CN100456273C - PCI-Express communications system - Google Patents
PCI-Express communications system Download PDFInfo
- Publication number
- CN100456273C CN100456273C CNB2006100661211A CN200610066121A CN100456273C CN 100456273 C CN100456273 C CN 100456273C CN B2006100661211 A CNB2006100661211 A CN B2006100661211A CN 200610066121 A CN200610066121 A CN 200610066121A CN 100456273 C CN100456273 C CN 100456273C
- Authority
- CN
- China
- Prior art keywords
- channel
- module
- packet
- pci
- write request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
To be able to transmit a response packet to a target, which is the original request source node, even if, after issuing a request from a node to another, a bus ID/a device ID is replaced in the PCI-Express switch before said another node makes a response to the request source node in a PCI-Express communication system, which uses a PCI-Express switch. For that purpose, a unique node ID for indicating each node is set to the nodes, a channel ID is set to each channel used for data transfer, and the node ID of the transfer destination module, the channel ID of a channel used for the data transfer, and the packet type indicating that the packet is a request or a response are set in an address field of a packet of data transfer. For the data transfer, only a memory write request packet routed by address routing is used.
Description
Technical field
The present invention relates to a kind of communication system and communication means thereof, wherein in interface, use PCI-Express and a plurality of node to connect by PCI-Express.
Background technology
Periphery component interconnection (PCI) is to be used for the standard that the computer bus between each parts of computer-internal connects, and is applicable to most computers at present; But, the up-to-date PCI-Express standard of having developed as faster transmission interface standard.
For example, described in patent documentation 1, in PCI-Express, adopt serial link for the time lag between the signal wire that prevents from parallel bus, to occur (skew), and packet is carried out asynchronous transmission by serial link.In addition, it is that unit upgrades that PCI-Express makes it possible to the layer, so its function is by layering.By in the transmission data that generate with digital form (in number), adding the head in the processing layer and adding CRC, generate the data link packet to the head and the afterbody of handle packet.At last, in Physical layer, convert thereof into physical signalling and transmit by transmission medium.
Simultaneously, in PCI-Express, can connect by converter (PCI-Express converter) between the node.
Fig. 1 represents traditional PCI-Express communication system, and wherein each node (also being called module here) is by connecting at modules A to the PCI-Express converter that communicates between the n based on the PCI-Express standard.
In the following description, a part of PCI-Express related to the present invention will be further specified.
According to the PCI-Express standard, need be positioned at the module that is called as root complex (rootcomplex) on the upper strata, for example the modules A among Fig. 11.In addition, as shown in Figure 1, in each port of PCI-Express converter 6, for each module assignment bus number (BusNum.) and device numbering (DeviceNum.).Fig. 1 shows following example: for modules A 1 has been distributed bus number 0 and device numbering 1, for module B2 has distributed bus number 1 and device numbering 2, for module C3 has distributed bus number 1 and device numbering 3, and bus number 1 and device numbering 4 have been distributed for module D4.
Next, the data packet communication that is undertaken by PCI-Express converter 6 is described between module.Two types packet route is arranged: the address route that is used for carrying out route according to the address that is included in the packet head on PCI-Express converter 6; And the ID route that is used for carrying out route according to the requestor ID that constitutes by device numbering and action numbering that is included in the packet head.
In the PCI-Express standard, use this route of two types respectively, thereby use the address route, and use the ID route for response data packet for request data package.Therefore, use the address route for the request data package that is used for memory write request order and read request order.Notice that in this PCI-Express standard, the response of response data packet is not carried out the memory write request order.
As shown in Figure 1, (1) when when module D4 and module C3 send the read request order, (2) PCI-Express converter 6 sends the read request packet to module C3 according to the address route of PCI-Express standard, (3) module C3 with institute's read data in response packet reply.(4) PCI-Express converter 6 sends response data packet to module D4 according to the ID route of PCI-Express standard.
Fig. 2 is the process flow diagram of explanation from the GET transfer sequence of other end sense data.The firmware of transmitting terminal is by generating the hardware that descriptor starts transmitting terminal in storer, this descriptor is used to specify data to be read.As shown in Figure 2, the read request packet is sent as the GET transfer sequence in transmitting terminal or transmission source, and the address route according to the PCI-Express standard is sent to receiving end with the GET request of transmitting in PCI-Express converter 6.At receiving end, the hardware of receiving end starts from idle condition by receiving the reception trigger pip that sends from transmitting terminal.And, return GET request responding packet in response after storer is read data.ID route according to the PCI-Express standard of PCI-Express converter 6 sends it back transmitting terminal with response data packet.The hardware of transmitting terminal receives institute's read data from response data packet, interrupt the transmitting terminal firmware in the storer by writing data into, thereby the executive termination of transmitting terminal firmware is handled.
Fig. 3 is explanation writes the PUT transfer sequence of data at the other end a process flow diagram.Situation about transmitting with GET is identical, carries out the route of the memory write request packet that sends from transmitting terminal according to the address route of PCI-Express standard.And according to the PCI-Express standard, receiving end does not respond (not producing response in non-posted storer writes).Therefore, whether the request end be can not determine normally to have carried out and is write processing.
For example, suppose as shown in Figure 1 and in each port of PCI-Express converter 6, all set bus number and device numbering, and come execute store read request packet to transmit as GET according to the address route of PCI-Express standard.Module C transmits institute's read data packet in response, and carries out response according to the ID route of PCI-Express standard and transmit control.
Fig. 4 is illustrated in the part of the head in the processing layer of the packet that uses in the above-mentioned sequence.PCI-Express converter 6 uses the requestor ID among Fig. 4 to carry out the ID route of PCI-Express standard when the ID of for example request response data packet route, and uses address among Fig. 4 to carry out the address route of PCI-Express standard.Requestor ID among Fig. 4 is the information that is used to discern the module of request end, and the address packet among Fig. 4 contains the routing iinformation of transmission destination.
As shown in Figure 5, for this system, when as the modules A 1 of root complex since unusual (for example, abnormal voltage, chip defect, software issue or maintenance etc.) and when disconnecting, because lack root complex, so according to the PCI-Express standard, need among other modules B to N any one to become new root complex, and need to change the module information (bus number/device numbering) of each port that PCI-Express converter 6 had.In the example depicted in fig. 5, after modules A 1 disconnected, module B2 became new root complex, its bus number be 0 and device numbering be 1.
In Fig. 5, suppose that (1) send read request from module D4 to module C3, (2) PCI-Express converter 6 transmits the read request packet according to the address route of PCI-Express standard to module C3, and (3) are at this moment, as the modules A 1 of root complex owing to disconnecting unusually.Then, (4) change each configuring ports information in the PCI-Express converter 6, change bus number and device numbering (the following ID that is referred to as changes), and module B2 become new root complex.(5) module C3 is by replying institute's read data from the read request order of module D4, and the requestor ID of this moment comprises bus number and the device numbering of the module D before changing.(6) because the packet that sends from module C3 is a response data packet, so PCI-Express converter 6 carries out route according to the ID route of PCI-Express standard.(7) yet, because described bus number and device numbering have been distributed to other modules, so may mistakenly response data packet be sent to wrong module or may lose owing to change.
[patent documentation 1]
Japanese Patent Application No.2004-326151
Summary of the invention
The problem to be solved in the present invention is to use the PCI-Express converter in the PCI-Express of enabling communication between nodes communication system, even from a node after another node sends request, before described another node responds the initial request source node, in the PCI-Express converter, changed bus number/device numbering, also can send response data packet to target as this initial request source node.
In order to solve problem of the present invention, to the unique node ID of each module settings that connects by PCI-Express.To (PUT transmission) in the module that data is write the other end and from the module of the other end each in the sense data (GET transmission) dedicated channel is provided, and channel id is set for each channel.According to PCI-Express, node ID and channel id are arranged in the address of head of the processing layer packet that is transmitted, and are provided for discerning the type of data packet that this packet is request or response simultaneously.
Transmit for data, only use the memory write request packet that carries out route according to the address route of PCI-Express standard.
When request data package, respond by response data packet (response type memory write request packet) all the time.
According to the present invention, because conveyer does not adopt the ID route, so, also can respond reliably to the module of the request of sending even in the PCI-Express converter, caused the replacing of bus number and device numbering.
The module of receiving end is analyzed the packet head that is sent, and determines that according to channel id this packet is that PUT transmits or GET transmits, and determines that according to type of data packet this packet is request or response, thereby carry out correct operation.
Can also determine whether with the order of normal mode execute store write request by increase information in response type memory write request packet.
The invention provides a kind of PCI-Express communication system, it uses by connecting a plurality of modules and carries out the PCI-Express converter that packet transmits, this PCI-Express communication system comprises: be used in described a plurality of module each unique node ID to be set representing each module, and for being used for the device that each channel that data transmit is provided with channel id; Be used for the node ID that transmits destination module, the channel id that is used for the channel of data transmission being set, and represent that described packet is the device of the request type packet or the type of data packet of response type packet in the address field of the packet that is used for the data transmission; Be used to use and carry out the device that data transmit according to the memory write request packet that PCI-Express converter address route is carried out route; And be used for: the PUT transmission dedicated channel that is used for data are write the module of the other end the device of following channel as the channel that is used for the data transmission; And be used for from the GET transmission dedicated channel of the module reading of data of the other end.
The invention provides a kind of PCI-Express communication means, it uses by connecting a plurality of modules and carries out the PCI-Express converter that packet transmits, this PCI-Express communication means comprises: in described a plurality of modules each is provided with unique node ID representing each module, and for being used for each channel that data transmit channel id is set; Address field at the packet that is used for the data transmission is provided with the node ID that transmits destination module, the channel id that is used for the channel of data transmission, and the type of data packet of expression request type packet or response type packet; When described type of data packet is request, use response data packet to reply; And use and to carry out data according to the memory write request packet that PCI-Express converter address route is carried out route and transmit; Wherein, comprise that following channel is as being used for the channel that data transmit: the PUT transmission dedicated channel that is used for data are write the module of the other end; And be used for from the GET transmission dedicated channel of the module reading of data of the other end.
The invention provides a kind of modular device of PCI-Express communication system, this PCI-Express communication system is used and is carried out the PCI-Express converter that packet transmits, this modular device comprises: be used to be provided with unique node ID, with this modular device of identification from a plurality of modular devices of described PCI-Express communication system, and the device that channel id is set for each channel that is used for the data transmission; Be used for the node ID that transmits the destination module device, the channel id that is used for the channel of data transmission being set in the address field of the packet that is used for the data transmission, and the device of the type of data packet of expression request type packet or response type packet; Be used to use and carry out the device that data transmit according to the memory write request packet that PCI-Express converter address route is carried out route; And be used for: the PUT transmission dedicated channel that is used for data are write the modular device of the other end the device of following channel as the channel that is used for the data transmission; And be used for from the GET transmission dedicated channel of the modular device reading of data of the other end.
Description of drawings
Fig. 1 represents traditional PCI-Express communication system;
Fig. 2 is the process flow diagram of the GET transfer sequence in the traditional PCI-Express communication system of expression;
Fig. 3 is the process flow diagram of the PUT transfer sequence in the traditional PCI-Express communication system of expression;
Fig. 4 represents the structure of the head of the handle packet in traditional PCI-Express communication system;
Fig. 5 is the process flow diagram of the fault in the GET transport process in traditional PCI-Express communication system;
Fig. 6 is the process flow diagram that is illustrated in according to the fault in the GET transport process in the PCI-Express communication system of the embodiment of the invention;
Fig. 7 represents the part according to the head of the handle packet in the PCI-Express communication system of the embodiment of the invention;
Fig. 8 is the process flow diagram according to the GET transfer sequence in the PCI-Express communication system of the embodiment of the invention;
Fig. 9 is the process flow diagram of expression according to the PUT transfer sequence in the PCI-Express communication system of the embodiment of the invention;
Figure 10 is the system construction drawing according to the embodiment of the invention;
Figure 11 is the cut-away view according to the DMA chip of the embodiment of the invention;
Figure 12 represents the example according to the channel id of the embodiment of the invention;
Figure 13 represents to transmit example according to the PUT of the embodiment of the invention;
Figure 14 represents the operation according to the transmitting channel in the PUT transmission of the embodiment of the invention;
Figure 15 represents the operation according to the receive channel in the PUT transmission of the embodiment of the invention;
Figure 16 represents to transmit example according to the GET of the embodiment of the invention;
Figure 17 represents the operation according to the transmitting channel in the GET transmission of the embodiment of the invention; And
Figure 18 represents the operation according to the receive channel in the GET transmission of the embodiment of the invention.
Embodiment
In the following description, with reference to Fig. 6 to Fig. 9 the details of the preferred embodiment of the present invention is described.
The example of PCI-Express communication system 100 of the present invention shown in Figure 6 is in the identical state of example with conventional P CI-Express communication system shown in Figure 5.In other words, identical with the situation among Fig. 5, read request is semantically issued module C12 by module D13, when module C12 attempts to respond when returning institute's read data to module D13, owing to the unusual of modules A 10 causes ID to renumber, and the bus number of module D13 and device numbering change into 1,3 from 1,4 respectively, as the situation of the example among Fig. 5.
In the present invention, only using the memory write request packet that carries out route according to the address route of PCI-Express standard to carry out data transmits.Therefore, even semantically be read request, also can use the memory write request packet.
In the present invention, for being connected to the unique node ID of each module settings of PCI-Express.In the example of Fig. 6, be modules A 10 distribution node ID=0, be module B11, module C12 and module D13 distribution node ID1,2 and 3 regularly respectively.
In addition, provide dedicated channel, and channel id is set for each channel being used for the PUT that data write the module of the other end transmitted and being used for transmitting from the GET of the module sense data of the other end.
Fig. 7 represents the structure of the header fields of the processing layer packet that uses among the present invention.Because shadow region and the present invention are irrelevant, so be not described.
As shown in Figure 7, in address field (position [63:2]), be provided with node ID (position [62:58]), channel id (position [57:51]) and type of data packet PT (position [46]).This node ID is the ID of the transmission destination of packet.To describe in detail as the back, be designated as transmitting channel and the receive channel that is used for each PUT transmission and GET transmission by the channel id channel appointed.Therefore, for read request has been set the channel id of the receive channel of GET transmission, and be the channel id that memory write request has been set the receive channel of PUT transmission.It is the type (0 or 1) of request or response that type of data packet PT has specified the expression packet.
The channel id of packet transfer source is set in the tag field, and when the transmission destination uses response data packet to reply, in the address field of response data packet, uses this tag field channel id of destination in response.
In the following description, with reference to Fig. 8 the GET transfer sequence of the present invention that is used for the execute store read request is described.
With regard to transmitting terminal analyzed and carry out GET transmission requested operation to descriptor with regard to, this sequence was identical with conventional example shown in Figure 2.Yet, when being memory write request packet rather than read request packet, the packet that is sent has some differences, wherein as previously mentioned, in the address field of packet, be provided with node ID, channel id and type of data packet PT, and in tag field, be provided with the channel id of packet transfer source.As conventional example, when according to the address route of PCI-Express standard packet being carried out route, the PCI-Express converter sends packet to receiving end.
It is request data package that receiving end identifies this packet according to type of data packet, and is defined as using GET to transmit receive channel according to channel id, thereby is that GET transmits with this identification of data packets.Subsequently, the conventional example of describing from storer is read data and the step that sends the data read and Fig. 2 is identical.Difference is that the packet that is sent is memory write request packet rather than response data packet.Yet in this case, type of data packet is set to response in the head of memory write request packet.Requestor ID according to the memory write request packet of former reception discerns the request initiator block, and the node ID of correspondence is set to the destination.The channel id that is arranged in the tag field is used as channel id.Although this packet is response semantically, the PCI-Express converter is a request data package with this identification of data packets, therefore when according to the address route of PCI-Express standard packet being carried out route, this packet is sent to transmitting terminal.
Transmitting terminal transmits transmitting channel ID to identify type of data packet is that response and this packet are to the GET request responding according to being included in GET in the address field, thereby stops this processing after with institute's read data write store.
Next, with reference to Fig. 9 the PUT transfer sequence of the present invention that is used for the execute store write request is described.
The setting in address field and tag field, send the memory write request packet and carry out before the PUT request of transmitting after transmitting terminal is analyzed descriptor, this sequence is identical with conventional example shown in Figure 3.As conventional example, the PCI-Express converter sends this packet when according to the address route of PCI-Express standard packet being carried out route.
It is request data package that receiving end identifies this packet according to type of data packet, and is defined as using PUT to transmit receive channel according to channel id, thereby is that PUT transmits with this identification of data packets.Then, receiving end is with the writing data into memory that is sent.
Before this step, this sequence is all identical with traditional PUT transmission; But, in the present invention, for example will use the memory write request packet in response the packet function of replying be attached in the hardware.Because the memory write request packet that the PCI-Express converter uses its type of data packet to be set to response is answered transmitting terminal, so the PCI-Express converter is a request data package with this identification of data packets, and when packet being carried out route, send this packet to transmitting terminal according to the address route of PCI-Express standard.Yet, transmit transmitting channel ID because the address field of the packet that is received includes PUT, so transmitting terminal can be the response to the memory write request of being undertaken by its oneself node with this identification of data packets.
Next, with reference to Figure 10 to Figure 18 embodiments of the invention are described.
In the present embodiment, in PCI-Express communication system 200, DMA chip among the central control module CM has been realized communication means of the present invention, in PCI-Express communication system 200, nearly eight the central control module CM that are used to control all operations of each subsystem intercom mutually by the PCI-Express converter.
The system architecture of present embodiment shown in Figure 10 is following communication system, this communication system comprises eight central control module CM#020 to CM#727 of all operations that is used for controlling each subsystem, and two head end router FRT#071 and FRT#172, and the PCI-Express converter 61 of these central control modules by head end router is connected with 62.
According to the order that begins from CM# 0 to central control module node distribution node ID=0 to 7.As shown in figure 10, central control module comprises: dual CPU#051 and CPU#152; Be used between the central control module node, providing the DMA chip (30) of communication means; And the MCH40 of memory control hub that is used for controlling the data transmission between DMA chip 30 and CPU#051, CPU#152 and the unshowned reservoir of Figure 10.
Head end router FRT#071 and FRT#172 have constituted dual head end router.Each head end router FRT#071 is connected (as shown in figure 10) with FRT#172 and each central control module CM# 0 to CM# 7 by four PCI-Express 2.5GHz circuits.
Figure 11 has described the inner structure of DMA chip 30.
As shown in figure 11, DMA chip 30 comprises and is positioned at the PCI-Express interface control unit 311 that south mouth (this south mouth is positioned at the PCI-Express transducer side) is located, and is positioned at the PCI-Express interface control unit 312 that the North mouth (this North mouth is positioned at the CPU side) is located.Its also comprise respectively with PCI-Express interface control unit 311 and PCI-Express interface control unit 312 in each corresponding packet control module 321 and packet control module 322.It also comprises message sink channel 331, PUT receive channel 341, GET receive channel 351, transmits impact damper 361,370,362, message transmitting channel 332, PUT transmitting channel 342 and GET transmitting channel 352.
Two channels of message sink channel 331, eight channels of message transmitting channel 332, five channels of PUT transmitting channel 342, four channels of GET transmitting channel 352 are arranged, and provide a channel in PUT receive channel 341 and the GET receive channel 351 each.
Transmit impact damper 361 and be used for, and transmission buffer 362 is used for transmitting data from the North oral-lateral port side to the south from south oral-lateral port side transmission northwards data.Transmitting impact damper 370 is used for carrying out loopback from the North oral-lateral.
Solid line is represented control line (REQ), and it has pointed out the direction of request notice, and dotted line is represented control line (CMP), and it points out to ask to finish the direction of notice, and thick line representative data line.Drawn arrow is represented PCI head line, represents the PCI-Express transmission and receives line with line TX and the RX that PCI-Express interface control unit 311 is connected with 312.
In the example depicted in fig. 11, the North oral-lateral also adopts PCI-Express; Yet the North oral-lateral needn't adopt PCI-Express, because the present invention is applied to south oral-lateral.
Figure 12 represents the example of the channel id of channel shown in Figure 11.As previously described, only there are one of PUT receive channel 341 and GET receive channel 351 physically; But, when the transmission source sends a series of packet successively, adopt channel id shown in Figure 12 to come the order of recognition data bag successively.
In the following description, the example that the data in the present embodiment are transmitted describes.Some description is identical with the description among Fig. 8 and Fig. 9, has therefore omitted these descriptions for fear of repetition.
It is 0 central control module CM# 0 to node ID is that 7 central control module CM# 7 carries out the example that PUT transmits that Figure 13 is used to illustrate from node ID.Here, the operation of responder is identical with operation illustrated in fig. 9, therefore omits the description to it.
(1) the PUT transfer channel of the CPU of central control module CM# 0 indication DMA chip begins the PUT transmission.(2) 7 (they are the node ID of central control module CM#7) are changed in the DMA chip of the central control module CM# 0 position [62:85] (node ID field) that will send in the address field of packet head, port side to the south transmits data, then it is sent as the memory write request packet.(3) analysis of PCI-Express converter sends destination address, and packet is sent to corresponding address.(4) the DMA chip of central control module CM# 7 receives packet from south oral-lateral, confirms node ID and the corresponding relation between the node ID of himself in this packet, and notifies the PUT receive channel to receive packet.
Next, illustrate that with reference to Figure 14 above PUT transmits the operation of the transmitting terminal channel in the example.Thick arrow among Figure 14 represents that the DMA chip becomes the operation under the situation of controller (master), and solid arrow represents that CPU becomes the operation under the situation of controller.The arrow that has dotted line is represented to interrupt.
(1) CPU generates and is used for the descriptor that PUT transmits, and is written into the descriptor district in the storer.Be provided with 15 32 byte regions in the example depicted in fig. 14.(2) CPU indication DMA chip begins the PUT transmission.(3) read descriptive data in the descriptor district of DMA chip from storer.(4) this descriptor of DMA chip analysis and from the data field sense data in the transmission source of being appointed as storer by the address.(5) the DMA chip is sent to south oral-lateral with institute's read data, waits for the notice of finishing from the DMA chip of transmission destination, and receives response from the other end.(6) the DMA chip upgrades the pointer of finishing of descriptor, and the descriptor that pointer value (descriptor termination pointer) is written on the storer stops the pointer district.(7) DMA chip interrupt CPU is with notice CPU transmission ending.(8) as the fixing operation that stops pointer, CPU removes and interrupts and the removing stop code.
Next, illustrate that with reference to Figure 15 above PUT transmits the operation of the receive channel in the example.
(1) CPU starts the PUT receive channel, and indication DMA chip begins to transmit.(only carrying out for the first time) (2) DMA chip receives data from south oral-lateral.(3) the DMA chip is sent to the North oral-lateral with the data that received, and with this writing data into memory.(4) DMA chip port side to the south is returned response data packet.
It is that 0 central control module CM# 0 is the example that the GET of 7 central control module CM# 7 transmits to node ID that Figure 16 is used to illustrate from node ID.
(1) the GET transfer channel of the CPU of central control module CM#0 indication DMA chip begins the GET transmission.(2) 7 (they are the node ID of central control module CM#7) are changed in the DMA chip of the central control module CM#0 position [62:85] (node ID field) that will send in the address field of packet head, data are sent to south oral-lateral, then it are sent as the memory write request packet.(3) analysis of PCI-Express converter sends destination address, and packet is sent to corresponding address.(4) the DMA chip of central control module CM#7 receives packet from south oral-lateral, confirms node ID in this packet and the corresponding relation between the node ID of himself, and this affirmation is notified to the GET receive channel.(5) the DMA chip of central control module CM#7 sense data from the storer of the central control module of himself is sent to south oral-lateral with these data, and sends this data as the memory write request packet.(6) analysis of PCI-Express converter sends destination address, and packet is sent to corresponding address.(7) the GET transfer channel in the DMA chip of central control module CM#0 receives the GET data from south oral-lateral, and these data are sent to the North oral-lateral.
Next, illustrate that with reference to Figure 17 above GET transmits the operation of the transmitter side channel in the example.
(1) CPU generates and is used for the descriptor that GET transmits, and with the descriptor district in its write store.(2) CPU indication DMA chip begins the GET transmission.(3) descriptive data is read in the descriptor district of DMA chip from storer.(4) this descriptor of DMA chip analysis and send the GET request of data to the DMA of other end chip.(5) the DMA chip receives the GET data from south oral-lateral, and these data are sent to the North mouth.(6) the DMA chip upgrades the pointer of finishing of descriptor, and the descriptor in pointer value (the descriptor termination pointer) write store is stopped the pointer district.(7) DMA chip interrupt CPU, CPU transmits termination with notice.(8) as the fixing operation that stops pointer, CPU removes and interrupts and the removing stop code.
Next, illustrate that with reference to Figure 18 above PUT transmits the operation of the receive channel in the example.
(1) CPU starts the GET receive channel, and indication DMA chip begins to transmit.(only carrying out for the first time) (2) DMA chip receives the GET request from south oral-lateral.(3) DMA chip reading of data from the storer of the central control module CM of himself.(4) the DMA chip is sent to the North oral-lateral with the GET data.
As mentioned above, in PCI-Express communication system of the present invention, only adopting the memory write request packet that carries out route according to the address route of PCI-Express standard to carry out data transmits, even therefore change, also can return response by normal mode owing to ID appears in the inefficacy of route association.
In addition, can irrespectively return response data packet with the operation or the command type of PCI-Express converter, order is sent source module and can be obtained reliably to transmit the information that whether stops with normal mode about data.
The application is incorporated herein by reference in its entirety based on the No.2005-85307 of Japanese patent application formerly that submitted on March 24th, 2005 and No.2005-345822 of Japanese patent application formerly that submitted to November 30 in 2005 and the right of priority that requires them.
Claims (17)
1, a kind of PCI-Express communication system, it uses by connecting a plurality of modules and carries out the PCI-Express converter that packet transmits, and this PCI-Express communication system comprises:
Be used in described a plurality of module each unique node ID to be set representing each module, and for being used for the device that each channel that data transmit is provided with channel id;
Be used for the node ID that transmits destination module, the channel id that is used for the channel of data transmission being set, and represent that described packet is the device of the request type packet or the type of data packet of response type packet in the address field of the packet that is used for the data transmission;
Be used to use and carry out the device that data transmit according to the memory write request packet that PCI-Express converter address route is carried out route; And
Be used for the device of following channel: the PUT transmission dedicated channel that is used for data are write the module of the other end as the channel that is used for the data transmission; And be used for from the GET transmission dedicated channel of the module reading of data of the other end.
2, PCI-Express communication system according to claim 1, wherein, when from a module when another module is sent storer and is read, a described module is provided with the node ID of described another module in the address field of described memory write request packet, the GET that is used by described another module transmits the channel id of dedicated channel, and represents the requested packets type.
3, PCI-Express communication system according to claim 2, wherein, the GET that a described module setting is used by a described module transmits the channel id of dedicated channel, and described another module is provided with the node ID of this channel id, a described module in the address field of the head of a memory write request packet, and the type of data packet of expression response, and this memory write request packet sent it back a described module.
4, PCI-Express communication system according to claim 1, wherein, when from a module when another module is sent memory write request, a described module is provided with the node ID of described another module in the address field of described memory write request packet, the PUT that is used by described another module transmits the channel id of dedicated channel, and represents the requested packets type.
5, PCI-Express communication system according to claim 4, wherein, a described module is provided with the channel id that the PUT that is used by a described module transmits dedicated channel in the head of described memory write request packet, and described another module is provided with the node ID of this channel id, a described module in the address field of the head of a memory write request packet, and the type of data packet of expression response, and this memory write request packet sent it back a described module.
6, PCI-Express communication system according to claim 1, wherein, each in described PUT transmission dedicated channel and the GET transmission dedicated channel all comprises receive channel and transmitting channel.
7, PCI-Express communication system according to claim 6, wherein, when from a module when another module is sent read request, a described module is provided with the node ID of described another module in the address field of described memory write request packet, the GET of described another module transmits the channel id of special-purpose receive channel, and expression requested packets type, and the GET that setting is used by a described module in the head of this memory write request packet transmits the channel id of special-purpose transmitting channel, and described another module is provided with the channel id that described GET transmits special-purpose transmitting channel in the address field of the head of a memory write request packet, the node ID of a described module, and the type of data packet of expression response, and use this memory write request packet that a described module is answered.
8, PCI-Express communication system according to claim 6, wherein, when from a module when another module is sent memory write request, a described module is provided with the node ID of described another module in the address field of described memory write request packet, the PUT of described another module transmits the channel id of special-purpose receive channel, and expression requested packets type, and the PUT that setting is used by a described module in the head of this memory write request packet transmits the channel id of special-purpose transmitting channel, and described another module is provided with the channel id that described PUT transmits special-purpose transmitting channel in the address field of the head of a memory write request packet, the node ID of a described module, and the type of data packet of expression response, and use this memory write request packet that a described module is answered.
9, a kind of PCI-Express communication means, it uses by connecting a plurality of modules and carries out the PCI-Express converter that packet transmits, and this PCI-Express communication means comprises:
For in described a plurality of modules each is provided with unique node ID representing each module, and channel id is set for being used for each channel that data transmit;
Address field at the packet that is used for the data transmission is provided with the node ID that transmits destination module, the channel id that is used for the channel of data transmission, and the type of data packet of expression request type packet or response type packet;
When described type of data packet is request, use response data packet to reply; And
Use will be carried out data and transmit according to the memory write request packet that PCI-Express converter address route is carried out route;
Wherein, comprise that following channel is as being used for the channel that data transmit: the PUT transmission dedicated channel that is used for data are write the module of the other end; And be used for from the GET transmission dedicated channel of the module reading of data of the other end.
10, PCI-Express communication means according to claim 9, wherein, when from a module when another module is sent read request, the GET that a described module is provided with the node ID of described another module in the address field of described memory write request packet, used by described another module transmits the channel id and the expression requested packets type of dedicated channel.
11, PCI-Express communication means according to claim 10, wherein, the GET that a described module setting is used by a described module transmits the channel id of dedicated channel, and described another module is provided with the node ID of this channel id, a described module in the address field of the head of a memory write request packet, and the type of data packet of expression response, and use this memory write request packet that a described module is answered.
12, PCI-Express communication means according to claim 9, wherein, when from a module when another module is sent memory write request, the PUT that a described module is provided with the node ID of described another module in the address field of this memory write request packet, used by described another module transmits the channel id and the expression requested packets type of dedicated channel.
13, PCI-Express communication means according to claim 12, wherein, the PUT that a described module setting is used by a described module transmits the channel id of dedicated channel, and described another module is provided with the node ID of this channel id, a described module and the type of data packet of expression response in the address field of the head of a memory write request packet, and uses this memory write request packet that a described module is answered.
14, a kind of modular device of PCI-Express communication system, this PCI-Express communication system use and carry out the PCI-Express converter that packet transmits, and this modular device comprises:
Be used to be provided with unique node ID, with this modular device of identification from a plurality of modular devices of described PCI-Express communication system, and the device that channel id is set for each channel that is used for the data transmission;
Be used for the node ID that transmits the destination module device, the channel id that is used for the channel of data transmission being set in the address field of the packet that is used for the data transmission, and the device of the type of data packet of expression request type packet or response type packet;
Be used to use and carry out the device that data transmit according to the memory write request packet that PCI-Express converter address route is carried out route; And
Be used for the device of following channel: the PUT transmission dedicated channel that is used for data are write the modular device of the other end as the channel that is used for the data transmission; And be used for from the GET transmission dedicated channel of the modular device reading of data of the other end.
15, the modular device of PCI-Express communication system according to claim 14, comprise: when the modular device to the described other end sends read request, the GET that the node ID of the described modular device of the described other end is set in the address field of this memory write request packet, is used by the described modular device of the described other end transmits the channel id of dedicated channel, and expression requested packets type.
16, the modular device of PCI-Express communication system according to claim 14, comprise: when the modular device to the described other end sends memory write request, the PUT that the node ID of the described modular device of the described other end is set in the address field of this memory write request packet, is used by the described modular device of the described other end transmits the channel id of dedicated channel, and expression requested packets type.
17, the modular device of PCI-Express communication system according to claim 14 comprises:
When the modular device from the described other end receives memory write request,
The node ID of the described modular device of the described other end, the type of data packet of expression response and the channel id of transmitting channel are set in the address field of a memory write request packet; And
Use this memory write request packet that the described modular device of the described other end is answered.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005085307 | 2005-03-24 | ||
| JP2005085307 | 2005-03-24 | ||
| JP2005345822 | 2005-11-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1838096A CN1838096A (en) | 2006-09-27 |
| CN100456273C true CN100456273C (en) | 2009-01-28 |
Family
ID=37015498
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100661211A Expired - Fee Related CN100456273C (en) | 2005-03-24 | 2006-03-24 | PCI-Express communications system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100456273C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008119221A1 (en) * | 2007-03-30 | 2008-10-09 | Hangzhou H3C Technologies Co., Ltd. | A data packet exchange method, device and circuit board |
| US8199759B2 (en) * | 2009-05-29 | 2012-06-12 | Intel Corporation | Method and apparatus for enabling ID based streams over PCI express |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001142845A (en) * | 1999-11-17 | 2001-05-25 | Toshiba Corp | Computer system and data transfer control method |
| CN1540514A (en) * | 2003-04-21 | 2004-10-27 | 日本电气株式会社 | Data processor and data processing method |
-
2006
- 2006-03-24 CN CNB2006100661211A patent/CN100456273C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001142845A (en) * | 1999-11-17 | 2001-05-25 | Toshiba Corp | Computer system and data transfer control method |
| US6829670B1 (en) * | 1999-11-17 | 2004-12-07 | Kabushiki Kaisha Toshiba | Using consecutive block IDs to keep track of data transferred across a serially linked bridge |
| CN1540514A (en) * | 2003-04-21 | 2004-10-27 | 日本电气株式会社 | Data processor and data processing method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1838096A (en) | 2006-09-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7484033B2 (en) | Communication system using PCI-Express and communication method for plurality of nodes connected through a PCI-Express | |
| US7587536B2 (en) | Method and apparatus for distributing USB hub functions across a network | |
| US6778548B1 (en) | Device to receive, buffer, and transmit packets of data in a packet switching network | |
| KR20210033996A (en) | Integrated address space for multiple hardware accelerators using dedicated low-latency links | |
| CN103685578B (en) | The data transmission method of master-slave equipment | |
| US5896549A (en) | System for selecting between internal and external DMA request where ASP generates internal request is determined by at least one bit position within configuration register | |
| JP2014002545A (en) | Data transfer device, and data transfer method | |
| US8090893B2 (en) | Input output control apparatus with a plurality of ports and single protocol processing circuit | |
| US7765357B2 (en) | PCI-express communications system | |
| US7843966B2 (en) | Communication system for flexible use in different application scenarios in automation technology | |
| CN100456273C (en) | PCI-Express communications system | |
| KR102303424B1 (en) | Direct memory access control device for at least one processing unit having a random access memory | |
| EP0353249A1 (en) | Parallel networking architecture | |
| RU175049U1 (en) | COMMUNICATION INTERFACE DEVICE SpaceWire | |
| KR20160147373A (en) | Sata host bus adaptor using light signal and method for connecting sata storage using the same | |
| US8069273B2 (en) | Processing module | |
| EP3631640B1 (en) | Communication between field programmable gate arrays | |
| AU544144B2 (en) | Input/output system and method of communication for peripheral devices in data processing system | |
| US9081743B2 (en) | Communication system and communicaton method | |
| CN101594291B (en) | Unblock network system and subgroup arbitration method thereof | |
| CN108701103B (en) | Direct memory access control device for a computing unit with a working memory | |
| KR100208229B1 (en) | Packet service apparatus having parallel structure for interfacing digital service unit in a switching system | |
| Lin et al. | Research on a novel interconnect technology for B3G system | |
| CN117176832A (en) | Exchange chip and control method | |
| CN116048893A (en) | Method for testing optical fiber bus interface and related equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090128 Termination date: 20170324 |