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Publication numberCN100435329 C
Publication typeGrant
Application numberCN 200480017639
PCT numberPCT/GB2004/002440
Publication date19 Nov 2008
Filing date9 Jun 2004
Priority date23 Jun 2003
Also published asCN1809923A, DE602004032433D1, EP1636840A1, EP1636840B1, US7253506, US20050003583, WO2004114405A1
Publication number200480017639.5, CN 100435329 C, CN 100435329C, CN 200480017639, CN-C-100435329, CN100435329 C, CN100435329C, CN200480017639, CN200480017639.5, PCT/2004/2440, PCT/GB/2004/002440, PCT/GB/2004/02440, PCT/GB/4/002440, PCT/GB/4/02440, PCT/GB2004/002440, PCT/GB2004/02440, PCT/GB2004002440, PCT/GB200402440, PCT/GB4/002440, PCT/GB4/02440, PCT/GB4002440, PCT/GB402440
Inventors戴维吉廷
Applicant大动力公司
Export CitationBiBTeX, EndNote, RefMan
External Links: SIPO, Espacenet
Micro lead frame package and method to manufacture the micro lead frame package
CN 100435329 C
Abstract  translated from Chinese
本发明包括一种适合于接收半导体单元片和多个无源元件的引线框基片。 The present invention comprises a lead frame adapted to receive a substrate a plurality of semiconductor die and passive components. 引线框基片优选地由单片导电材料如铜形成,并且可以安装到引线框封装中或直接安装到电路板上。 Preferably the substrate is a lead frame is formed from a single piece of copper as a conductive material, and may be mounted to the leadframe package or mounted directly to the circuit board. 引线框基片包括适合于接收半导体单元片和无源元件的安装表面。 The substrate comprises a lead frame adapted to receive a mounting surface of the semiconductor die and passive components. 安装表面通过临时和/或永久连接条链接到一起。 Link to a mounting surface via a temporary and / or permanent connection strips together. 一种制造引线框封装的方法其中包括步骤:形成引线框基片、将模制料应用到引线框基片上以将每个安装表面和连接条固定在适当位置、去除临时连接条、将半导体元件安装到引线框基片上,以及在引线框基片上应用封装材料以封装半导体元件。 A method of manufacturing a lead frame package, including the steps of: forming a lead frame substrate, the molding material is applied to the lead frame substrate surface and to each of the mounting strap is fixed in place, removing the temporary connection bars, a semiconductor element mounted on the lead frame substrate, and the application of the encapsulating material to encapsulate the lead frame substrate, a semiconductor element.
Claims(40)  translated from Chinese
1.一种引线框基片,包括: 多个连接条,包括至少一个永久连接条和至少一个临时连接条; 适合于接收半导体单元片的半导体单元片盘; 通过所述多个连接条的至少一个链接到一起并链接到所述半导体单元片盘的多个终端盘,所述多个终端盘具有被配置以接收无源元件和焊线中至少之一的相应安装表面,所述至少一个永久连接条提供所述终端盘中的选择的一些之间的电连接,所述至少一个临时连接条提供所述引线框基片的临时结构集成;以及将所述引线框基片的所述半导体单元片盘、所述多个终端盘和所述多个连接条固定在一起的模制料,由此允许所述至少一个临时连接条随后去除,其中所述模制料使所述多个终端盘的安装表面不被覆盖。 A lead frame substrate, comprising: a plurality of connecting strips, comprising at least one permanent connection bars and at least one temporary connection bar; unit adapted to receive a semiconductor chip of a semiconductor die plate; a plurality of connecting strips by at least A link together and linked to a plurality of terminals of the semiconductor die disc tray, the disc has a plurality of terminals corresponding mounting surface configured to receive at least one passive components and wire, said at least one permanent Some electrical connection between the terminal bar provided to select a disk connected to the at least one temporary connection bar of the leadframe structure to provide temporary integration substrate; and the lead frame substrate of the semiconductor unit sheet tray, said tray and said plurality of terminals connected to the plurality of strips of molding material secured together, thereby allowing the at least one temporary connection bar followed by removal, wherein the molding material so that the plurality of terminal plate The mounting surface is not covered.
2. 根据权利要求1的引线框基片,其中所迷半导体单元片盘、 所述多个终端盘和所述多个连接条具有来自共同材料件的单体结构。 2. The lead frame substrate according to claim 1, wherein the fans of the semiconductor die plate, said plurality of terminals and said plurality of connection bars discs monomer having a structure derived from a common piece of material.
3. 根据权利要求1或2的引线框基片,其中所述半导体单元片盘、所述多个终端盘和所述多个连接条包括导热和导电材料。 3. The lead frame substrate according to claim 1 or 2, wherein said semiconductor die plate, said plate and said plurality of terminals comprising a plurality of connecting strips and a thermally conductive material.
4. 根据权利要求1或2的引线框基片,其中所述导热和导电材料包括铜。 4. The lead frame substrate according to claim 1 or 2, wherein said thermally and electrically conductive material comprises copper.
5. 根据权利要求1或2的引线框基片,其中所述半导体单元片盘、所述多个终端盘和所述多个连接条包括顶面和底面。 5. The lead frame substrate according to claim 1 or 2, wherein the semiconductor die plate, said plurality of terminal plate and the plurality of connecting strip includes a top surface and a bottom surface.
6. 根据权利要求5的引线框基片,其中所述模制料不覆盖所述顶面和底面。 6. The lead frame substrate according to claim 5, wherein the molding material does not cover the top and bottom surfaces.
7. 根据权利要求1或2的引线框基片,还包括位于引线框基片周边附近的多个引线。 7. The lead frame substrate according to claim 1 or 2, further comprising a plurality of leadframe leads located near the periphery of the substrate.
8. 根据权利要求7的引线框基片,其中所述模制料将所述多个引线固定在所述模制料中。 8. The lead frame substrate according to claim 7, wherein said molding material to said plurality of leads fixed to said molding compound.
9. 根据权利要求1或2的引线框基片,其中所述至少一个永久连接条将所述半导体单元片盘电连接到所述多个终端盘的至少一个。 9. The lead frame substrate according to claim 1 or claim 2, wherein said at least one permanent connection bar to the semiconductor die plate electrically connected to the plurality of terminals of the at least one disc.
10. 根据权利要求1或2的引线框基片,其中所述至少一个永久连接条将所述多个终端盘中的选择的一些电连接到一起。 10. The lead frame substrate according to claim 1 or claim 2, wherein said at least one permanent connection bar to select the number of a plurality of terminals electrically connected to the disc together.
11. 根据权利要求1或2的引线框基片,其中所述临时连接条将所述多个终端盘固定到彼此相关的位置。 11. The lead frame substrate according to claim 1 or claim 2, wherein said plurality of temporary connection bars to the terminal plate is fixed to a position relative to each other.
12. 根据权利要求12的引线框基片,其中在所迷模制料将所述半导体单元片盘、所述多个终端盘和所述多个连接条固定在一起之后从引线框基片中去除所述临时连接条。 12. The lead frame substrate according to claim 12, wherein the fan in the molding material to said semiconductor die plate, said plurality of terminals and said plurality of discs secured together after the connecting strips from the lead frame substrate removing said temporary connecting bar.
13. 根据权利要求1或2的引线框基片,其中引线框基片包括均匀的厚度。 13. The lead frame substrate according to claim 1 or claim 2, wherein the lead frame substrate comprises a uniform thickness.
14. 根据权利要求1或2的引线框基片,其中引线框基片被配置以安装到电路板上。 14. The lead frame substrate according to claim 1 or claim 2, wherein the lead frame substrate being configured to mount to the circuit board.
15. 根据权利要求l的引线框基片,引线框基片包括多个半导体单元片盘,所述多个半导体单元片盘的每个适合于接收半导体单元片, 其中所述多个终端盘通过所述多个连接条链接到一起并链接到所述多个半导体单元片盘,并且所述模制料将所述引线框基片的所述多个半导体单元片盘、所述多个终端盘、所述多个连接条和所述多个引线固定在一起。 According to claim l lead frame substrate, the lead frame substrate comprises a plurality of semiconductor die plate, said plurality of semiconductor die plate means each adapted to receive a semiconductor chip, wherein the plurality of terminals via the disc said plurality of connection bars are linked together and linked to said plurality of semiconductor die plate, and the molding material of the plurality of semiconductor die to the leadframe disc substrate, the plurality of terminal plate a plurality of connection bars and the plurality of leads together.
16. 根据权利要求15的引线框基片,其中所述多个连接条将所迷多个半导体单元片盘电连接到所述多个终端盘。 16. The lead frame substrate according to claim 15, wherein said plurality of connecting strips to the fans of the plurality of semiconductor die plate terminal electrically connected to the plurality of disks.
17. 根据权利要求15或16的引线框基片,其中所述框架、所述多个连接条、所述多个半导体单元片盘和所述多个终端盘具有来自共同导电材料件的单体结构。 17. The lead frame substrate according to claim 15 or claim 16, wherein said frame, said plurality of connection bars, said plurality of semiconductor die plate and said terminal plate having a plurality of co-monomers from a conductive material member structure.
18. —种引线框封装,包括:具有中心部分的外壳以及位于所述外壳周边附近的多个引线;以及安装到所述中心部分上的根据权利要求1的引线框基片,所述引线框基片电輛连到所述多个引线的至少一个。 18. - Species leadframe package comprising: a housing having a central portion and a plurality of leads located near the periphery of the housing; and mounted to the central portion as claimed in claim 1 of the lead frame substrate, the lead frame substrate electric vehicles connected to at least one of the plurality of leads.
19. 根据权利要求18的引线框封装,其中在将所述引线框基片安装到所述中心部分上之前可从所述引线框基片中去除所述临时连接条。 19. A lead frame package according to claim 18, wherein prior to mounting the lead frame substrate on said central portion to said temporary connection bars may be removed from the lead frame substrate.
20. 根据权利要求18或19的引线框封装,还包括封装材料,所述封装材料将所述多个连接条每个的、所述半导体单元片盘的、所述多个终端盘每个的以及所述模制料的所述顶面封装。 20. The lead frame 18 or the package 19, further comprising a packaging material, the packaging material of each of said plurality of connection bars, said semiconductor die plate, each of said plurality of terminals disc claims and the molding material of the top surface of the package.
21. —种引线框封装,包括:具有中心部分的外壳以及位于所述外壳周边附近的多个引线; 安装到所述中心部分上的根据权利要求15的引线框基片,所述引线框基片电耦连到所述多个引线的至少一个。 21. - Species leadframe package comprising: a housing having a central portion and a plurality of leads located near the periphery of the housing; mounted to the central portion as claimed in claim 15 of the lead frame substrate, the lead frame base piece electrically coupled to at least one of the plurality of leads.
22. 根据权利要求18或21的引线框封装,其中所述外壳包括塑料。 22. A lead frame package according to claim 18 or 21, wherein said housing comprises plastic.
23. —种引线框封装,包括:具有包括导电部分和不导电部分的顶面的电路板;以及安装到所述电路板的所述顶面上的根据权利要求1的引线框基片。 23. - Species leadframe package comprising: a conductive portion including a top portion and a non-conductive surface of the circuit board; leadframe substrate 1 and the installation according to the claim of the top surface of the circuit board requirements.
24. 根据权利要求23的引线框封装,其中所述引线框基片的多个引线和所述引线框基片的所述半导体单元片盘电耦连到所述电路板的所述导电部分。 Claim 24. The package 23 of the leadframe, wherein the leadframe substrate and a plurality of leads of said lead frame substrate of the semiconductor die plate electrically coupled to the conductive portion of said circuit board.
25. 根据权利要求24的引线框封装,其中仅所述半导体单元片盘和所述多个引线接触电路板。 25. A lead frame package according to claim 24, wherein only said semiconductor die plate and the plurality of lead contacts the circuit board.
26. —种制造引线框基片的方法,引线框基片被配置以接收半导体单元片和分立无源元件,该方法包括步骤:(a) 在导电材料片中形成引线框基片,引线框基片包括至少一个半导体单元片盘、具有相应安装表面的多个终端盘、以及将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条;(b) 将模制料应用到在所述步骤(a)中所形成的引线框基片, 但使所述终端盘的所述安装表面不被覆盖;以及(c) 从引线框基片中去除多个临时连接条。 26. - method of manufacturing a lead frame substrate, the lead frame substrate is configured to receive a semiconductor die, and discrete passive components, the method comprising the steps of: (a) an electrically conductive material in the lead frame substrate formed sheet, the lead frame substrate comprises at least one semiconductor die plate having a plurality of terminals corresponding mounting surface plate, and the semiconductor die plate and a plurality of terminal plate link together a number of temporary and permanent tie bar; (b) the molded material applied to the lead frame substrate in said step (a) is formed, but the mounting surface of the terminal so that the disc is not overwritten; and (c) removing the plurality of temporary connection bars from the lead frame substrate.
27. 根据权利要求26的方法,其中:步骤(a)包括在导电材料中形成多个引线框基片,多个引线框基片的每个包括通过多个临时连接条和多个永久连接条链接到一起的至少一个半导体单元片盘和多个终端盘;步骤(b)包括将模制料应用到所述步骤(a)中所形成的多个引线框基片的每个上;以及步骤(c)包括从每个引线框基片中去除多个临时连接条。 Each includes a plurality of temporary connection bars and by a plurality of permanent connection bars plurality of lead frame substrates in step (a) comprises a plurality of lead frame substrates formed in the conductive material,: 27. The method according to claim 26, wherein and a step; step (b) includes a plurality of lead frames on each of the molded substrate material applied to the step (a) in the form of; linked together at least one semiconductor die plate and a plurality of terminal plate (c) comprises removing the plurality of temporary connection bars from each lead frame substrate.
28. 根据权利要求27的方法,在步骤(c)之后还包括步骤:(d) 将粘合带应用到每个引线框基片的背面;(e) 将分立无源元件安装到终端盘上;(f) 将半导体单元片安装到每个半导体单元片盘上;(g) 形成焊接连接;以及(h) 在所述步骤(a)中所形成的每个引线框基片上应用封装材料,封装材料将所述步骤(e)中所安装的分立无源元件、所述步骤(f) 中所安装的半导体单元片,以及所述步骤(g)中所形成的焊接连接封装。 28. The method according to claim 27, after step (c) further comprises the step of: (d) an adhesive tape applied to the back of each lead frame substrate; (e) the discrete passive components mounted on the terminal plate ; (f) the semiconductor die is mounted on each of the semiconductor die plate; (g) forming a solder connection; and (h) the application on each leadframe packaging material substrate in said step (a) is formed, The semiconductor unit packaging materials welded sheet discrete passive components of the step (e) is installed, said step (f) are installed, and the step (g) formed in connection package.
29. 根据权利要求28的方法,还包括:(i) 将材料片分成独立单元,独立单元的每个包含引线框基片。 29. The method according to claim 28, further comprising: (i) the piece of material into individual units, individual units each substrate comprising a leadframe.
30. 根据权利要求26~29的任一个的方法,其中所述步骤(b) 中应用模制料还包括将该至少一个半导体单元片盘、多个终端盘、多个临时连接条和多个永久连接条固定在模制料中。 30. The method according to any one of claim 26 to claim 29, wherein said step (b) Application of the molding material further comprises at least one semiconductor die plate, a plurality of terminal plate, a plurality of temporary connection bars and a plurality of permanent connection fastened on the molding compound.
31. 根据权利要求26~29的任一个的方法,其中所述步骤(a) 中形成每个引线框基片通过沖压处理来实现。 31. A method according to any one of claims 26 to 29, wherein said step (a) in each lead frame substrate formed by press processing to achieve.
32. 根据权利要求26~29的任一个的方法,其中所述步骤(a) 中形成每个引线框基片通过刻蚀处理来实现。 32. A method according to any one of claims 26 to 29, wherein said step (a) is formed in each of the lead frame substrate by etching processing is achieved.
33. 根据权利要求26~29的任一个的方法,其中所述步骤(c) 中去除多个临时连接条通过冲压处理来实现。 33. The method according to any one of claims 26 to 29, wherein said step (c) removing the plurality of temporary connection bars is achieved by means of a stamping process.
34. 根据权利要求26~29的任一个的方法,其中所述步骤(c) 中去除多个临时连接条通过刻蚀处理来实现。 34. The method according to any one of claims 26 to 29, wherein said step (c) a plurality of temporary connection bars are removed by etching treatment to achieve.
35. 根据权利要求26~29的任一个的方法,其中所述步骤(c) 中去除多个临时连接条通过激光切割处理来实现。 35. The method according to any one of claims 26 to 29, wherein said step (c) removing the plurality of temporary connection bars is achieved by laser cutting processing.
36. 根据权利要求26~29的任一个的方法,其中所述步骤(c) 中去除多个临时连接条通过研磨处理来实现。 36. A method according to any one of claims 26 to 29, wherein said step (c) removing the plurality of temporary connection bars is achieved by grinding processing.
37. 根据权利要求26的方法,在步骤(b)和(c)之间还包括步骤:(i) 将粘合带应用到每个引线框基片的背面;(ii) 将分立无源元件安装到终端盘上;(iii) 将半导体单元片安装到每个半导体单元片盘上;(iv) 形成焊接连接;(v) 在所述步骤(a)中所形成的每个引线框基片上应用封装材料,封装材料将所述步骤(ii)中所形成的分立无源元件、所述步骤(iii)中所安装的半导体单元片、以及所述步骤(iv)中所形成的焊接连接封装;以及(W)去除所述步骤(i)中所应用的粘合带;以及其中步骤(c)包括将刻蚀处理应用到每个引线框基片的背面以去除多个临时连接条。 37. The method according to claim 26, in step (b) and (c) further comprises the step between: (i) an adhesive tape applied to the back of each lead frame substrate; (ii) the discrete passive components mounted on the end plate; (iii) the semiconductor die is mounted on each of the semiconductor die plate; (iv) forming a solder connection; the (v) each lead frame substrate in said step (a) in the form of application packaging materials, packaging materials welded semiconductor die discrete passive components of the step (ii) formed in said step (iii) in the installation, and the step (iv) formed in connection Package ; and an adhesive tape (W) removing said step (i) is applied; and wherein step (c) comprises etching treatment is applied to the back of each lead frame substrate to remove the plurality of temporary connection bars.
38. 根据权利要求26~29的方法,其中:步骤(a)包括在材料片中形成引线框基片,其中引线框基片包括至少一个半导体单元片盘、多个终端盘、将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条、以及多个永久和临时引线;基片上,模制料将半导体单元片盘、多个终端盘、多个临时和永久连接条、以及多个永久和临时引线固定在一起;以及步骤(c)包括从引线框基片中去除多个临时连接条和临时引线。 26 to 38. The method according to claim 29, wherein: step (a) comprises the material forming the substrate sheet leadframe, wherein the leadframe substrate comprises at least one semiconductor die plate, a plurality of terminal plate, a semiconductor die plate and a plurality of terminal plate link together a number of temporary and permanent connection strip, and a plurality of permanent and temporary lead; on the substrate molding compound semiconductor die plate, the plurality of terminal plate, a number of temporary and permanent tie bars and a plurality of permanent and temporary lead together; and a step (c) includes a plurality of temporary connection bars and removed temporarily lead from the lead frame substrate.
39. 根据权利要求38的方法,其中在所述步骤(a)中形成引线框基片时形成比终端盘、临时连接条、以及临时引线更厚的半导体单元片盘和永久引线。 39. The method according to claim 38, wherein the lead frame substrates are formed in the step (a) is formed thicker than the end plate, a temporary connection bars, as well as temporary lead of the semiconductor die plate and permanent lead.
40. 根据权利要求38的方法,其中多个永久或临时引线位于所述步骤(a)中所形成的引线框基片的周边附近。 40. The method of claim 38, wherein the plurality of permanent or temporary lead in said step (a) is formed in the lead frame substrate near the periphery.
Description  translated from Chinese

微引线框封装及制造微引线框封装的方法技术领域 Micro leadframe package and method for manufacturing a micro leadframe package technology field

本发明一般地涉及微引线框设计封装及组装领域。 The present invention relates generally to micro leadframe package design and assembly fields. 更特别地,本发明包括适合于接收至少一个半导体芯片和多个分立无源元件的微引线框基片,其可安装到引线框中或直接安装到电路板上。 More particularly, the present invention include those suitable for receiving at least one semiconductor chip and a plurality of discrete passive components micro lead frame substrate, which may be mounted to the lead frame or mounted directly to the circuit board.

背景技术 Background

在热消散和热管理方面,现今功率应用中的多芯片模组(MCM ) 面临重大挑战。 In the heat dissipation and thermal management, power applications in today's multi-chip module (MCM) face significant challenges. 连同需要以具有低热阻抗的均匀方式消散热量,还需要减小空间和成本。 Together with the need for a uniform manner with low thermal impedance to dissipate heat, is also a need to reduce space and cost. 封装MCM的常规方法采用焊区栅格阵列(LGA) 或球状栅格阵列(BGA)型基片形式,其包括布置在层压基片上的多个芯片(半导体单元片)加上无源元件。 MCM package using conventional methods pad grid array (LGA) or ball grid array (BGA) type substrate form a laminate comprising a substrate disposed on a plurality of chips (semiconductor die) plus the passive components. 基片材料按惯例具有高的热阻抗,甚至借助热管理技术加强后仍然不能满足引线框设计的低热阻抗。 Substrate material having a high thermal impedance conventionally, even after strengthening by thermal management techniques still can not meet the low thermal impedance of the lead frame design.

关于功率部件安装表面,常规引线框器件具有优秀热导性和最佳热消散。 About power component mounting surface, conventional leadframe device has excellent thermal conductivity and optimum heat dissipation. 但是,常规引线框设计及制造方法限制其在封装中安装多个无源元件的能力。 However, the conventional leadframe design and manufacturing methods limit their ability to install multiple passive components in the package. 制造适合于接收功率半导体芯片和无源元件的引线框经常关联着长的制造时间、增加的费用,从而一般地不认为是高效的制造选择。 Manufacturing is adapted to receive power semiconductor chips and passive components leadframe often associated with long manufacturing time, increased costs, and thus generally not considered to be efficient manufacturing options. 常规引线框适合于仅接收功率半导体芯片。 Conventional lead frame adapted to receive only power semiconductor chips. 因此,外部元件必须连接到引线框以确保搮作有效性,这也增加成本(购买、布局等)和客户板子的空间。 Thus, external components must be connected to the lead frame to ensure effectiveness as Li, which also increases costs (purchase, distribution, etc.) and customer board space.

图1A-1B说明常规引线框封装10。 Figure 1A-1B illustrate a conventional lead frame package 10. 引线框包括半导体芯片盘14 和布置在引线框10周边附近的多个引线16。 Lead frame includes a semiconductor chip tray 14 and arranging a plurality of leads on the lead frame 10 near the periphery 16. 制造图1A-1B中所示的无引线半导体芯片封装的常规方法包括步骤:(l)将半导体芯片12 贴附到引线框10的单元片盘14上,其中引线框10包括布置在单元片盘14周边附近的多个引线16; (2)将引线框10的引线焊接到半导体单元片上的焊接盘(如图lb中的线18所示);以及(3)以这样的方式在半导体单元片12和引线框10上形成封装体20,即引线框IO 的每个引线16至少有一部分17从封装体的底部暴露。 Leadless conventional method for manufacturing a semiconductor chip package shown in FIG. 1A-1B comprises the steps of: (l) the semiconductor chip 12 is attached to the lead frame unit 10 of the spool 14, which is arranged in the lead frame unit 10 includes a sheet tray 14 near the periphery of the plurality of leads 16; (2) the lead frame leads are soldered to the bonding pads 10 (shown in line 18 lb) on the semiconductor die; and (3) in such a manner that the semiconductor die 12 and the lead frame 10 is formed on the package body 20, namely IO of the leadframe 16 is at least a portion of each lead 17 is exposed from the bottom of the package. 该常规引线框封装IO仅支持单个半导体单元片12。 The conventional leadframe package IO supports only a single semiconductor die 12. 封装10不能支持任何无源元件。 Package 10 can not support any passive components. 因此,无源元件(例如,电阻器和电容器)必然在封装10的外部。 Therefore, passive components (such as resistors and capacitors) necessarily external to the package 10.

发明内容 DISCLOSURE

通过提供一种适合于接收分立无源元件的并可布置到微引线框封装中或直接布置到电路板上的引线框基片,以及进一步提供一种制造引线框的方法,所提出的发明解决这些问题中的许多。 Invention by providing a fit to the micro-leadframe package or placed directly to the leadframe substrate circuit board, and further provides a method of manufacturing a lead frame, proposed to receiving discrete passive components and arranged to solve Many of these issues.

本发明的一个方面在于提供一种成本相对低的具有相对简单结构的并在封装中集成功率半导体单元片和无源元件的引线框封装。 One aspect of the present invention is to provide a relatively low cost with a relatively simple structure and integration of power semiconductor die and passive components in a package leadframe package. In

一种实施方案中,包括电连接到多个终端盘的半导体单元片盘的微引线框基片("MLF基片")安装在引线框上。 One embodiment, includes a plurality of terminals electrically connected to the semiconductor die disc tray micro leadframe substrate ("MLF substrate") is mounted on the lead frame. 半导体单元片盘适合于接收功率半导体单元片(例如,MOSFET)、控制器ASIC、 PWM控制器等。 Semiconductor die plate adapted to receive power semiconductor die (eg, MOSFET), the controller ASIC, PWM controllers. 终端盘适合于接收分立无源元件(例如,电阻器和电容器)或焊线。 Terminal plate adapted to receive discrete passive components (such as resistors and capacitors) or wire. 因此所有半导体元件都位于相同封装中。 Therefore, semiconductor elements are all in the same package.

本发明的另一个方面在于提供一种可配置MLF基片以满足特定封装要求的封装。 Another aspect of the present invention is to provide a configurable MLF package substrates to meet specific requirements of the package. 在一种实施方案中,MLF基片中的终端盘通过临时和永久连接条的组合链接到一起。 In one embodiment, MLF substrate terminal plate through temporary and permanent connection of the combination are linked together. 临时连接条为MLF基片提供刚性, 并在最后被去除。 Provision of temporary connection for the MLF substrate rigidity, and finally removed. 临时连接条不提供最终引线框封装中的终端盘之间的电连接。 Temporary connections shall not provide a final package leadframe terminal electrically connected between the discs. 永久连接条将半导体单元片盘和终端盘电连接到一起。 Article permanently connected semiconductor die plate and the terminal plate electrically connected together.

本发明的又一个方面在于提供一种用于半导体封装的MLF基片。 Yet another aspect of the present invention to provide a MLF substrate for a semiconductor package. 在一种实施方案中,引线框包括具有中心盘的外壳以及在其周边附近的引线。 In one embodiment, the leadframe includes a housing having a center of the disk and in the vicinity of its periphery a lead. MLF基片安装到引线框的中心盘上,并电连接到引线。 MLF substrate is mounted on the leadframe central disc, and electrically connected to the lead. 因此,引线框封装包括分立无源元件,并节省客户板子空间。 Therefore, leadframe package includes a discrete passive components, and save customers board space. 在另一种实施方案中,MLF基片直接安装到客户板子上,使得功率半导体单元片所产生的热量直接消散到客户板子中。 In another embodiment, MLF substrate is mounted directly to the customer board, so that heat generated by the power semiconductor die to dissipate directly to the client in the board. 在又一种实施方案中,仅MLF基片的半导体单元片盘和引线接触客户板子。 In yet another embodiment, a semiconductor substrate only MLF die plate and the lead customer contact board. MLF基片的底面具有台阶特性,由此接触盘(例如,功率半导体单元片盘、控制器盘, MLF bottom surface of the substrate has a step characteristic, whereby the contact plate (e.g., a power semiconductor die plate, disk controllers,

以及引线)比MLF基片的非接触部分(例如,永久连接条)厚。 And lead) than the non-contact portions MLF substrate (e.g., permanent connection bars) thick.

本发明的再一个方面在于提供一种制造包括功率半导体单元片和多个无源元件的引线框封装的方法。 A further aspect of the present invention is to provide a method of manufacturing a power semiconductor die comprising a plurality of passive components and a lead frame package. 在一种实施方案中,MLF基片从单片材料沖压出。 In one embodiment, MLF substrate is punched out from a single piece of material. 可选地,可以通过刻蚀或激光制造方法形成MLF Alternatively, MLF may be formed by etching or laser manufacturing method

基片。 Substrate. 模制料应用到MLF基片上以支撑半导体单元片和终端盘。 Molding material is applied to the MLF to support the semiconductor substrate and terminal die plate. 优选地,在半导体元件安装到MLF基片上之前去除临时连接条。 Preferably, in the semiconductor element is mounted on the MLF substrate before removing the temporary connection bars. 在另一种实施方案中,在半导体元件安装到MLF基片上之后去除临时连接条。 In another embodiment, the semiconductor element mounted on the MLF substrate after removing the temporary connection bars. 半导体元件通过表面安装技术安装到MLF基片上。 Semiconductor element is mounted on surface mount technology MLF substrate.

本发明的另一个方面在于使用上述MLF基片制造引线框封装, 包括步骤:在MLF基片上应用模制料以便为终端盘、半导体单元片盘、临时连接条和永久连接条提供支撑。 Another aspect of the present invention is manufactured using the MLF substrate leadframe package comprising the steps: Apply molding material so as to provide support for the end plate, the semiconductor die plate, temporary and permanent tie bar connecting strips on the MLF substrate. 一旦已应用模制料,可以去除临时连接条。 Once you have applied the molding material can be removed temporarily connecting bar. 每个功率半导体单元片安装到半导体单元片盘上,并 Each power semiconductor die is mounted on the semiconductor die plate, and

且跨越特定终端盘安装无源元件。 And across specific terminal disk mounting passive components. 在安装好半导体元件并且终端盘和半导体单元片焊接到引线上之后,模制料应用到MLF基片上以封装 After installing the semiconductor element and the terminal of the semiconductor die plate and welded to the lead, molding material is applied to the substrate to encapsulate the MLF

半导体元件和焊线。 Semiconductor components and wire.

在本发明请求保护的技术方案中,提供一种引线框基片,包括: 多个连接条,包括至少一个永久连接条和至少一个临时连接条;适合于接收半导体单元片的半导体单元片盘;通过所述多个连接条的至少一个链接到一起并链接到所述半导体单元片盘的多个终端盘,所述多个终端盘具有被配置以接收无源元件和焊线中至少之一的相应安装表面,所述至少一个永久连接条提供所述终端盘中的选择的一些之间的电连接,所述至少一个临时连接条提供所述引线框基片的临时结构集成;以及将所述引线框基片的所述半导体单元片盘、所述多个终端盘和所述多个连接条固定在一起的模制料,由此允许所述至少一个临时连接条随后去除,其中所述模制料使所述多个终端盘的安装表面不被覆盖。 In the present invention claimed aspect, there is provided a lead frame substrate, comprising: a plurality of connection bars, including at least one permanent connection bars and at least a temporary connection bars; adapted to receive a semiconductor die semiconductor die plate; through the plurality of connecting strips together and at least one link to link to a plurality of terminals of the semiconductor die disc tray, the disc has a plurality of terminals configured to receive a passive element and at least one of the wire the respective mounting surface, said at least one permanent connection bar providing the select terminal electrically connected to some of the disk between the at least one temporary connection bar providing the leadframe structure integrated temporary substrate; and the the lead frame of the semiconductor substrate die plate, said plurality of terminals and said plurality of connection bars discs secured together molding material, thereby allowing the at least one temporary connection bar then removed, wherein the mold the mounting surface material made of said plurality of terminal disc is not covered.

根据本发明的上述引线框基片,其中所述半导体单元片盘、所述多个终端盘和所述多个连接条具有来自共同材料件的单体结构。 According to the lead frame substrate of the present invention, wherein the semiconductor die plate, said plurality of disks and the plurality of connection terminal strip structure derived from a monomer having a common piece of material. 根据本发明的上述引线框基片,其中所述半导体单元片盘、所述多个终端盘和所述多个连接条包括导热和导电材料。 According to the lead frame substrate of the present invention, wherein the semiconductor die plate, said plate and said plurality of terminals comprising a plurality of connecting strips and a thermally conductive material.

根据本发明的上述引线框基片,其中所述导热和导电材料包括铜。 According to the lead frame substrate of the present invention, wherein the thermally and electrically conductive material comprises copper.

根据本发明的上述引线框基片,其中所述半导体单元片盘、所述多个终端盘和所述多个连接条包括顶面和底面。 According to the lead frame substrate of the present invention, wherein the semiconductor die plate, said plurality of terminal plate and the plurality of connecting strip includes a top surface and a bottom surface.

根据本发明的上述引线框基片,其中所述模制料不覆盖所述顶面和底面。 According to the lead frame substrate of the present invention, wherein the molding material does not cover the top and bottom surfaces.

根据本发明的上述引线框基片,还包括位于引线框基片周边附近的多个引线。 According to the lead frame substrate of the present invention, further comprising a plurality of leadframe leads located near the periphery of the substrate.

根据本发明的上述引线框基片,其中所述模制料将所述多个引线固定在所述模制料中。 According to the lead frame substrate of the present invention, wherein the molding material is fixed to the plurality of leads of the molding compound.

根据本发明的上述引线框基片,其中所述至少一个永久连接条将所述半导体单元片盘电连接到所述多个终端盘的至少一个。 According to the lead frame substrate of the present invention, wherein the at least one permanent connection bar to the semiconductor die plate electrically connected to the plurality of terminals of the at least one disc.

根据本发明的上述引线框基片,其中所述至少一个永久连接条将所述多个终端盘中的选择的一些电连接到一起。 According to the lead frame substrate of the present invention, wherein the at least one permanent connection bar some of the plurality of terminals electrically connected to the selected disc together.

根据本发明的上述引线框基片,其中所述临时连接条将所述多个终端盘固定到彼此相关的位置。 According to the lead frame substrate of the present invention, wherein the plurality of temporary connection bars to the terminal plate is fixed to a position correlated with each other.

根据本发明的上迷引线框基片,其中在所述模制料将所述半导体单元片盘、所述多个终端盘和所述多个连接条固定在一起之后从引线框基片中去除所述临时连接条。 According to the above-described present invention, a lead frame substrate, wherein the molding material in the semiconductor die plate, said plurality of terminals connected to the plurality of disks and strips fastened together after the substrate is removed from the leadframe The temporary connection bars.

根据本发明的上述引线框基片,其中引线框基片包括均匀的厚度。 According to the lead frame substrate of the present invention, wherein the lead frame substrate comprises a uniform thickness.

根据本发明的上述引线框基片,其中引线框基片被配置以安装到电路板上。 According to the lead frame substrate of the present invention, wherein the lead frame substrate being configured to mount to the circuit board.

根据本发明的上述引线框基片,引线框基片包括多个半导体单元片盘,所述多个半导体单元片盘的每个适合于接收半导体单元片,其中所述多个终端盘通过所述多个连接条链接到一起并链接到所述多个半导体单元片盘,并且所述模制料将所述引线框基片的所述多个半导体单元片盘、所述多个终端盘、所述多个连接条和所述多个引线固定在一起。 According to the lead frame substrate of the present invention, the lead frame substrate comprises a plurality of semiconductor die plate, said plurality of semiconductor die plate means each adapted to receive a semiconductor chip, wherein the plurality of terminals via the disc Article link together multiple connections and links to the plurality of semiconductor die plate, and the molding material to the leadframe substrate said plurality of semiconductor die plate, said plurality of terminal plate, the said plurality of connection bars and the plurality of leads together.

根据本发明的上述引线框基片,其中所述多个连接条将所述多个半导体单元片盘电连接到所述多个终端盘。 According to the lead frame substrate of the present invention, wherein the plurality of connecting strips to the plurality of semiconductor die plate terminal electrically connected to the plurality of disks.

根据本发明的上述引线框基片,其中所述框架、所述多个连接条、 所述多个半导体单元片盘和所述多个终端盘具有来自共同导电材料件的单体结构。 According to the lead frame substrate of the present invention, wherein the frame, the plurality of connection bars, said plurality of semiconductor die plate and said disc having a plurality of terminal structures derived from monomers co-member of a conductive material.

另一方面,本发明提供一种引线框封装,包括:具有中心部分的外壳以及位于所述外壳周边附近的多个引线;以及安装到所述中心部分上的上述引线框基片,所述引线框基片电耦连到所述多个引线的至 Another aspect, the present invention provides a lead frame package, comprising: a housing having a central portion and a plurality of leads located near the periphery of the housing; and attached to the lead frame substrate on said central portion, said lead block substrate electrically coupled to the plurality of leads to

少一个。 One less.

根据本发明的上述引线框封装,其中在将所述引线框基片安装到所述中心部分上之前可从所述引线框基片中去除所述临时连接条。 According to the present invention, the lead frame package, wherein prior to mounting said lead frame substrate on said central portion to said temporary connection bars may be removed from the lead frame substrate.

根据本发明的上述引线框封装,还包括封装材料,所述封装材料将所迷多个连接条每个的、所述半导体单元片盘的、所述多个终端盘每个的以及所述模制料的所述顶面封装。 According to the lead frame package of the present invention, further comprising a packaging material, the packaging material of each of the plurality of connection bars, said semiconductor die plate by fans, each of the plurality of terminals and said die plate made the top of the encapsulating material.

另一方面,本发明提供一种引线框封装,包括:具有中心部分的 Another aspect, the present invention provides a lead frame package, comprising: a central portion having

外壳以及位于所述外壳周边附近的多个引线;安装到所述中心部分上 A housing and a plurality of leads located near the periphery of the housing; mounted to the central portion

的上述引线框基片,所述引线框基片电耦连到所述多个引线的至少一个。 Said lead frame substrate, the lead frame substrate electrically coupled to at least one of the plurality of leads.

根据本发明的上述引线框封装,其中所述外壳包括塑料。 According to the lead frame package of the present invention, wherein the housing comprises plastic.

另一方面,本发明提供一种引线框封装,包括:具有包括导电部分和不导电部分的顶面的电路板;以及安装到所述电路板的所述顶面上的上述引线框基片。 Another aspect, the present invention provides a lead frame package, comprising: comprising a conductive portion and having a non-conductive portion of the top surface of the circuit board; and mounted to said top surface of said circuit board of said lead frame substrate.

根据本发明的上述引线框封装,其中所述引线框基片的多个引线和所述引线框基片的所述半导体单元片盘电耦连到所述电路板的所述导电部分。 According to the present invention, the lead frame package, wherein said lead frame substrate and a plurality of leads of said lead frame substrate of the semiconductor die plate electrically coupled to the conductive portion of said circuit board.

根据本发明的上迷引线框封装,其中仅所述半导体单元片盘和所述多个引线接触电路板。 According to the above-leadframe package of the present invention, in which only the semiconductor die plate and the plurality of lead exposure circuit boards. 另一方面,本发明提供一种制造引线框基片的方法,引线框基片 Another aspect, the present invention provides a method of manufacturing a lead frame substrate, the lead frame substrate

被配置以接收半导体单元片和分立无源元件,该方法包括步骤:(a) 在导电材料片中形成引线框基片,引线框基片包括至少一个半导体单元片盘、具有相应安装表面的多个终端盘、以及将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条;(b)将模制料应用到在所述步骤(a)中所形成的引线框基片,但使所述终端盘的所述安装表面不被覆盖;以及(c)从引线框基片中去除多个临时连接条。 Configured to receive a semiconductor die, and discrete passive components, the method comprising the steps of: (a) an electrically conductive material in the lead frame substrate formed sheet, the lead frame substrate comprises at least one semiconductor die plate, having a plurality of corresponding mounting surface terminal plate and the semiconductor die plate and a plurality of terminal plate link together multiple temporary and permanent connection bars; (b) material applied to the molded leadframe base in said step (a) in the form of film, but so that the mounting surface of the terminal plate is not covered; and (c) removing the plurality of temporary connection bars from the lead frame substrate. 根据本发明的上述方法,其中:步骤(a)包括在导电材料中形成多个引线框基片,多个引线框基片的每个包括通过多个临时连接条和多个永久连接条链接到一起的至少一个半导体单元片盘和多个终端盘;步骤(b)包括将模制料应用到所述步骤(a)中所形成的多个引线框基片的每个上;以及步骤(c)包括从每个引线框基片中去除多个临时连接条。 According to the above-described method of the present invention, wherein: step (a) comprises forming a plurality of lead frame substrates in the conductive material, a plurality of lead frames each of which includes a substrate by a plurality of temporary connection bars and a plurality of permanent connection bars that link to and step (c; a plurality of lead frame substrates each step (b) comprises molded material applied to the step (a) is formed; together with at least one semiconductor die plate and a plurality of terminal plate ) includes a plurality of temporary connection bars removed from each lead frame substrate.

根据本发明的上述方法,在步骤(c)之后还包括步骤:(d)将粘合带应用到每个引线框基片的背面;(e)将分立无源元件安装到终端盘上;(f)将半导体单元片安装到每个半导体单元片盘上;(g) 形成焊接连接;以及(h)在所述步骤(a)中所形成的每个引线框基片上应用封装材料,封装材料将所述步骤(e)中所安装的分立无源元件、所述步骤(f)中所安装的半导体单元片,以及所述步骤(g)中所形成的焊接连接封装。 The above-described method according to the invention, after step (c) further comprises the step of: (d) adhesive tape applied to the back of each leadframe substrate; (e) the discrete passive components mounted on the end plate; ( f) the semiconductor die is mounted on each of the semiconductor die plate; (g) forming a solder connection; and (h) the application on each leadframe packaging material substrate in said step (a) in the form of packaging material The welding of the semiconductor die discrete passive components of the step (e) is installed, said step (f) are installed, and the step (g) formed in connection package.

根据本发明的上述方法,还包括:(i)将材料片分成独立单元, 独立单元的每个包含引线框基片。 According to the above-described method of the present invention, further comprising: (i) the piece of material into individual units, each unit contains a separate leadframe substrate.

根据本发明的上述方法,其中所述步骤(b)中应用模制料还包括将该至少一个半导体单元片盘、多个终端盘、多个临时连接条和多个永久连接条固定在模制料中。 The method according to the invention described above, wherein said step (b) the application of the molding material further comprises at least one semiconductor die plate, a plurality of terminal plate, a plurality of temporary connection bars and a plurality of permanent connection bars in the molding is fixed feed.

根据本发明的上述方法,其中所述步骤(a)中形成每个引线框基片通过冲压处理来实现。 According to the above-described method of the present invention, wherein each of said lead frame substrate in step (a) is formed by a stamping process to achieve.

根据本发明的上述方法,其中所述步骤(a)中形成每个引线框基片通过刻蚀处理来实现。 According to the above-described method of the present invention, wherein each of said lead frame substrate in step (a) is formed by an etching process to achieve. 根据本发明的上述方法,其中所述步骤(C)中去除多个临时连接条通过沖压处理来实现。 The method according to the invention described above, wherein said step (C) a plurality of temporary connection bars are removed by stamping processing to achieve.

根据本发明的上述方法,其中所述步骤(C)中去除多个临时连接条通过刻蚀处理来实现。 The method according to the invention described above, wherein said step (C) a plurality of temporary connection bars are removed by etching treatment to achieve.

根据本发明的上述方法,其中所述步骤(c)中去除多个临时连 The method according to the invention described above, wherein said step (c) removing a plurality of even temporary

接条通过激光切割处理来实现。 Straps achieved by laser cutting processing.

根据本发明的上述方法,其中所述步骤(c)中去除多个临时连 The method according to the invention described above, wherein said step (c) removing a plurality of even temporary

接条通过研磨处理来实现。 Straps by grinding process to achieve.

根据本发明的上述方法,在步骤(b)和(c)之间还包括步骤: (i)将粘合带应用到每个引线框基片的背面;(ii)将分立无源元件安装到终端盘上;(iii)将半导体单元片安装到每个半导体单元片盘上;(iv)形成焊接连接;(v)在所述步骤(a)中所形成的每个引线框基片上应用封装材料,封装材料将所述步骤(ii)中所形成的分立无源元件、所述步骤(iii)中所安装的半导体单元片、以及所述步骤(iv)中所形成的焊接连接封装;以及(vi)去除所述步骤(i)中所应用的粘合带;以及其中步骤(c)包括将刻蚀处理应用到每个引线框基片的背面以去除多个临时连接条。 According to the above-described method of the present invention, in step (b) and (c) further comprises the step between: (i) an adhesive tape applied to the back of each lead frame substrate; (ii) the discrete passive components mounted the terminal plate; (iii) the semiconductor die is mounted on each of the semiconductor die plate; (iv) forming a solder connection; application package on the (v) each of the lead frame substrate in said step (a) in the form of materials, packaging materials welded semiconductor die discrete passive components of the step (ii) formed in said step (iii) are installed, and the step (iv) formed in connection package; and (vi) removing said step (i), the adhesive tape is applied; and wherein step (c) comprises etching treatment is applied to the back of each lead frame substrate to remove the plurality of temporary connection bars.

根据本发明的上述方法,其中:步骤(a)包括在材料片中形成引线框基片,其中引线框基片包括至少一个半导体单元片盘、多个终端盘、将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条、以及多个永久和临时引线;步骤(b)包括将模制料应用到所述步骤(a)中所形成的引线框基片上,模制料将半导体单元片盘、 多个终端盘、多个临时和永久连接条、以及多个永久和临时引线固定在一起;以及步骤(c)包括从引线框基片中去除多个临时连接条和临时引线。 According to the above-described method of the present invention, wherein: step (a) comprises the material forming the lead frame sheet substrate, wherein the lead frame substrate including at least one semiconductor die plate, a plurality of terminal plate, the plate and a plurality of semiconductor die terminal plate is linked to a number of temporary and permanent connection strip, and a plurality of permanent and temporary lead together; leadframe substrate in step (b) comprises molded material applied to the step (a) is formed, molded The semiconductor die plate material, a plurality of terminals plate, a number of temporary and permanent connection strip, and a plurality of permanent and temporary lead together; and a step (c) comprises removing the substrate from the lead frame and a plurality of temporary connection bars temporary lead.

根据本发明的上述方法,其中在所述步骤(a)中形成引线框基片时形成比终端盘、临时连接条、以及临时引线更厚的半导体单元片盘和永久引线。 The above-described method according to the invention, in which the lead frame substrates are formed in the step (a) is formed thicker than the end plate, a temporary connection bars, as well as temporary lead of the semiconductor die plate and permanent lead.

根据本发明的上述方法,其中多个永久或临时引线位于所述步骤(a)中所形成的引线框基片的周边附近。 According to the above-described method of the present invention, wherein the plurality of peripheral permanent or temporary lead in said step (a) is formed in the vicinity of the lead frame substrate. 附图说明 Brief Description

图1A-1B说明根据现有技术的常规引线框; According to FIG. 1A-1B illustrate a conventional prior art lead frame;

图2是根据本发明的MLF基片的一种实施方案的平面图; Figure 2 is a plan view of one embodiment of the MLF substrate of the present invention;

图3是图2中所示的MLF基片的部分平面图; Figure 3 is a partial plan view of the MLF substrate shown in Fig. 2;

图4是图2中所示的MLF基片的部分平面图,其说明应用到 Figure 4 is a partial plan view of the MLF substrate shown in FIG. 2, the description thereof is applied to

MLF基片上的模制料; MLF molding material on the substrate;

图5是困4中所示的MLF基片的平面图,其说明在已去除临时 Figure 5 is a plan view of the MLF substrate shown trapped 4, description thereof has been removed in the interim

连接条之后的MLF基片; After connecting bar MLF substrate;

图6是图5中所示的MLF基片的平面图,其说明安装在MLF Figure 6 is a plan view of the MLF substrate shown in FIG. 5, the description thereof is mounted MLF

基片上的几个分立无源元件; Several discrete passive components on a substrate;

图7是包含MLF基片的引线框封装的一种实施方案的平面图; 图8A-8C说明根据本发明的MLF基片的第二实施方案;以及图9A-9B说明根据本发明的MLF基片的第三实施方案。 Figure 7 is a plan view of a substrate comprising MLF leadframe package of one embodiment; FIG. 8A-8C illustrate a second embodiment according to the MLF substrate of the present invention; and FIG. 9A-9B illustrate MLF substrate according to the present invention. The third embodiment.

具体实施方式 DETAILED DESCRIPTION

现在将参考图2-9描述本发明的几种实施方案。 2-9 will now be described with reference to FIG. Several embodiments of the present invention. 总的来说,本发明提供一种允许在同一封装中安装功率半导体元件以及无源元件的MLF基片。 Generally, the present invention provides a method that allows installation MLF substrate power semiconductor components and passive components in the same package. 本发明可以应用于但不局限于,在需要多个或单个硅单元片与单个或多个无源元件组合的封装中提供最佳热性能。 The present invention can be applied, but are not limited to, the need to provide the best thermal performance in multiple or single silicon die with a single or a plurality of passive elements combined package. 通过在封装 By Package

中布置外部元件,本发明可以代替需要外部无源的现有微引线框产品, 从而减小空间和成本。 Arranged external components, the present invention can replace the need for an external passive micro leadframe existing products, thereby reducing the space and cost.

图2说明根据本发明一种实施方案的引线框模板100。 Figure 2 illustrates the leadframe template scheme according to an embodiment of the present invention 100. 引线框模板IOO优选地由单片导热和导电材料101制成。 Template IOO leadframe preferably made from a single piece thermally and electrically conductive material 101. 铜(Cu) 、 Cu基合金、铁-镍(Fe-Ni) 、 Fe-Ni基合金等优选地用作引线框模板材料101。 Copper (Cu), Cu based alloys, iron - Ni (Fe-Ni), Fe-Ni-based alloy is preferably used as the lead frame template material 101. 引线框模板IOO包含其他材料处于本发明的范围和本质之内。 Leadframe template IOO include other materials are within the scope and nature of the present invention. 单片材料101优选地具有适合于焊接或施加其他导电和导热粘附材料(例如, 导电环氧树脂)的表面材料抛光。 101 preferably has a single piece of material suitable for welding or applying other electrically and thermally conductive adhesive material (e.g., conductive epoxy) polishing the surface of the material. 在该实施方案中,四个MLF基片102已在单片材料101中形成。 In this embodiment, four MLF substrate 102 has been formed in the single piece of material 101. 引线框模板100可以包括多于或少于四个MLF基片102。 Lead frame template 100 may include more or fewer than four MLF substrate 102. 仅作为例子, 可以通过沖压、刻蚀、研磨或激光制造方法形成每个MLF基片102。 By way of example only, each MLF substrate 102 may be formed by stamping, etching, milling or laser manufacturing method. 每个MLF基片102优选地通过多个临时连接条104连上单片材料101。 Each MLF substrate 102 preferably by a plurality of temporary connection bars 104 and even 101 on the single piece of material. 临时连接条104将MLF基片102紧固于关于单片材料IOI的适当位置。 Article 104 temporary connection MLF substrate 102 is fastened to the appropriate location on a single piece of material IOI. 如随后将描述的,临时连接条104最后从每个MLF基片102中去除,而不打算用来提供最终封装中的半导体元件之间的电连接。 As will be described later, and finally removing the temporary connection bars 104 from each MLF substrate 102, and are not intended to provide the final package is electrically connected between the semiconductor element.

每个MLF基片102的配置可以改变。 Configure each MLF substrate 102 may be changed. 将安装到MLF基片102 上的半导体元件的个数由半导体封装的设计要求规定。 MLF will be installed to the semiconductor element substrate 102 on the number of semiconductor package design requirements specified. 图2说明MLF Figure 2 illustrates the MLF

基片102的一种实施方案。 An embodiment of the substrate 102. 在该实施方案中,MLF基片102包括半导体单元片盘106a, 106b, 106c、终端盘108、临时连接条104,以及永久连接条110。 In this embodiment, MLF substrate 102 includes a semiconductor die plate 106a, 106b, 106c, the terminal plate 108, the temporary connection bars 104, and a permanent connection bar 110. 图2中所示的终端盘108形状基本上为矩形。 Terminal shown in Figure 2 the disc 108 is substantially rectangular in shape. 终端盘108包括其他形状例如但不局限于椭圆形、正方形或圓形处于本发明的范围和本质内。 Terminal plate 108 includes other shapes such as, but not limited to, oval, square or round is within the scope and nature of the invention.

一般地,每个MLF基片102的设计或布局可以预先确定,以满足半导体封装的特定电气要求。 Typically, each MLF substrate 102 design or layout may be predetermined to meet the specific electrical requirements of the semiconductor package. 例如,如果每个MLF基片102从材料片101沖压出,那么可以配置沖压模以形成半导体封装所需的准确数目的半导体单元片盘106和终端盘108。 For example, if each of the MLF substrate 102 punched out from a sheet of material 101, you can configure the exact number of stamping die to form the desired semiconductor package semiconductor die plate 106 and terminal plate 108. 在每个MLF基片102之间留下一条材料101,使得多个MLF基片102可以单片转移。 Leave a material 101 between each MLF substrate 102, so that a plurality MLF substrate 102 may shift monolithic.

终端盘108在MLF基片102中形成图案或矩阵。 Terminal plate 108 to form a pattern or matrix substrate 102 in MLF. 如上面所讨论的,终端盘108的图案或矩阵可以很大程度地改变。 As discussed above, the terminal plate 108 or the pattern may be changed to a large extent a matrix. 终端盘108—般地提供两个功能:U)提供无源元件(例如,图6中所示的电阻器Rl, R2, R3, R4)的安装表面;以及(2 )提供焊线240的安装表面。 108- camel terminal plate provides two functions: U) provide passive components (e.g., FIG resistor Rl shown in 6, R2, R3, R4) of the mounting surface; and (2) providing a mounting wire 240 surface. 不管图案如何,终端盘108通过至少一个临时连接条104和/或至少一个永久连接条IIO链接到一起。 Regardless of how the pattern, the terminal plate 108 through at least a temporary connection bar 104 and / or at least one permanent connection bar IIO linked together. 终端盘108可以通过多个临时连接条104和/或多个永久连接条110链接到相邻终端盘108。 Terminal plate 108 by a plurality of temporary connection bars 104 and / or more permanent connection Article 110 is linked to the adjacent terminal plate 108. 开始时,临时连接条104和永久连接条110为MLF基片102提供刚性。 Initially, a temporary connection Article 104 and Article 110 MLF permanently connected to the substrate 102 to provide rigidity.

图3更详细地说明终端盘108之间的连接。 The figure below illustrates the connection between the terminal plate 108 in more detail 3. 一般地,相邻终端盘108可以用两种方式的一种链接到一起:(1)相邻终端盘108通过临时连接条104链接(例如,终端盘108a和108g);或者(2 )相邻终端盘108通过永久连接条110链接(例如,终端盘108g和108h )。 Generally, the adjacent terminal plate 108 can be a way to link the two together: (1) adjacent to the terminal plate 108 through a temporary connection strip 104 link (for example, a terminal plate 108a and 108g); or (2) adjacent to terminal plate 108 by permanently connecting strip 110 link (for example, a terminal plate 108g and 108h). 可以从终端盘108延伸出多个临时连接条104和/或永久连接条110。 Terminal plate 108 may extend from a plurality of temporary connection bars 104 and / or Article 110 permanent connection.

图3中所示的MLF基片102的部分包括十二个终端盘108a-1081。 Figure 3 MLF substrate portion 102 shown includes twelve terminal plate 108a-1081. 现在将描述几个终端盘108之间的连接,以便提供终端盘108如何可以链接到一起的例子。 108 will now be described connection between several end plate so as to provide an example of how a terminal plate 108 can be linked together. 终端盘108a具有从其延伸出的四个临时连接条104和一个永久连接条110。 Terminal plate 108a having extending therefrom four temporary connection bars 104 and Article 110 a permanent connection. 一个临时连接条104将终端盘108a与终端盘108b链接。 A temporary connection Article 104 of the terminal plate 108a and the end plate 108b links. 第二个临时连接条104将终端盘108a链接到终端盘108g。 The second connecting bar 104 temporary terminal plate 108a is linked to the terminal plate 108g. 第三和第四个临时连接条104将终端盘108a链接到与终端盘108a相邻的永久连接条110。 The third and fourth temporary connection strip 104 is linked to the terminal plate 108a 108a adjacent to the terminal plate permanently connecting bar 110. 永久连接条110将终端盘108a与终端盘108i链接。 Article 110 is permanently connected to the terminal plate 108a and the terminal plate 108i link. 四个临时连接条104将终端盘108a固定在关于MLF基片102周围元件(例如,终端盘108b, 108g)的适当位置,并建立这些元件之间的电连接。 Four temporary connection bars 104 fixed to the end plate 108a at an appropriate position on the MLF substrate 102 surrounding components (e.g., the terminal plate 108b, 108g), and to establish an electrical connection between these elements.

终端盘108f说明可以用更少的连接条链接终端盘108。 Terminal plate 108f described with fewer connecting bar links terminal plate 108. 终端盘108f通过永久连接条IIO链接到终端盘108e,并通过临时连接条104 链接到终端盘1081。 Terminal plate 108f by permanently connecting bar IIO link to the terminal plate 108e, and link to the terminal plate 1081 by temporarily connecting bar 104. 永久连接条110和临时连接条104将终端盘108e 固定在适当位置。 Permanent and temporary connection connecting bar 110 bar 104 terminal plate 108e is fixed in place. 一般地,相邻终端盘108通过单个连接条连接到一起。 Generally, the adjacent terminal plate 108 are connected together by a single connecting bar. 通过多个连接条将相邻终端盘链接到一起处于本发明的范围和本质内。 By a plurality of tie bars adjacent terminal plate links to be within the scope and nature of the invention together.

相邻终端盘108可以通过全是临时连接条104或全是永久连接条IIO链接到一起。 Adjacent terminal plate 108 may be a temporary connection strip 104 full or permanently connecting bar IIO all linked together. 例如,终端盘1081通过四个临时连接条104链接到相邻终端盘。 For example, the terminal plate 1081 by four temporary connecting bar 104 linked to the adjacent end plate. 可选地,终端盘108e仅通过永久连接条IIO链接到相邻终端盘。 Alternatively, the terminal plate 108e only by permanently connecting bar IIO link to an adjacent terminal plate. 每个临时连接条104显示为具有与永久连接条110不同的性状,这只是为了说明哪些连接条是临时的以及哪些连接条是永久的。 Each temporary connection bar 104 is shown as having a permanent connection strip 110 different characters, just to explain what is temporary and the connecting strip connecting strip which is permanent. 临时和永久连接条104, IIO具有相同性状或具有与图3所示不同的性状处于本发明的本质和范围内。 Temporary and permanent connection bar 104, IIO with the same trait or have shown a different trait is in the nature and scope of the present invention is described.

图4说明应用到MLF基片102上的模制料(molding compound) 112。 Figure 4 illustrates the application to the molding material (molding compound) MLF 112 on the substrate 102. 模制料112将MLF基片102内的每个元件(例如,终端盘108、 半导体单元片盘106,以及连接条104, 110)固定到模制料112中。 A molding material 112 of each element within the MLF substrate 102 (e.g., a terminal plate 108, the semiconductor die plate 106, and a connection strip 104, 110) is fixed to the molding material 112. 在优选实施方案中,模制料112填充到MLF基片102各处的空白空间或间隙中。 In a preferred embodiment, the molding material 112 is filled into an empty space or gap around the MLF substrate 102 in. MLF基片102中的间隙由MLF基片102中没有布置半导体单元片盘106、终端盘108或连接条104、 IIO的区域定义。 MLF substrate 102 in the gap caused by the MLF substrate 102 is not arranged semiconductor die plate 106, a terminal plate 108 or the strap 104 defines the area of IIO's. 模制料112为MLF基片102提供永久连接条110和临时连接条104之外的额外刚性。 A molding material 112 MLF substrate 102 to provide additional rigidity permanent connection bars 110 and Article 104 temporary connection to outside. 模制料112优选地是环氧树脂或其他电绝缘材料。 A molding material 112 is preferably an epoxy or other electrically insulating material.

当应用到MLF基片102上时,模制料112优选地不覆盖半导体单元片盘106或终端盘的顶面或底面,因为它们提供半导体单元片和无源元件的安装表面。 When applied to the MLF substrate 102, the molding material 112 preferably does not cover the top or bottom surface of the semiconductor unit 106 or terminal disk platter, because they provide a mounting surface of the semiconductor die and passive components. 因此,模制料112优选地比材料片101薄。 Thus, the molding material 112 is preferably thinner than a sheet of material 101. 如果模制料112最初覆盖半导体单元片盘106或终端盘108,那么可以研磨或腐蚀盘的表面以去除模制料112。 If the molding material initially covering the semiconductor unit 112 sheet tray 106 or terminal plate 108, it can be ground or surface corrosion disc to remove the molding material 112. 在优选实施方案中,临时连接条104和永久连接条U0也不被模制料112覆盖。 In a preferred embodiment, the temporary and permanent connection strap 104 is molded article U0 not feed 112 coverage. 但是,用模制料 However, with the molding material

112覆盖临时和永久连接条104、 no处于本发明的本质和范围内。 112 cover temporary and permanent connection bars 104, no falls within the spirit and scope of the invention.

图5说明优选地在已应用模制料112之后从MLF基片102中去除临时连接条104。 After 5 illustrates preferably molded material 112 has been applied to remove the temporary connection Article 104 of the substrate 102 from the MLF. 这样地,MLF基片102的元件(例如,终端盘108、 连接条IIO,以及半导体单元片盘106)主要通过模制料112保持在适当位置。 Thus, the element of the MLF substrate 102 (e.g., a terminal plate 108, a connecting bar IIO, and semiconductor die plate 106) through the main molding material 112 is held in place. 如图5中所示,如果链接的话,终端盘108仅通过永久连接条110链接到相邻终端盘108。 Shown in Figure 5, if the link, then only the terminal plate 108 by permanently connecting bar 110 linked to the adjacent terminal plate 108. 其余的永久连接条110提供链接的终端盘108之间的电连接。 The remaining permanent link connecting strip 110 is electrically connected to a terminal plate 108 between. 例如,当MLF基片102最初形成时,终端盘108a最初具有从其延伸出四个临时连接条104和一个永久连接条110(参见图2-3)。 For example, when MLF substrate 102 is initially formed, the terminal plate 108a extending therefrom initially has four temporary connection and a permanent connection Article 104 Article 110 (see Figure 2-3). 一旦去除临时连接条104,终端盘108a仅通过单个永久连接条IIO链接到终端盘108i。 Once removed temporarily connecting bar 104, the terminal plate 108a only permanently connected to the terminal strip IIO link through a single plate 108i.

临时连接条104可以在制造过程的后期去除。 Temporary connection bars 104 may be removed at a later stage of the manufacturing process. 临时连接条104仅必须在封装的电测试之前去除。 Article 104 temporary connection must only be removed prior to packaging of electrical tests. 否则,临时连接条104将提供终端盘108之间不需要的电连接。 Otherwise, Article 104 will provide a temporary connection between unwanted terminal plate 108 is electrically connected. 在可选实施方案中,在半导体元件安装到MLF基片102上之后,临时连接条104通过后刻蚀方法去除(随后讨论)3 In an alternative embodiment, after the semiconductor element is mounted on the MLF substrate 102, after the temporary connection bars 104 is removed by the etching method (discussed later) 3

优选地由环氧树脂、聚酰胺树脂、聚酯树脂等制成的粘合带(没有显示)可以贴附到MLF基片102的底表面上,以进一步使MLF基片102稳固。 Preferably, the adhesive tape by the epoxy resin, a polyamide resin, a polyester resin or the like formed (not shown) may be attached to the bottom surface of the MLF substrate 102 to further secure MLF substrate 102. 粘合带是本领域技术人员已知的,因此不需要进一步公开。 The adhesive tape is known to the skilled person, and therefore does not require further disclosure. 如果粘合带应用于MLF基片102上,优选地在将半导体元件安装到MLF基片102之前将它应用到MLF基片102上。 If the substrate used in the adhesive tape MLF 102, preferably before the semiconductor element is mounted MLF substrate 102 to apply it to the MLF substrate 102.

在粘合带应用到MLF基片102的底面上(参见图8B)之后,半导体元件安装到MLF基片102的顶面上(参见图8B)。 After the adhesive tape is applied to the bottom surface of the MLF substrate 102 (see FIG. 8B), a semiconductor element is mounted to the top surface of the MLF substrate 102 (see FIG. 8B). 本领域中已知有许多方法用于在封装中安装半导体元件。 There are many known in the art methods for mounting a semiconductor element in a package. 仅作为例子,MLF基片102可以按照与待安装到终端盘108上的无源元件的图案相对应的图案丝网印刷上焊锡青。 Only as an example, MLF substrate 102 can follow on with passive components to be mounted on the end plate 108 a pattern corresponding to the pattern of the screen printing solder green. 然后,每个无源元件放置到相应的一对终端盘108上,并且使用常规表面安装技术回流焊锡。 Then, each of the passive element placed on a respective pair of terminal plate 108, and using conventional surface mount technology reflow. 可选地,无源元件的安装表面可以印刷上焊锡骨,然后安装到一对终端盘108上。 Alternatively, the mounting surface of the passive element can be printed on the solder bone, and then attached to a pair of terminal plate 108. 用于安装半导体元件的其他方法在本领域中是已知的,因此不需要进一步公开。 Other methods for mounting a semiconductor element are known in the art, and thus, no further disclosure.

图6说明无源元件布置在几个终端盘108之间的MLF基片102 的一种实施方案。 Figure 6 illustrates a few passive components arranged between the terminal plate 108 is an embodiment of MLF substrate 102. 在该实施方案中,电阻器R1, R2, R3, R4布置在几个终端盘108之间。 In this embodiment, the resistors R1, R2, R3, R4 disc 108 is arranged between the several terminals. 每个电阻器通过其引线电连接到终端盘108上。 Each resistor is connected to the terminal plate 108 through its electrical wiring. 例如,电阻器Rl通过其引线El连接到终端盘108a,并通过其引线E2连接到终端盘108g。 For example, a resistor Rl is connected to the terminal through which a lead El plate 108a, and is connected to the terminal through which a lead plate 108g E2. 类似地,电阻器R2通过其引线E1连接到终端盘108h,并通过其引线E2连接到终端盘108i。 Similarly, the resistor R2 is connected to the terminal via its lead E1 plate 108h, 108i and connected to the terminal plate through its lead E2.

如先前所讨论的,终端盘108a和108i以及终端盘108g和108h 每个都通过永久连接条UO电连接到一起。 As previously discussed, the end plate and end plate 108a and 108i 108g and 108h are each permanently connected by Article UO electrically connected together. 电阻器Rl将终端盘108a 和108g电连接到一起。 Resistors Rl terminal plate 108a and 108g are electrically connected together. 电阻器R2将终端盘108h和108i电连接到一起。 Resistor R2 to terminal plate 108h and 108i are electrically connected together. 电阻器Rl和R2因此电连接到一起。 Resistors Rl and R2 thus electrically connected together. 电阻器R3和R4类似地电连接到一起。 Resistors R3 and R4 is similarly electrically connected together.

在该实施方案中,无源元件不安装到终端盘108b, 108c, 108f, 1081上。 In this embodiment, the passive element is not mounted on the end plate 108b, 108c, 108f, 1081. 这样,终端盘108b, 108c, 108f, 1081提供焊线的安装表面。 Thus, the end plate 108b, 108c, 108f, 1081 to provide a mounting surface weld lines. 焊线240如金线使用常规焊接方法连接在每个终端盘108b, 108c, 108f 和1081跟半导体封装200的外部引线232 (参见图7)之间。 Wire such as gold wire 240 using conventional welding method of each terminal plate is connected 108b, 108c, 108f, and 200 of the semiconductor package 1081 with the external lead 232 (see FIG. 7).

每个半导体单元片盘106适合于接收功率半导体单元片210 (例如,MOSFET)或控制器器件212(例如,PWM控制器、控制器ASIC 等)。 Each of the semiconductor die plate 106 is adapted to receive power semiconductor die 210 (for example, MOSFET) or controller device 212 (eg, PWM control, the controller ASIC, etc.). 功率半导体单元片210和控制器器件212可以在无源元件(例如,Rl-R4 )安装到MLF基片102之前或之后安装到每个半导体单元片盘106上。 Power semiconductor die 210 and a controller device 212 may MLF 102 before or after the substrate is mounted on each of the semiconductor die plate 106 is mounted to the passive components (for example, Rl-R4). 如图7中所示,MLF基片102包括两个功率半导体单元片210, 一个安装在半导体单元片盘106b上,而一个安装在半导体单元片盘106c上。 Shown in Figure 7, MLF substrate 102 comprises two power semiconductor die 210, mounted on the semiconductor die plate 106b, and a semiconductor element mounted on the spool 106c. 控制器器件212安装在半导体单元片盘106a上。 The controller device 212 is mounted on the semiconductor die plate 106a. 每个功率半导体单元片210包括焊接盘(没有显示)。 Each power semiconductor die 210 includes a pad (not shown). 焊线240将功率半导体单元片210的焊接盘电连接到引线框230的引线232。 240 wire power semiconductor die bonding pads 210 electrically connected to the leadframe leads 230 232. 图7中所示的实施方案只是说明性的。 The embodiment shown in FIG. 7 is merely illustrative. 半导体封装200的配置可以根据封装的性能要求而改变。 The semiconductor package 200 can be configured according to the package performance requirements change.

在无源元件、功率半导体单元片210和控制器器件212安装到MLF基片102上以及焊接完成之后,MLF基片102的顶面用模制料密封。 In passive components, power semiconductor die 210, and a controller device 212 is mounted on the substrate 102 and the MLF after soldering is completed, the top surface of the MLF substrate 102 sealed using molding material. 在模制料固化之后,粘合带从MLF基片102的底面去除。 After molding material curing adhesive tape is removed from the bottom surface of the substrate 102 MLF.

如先前所讨论的,临时连接条104不一定要在模制料112应用到MLF基片102之后马上从MLF基片102中去除。 Immediately removed from the MLF substrate 102. As previously discussed, after the temporary connection bars 104 do not have to be applied to the MLF substrate 102 molded material 112. 在上面所讨论的所有制造步骤中临时连接条104可以保留在MLF基片102中。 In all the manufacturing steps as discussed above temporary connection bar 104 may remain in the MLF substrate 102. 在可选实施方案中,在粘合带从MLF基片102去除之后去除临时连接条104。 In an alternative embodiment, the adhesive tape to remove the temporary connection strip 104 from 102 after removing the MLF substrate. 在去除粘合带之后执行后刻蚀过程,以便从MLF基片102去除临时连接条104。 After the etching process is executed after the removal of the adhesive tape, in order to remove the temporary connection bars 104 from the MLF substrate 102. 后刻蚀过程去除临时连接条104的地方在模制料112中形成孔洞。 After the etching process removes the temporary connection Article 104 where holes are formed in the molding material 112. 优选地,通过将另外的模制料应用到MLF基片102的背面来填充孔洞。 Preferably, the back of the molding material additionally applied to the MLF substrate 102 to fill the holes.

图7说明包含MLF基片102的引线框封装200。 Figure 7 illustrates the lead frame 102 comprises MLF substrate package 200. 引线框封装200 包括在其周边附近具有引线232的外壳230。 Leadframe package 200 includes a lead 232 of the housing 230 in the vicinity of its periphery. 材料片101最后分成单个单元,每个单元包括单个MLF基片102。 The last piece of material 101 into individual units, each comprising a single MLF substrate 102. 该方法在行业内通常称作单体化。 This method is commonly referred to in the industry of the monomer. 然后每个单元安装到外壳230上。 Then each unit is mounted to the housing 230. 引线框封装200优选地以这样的方式封装到封装体中,即每个引线232的底面至少有一部分从封装体的底部暴露,以便形成外部电连接。 Leadframe package 200 are preferably encapsulated in such a way to the package body, i.e., the bottom surface 232 of each lead from the bottom of at least a portion of the package is exposed so as to form an external electrical connection. 模制料已被去除,以便说明引线框封装200的内部。 A molding material has been removed to illustrate the interior 200 of the lead frame package.

图7中所示的引线框封装200包括两个功率半导体单元片210。 FIG leadframe package 200 shown in 7 comprises two power semiconductor die 210. 每个半导体单元片210可以用粘结剂如银骨贴附到半导体单元片盘106上,银青在单元片贴附之后固化。 Each of the semiconductor die 210 may be attached with an adhesive such as silver bone to the semiconductor die plate 106, Green Bank after curing die attached. 每个半导体单元片210的有效表面包括多个焊接盘(没有显示)。 Each of the semiconductor die 210 active surface including a plurality of bonding pads (not shown). 每个焊接盘通过焊线240电连接到引线232。 Each bonding pads connected to the lead wire 232 by 240 electric. 其上没有安装无源元件的终端盘108为焊线240提供安装表面。 Disc is not installed on the terminal passive element 108 provides a mounting surface wire 240. 几个终端盘108显示为通过焊线240电连接到引线232。 Several terminal plate 108 shown connected to a lead 232 by bonding wires 240 electrically. 图7 中所示的引线框封装200的配置可以改变,而不打算用来限制本发明的范围。 The lead frame shown in FIG. 7 of the package configuration 200 may vary, and are not intended to limit the scope of the present invention. 封装200包括功率半导体元件和无源元件,然后可以安装到客户电路板上。 Package 200 includes a power semiconductor element and a passive element, then the customer may be mounted to the circuit board.

图8A-8C说明MLF基片的另一种实施方案。 Figure 8A-8C illustrate MLF substrate another embodiment. 在该实施方案中, MLF基片302直接安装到客户电路板上。 In this embodiment, MLF substrate 302 is mounted directly to the customer on the circuit board. MLF基片302的配置基本上类似于先前在图2-6中所示的MLF基片102。 MLF substrate 302 is configured substantially similar to the MLF substrate 102 previously shown in Figure 2-6. 类似于MLF基片102 的MLF基片302中的元件(例如,终端盘108、永久连接条110等) 保持相同的参考数字。 MLF MLF substrate similar to the substrate 302 of the element 102 (for example, a terminal plate 108, permanent connection bars 110, etc.) to maintain the same reference numerals.

类似于MLF基片102, MLF基片302包括来自材料片301的单体结构。 Similar to the MLF substrate 102, MLF substrate 302 includes a unitary structure from material sheet 301. 不管制造过程如何,图8A中所示的每个MLF基片302包括将MLF基片302连接到单片材料301的外框架304 (参见图9A )。 Regardless of how the manufacturing process, each MLF substrate 302 shown in FIG. 8A comprises MLF substrate 302 is connected to the outer frame 301 of the single piece of material 304 (see FIG. 9A). 外框架304包括永久引线303和临时引线305。 Outer frame 304 includes 303 permanent and temporary lead wire 305. 临时引线305固定MLF 基片302,并且类似于临时连接条104最后在MLF基片302进行电测试之前从MLF基片302去除。 305 fixed temporarily lead MLF substrate 302, and is similar to Article 104 before the temporary connection in MLF substrate 302 final electrical tests substrate 302 is removed from the MLF. 临时连接条104和临时引线305可以同时或者在制造过程的不同阶段去除。 Temporary connection bars 104 and the temporary leads 305 may be removed simultaneously or at different stages of the manufacturing process. 如图8A和8C中所示,半导体单元片210和终端盘108经由至少一个焊线240直接电连接到永久引线303。 As shown in Fig. 8A and 8C, the semiconductor die 210 and terminal plate 108 via at least one bonding wire 240 is electrically connected directly to the 303 permanent lead.

从MLF基片302去除临时引线305实际上将MLF基片302转变成无引线封装(参见图8C) 。 Removing the temporary lead 302 from the MLF substrate 305 will actually change MLF substrate 302 into a leadless package (see FIG. 8C). MLF基片302因此可以直接安装到客户电路板上。 MLF substrate 302 can be mounted directly to the customer's board. 如先前所讨论的,模制料112填充到MLF基片的间隙中,并且不覆盖半导体单元片盘106的底面或终端盘108的底面。 As previously discussed, the molding material 112 is filled into the gap MLF substrate, and does not cover the underside of the bottom or end plate semiconductor die plate 106 108. 在该实施方案中,MLF基片302具有基本上均匀的厚度,如图8B中h所示。 In this embodiment, MLF substrate 302 having a substantially uniform thickness, 8B h as shown in FIG. 这样地,MLF基片302的整个底面310接触电路板。 This way, MLF entire bottom surface of the substrate 310 contacts the circuit board 302. MLF 基片302的一个优点在于从每个功率半导体单元片210散发出的热量通过半导体单元片盘106直接从其底面转移到客户电路板上,提供低的热阻抗。 One advantage is that the MLF substrate 302 from each of the power semiconductor die 210 heat emitted by a semiconductor die plate 106 is transferred to the customer directly from the bottom surface of the circuit board, to provide a low thermal impedance. 但是,缺点在于MLF基片302的不导电部分(例如,模制料U2)也接触电路板。 However, a drawback in that the non-conductive portion (e.g., a molded material U2) MLF substrate 302 contacts the circuit board also. 行业内的常规实践是跟踪沿着电路板顶面的轨道或轨迹,在该实施方案中电路板位于MLF基片302下面。 Conventional practice in the industry is tracking along the track or tracks the top surface of the circuit board, in this embodiment, the circuit board is located MLF substrate 302 below. MLF 基片302的整个底面310接触电路板,当MLF基片安装到电路板上并且MLF基片302的底面310和电路板的顶面之间没有空间时,客户不能跟踪沿着电路板顶面的轨迹。 MLF entire bottom surface of the substrate 310 contacts the circuit board 302, when the MLF substrate is mounted on a circuit board and there is no space between the top surface of the bottom surface of the substrate 302 MLF 310 and the circuit board, the customer can not trace along the top surface of the circuit board It tracks.

图9A-9B说明MLF基片302的又一种实施方案。 Figure 9A-9B illustrate MLF substrate 302 yet another embodiment. 在该实施方案中,MLF基片310的底面310具有台阶特性,以便允许客户跟踪沿着电路板顶面的轨迹。 In this embodiment, the bottom surface 310 of the MLF substrate 310 has a step characteristic, in order to allow customers to track along the top surface of the circuit board tracks. 图9A说明在单片材料301中形成的四个MLF 基片302。 Figure 9A illustrates four MLF substrate to form a monolithic material 301 302. 引线框模板300可以包括多于或少于四个MLF基片302。 Lead frame template 300 may include more or fewer than four MLF substrate 302. 仅作为例子,可以通过冲压、刻蚀、研磨或激光制造过程来形成每个MLF基片302。 By way of example only, by stamping, etching, milling or laser manufacturing process used to form each MLF substrate 302.

不管制造过程如何,图9A中所示的每个MLF基片302通过永久引线303和临时引线305连接到单片材料301。 Regardless of how the manufacturing process, each MLF substrate 302 shown in FIG. 9A through permanent and temporary lead wire 303 is connected to the single sheet of material 305 301. 与图8A-8C中所示的MLF基片302不同,图9B中所示的MLF基片在底部或接触面312 上具有台阶特性。 FIG MLF substrate 302 shown in different 8A-8C, MLF substrate shown in FIG. 9B has a step or a feature on the bottom contact surface 312. 在该实施方案中,当MLF基片302安装到电路板上时仅需要搮作封装的盘(例如,永久引线303和半导体单元片盘106 ) 接触电路板。 In this embodiment, when the MLF base plate 302 mounted on the circuit board for packages only need 搮 disk (for example, the permanent lead 303 and the semiconductor die plate 106) contacting the circuit board. 优选地,当MLF基片302最初形成时形成MLF基片302的台阶特性。 Preferably, the step characteristic MLF substrate 302 is formed when the MLF substrate 302 is initially formed. 如图9B中所示,MLF基片302的底面312为半导体单元片盘106提供比模制料112延伸出更多的永久引线303。 As shown in FIG. 9B, the bottom surface 302 of the MLF substrate 312 of the semiconductor die plate 106 provides a molding material 112 extending over the lead 303 is more permanent. 当MLF 基片302安装到电路板上时,在引线303之间形成间隙314,从而可以在其间跟踪轨迹。 When MLF base plate 302 mounted on the circuit board, a gap is formed between the lead 303 314, which can track the trajectory meantime. 间隙314还提供清洗电路板的优点。 Advantages to clean the board 314 also provides clearance. 例如,MLF 基片302的凸起底面允许用标准清洗设备清洗电路板,同时使MLF 基片302下方的集水、溢出等的可能性达到最小,否则将导致电迁移等。 For example, MLF raised bottom surface of the substrate 302 allows a standard cleaning equipment to clean the board, while the possibility of MLF substrate 302 below the catchment, overflow to a minimum, otherwise it will lead to electromigration.

本发明的一个方面提供一种引线框基片,包括: 多个连接条; One aspect of the invention there is provided a lead frame substrate, comprising: a plurality of connection bars;

适合于接收半导体单元片的半导体单元片盘; 通过所述多个连接条链接到一起并链接到所述半导体单元片盘的多个终端盘,所述多个终端盘的每个适合于接收无源元件和烊线;以及 It means adapted to receive a semiconductor chip of a semiconductor die plate; a plurality of through the connecting bar are linked together and linked to said plurality of terminals disc tray semiconductor die, each of said plurality of terminals adapted to receive a disc without source components and smelt line; and

将所述半导体单元片盘、所述多个终端盘,以及所述多个连接条固定在一起的模制料。 The semiconductor die plate, said plurality of terminals disc, and said plurality of connection strips secured together molding material.

本发明的另一个方面提供一种引线框封装,包括: Another aspect of the present invention to provide a lead frame package, comprising:

具有中心部分的外壳和位于所述外壳周边附近的多个引线;以及 A housing having a central portion and a plurality of leads located near the periphery of the housing; and

安装到所述中心部分上的引线框基片,所述引线框基片电连接到 Mounted to the lead frame substrate on said central portion, said lead frame substrate are electrically connected to

所述多个引线的至少一个并包括: 多个连接条; At least one of the plurality of leads and comprising: a plurality of connection bars;

适合于接收半导体单元片的半导体单元片盘; Adapted to receive a semiconductor die semiconductor die plate;

多个终端盘,所述多个终端盘的每个适合于接收无源元件和焊线,所述多个终端盘通过所述多个连接条链接到一起并链接到所述半导体单元片盘;以及 A plurality of terminal plates, each of said plurality of terminal plate adapted to receive passive components and wire, said plurality of terminal plate by the plurality of connection bars are linked together and linked to the semiconductor die plate; as well as

将所述半导体单元片盘、所述多个终端盘,以及所述多个连接条固定在一起的模制料。 The semiconductor die plate, said plurality of terminals disc, and said plurality of connection strips secured together molding material.

本发明的又一个方面提供一种引线框封装,包括: 具有中心部分的外壳和位于所述外壳周边附近的多个引线; Yet another aspect of the present invention to provide a lead frame package, comprising: a housing having a central portion and a plurality of leads located near the periphery of the housing;

安装到所述中心部分上的引线框基片,所述引线框基片电连接到所述多个引线的至少一个并包括: Mounted to the lead frame substrate on said central portion, said lead frame substrate are electrically connected to at least one of said plurality of lead and comprises:

多个半导体单元片盘,所述多个半导体单元片盘的每个适合于接收半导体单元片; A plurality of semiconductor die plate, the plurality of semiconductor die plate each adapted to receive a semiconductor die;

多个终端盘,所述多个终端盘的每个适合于接收无源元件和 A plurality of terminal plates, each of said plurality of terminal plate adapted to receive passive components and

焊线; Wire;

将所述多个终端盘和所述半导体单元片盘链接到一起的多个连接条;以及 The plurality of terminal plate and said semiconductor die plate is linked to a plurality of connection strips together; and

应用到所述引线框基片上的模制料,所述模制料将所述多个半导体单元片盘、所迷多个终端盘,以及所述多个连接条固定在一起。 Applied to the molding material for the leadframe substrate, the molding material of the plurality of semiconductor die plate, the plurality of terminal plate the fans, and the plurality of connecting strips together.

本发明的另一个方面提供一种安装到电路板上的引线框基片,包位于引线框基片周边附近的多个引线; Another aspect of the present invention to provide a lead frame mounted to the circuit board substrate, a plurality of leads of the lead frame package is located near the periphery of the substrate;

多个连接条; A plurality of connecting bar;

多个半导体单元片盘,所述多个半导体单元片盘的每个适合于接 A plurality of semiconductor die plate, the plurality of semiconductor die each tray adapted to meet

收半导体单元片; Income semiconductor die;

多个终端盘,所述多个终端盘的每个适合于接收无源元件和焊线,所述多个终端盘通过所述多个连接条链接到一起并链接到所述多 A plurality of terminal plates, each of said plurality of terminal plate adapted to receive passive components and wire, said plurality of terminal plate by the plurality of connection bars are linked together and linked to the multi-

个半导体单元片盘;以及 A semiconductor die plate; and

将所述多个半导体单元片盘、所述多个终端盘、所述多个连接条, 以及所述多个引线固定在一起的模制料。 The plurality of semiconductor die plate, said plurality of terminals disc, the plurality of connecting strips, and the plurality of lead molding material secured together.

本发明的又一个方面提供一种引线框封装,包括: 具有包括导电和不导电部分的顶面的电路板;以及安装到所述电路板的所述顶面上的引线框基片,包括: Yet another aspect of the present invention to provide a lead frame package, comprising: a conductive and non-conductive portion including a top surface of the circuit board; and a circuit board mounted to the lead frame of the top surface of the substrate, comprising:

位于所述引线框基片周边附近的多个引线; In said plurality of leadframe leads near the periphery of the substrate;

多个连接条; A plurality of connecting bar;

适合于接收半导体单元片的半导体单元片盘; 多个终端盘,所述多个终端盘的每个适合于接收无源元件和焊线,所述多个终端盘通过所述多个连接条链接到一起并链接到所述半导体单元片盘;以及 Adapted to receive a semiconductor die semiconductor die plate; a plurality of terminal plates, each of said plurality of terminal plate adapted to receive passive components and wire, said plurality of terminal plate through the plurality of connecting bar links together and linked to the semiconductor die plate; and

将所述半导体单元片盘、所述多个终端盘、所述多个连接条, 以及所述多个引线固定在一起的模制料。 The semiconductor die plate, said plurality of terminals disc, the plurality of connecting strips, and the plurality of leads of the molded material secured together. 本发明的另一个方面提供一种制造引线框基片的方法,引线框基片被配置以接收半导体单元片和分立无源元件,该方法包括步骤: Another aspect of the present invention to provide a manufacturing method of a lead frame substrate, the lead frame substrate is configured to receive a semiconductor die, and discrete passive components, the method comprising the steps of:

(a) 在导电材料片中形成引线框,引线框基片包括至少一个半导体单元片盘、多个终端盘,以及将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条; (A) forming a conductive material film on the lead frame, the lead frame substrate comprising a plurality of temporary and permanent connection together with at least one semiconductor die plate, a plurality of terminal plate, and the semiconductor die plate and a plurality of terminals linked to the plate Article;

(b) 将模制料应用到所述步骤(a)中所形成的引线框基片上, 模制料将半导体单元片盘、多个终端盘,以及多个临时和永久连接条固定在一起;以及 Leadframe substrate (b) the molded material applied to the step (a) formed in the molding material of the semiconductor die plate, the plurality of terminal plate, and a plurality of temporary and permanent connection strips secured together; as well as

(c) 从引线框基片中去除多个临时连接条。 (C) removing the plurality of temporary connection bars from the lead frame substrate. 本发明的又一个方面提供一种将半导体元件安装到引线框基片 Yet another aspect of the present invention there is provided a semiconductor element is mounted to the leadframe substrate

上的方法,包括步骤: The method comprising the steps of:

(a) 在导电材料片中形成多个引线框基片,多个引线框基片的 (A) forming a plurality of conductive sheet material of the lead frame substrate, a plurality of lead frame substrates

每个包括通过多个临时连接条和多个永久连接条链接到一起的至少一个半导体单元片盘和多个终端盘; Each includes a link to the article by a plurality of temporary connection and a plurality of strips together permanently connected to at least one semiconductor die plate and a plurality of terminal plate;

(b) 将模制料应用到所述步骤(a)中所形成的多个引线框基片的每个上; Each upper (b) the molded material applied to the step (a) formed in the substrate, a plurality of lead frames;

(c) 从每个引线框基片中去除多个临时连接条; (C) removing the plurality of temporary connection bars from each of the leadframe substrate;

(d) 将粘合带应用到每个引线框基片的背面; (D) an adhesive tape applied to the back of each lead frame substrate;

(e) 将分立无源元件安装到终端盘上; (E) the discrete passive components mounted on the end plate;

(f) 将半导体单元片安装到每个半导体单元片盘上; (F) the semiconductor die is mounted on each of the semiconductor unit platter;

(g) 形成焊接连接;以及 (G) forming a solder connection; and

(h) 在所述步骤(a)中所形成的每个引线框基片上应用封装材料,封装材料将所述步骤(e)中所安装的分立无源元件、所述步骤(f) 中所安装的半导体单元片,以及所述步骤(g)中所形成的焊接连接封装。 (H) the application on each lead frame substrate in said step (a) in the form of packaging materials, packaging material discrete passive components of the step (e) is installed in said step (f) as mounting a semiconductor die, and welding said step (g) formed in the connecting package.

本发明的另一个方面提供一种将半导体元件安装到引线框基片上的方法,包括步骤: Another aspect of the present invention provides a method of mounting a semiconductor element leadframe substrate, comprising the steps of:

(a) 在材料片中形成多个引线框基片,多个引线框基片的每个包括至少一个半导体单元片盘和多个终端盘,半导体单元片盘和多个终端盘通过多个临时连接条和多个永久连接条链接到一起; (A) in a plurality of lead frames formed sheet material substrate, each of the at least one semiconductor die comprising a plurality of lead frames disk substrate and a plurality of terminal plate, a semiconductor die plate and a plurality of terminals through a plurality of temporary disc connecting strip and a plurality of permanent connection bars are linked together;

(b) 将模制料应用到所述步骤(a)中所形成的多个引线框基片的每个上; Each upper (b) the molded material applied to the step (a) formed in the substrate, a plurality of lead frames;

(c) 将粘合带应用到每个引线框基片的背面; (C) an adhesive tape applied to the back of each lead frame substrate;

(d) 将分立无源元件安装到终端盘上; (D) the discrete passive components mounted on the end plate;

(e) 将半导体单元片安装到每个半导体单元片盘上; (E) the semiconductor die is mounted on each of the semiconductor unit platter;

(f) 形成焊接连接; (F) forming a solder connection;

(g) 在所述步骤(a)中所形成的每个引线框基片上应用封装材料,封装材料将所述步骤(e)中所安装的分立无源元件、所述步骤(f)中所安装的半导体单元片,以及所述步骤(g)中所形成的焊接连接封 (G) application on each lead frame substrate in said step (a) in the form of packaging materials, packaging material discrete passive components of the step (e) is installed in said step (f) as welded connections sealed semiconductor die mounted, and said step (g) formed in

装; Equipment;

(h)去除在所述步骤(c)中应用的粘合带;以及(0对每个引线框基片的背面应用刻蚀处理,以便去除多个临时连接条。 (H) the removal of adhesive tape applied in the step (c); and (0 etch process applied to the back of each of the leadframe substrate in order to remove a number of temporary connection bars.

本发明的又一个方面提供一种制造引线框基片的方法,引线框基片被配置以接收半导体单元片和分立无源元件,该方法包括步骤: Yet another aspect of the present invention to provide a manufacturing method of a lead frame substrate, the lead frame substrate is configured to receive a semiconductor die, and discrete passive components, the method comprising the steps of:

(a) 在材料片中形成引线框基片,引线框基片包括至少一个半导体单元片盘、多个终端盘、将半导体单元片盘和多个终端盘链接到 (A) in the sheet material forming the lead frame substrate, the lead frame substrate comprises at least one semiconductor die plate, a plurality of terminal plate, the plate and the semiconductor die plate linked to a plurality of terminals

一起的多个临时和永久连接条,以及多个永久和临时引线; Together with a number of temporary and permanent connection strip, and a plurality of permanent and temporary wiring;

(b) 将模制料应用到步骤(a)中所形成的引线框基片上,模制料将半导体单元片盘、多个终端盘、多个临时和永久连接条,以及多个永久和临时引线固定在一起;以及 Leadframe substrate (b) the molded material applied to step (a) formed in the molding material of the semiconductor die plate, the plurality of terminal plate, a number of temporary and permanent connection strip, and a plurality of permanent and temporary lead together; and

(c) 从引线框基片中去除多个临时连接条和临时引线。 (C) removing the plurality of temporary connection bars and temporarily lead from the lead frame substrate.

已为了说明和描述的目的提供本发明的优选实施方案的前面描述。 For purposes of illustration and description has been provided in front of the preferred embodiment of the present invention will be described. 它不打算做到无遗漏或者用来将本发明局限于所公开的精确形式。 It does not intend to do exhaustive or to limit the invention to the precise form disclosed. 显然地,本领域技术人员容易想到许多修改和改变。 Obviously, those skilled in the art, many modifications and changes will readily occur. 选择和描述实施方案,以便最好地说明本发明的原理及其实际应用,从而允许本领域其他人员理解适合于所考虑的实际应用的对应各种实施方案和具有各种修改的发明。 Embodiments were chosen and described to best explain the principles of the invention and its practical application, thereby allowing other people to understand the art for various embodiments and correspondence with various modifications of the invention to practical application considered. 本发明的范围打算由下面的权利要求及其等价物来定义。 The scope of the invention is intended to be defined by the following claims and their equivalents.

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