CN100426258C - Embedded system and method for deciding its buffer size - Google Patents

Embedded system and method for deciding its buffer size Download PDF

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CN100426258C
CN100426258C CNB2006101517311A CN200610151731A CN100426258C CN 100426258 C CN100426258 C CN 100426258C CN B2006101517311 A CNB2006101517311 A CN B2006101517311A CN 200610151731 A CN200610151731 A CN 200610151731A CN 100426258 C CN100426258 C CN 100426258C
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impact damper
bus
multiple arrangement
data
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CN1920795A (en
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徐荣灿
蔡文宗
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Via Technologies Inc
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Abstract

The invention relates to a buffer size decide method, used in embedded system, wherein it comprises: first, testing the buffer fill time (BFT) and request response time (RRT); then calculating the media data rate (MDR) and the number of several bus maters (NBM); at least, based on these data, deciding the size of each buffer.

Description

Embedded system and buffer size determining method thereof
Technical field
The invention relates to a kind of buffer size determining method, particularly relevant for the buffer size determining method of a kind of embedded system and device thereof.
Background technology
Embedded system is present very general design.Several devices in the embedded system, central processing unit (CPU), bridge and medium access controller (medium access control for example, MAC) or the like may share same bus (bus), and the same time can only there be one of them device to have the bus right to use (bus ownership).Therefore, there is a moderator (arbiter) to come as repeating query or right of priority, to come the right to use (bus ownership) of management bus usually according to some arbitration rules.When a certain device in the system is wanted to use bus, can send request for utilization (request) to moderator, require to have the bus right to use.Moderator is just judged the priority level of the state and the device that all send requirement of present bus according to the arbitration rule, decision pays the bus right to use in one of them device.Behind the selected device of moderator, just can reply a confirmation signal and install to this.The device of receiving confirmation signal just obtains the bus right to use, can bring into use bus, for example receives data by bus.Other device that is not selected then continues to wait for the moderator distribution bus right to use.
To some device in the embedded system; as the mac controller in the network chip; when data begin to transmit; one lump-sum data (package) need be sent to without interruption as Physical layer (physical layer; PHY) on the transmission medium (media), therefore can be provided with an impact damper (buffer) usually with temporary partial data.During transmission, data can constantly be delivered to transmission medium from impact damper.If buffer size is big inadequately, refill (re-fill) data before can't in time data are cleared in impact damper and enter in the impact damper, make transmission medium in transmission, can't in time obtain data, cause package to damage situation, then need to retransmit whole package.The state that data are cleared in the impact damper is called impact damper inefficacy (buffer underrun).If the situation that impact damper lost efficacy often takes place, will make the usefulness of entire system significantly reduce.
Fig. 1 shows the operating process synoptic diagram of traditional mac controller.As shown in the figure, when mac controller will begin to transmit package, require the right to use of bus earlier to moderator, obtain with regard to beginning the data of bus to be inserted in its impact damper after the right to use, fill up up to impact damper.Begin after filling up to send data to medium and release back the bus right to use.In the transmission course,, make transmission not finish, but the data in the impact damper have little time to replenish, be cleared, impact damper will take place lost efficacy, these data all must be retransmitted if impact damper is big inadequately.
Therefore, lost efficacy for fear of impact damper takes place, the size of the impact damper in the design be generally equal to maximum package size in the specification (Maximum packet size, MPS).For instance, for the mac controller of Ethernet, maximum package size approximates the 1.536K byte, therefore, if need 4 mac controllers on using, then each mac controller must dispose the impact damper of 1 1.536K byte-sized, must dispose 4 1.536K bytes altogether.So configuration makes manufacturing cost significantly improve.Therefore, need a kind ofly can effectively dwindle buffer size, the buffer design mode and the manufacture method that can not cause impact damper to lose efficacy simultaneously, and then the usefulness of elevator system.
Summary of the invention
In view of this, one of purpose of the present invention promptly is to provide a kind of method of effective decision buffer size, and uses bus arbitration rule of the present invention, can effectively dwindle buffer size, avoids the generation of above-mentioned impact damper inefficacy situation simultaneously.
Based on above-mentioned purpose, the invention provides a kind of buffer size determining method, be used for embedded system, this embedded system comprises multiple arrangement, and wherein each device all comprises impact damper, and the method comprises following steps.At first, measure impact damper loading time (buffer fill time, BFT) with response delay time (request response time, RRT), wherein, this impact damper loading time is for to deliver to the time required in the impact damper with bus data at every turn, and this impact damper sends and requires signal, and this requires the reaction time of signal for response this response delay time, and this reaction time comprises that device reaction, moderator (arbiter) switch the right to use of this bus and by bridge time delay that this bus data forward pass is required; Then, the computing medium data transfer rate (media data rate, MDR) and the number of multiple arrangement (number ofbus master, NBM), this media data rate is in each store access cycle, the data of this impact damper is passed out to the maximum data transfer rate of transmission medium; At last, according to this impact damper loading time, this response delay time, this media data rate, with the number of these devices to determine in these devices the size of each impact damper.
The present invention also provides a kind of embedded system, comprises a bus, multiple arrangement and a moderator.Each device comprises impact damper and survival value, is used for writing down the current state of corresponding buffers.Wherein, the size of the impact damper of each device is according to the impact damper loading time of corresponding this embedded system, response delay time, media data rate, determines with the number of these devices.Moderator receives a plurality of signals that require that transmitted by each device, in store access cycle according to wherein coming in the survival value selecting arrangement of each device by these bus access data.Wherein, the device that is selected has minimum survival value.
For above and other objects of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and cooperate appended graphicly, be described in detail below.
Description of drawings
Fig. 1 is the search sample synoptic diagram that shows that exemplary code phase and carrier frequency are formed.
Fig. 2 is the embedded system synoptic diagram that shows according to the embodiment of the invention.
Fig. 3 is the corresponding relation synoptic diagram of display buffer state and survival value TTD.
Fig. 4 is the buffer size determining method synoptic diagram that shows according to the embodiment of the invention.
Fig. 5 is that demonstration is according to the survival value of the device of the embodiment of the invention and the variation relation synoptic diagram of each store access cycle of the bus right to use.
Fig. 6 is the bus right to use priority synoptic diagram that shows according to the embodiment of the invention.
Fig. 7 is the variation situation that shows according to each store access cycle of device survival value TTD of the embodiment of the invention.
[main element label declaration]
20~moderator; 22,24,26,28~device; 29~bus; TTD, TTD1, TTD2, TTD3, TTD4~survival value; T~store access cycle; BFT~impact damper loading time; RRT~response delay time; MDR~media data rate; NBM~device number; The size of MBS~impact damper; S410-S420~step; The minimum frequency range requirement of BDR~bus; RBR~bus data transfer rate; S510-S530~step; The maximal value of MTTD~survival value; MAC1-MAC4~mac device.
Embodiment
Fig. 2 shows the embedded system synoptic diagram according to the embodiment of the invention.At least a moderator 20, device 22, device 24, device 26, device 28 and bus 29 have been comprised in the embedded system 2.Device 22, device 24, device 26, device 28 shared buss 29 are in order to transmit and to receive data by bus 29.Wherein, these devices can be any communication devices, as mac controller of wired or wireless network or the like, also can be the devices of the continuous transmission of any needs, and wherein, each device all respectively has an impact damper and a survival value (TTD).So the survival value of device 22,24,26 and 28 can be expressed as TDD1, TDD2, TDD3 and TDD4 respectively.
In the present invention, impact damper is used for the temporary required data of transmission course, and survival value then is used for the current state of record buffer, that is expression all data that impact damper is last empty the time of (empty) required cost fully.Therefore, survival value is represented with store access cycle (T).For instance, if survival value TTD is 20T, expression is again through behind 20 store access cycles, and the data in the impact damper will empty, and just the data in the impact damper also can provide the use of 20 store access cycles again.Therefore, if the data of impact damper are full up state (full), then its corresponding survival value TTD is a maximal value, if the data of impact damper are cleared, then survival value TTD then is 0.
For instance, the corresponding relation synoptic diagram of buffer state as shown in Figure 3 and survival value TTD, as if the scope of representing survival value TTD with 8 positions, that is the scope of survival value TTD can be 0~255T, when then the data of impact damper are full up state, TTD=255T, when the data of impact damper are emptied state fully, TTD=0T, and represent the value of the TTD of other buffer state, then, correspond to different values, as TDD=63T among the figure or 127T according to the number of the data storage of each impact damper.In other words, the little survival value of healing represents that the data of impact damper are cleared sooner, therefore also must replenish before TTD becomes 0 as early as possible.When the state of TDD=0T took place, just the impact damper inefficacy took place in expression.
Scope that it should be noted that survival value TTD can and be considered dynamically to adjust according to the system specification in the reality use, to be applied in the various different field.In addition, survival value TTD also can do variation according to different user demands, with the real change situation of reaction buffer.Therefore, the variation of survival value TTD is to be controlled by the device at impact damper place.For instance, in present embodiment, when the data of bus 29 were imported the impact damper of device 22 into, the survival value TTD1 that device 22 can be corresponding with it increased, and when the buffer data of device 22 was sent to transmission medium, survival value TTD1 that can it is corresponding reduced.
As shown in Figures 2 and 3, the work of moderator 20 is the right to use of management bus, so when arbitrary device desires to obtain the bus right to use, can send moderator 20 and require signal, moderator 20 just receives by each and installs the signal that requires that is transmitted, and all require all can comprise in the signal survival value of each device.Then, moderator 20 has the device right to use of minimum survival value in each section store access cycle, make it pass through the bus access data.When the device that is selected begins by the bus access data, because the data of impact damper have increased, its corresponding survival value will be increased.No matter be the device of choosing or not choosing, because device can be sent the data of impact damper to transmission medium in the transmission course always, its corresponding survival value will reduce constantly along with store access cycle.
In addition, moderator 20 can continue to detect all and require survival value in the signal, and the survival value of any one becomes hour in device, and moderator can be chosen the device that has the minimum value survival value at that time and come by the bus access data in another store access cycle.For instance, if when a certain store access cycle, device 22 sends to moderator 20 simultaneously with device 24 and requires signal, and its survival value is respectively TTD1=2T and TTD2=5T.When moderator 20 is received these two when requiring signal, because the value of TTD1 be a minimum, so the bus right to use will be distributed to the device 22 of survival value TTD1 correspondence.
Behind several store access cycles of process, because device 24 is sent the data of impact damper to medium constantly, make its corresponding survival value TTD2 reduce, install 22 and make because obtaining the data on the bus that then its corresponding survival value TTD1 increases, and supposes to become respectively TTD1=10T and TTD2=1T.When moderator 20 detected once more, the value of finding TTD2 this moment was minimum, so the bus right to use will be distributed to the device 24 of survival value TTD2 correspondence.Thus, moderator 20 just can be by detecting the survival value size that requires signal that each device is sent, the impact damper user mode of each device of effecting reaction is with the distribution bus right to use, and the device with the little survival value of healing will be healed and be had the bus right to use soon.
Although it is the target that design go up to be made great efforts that buffer size is dwindled always,, how avoiding taking place under the situation that impact damper lost efficacy, and impact damper can narrowed down to minimum dimension, but be that a utmost point is waited the problem thinking deeply and solve always.Generally speaking, system configuration and parameter in embedded system such as the system single chip (SOC), for example use which kind of processor, several means is arranged, message transmission rate (data rate) of several buses and bus or the like arranged ...., all specifications are all known in advance when design, can not changed arbitrarily again.Therefore, can utilize these known system configuration and parameter to decide the required buffer size of device.
Fig. 4 shows the buffer size determining method synoptic diagram according to the embodiment of the invention.At first, in step S410, the following parameters of generator: impact damper loading time (bus fill time, BFT), response delay time (request response time, RRT), media data rate (media data rate, MDR) and the device number (number of bus master, NBM).Then, as step S420, again according to above-mentioned B parameter FT, RRT, MDR and NBM calculate each the device in impact damper size (minimum buffer size, MBS), wherein, impact damper loading time BFT represents bus data to be delivered to send the time required in the impact damper that requires at every turn;
The response delay time, RRT represented: response requires reaction time of signal, comprises that device reaction, moderator switch the bus right to use and by bridge time delay that the data forward pass is required; Media data rate MDR represents: in each store access cycle, the data of impact damper are passed out to the maximum data transfer rate of transmission medium; And device number N BM then represents: in the system, and the device number that has real-time frequency range to consider, wherein, if in the system, comprise some as long as once be performed the device that gets final product, these devices are extremely low to demanding of frequency range, need not to require ageing continuous transmission, so can not list the consideration of device number in.Therefore, on real the work, the survival value TTD of these devices can be made as maximal value, thus, after the above-mentioned device that has real-time frequency range to consider all disposes, these devices be handled getting final product again.
The size MBS of impact damper then can determine according to following formula:
MBS=[(BFT+RRT)*NBM]*MDR (1)
For instance, if NBM is 4, MDR is 1 byte/T and BFT and RRT when being respectively 2T and 3T, the size MBS of impact damper can calculate via formula (1)
MBS=[(BFT+RRT)*NBM]*MDR
=[(2+3) * 4] * 1=20 (byte)
Therefore, to the system of this configuration, the impact damper that the buffer size of each device only need dispose 20 bytes gets final product.
In addition, as if minimum frequency range requirement, then as can be known with the minimum frequency range BDR of bus (bus data rate) expression bus
BDR=MBS/BFT (2)
Above example, the minimum frequency range BDR of its bus equals 10 bytes/T, that is each store access cycle bus will transmit the data of 10 bytes in the impact damper of obtaining the usufructuary device of bus.So, can judge whether to satisfy the specification requirement of system by the minimum frequency range BDR of bus.Generally speaking, if the minimum frequency range BDR of bus less than the system bus frequency range of the system specification, just is unlikely the situation that impact damper lost efficacy takes place.
The size MBS of the impact damper of being calculated by formula (1) cooperates the above-mentioned arbitration rule of utilizing survival value TTD, and the situation that can avoid impact damper to lose efficacy takes place, and reaches effective bus bandwidth management.
Fig. 5 shows a certain device according to the embodiment of the invention, at the survival value and the usufructuary synoptic diagram that concerns of bus of each store access cycle.As shown in the figure, in step S510, this device judges whether to obtain the bus right to use earlier.Suppose in the present embodiment, bus is imported data to the speed in the impact damper requires RBR to represent with the system bus frequency range, when obtaining the bus right to use, bus will be imported data to impact damper, and simultaneously, device also can continue the data of impact damper to export to medium, at this moment, the survival value TTD in each cycle can be expressed as TTD=TTD '+(RBR)-1 (as step S520), and wherein, TTD ' is for obtaining the data redundancy amount before the bus right to use.If do not obtain the bus right to use, can't use bus to send data to enter into impact damper, device continues to send the data of impact damper to medium, the variation of the survival value in this moment in each cycle can be expressed as TTD=TTD '-1, wherein, TTD ' is for obtaining the data redundancy amount (as step S530) before the bus right to use.
For instance, suppose the embedded system that 4 mac controller MAC1-MAC4 arranged to one, its parameter is as follows respectively:
NBM=4, and MDR=1 (byte/T), BFT=2T, RRT=3T
Can try to achieve according to above-mentioned formula (1) and (2)
The size MBS of required impact damper is
MBS=[(BFT+RRT)*NBM]*MDR
=[(2+3) * 4] * 1=20 (byte)
At this moment, the minimum frequency range of bus requires BDR to be
BDR=MBS/BFT=20/2=10 (byte/T)
In addition, the maximal value MTTD of survival value TTD can determine according to following formula:
MTTD=MBS/MDR (3)
Wherein, MBS is the size of impact damper, and MDR is the media data rate, the scope of survival value TTD between 0 and MTTD between.The maximal value MTTD of survival value TTD represents impact damper is emptied required maximum store access cycle number.By suitable selection MTTD, can more effectively grasp the state of impact damper.Therefore, can learn the maximal value of survival value TTD
MTTD=MBS/MDR=20/1=20T
That is the scope of survival value is 0T~20T.
Above example, when the survival value of all devices was all identical, the usufructuary order of its bus can be defined as MAC1, MAC2, MAC3, is MAC4 at last.Suppose under the poorest situation (worst case) that 4 devices all are when operating at full speed, the bus right to use also can offer each device according to certain rotation.
Fig. 6 shows the bus right to use priority synoptic diagram according to the embodiment of the invention.As shown in the figure, if there is a device not claim, then the bus right to use will be given to the device of next cis-position.Fig. 7 then shows according to the device survival value of the embodiment of the invention variation situation at each store access cycle.As shown in the figure, when being installed on a store access cycle when obtaining the bus right to use, the survival value TTD of this store access cycle becomes TTD '+10-1.The survival value TTD of the store access cycle when not obtaining the bus right to use then is TTD '-1.For instance, if the survival value of MAC1 to MAC4 is expressed as TDD1 to TTD4 respectively, and suppose that the value of TDD1 to TTD4 is all 3T, after device MAC1 obtains the bus right to use, during next one store access cycle, the survival value TDD1 to TTD4 of MAC1 to MAC 4 then becomes 12T, 2T, 2T and 2T respectively.
Each the device MAC1 to MAC4 that supposes to go up in the example is a mac controller that Fast Ethernet is used, and the frequency range of bus is 100 MHz (MHz), meets the Advanced High-performance Bus (AHB) of AMBA, and its highway width is 32.If each store access cycle (T) is 10 how second (ns), impact damper loading time BFT and response delay time RRT are 8T, then reach (2) according to formula (1) and can calculate and obtain following result:
The MDR=100M bps
How second=1/10
=1/T
=0.125 byte/T
MBS=[(BFT+RRT)*NBM]*MDR
=[(8+8)*4]*0.125
=8 bytes
At this moment, the minimum frequency range BDR of bus is
BDR=MBS/BFT
=8/8
=1 byte/T
Again, the frequency range of ahb bus is 4 bytes/T.The minimum frequency range BDR of bus is 1 byte/T, less than the desired frequency range of ahb bus, even so all transmit under the data conditions at full speed at MAC1 to MAC4, as long as each device all disposes the buffer size of 8 bytes, and the above-mentioned survival value TTD arbitration rule of arranging in pairs or groups, can guarantee to become before 0 at survival value TTD, can in time obtain the bus right to use, data are refilled in the impact damper, can not cause the generation of impact damper inefficacy situation.The buffer size that needs to dispose the 1.536K byte on the traditional design installs to each, reduced significantly according to buffer size of the present invention many, so manufacturing cost also can reduce significantly.
Above-mentioned explanation provides several different embodiment or uses the embodiment of different qualities of the present invention.Specific device in the example, formula and method are in order to help explaination main spirit of the present invention and purpose, to the invention is not restricted to this certainly.For any system configuration is known system, especially the application of system single chip (SOC), can suitably adjust above-mentioned formula according to the different system specifications and complexity, cooperate survival value TTD arbitration rule of the present invention to reach the purpose of dwindling buffer size.
Therefore; though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim scope person of defining.

Claims (10)

1. a buffer size determining method is used for embedded system, and this embedded system comprises multiple arrangement, and wherein each device all comprises impact damper, and this method comprises:
Measure impact damper loading time and response delay time, wherein, impact damper sends and requires signal, and this response delay time requires the reaction time of signal for responding this;
The number of computing medium data transfer rate and multiple arrangement; And
According to this impact damper loading time, this response delay time, this media data rate, with the number of described multiple arrangement to determine in the described multiple arrangement size of each impact damper.
2. buffer size determining method according to claim 1, wherein, this impact damper loading time is for to deliver to the time required in this impact damper with bus data at every turn.
3. buffer size determining method according to claim 1, wherein, this reaction time comprises that device reaction, moderator switch the right to use of bus and by bridge time delay that the data forward pass of this bus is required.
4. buffer size determining method according to claim 1, wherein, this media data rate is in each store access cycle, the data of this impact damper is passed out to the maximum data transfer rate of transmission medium.
5. buffer size determining method according to claim 1 wherein also comprises:
A plurality of signals that require of corresponding described multiple arrangement are sent in the moderator; And
This moderator according to a plurality of survival values of corresponding described multiple arrangement, from described multiple arrangement, is selected one and is selected to pass through the bus access data in store access cycle;
Wherein, the device that is selected has minimum survival value, and when this device that is selected passes through these bus access data, increases the pairing survival value that should minimum of this device that is selected.
6. buffer size determining method according to claim 5 wherein also comprises in the described multiple arrangement, corresponds to all survival values that are not selected device and reduces.
7. buffer size determining method according to claim 5 wherein also comprises in the described multiple arrangement, and the survival value of a certain device becomes hour, when a certain store access cycle, chooses this device to pass through these bus access data.
8. embedded system comprises:
Bus;
Multiple arrangement, and each device in described multiple arrangement, all comprise impact damper and survival value, and this survival value is used to write down the current state of this impact damper, wherein, the size of this impact damper be according to this embedded system impact damper loading time, response delay time, media data rate, determine with the number of described multiple arrangement; And
Moderator receives by a plurality of signals that require that described multiple arrangement transmitted, and in each store access cycle, according to a plurality of survival values of described multiple arrangement, selects in the described multiple arrangement, and a certain device with minimum survival value is to pass through these bus access data.
9. embedded system according to claim 8 wherein also comprises the device that is not selected in the described multiple arrangement and reduces its corresponding survival value.
10. embedded system according to claim 8 wherein also comprises in the described multiple arrangement, and the survival value of a certain device becomes hour, and when a certain store access cycle, this moderator is chosen this device to pass through these bus access data.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5732240A (en) * 1993-06-04 1998-03-24 Digital Equipment Corporation Real-time data cache size adjustment in a server computer
US20050267891A1 (en) * 2004-05-14 2005-12-01 International Business Machines Corporation Optimization of buffer pool sizes for data storage
CN1755652A (en) * 2004-09-30 2006-04-05 国际商业机器公司 System and method for dynamic sizing of cache sequential list

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5732240A (en) * 1993-06-04 1998-03-24 Digital Equipment Corporation Real-time data cache size adjustment in a server computer
US20050267891A1 (en) * 2004-05-14 2005-12-01 International Business Machines Corporation Optimization of buffer pool sizes for data storage
CN1755652A (en) * 2004-09-30 2006-04-05 国际商业机器公司 System and method for dynamic sizing of cache sequential list

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