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Publication numberCN100414411 C
Publication typeGrant
Application numberCN 200410100108
Publication date27 Aug 2008
Filing date2 Oct 1996
Priority date3 Oct 1995
Also published asCN1145839C, CN1165568A, CN1221843C, CN1388404A, CN1624551A, CN1881062A, CN1881062B, CN101369579A, CN101369579B, CN103956361A, US5930607, US20030207506, US20050082541, US20050084999, US20050104071, US20050233509, USRE38292, USRE44267, WO1997013177A1
Publication number200410100108.4, CN 100414411 C, CN 100414411C, CN 200410100108, CN-C-100414411, CN100414411 C, CN100414411C, CN200410100108, CN200410100108.4
Inventors佐藤尚
Applicant精工爱普生株式会社
Export CitationBiBTeX, EndNote, RefMan
External Links: SIPO, Espacenet
Method of manufacturing active matrix substrate and method for manufacturing film element
CN 100414411 C
Abstract  translated from Chinese
一种有源矩阵基板,该基板的构成包含薄膜晶体管(TFT)和连接到其薄膜晶体管一端的象素电极的象素部分,其特征在于:具备设备在上述扫描线及信号线中至少一条线或与其线电等效的部位和共用电位线之间的、使用了薄膜晶体管的防止静电破坏用装置;上述防止静电破坏用装置构成为包含在将栅极电极层、栅极绝缘膜、沟道层、源、漏极电极层、保护层重叠而成的薄膜晶体管中连接栅极电极层和源、漏电极层而构成的二极管;在同一制造工序中形成用于电连接上述栅极电极层和源、漏极电极层的、选择性地除去上述栅极电极层上的上述栅极绝缘膜和上述保护膜构成的第1开口,和选择性地除去上述源、漏极电极层上的上述保护膜构成的第2开口。 An active matrix substrate constituting the substrate comprises a thin film transistor (TFT) and a pixel portion which is connected to one end of the thin film transistor of the pixel electrode, characterized in that: said device includes a scanning line and a signal line of at least one line or its equivalent electrical line and the common potential line portion between the thin-film transistor used to prevent damage by electrostatic means; said electrostatic breakdown preventing means is configured by the gate electrode layer included in the gate insulating film, a channel layer, a source, a drain electrode layer, a protective layer made of superimposed thin film transistor and the source connected to the gate electrode layer, a drain electrode layer constituting a diode; formed in the same manufacturing step for electrically connecting the gate electrode layer and said source and drain electrode layer, selectively removing the gate insulating film of the gate electrode layer on the protective film and said first opening, and optionally the protective said source and drain electrode layer is removed film constituting the second opening.
Claims(6)  translated from Chinese
1. 一种有源矩阵基板的制造方法,其特征在于经过包含下述(A)~(G)的制造工序的基板制造工序来制造有源矩阵基板: (A)在基板上形成栅极电极层以及以与该栅极电极层同一材料构成的栅极电极材料层的工序; (B)在上述栅极电极层及栅极电极材料层上形成栅极绝缘膜的工序; (C)在上述栅极绝缘膜上,在具备与上述栅极电极层平面重迭的形态下形成沟道层和欧姆接触层的工序; (D)在形成连接在上述欧姆接触层的源、漏极电极层的同时,在上述绝缘膜上的规定区域上形成以与上述源、漏极电极相同材料构成的源、漏极电极材料层的工序; (E)形成保护膜使之复盖上述源、漏极电极层以及上述源、漏电极材料层的工序; (F)选择性地蚀刻存在于上述栅极电极层或栅极电极材料层上的上述栅极绝缘膜及上述保护膜的重迭膜,形成使上述栅极电极层或上述栅极电极材料层的部分表面露出的第1开口,同时,选择性地蚀刻上述源、漏极电极层或上述源、漏极电极材料层上的上述保护膜,形成使上述源、漏极电极层或上述源、漏极电极材料层的部分表面露出的第2开口的工序; (G)把导电性材料层连接到露出于上述第1开口的上述栅极电极层或上述栅极电极材料层、露出于第2开口的上述源、漏极电极层或上述源、漏极电极材料层的工序。 1. A method of manufacturing an active matrix substrate, wherein the substrate through a manufacturing process comprising the following (A) ~ (G) of the manufacturing process used to manufacture the active matrix substrate: (A) forming a gate electrode on the substrate layer, and a step to the gate electrode layer is formed of the same material of the gate electrode material layer; (B) a step of forming a gate insulating film on said gate electrode layer and a gate electrode material layer; (C) in the above a gate insulating film, the step with the channel layer and the ohmic contact layer and the lower layer of the gate electrode overlap plane morphogenesis; (D) connected to the source of said ohmic contact layer is formed, the drain electrode layer Meanwhile, in the predetermined region of the insulating film formed in the step and the source, the drain electrode of the same material of the source and drain electrode material layer; (E) so as to form a protective film covering said source, drain electrode Step layer and said source and drain electrode material layer; (F) selectively etching the film is present in the gate insulating film and overlaps said gate electrode of said protective film layer or the gate electrode material layer, is formed so that part of the surface of the gate electrode layer or the gate electrode material layer to expose the first opening, and selectively etching said source, said drain or source electrode layer, the protective film on the drain electrode material layer is formed the above-mentioned source, the step portion of the surface of said source or drain electrode layer, the drain electrode material layer to expose the second opening; (G) to be connected to the conductive material layer is exposed to said first opening of said gate electrode layer or the gate electrode material layer, said source is exposed in the second openings, said source or drain electrode layer, the drain electrode material layer step.
2. 权利要求l中所述的有源矩阵基板的制造方法,其特征在于: 通过经由权利要求1的工序(A) ~ (G),在上述有源矩阵基板上形成:连接扫描线和信号线的薄膜晶体管;连接在上述薄膜晶体管上的象素电极;连接上述薄膜晶体管的栅极电极层及源、漏极电极层而构成的防止静电破坏的二极管。 L in the manufacturing method of the active matrix substrate according to claim 1, characterized in that: the step via Claim 1 (A) ~ (G), is formed on the active matrix substrate: scanning lines and signal connection line of the thin film transistor; pixel electrodes connected to said thin film transistor; a gate electrode layer and the source and drain electrode layer connected to the thin film transistor constituted of a diode to prevent electrostatic breakdown.
3. 权利要求l中所迷的有源矩阵基板的制造方法,其特征在于: 作为上述工序(G)中的导电性材料层使用由和象素电极相同材料构成的层。 L in the fan manufacturing method according to claim active matrix substrate, wherein: the use and the pixel electrode layer is composed of the same material as the above-described step (G) of the conductive material layer.
4. 权利要求l中所述的有源矩阵基板的制造方法,其特征在于: 作为上述工序(G)中的导电性材料层使用ITO。 L manufacturing method described in claim 4. An active matrix substrate, wherein: as the step (G) of the conductive material layer using ITO.
5. —种薄膜元件的制造方法,其特征在于包括以下步骤:(A) 在基板上形成柵极电极层及用与上述栅极电极层相同材料构成的栅极电极材料层的步骤;(B) 在上述栅极电极及上述栅极电极材料层上形成栅极绝缘膜的步骤;(C) 在上述栅极电极层上,夹着上述栅极绝缘膜形成沟道层和欧姆接触层的步骤;的步骤;(E) 形成复盖上述源极电极层、上述漏极电极层以及上述栅极电极材料层的保护膜的步骤;(F) 为使上述栅极电极材料层的表面部分露出,形成选择性地刻蚀上述栅极电极材料层上的上述栅极绝缘膜和上述保护膜的一部分的第l开口,与此同时,为使上述源、漏极电极层的表面露出,形成选择性地刻蚀上述源极电极层和上述漏极电极层上的上述保护膜的一部分的第2开口的步骤;和(G) 形成将露出于上述第1开口的上述栅极电极材料层和露出于上述第2开口材料层的步骤。 5. - The method of manufacturing a thin film device, comprising the following steps: Step a gate electrode layer and said gate electrode layer with the same material of the gate electrode material layer (A) formed on a substrate; (B Step (C) on said gate electrode layer, sandwiching the gate insulating film of the channel layer and the ohmic contact layer is formed;) step of a gate insulating film formed on said gate electrode and said gate electrode material layer ; step; (E) forming a layer covering said source electrode, said drain electrode layer, and a step of protecting film above the gate electrode material layer; (F) of the surface portion of said gate electrode material layer is exposed, forming selectively etching the gate insulating film above the gate electrode material layer and the protective film on the first part of the opening l, at the same time, to make the above-mentioned source, the exposed surface of the drain electrode layer, forming a selective and the step of opening said second source electrode layer of the protective film on the drain electrode layer etching part; and (G) are formed to be exposed to said first opening of said gate electrode material layer and exposed to opening said second material layer step.
6. —种有源矩阵基板的制造方法,其特征在于包括以下步骤:(A) 在基板上形成保护元件用栅极电极层的步骤;(B) 在上述保护元件用栅极电极层上形成栅极绝缘膜的步骤;(C) 在上述保护元件用栅极电极层上,夹着上述栅极绝缘膜形成沟道层和欧姆接触层的步骤;件用漏极电极层的步骤;(E) 形成复盖上述保护元件用源极电极层、和上述保护元件用漏极电极层的保护膜的步骤;(F) 为使上述保护元件用源、漏极电极层的表面部分露出,形成选择性地刻蚀上述保护元件用源极电极层和上述保护元件用漏极电极层的上述保护膜的一部分的第I开口,并且,为使上述保护元件用栅极电极的一部分露出,形成选择性地刻蚀上述保护元件用栅极电极上的上述栅极绝缘膜和上述保护膜重迭的重迭膜的一部分的第2开口的步骤;和(G) 在上述第1开口和上述第2开口,形成导电性材料层的步骤。 6. - kind of the active matrix substrate manufacturing method, comprising the steps of: a gate electrode layer protective element of step (A) is formed on a substrate; (B) forming a gate electrode layer on the protective element (C) used in the step of the protective element layer on the gate electrode, sandwiching the gate insulating film of the channel layer and the ohmic contact layer is formed;; step member with the drain electrode layer; a gate insulating film of the step (E ) covering the protective element forming a source electrode layer, and said step of protection elements with the drain electrode layer protecting film; (F) so that the protective element is the source, the surface portion of the drain electrode layer is exposed, forming a select etching of the protective elements of the source electrode layer and the protective element of the protective film with the drain electrode layer I of the opening portion, and, in order to expose the protective element with a portion of the gate electrode, forming a selective etching step opening the protective elements of the gate insulating film on the gate electrode and the protective film overlap overlapping part of the second film; and (G) in the first opening and the second opening , the step of forming a conductive material layer.
Description  translated from Chinese

有源矩阵基板的制造方法和薄膜元件的制造方法本申请是申请号为02119320. 7、申请日为1996年10月2曰的原案申请的分案申请,该原案的在先申请为JP96-02858,优先权曰为1995年10月3曰。 A manufacturing method of the active matrix substrate and the thin film element of the present application is a No. 02119320.7, filed a divisional application on October 2, 1996 the original bill, saying the application, the earlier application of the original bill of JP96-02858 , said priority 3 October 1995 said. 技术领域本发明涉及薄膜元件的制造方法、有源矩阵基板、波晶显示装置、 有源矩阵基板的制造方法以及包含于液晶显示装置中的有源元件的防jh静电破坏的方法。 TECHNICAL FIELD The present invention relates to a thin film device, the active matrix substrate, wave crystal display device manufacturing method, and an active matrix substrate included in the method of the anti-static device jh active liquid crystal display element destruction. 背景技术在有源矩阵基板方式的液晶显示装置中,在各象素电极上连接着开关元件,借助于这些开关元件接通或断开各象素电极' 作为开关元件,例如使用薄膜晶体管(TFT )。 Background art display device, each pixel electrode is connected to the switching element, by means of which the switching element is turned on or off each pixel electrode 'as the switching element, for example a thin film transistor (TFT active matrix substrate in the liquid crystal mode ). 薄膜晶体管的结构和工作基本上和单晶硅的MOS晶体管相同' 作为使用了非晶硅(cx - Si )的薄膜晶体管的结构已知有若干种,而一般使用栅极电极位于非晶硅膜下边的背栅极结构(反交错结构)• 在薄膜晶体管的制造中,重要的是減少制造工序数而且确保高合格率'另外,有效地保护薄膜晶体管免受在有源矩阵基板的制造过程中发生的静电引起的破坏也很重要.保护薄膜晶体管免受静电破坏的技术例如记述在日本国的实开昭63 - "130号的徵型胶片和特开昭62 -187885号公报中.发明内容本发明的目的之一是提供能够削减薄膜晶体管的制造工序数而且高可靠性的新的薄膜元件的制造加工技术,还有,本发明的另一个目的是提供具备使用其制造加工技术不《吏制造工艺复杂化而形成的、具有充分静电保护能力的保护元件的有源矩阵基板以及液晶显示装置.还有,本发明的又一个目的是提供能够防止包含在TFT基板上的有源元侔(TFT )造爰蔷电玻坧的防止静电破坧的方法.本发明的薄膜元件的制造方法的优选形态之一是在制造背柵极结构的薄膜元件时,包括:形成保护膜以便复盖源极电极层漏极电极层以及栅极电极材料层的工序;形成第1开口和第2开口的工序,在形成了保护膜之后,选择性地刻蚀存在于栅极电极层或栅极电极材料层上的栅极绝缘膜以及保护膜的重迭膜的一部分,形成露出栅极电极层或栅极电极材料层表面上一部分的第l开口,同时,选择地刻蚀源极电极层或漏极电极层上的保护膜的一部分,形成露出源极电极层或漏极电极层表面上一部分的第2开口;连接工序,在形成上述开口之后,经由第1或第2开口,把导电性材料层连接到栅极电极层、栅极电极材料层、源极电极层、漏极电极层中的至少一个上,若依据上述薄膜元件的制造方法,则可成批地进行绝缘膜的选择性刻蚀。由此,能够把外部连接端子连接到电极的开口形成工序(压焊区露出工序)和把内部布线连接到电极上的开口形成工序(连接孔形成工序) 一起来进行,削减了工序数。作为"导电性材料层",最好使用ITO ( Indium Tin Oxide )膜. 如上述,由于贯通栅极电极材料层上的第1绝缘膜及该第1绝缘膜上的第2绝缘膜的重迭膜形成第1开口,故构成相当于2层绝缘膜厚度的深连接孔。然而,由于ITO熔点高,故与铝等相比较台阶复盖率好,从而,即使经由深连接孔也不会造成连接不良.作为"导电性材料层",除去ITO之外,也可以使用金属氧化物那样熔点高的、其它的透明电极材料,例如,可以使用SnOx、 ZnOx等金属氧化物。 Construction and operation of single-crystal silicon thin film transistor and a MOS transistor is substantially the same "as the use of an amorphous silicon (cx - Si) thin film transistor structures are known several kinds, and the gate electrode is located generally use an amorphous silicon film lower back gate structure (inverted staggered structure) • In manufacturing the thin film transistor, it is important to reduce the number of manufacturing steps and ensure high yield 'In addition, the effective protection of the thin film transistor from the manufacturing process of the active matrix substrate The destruction caused by static electricity occurs is also important to protect the thin film transistor from electrostatic damage of techniques such as described in Japanese Unexamined Patent Publication 63 -. "130 type film collection and Unexamined Patent Publication No. 62-187885 DISCLOSURE OF INVENTION It is an object of the present invention to provide a number of manufacturing steps can be reduced and a thin film transistor with high reliability a new membrane element manufacturing process technology, as well, another object of the present invention is to provide a manufacturing process which includes the use of technology is not "official It complicates the manufacturing process and the formation of an electrostatic protection element has a sufficient protection of the active matrix substrate and a liquid crystal display device. Further, another object of the present invention is to provide the ability to prevent the TFT substrate comprising an active element Mou ( When TFT) to prevent static electricity build-breaking method 坧 Yuan Qiang electric glass 坧 one preferred embodiment of the method of manufacturing the thin film device of the present invention is that in the back-gate structure thin film element, comprising: forming a protective film so as to cover the source a drain electrode layer, a gate electrode layer, and a step of the electrode material layer; a first opening and a second opening step of forming, after forming a protective film, selectively etching the gate electrode layer or present in the gate electrode material and a portion of the protective film overlapping film layer on the gate insulating film, a gate electrode layer is formed on the exposed gate electrode material layer or the surface of the first portion of the opening l, while for selectively etching a source electrode layer or a drain a portion of the protective film on the electrode layer is formed on the exposed source electrode layer or a drain electrode layer of the second surface of the opening portion; connection step, after forming the opening, through the first or second openings, the conductive material layer connected to the gate electrode layer, a gate electrode material layer, a source electrode layer, at least one drain electrode layer, if according to the above-described method for manufacturing a thin film device, the insulating film can be performed in batches of selective etching Thus, it is possible to connect the external connection terminal to the opening of the electrode forming step (step expose bond pads) and the internal wiring connected to the electrode on the opening forming step (a connection hole forming step) carried out together, reducing the number of steps. As "the conductive material layer" is preferably used ITO (Indium Tin Oxide) film. As described above, since the overlapped through the first insulating film and a gate electrode material layer on the first insulating film, a second insulating film film-forming first opening, it constitutes the equivalent of the deep connection hole 2 of the film thickness of the insulating layer. However, since the ITO high melting point, it is good compared with the aluminum step coverage rate, and thus, even if it does not cause deep via hole connection poor connection as "conductive material layer", except for ITO, a metal oxide may also be used as a high melting point, the other transparent electrode material, for example, may be used SnOx, ZnOx and other metal oxides. 这种情况下,台阶复盖率也是可实用的。 In this case, the step coverage ratio can be also useful. 另外,本发明的有源矩阵基板的优选形态之一是在扫描线及信号线中的至少一条线或者与该线电气等效部位和共用电位线之可设置使用了薄膜晶体管的防止静电破坏用保护装置,防止静电破坏保护装置构成为包含连接了薄膜晶体管,的栅极电极层和漏极电极层而构成的二极管,在同一制造工序中,形成用于把栅极电极层和漏极电极层电气连接的逸择性地除去栅极电极层上的绝缘层而构成的第1开口和选捧性地除去漏极电圾层上的绝缘层T^构成的第2开口,而且,上述栅极电极层和上述漏极电极层经由上述第1及第2 开口,用和上述象素电极同一材料组成的导电层连接在一起,把TFT的栅极和漏极短路形成的MOS 二极管(MIS 二极管)实质上是晶体管,流过电流的能力高,能够高速地吸收静电,从而静电保护能力高。 In addition, one preferred embodiment of the active matrix substrate of the present invention is in the scanning lines and signal lines in at least one line or using the thin film transistor and prevent static electrical equivalent of the line parts and the common potential line of disruption can be set Diode gate electrode layer and a drain electrode layer formed protective device to prevent electrostatic discharge protection device is configured to include a thin film transistor is connected, in the same manufacturing process used to form the gate electrode layer and the drain electrode layer Yi electrical connections selectively removing the insulating layer and a gate electrode layer formed on the first opening and holding elections to remove the insulating layer of the drain rubbish layer T ^ constitute a second opening, and that the gate a drain electrode layer and said electrode layer through said first and second openings, and a connecting conductive layer of the pixel electrode with the same material used to short-circuit the gate and drain of the TFT formed by MOS diode (MIS diode) substantially transistor, the current flowing through the high capacity, high speed electrostatically absorbed, whereby high electrostatic protection. 还有,由于实际上是晶体管,故容易控制电流-电压特性的阈值电压(Vth ),从而,能够减少无用的泄放电流.另外,薄膜元件的制造工序数被减少,制造容易。 Also, since the fact that the transistor, it is easy to control the current - voltage characteristic of the threshold voltage (Vth), and thus, unwanted leakage current can be reduced Further, the number of manufacturing steps of the thin film element is reduced, manufacturing is easy. 作为"象素电极"及"和象素电极同一材料組成的导电层"最好使用ITO ( Indium Tin Oxide )膜.除ITO膜之外,也可以使用金属氧化物那样的高熔点的其它透明电极材料.例如,可以使用SnOx、 ZnOx 等金属氧化物。 As "pixel electrode" and "the pixel electrodes and the conductive layer of the same material" it is preferable to use ITO (Indium Tin Oxide) film. In addition to the ITO film, the transparent electrode is also possible to use other high-melting metal oxides as material. For example, SnOx, ZnOx and other metal oxides. 本发明的有源矩阵基板的优选形态之一中上述"和扫描线及信号线中至少一条线电气等效部位"是用于连接外部连接端子的电极(压焊区),还有,上述"共用电位线"是在交流驱动液晶之际给出作为基准的基准电位的线(LC - COM线),或者是在液晶显示装置的制造阶段把连接上述外部连接端子用的电极连接在一起形成等电位的线(保护环)保护环作为液晶显示装置制造阶段中的静电措施,是设在压焊区外侧的线.LC - COM线以及保护环都是共用电位线,从而,通过在压焊区和这些线之间连接保护二极管,能够使静电在这些线上释放.还有,本发明的有效矩阵基板的优选形态之一中,"防止静电破坏用保护装置"设置在连接外部端子用的电极(压焊区)和在交流驱动液晶之际给出作为基准的基准电位的线(LC - COM线)之间,以及连接外部端子用的电极(压焊区)和把连接外部端子用的电极(压焊区) 连接在一起形成等电位的线(保护环)之间这两者上.保护环在把TFT基板和对向基板(彩色滤波器基板)粘接之后, 在与驱动用IC连接前切断,但LC- COM线是留在最终制品中的线。 One preferred embodiment of the electrode of the active matrix substrate of the present invention, the above-mentioned "and the scanning lines and the signal lines in at least one line equivalent electrical parts" is used to connect the external connection terminal (pressure pad), and said " common potential line "is given AC driving liquid crystal as a reference on the occasion of a reference potential line (LC - COM line), or the manufacturing stage of the display electrode means is connected to the external connection terminals are connected together to form a liquid crystal, etc. line potential (guard ring) protection ring as a liquid crystal device manufacturing stage static measures show that it is located outside the bonding pads of the line .LC - COM wire and guard ring are common potential line, whereby, through the press pad and between the cable protection diodes, enabling electrostatic discharge in these lines. Also, one preferred embodiment of the active matrix substrate of the present invention, the term "protective device to prevent electrostatic damage" is set in the electrode connecting external terminals for (pressure pads) and AC drive the liquid crystal is given as a reference on the occasion of line reference potential - between (LC COM line), and an electrode connected to an external terminal used (pressure pads) and the connection with the external terminal electrode between lines (guard ring) (pressure pads) joined together to form equipotential this on both the protective ring after the TFT substrate and the adhesive to the substrate (color filter substrate), in connection with the drive IC before cutting, but LC- COM lines are lines remain in the final product of. 从而,在基板切断后但连接LC之前,若依据上述结构,则保护象素部分的TFT免遭静电破坏,从而,提高制品的可靠性,还有,由于在最终制品中也留有保护二极管,故也提高了制品实际使用中的抗静电破坏的强度.进而,由于是使用了TFT的保护二极管, 故容易控制阈值电压(Vth ),还能够减少泄放电流,因而,即使在最终制品中留有二极管也没有不良影响.还有,本发明的有源矩阵基板制造方法的优逸形态之一中,防止静电破坏用保护装置具备把第1二极管的阳极和第2二极管的阴极连接在一起,把上述第1二极管的阴极和上迷第2二极管的阳极连接在一起而构成的双向二极管。 Whereby, after cutting but before connecting the substrate LC, if based on the above-described configuration, the pixel portion TFT protection from electrostatic breakdown, thereby, improve the reliability of products, as well, since it is left in the final product protection diode, it also improves the strength of products in actual use static destruction. Furthermore, as is the use of TFT protection diodes, it is easy to control the threshold voltage (Vth), but also can reduce the leakage current, thus, remain even in the final product there is no adverse effect diode. Also, one gifted Yat form active matrix substrate producing method of the present invention to prevent electrostatic damage with the first diode anode and cathode of the second diode is connected together by a protective device, The cathode of the first diode and the fans of the second diode anode connected together to form a two-way diode. 由于是双向保护二极管,因而能够从正极性冲击和反极性冲击这两个方面保护TFT,还有,本发明的液晶显示装置使用本发明的有源矩阵基板构成.通过切实地防止有效矩阵基板中象素部分的有源元件(TFT )的静电破坏,也提高了液晶显示部分的可靠性。 Because it is bidirectional protection diode, it is possible to protect the TFT from the impact of positive polarity and reverse polarity impact of these two aspects, as well as, a liquid crystal display device of the present invention using an active matrix substrate of the present invention constituted by effectively preventing active matrix substrate active element in a pixel portion (TFT) electrostatic damage, but also improve the reliability of the liquid crystal display section. 还有,本发明的有源矩阵基板制造方法的优选形态之一中,在形成背栅结构的TFT之际,包括:形成工序,在形成由相同材料构成的源漏电极层的同时,在绝缘膜保护膜形成工序,形成保护膜使之复盖源漏电极层以及源漏电极材料层;形成工序,选棒性地刻蚀存在于栅极电极层或栅极电极材料层上的栅极绝缘膜以及保护膜的重迭膜形成露出栅极电极层或栅极电极材料层的表面上一部分的第1开口,同时,选择性地刻蚀源漏电极层或源漏电极材料层上的保护膜形成露出上述源漏极电极层或源漏极电极材料层的表面上一部分的第2开口;连接工序,经由上述第1或第2开口,把导电性材料连接到栅极电极层、栅极电极材料层、上述源漏电极层或上述源漏极电极材料层.若依据上述薄膜元件的制造方法,则可成批进行绝缘膜的逸择性刻蚀,由此,能够把外部端子连接到压焊区的开口形成工序(压焊区露出工序)和把布线连接到电极上的开口的形成工序(连接孔形成工序)一起进行,削减了工序数,该制造方法在作为静电保护元仵的MOS 二极管的形成方面也可应用.另外,还能够用于压焊区近旁的交叉布线的形成。 Also, one preferred embodiment of the method of manufacturing an active matrix substrate of the present invention, on the occasion of forming a back gate TFT structure, comprising: a forming step, while forming source and drain electrode layer are formed of the same material, the insulating film protective film formation step, a protective film so as to cover the source and drain electrode layer forming source and drain electrode material layer; forming step, etching of the selected bar is present in the gate insulating layer, a gate electrode or a gate electrode material layer film, and overlapping film protective film is formed on the exposed surface of the gate electrode layer or the gate electrode material layer, a portion of the first opening, while selectively etched source and drain electrode material layer protective film electrode layer on the drain or source is formed on the exposed surface of the source or drain electrode layer source and drain electrode material layer of the second opening portion; connecting step, through the first or second openings, the conductive material is connected to the gate electrode layer, a gate electrode material layer, said source and drain electrode layer or said source and drain electrode material layer. If according to the above-described method for manufacturing a thin film device, may be carried out batch Yi selectively etching the insulating film, thereby, be able to connect to an external terminal pressure pad opening forming step (pressure pads exposing step), and the wiring is connected to the opening on the electrode forming step (connection hole forming step) were together, reducing the number of steps in the manufacturing method of an electrostatic protection element WU MOS formation in the diode can be used. In addition, can also be used to form the bonding region in the vicinity of the cross wiring. 所谓"交叉布线" 是把液晶显示装置的内部布线导出到密封材料的外側之际,为谋求由厚的层间绝缘膜造成的布线的保护,把位于上层的布线连接到下层的布线上并迂回导出到外部而使用的布线.上述"导电性材料层"最好和象素电极是同一封抖.由此,能碜在象素电极的形成工序的同时形成由导电性材料构成的布线。 The so-called "cross-wiring" is the internal wiring of the liquid crystal display device to export to the outside of the inter-seal material, to seek protection from the wiring between the thick layer of insulating film due to the upper level of the wiring is connected to the lower wiring and roundabout Export to external wiring used above, "conductive material layer" the best and the pixel electrode is the same e-shaking. Thus, while the pixel electrode can be trampled in the process of forming a wiring is formed of a conductive material. 进而,作为"导电性材料层"最好使用ITO ( Indium Tin Oxide ) 膜。 Further, as "conductive material layer" it is preferable to use ITO (Indium Tin Oxide) film. 除去ITO膜之外,也可以使用金属氧化物这样的高熔点的其它透明电材料。 Outside of the ITO film was removed, also possible to use other materials transparent electrically such a high melting point metal oxide. 还有,本发明的有源矩阵型液晶显示装置中的防止静电破坏法的优选形态之一中,把由双向二极管组成的防止静电破坏用保护装置连接在扫描线及信号线中至少一条线或与其线电气等效的部件和共用电位线之间,由此,防止包含于液晶显示装置中的有源元件的静电破坏.能够可靠地防止包含于有源矩阵基板上的有源元件(TFT )的静电破坏。 Also, active matrix liquid crystal display of the present invention to prevent electrostatic damage to one of the preferred form of apparatus in law, to the bidirectional diodes to prevent electrostatic discharge protection device is connected with the scanning lines and signal lines in at least one line or line between its electrical equivalent elements and the common potential line, thereby preventing the electrostatic breakdown included in the liquid crystal display device of the active element. can be reliably prevented on the active matrix substrate included in the active element (TFT) The electrostatic damage. 附图说明图1 -图6是示出本发明的薄膜元件的制造方法的、每个工序的元件断面图。 Brief Description of the Figure 1 - FIG. 6 is a diagram showing a method of manufacturing a thin film device of the present invention, a sectional view of each element step. 图7A -图7F用于说明图1 ~图6所示的制造加工技术的特征. 图8A -图8G是对比例的各工序的元件断面图. 图9示出本发明的TFT基板的结构例. 图IO示出图9的TFT基板的压焊区周边的结构。 Figure 7A - 7F diagram for explaining a manufacturing process technology 6 shown in Figs. 1 to FIG characterized 8A -. FIG. 8G is a component ratio of each step in FIG. 9 shows a sectional view of a configuration example of a TFT substrate of the present invention. Figure IO shown in Fig. 9 TFT substrate bonding area surrounding structures. 图IIA示出静电保护电路的结构,图IIB示出静电保护电路的等效电路图,图11C示出静电保护电路的电压-电流特性。 Figure IIA shows the structure of the electrostatic protection circuit, the equivalent circuit diagram shown in Figure IIB electrostatic protection circuit 11C shows an electrostatic protection circuit voltage - current characteristic. 图12示出静电保护电路的平面布局形状. 图13使用元件的断面结构说明图12的静电保护电路的结构. 图14用于说明静电保护电路的功能.图15示出把液晶面板的布线导出到连接压焊区情况时的结构例. 图16例示了本发明的有源矩阵基板中除去象素部分的区域的ITO 的使用部位.图17示出本发明的液晶显示装置中的象素部分的平面布局形状。 Layout shape Figure 12 shows the electrostatic protection circuit. Figure 13 sectional structure diagram using elements described electrostatic protection circuit 12. Figure 14 for explaining the function of electrostatic protection circuit. Figure 15 shows a liquid crystal panel wiring to export The active matrix substrate when bonding pads of a configuration example of the case of Figure 16 illustrates the present invention in a pixel portion of the ITO is removed using the site area. FIG. 17 shows a liquid crystal display device of the present invention in a pixel portion The layout shape. 图18是沿图17的B - B线的液晶显示装置的断面图。 18 is a B along 17 - B-line LCD display sectional view of the apparatus. 图19 -图25分别是示出本发明的有源矩阵基板的制造方法的、各工序的元件断面图.图26示出使用图25的有源矩阵基板组装的液晶显示装置的主要部分的断面结构.图27是用于说明基于元件分断装置的基板的分断工序的说明困. 图28是用于说明有源矩阵型的液晶显示装置的总体结构的概要的说明图.图29是示出有源矩阵型的液晶显示装置的象素部分的结构的电路图。 Figure 19 - Figure 25 are showing a method of manufacturing the active matrix substrate of the present invention, a sectional view of each element 26 illustrates the step of using the active matrix substrate 25 of the assembly section of the main part of a liquid crystal display device. structure. FIG. 27 is an explanatory trapped on the substrate means the breaking element breaking step. FIG. 28 is a view for explaining an active matrix type liquid crystal display apparatus of an outline of the overall configuration of FIG. 29 is a diagram showing there a circuit diagram of the pixel portion of the apparatus configuration of the active matrix type liquid crystal display. 图30示出用亍驱动图29的象素部分中的液晶的电压波形. 具体实施方式下面,参照附图说明本发明的实施形态. (第1实施形态)图1 ~图6是示出本发明的薄膜元件(背栅结构的TFT )的制造方法一例的、各工序的元件断面图, (各制造工序的内容) (工序1 )如图1所示,在玻璃基板(无碱基板)2上使用光刻技术,形成例如由1300 A左右厚度的Cr (铬)构成的栅极电极4a以及栅极电极材料层4b、 4c。 Figure 30 shows the voltage waveform of the pixel portion with the right foot of the driver 29 of the liquid crystal. DETAILED DESCRIPTION Hereinafter, with reference to the drawings described embodiments of the present invention. (First Embodiment) FIG. 1 to FIG. 6 is a diagram illustrating the present film element of the invention (back-gate structure TFT) an example of the manufacturing method, each step of the element cross-sectional view, (the contents of each of the manufacturing process) (Step 1), the glass substrate (non-alkali substrate) 1 in FIG. Use the 2 photolithographic techniques, such as Cr is formed by a thickness of about 1300 A (chrome) 4a of the gate electrodes and the gate electrode material layer 4b, 4c. 栅极电极4a是在象素部分上形成矩阵状的背栅结构的TFT的栅极电极.另外,栅极电极材料层4b成为形成后述的防止静电破坏用保护元件的区域,还有,栅极电极材料层4c成为形成与外部连接用或检查用端子的区域。 The gate electrode is the gate electrode 4a form a matrix structure of the back gate of the TFT in the pixel portion is formed. In addition, the gate electrode material layer 4b formed after becoming prevent electrostatic damage mentioned protective element region, as well as, the gate electrode material layer 4c to become a regional form and the external connection terminal or inspection. 接着,用等离子CVD法连续地生成硅氮化膜SiNx等构成的栅极绝缘膜6、未掺入杂质的本征非晶硅膜8以及n型硅膜10(欧姆接触层), 然后,用光刻法将本征非晶硅膜8以及n型硅膜(欧姆接触层)10形成小岛。 Subsequently, by plasma CVD method to generate a silicon nitride film is continuously SiNx gate insulating film 6 and so on, are not adulterated intrinsic amorphous silicon film 8, and 10 (ohmic contact layer) n-type silicon film, and then, with 10 is formed by photolithography island intrinsic amorphous silicon film 8 and n-type silicon film (ohmic contact layer). 这时,栅极绝缘膜6的厚度例如是约3000 A ,本征硅度8的厚度例如是约3000A,欧姆接触层IO的厚度例如是约500 A . 本工序中的特征在于不形成对于栅极绝缘膜的连接孔. (工序2 )接着,如图2所示,用溅射以及光刻形成例如由Cr (牵各)构成的1300A左右的源、漏电极12a、 12b。 In this case, the thickness of the gate insulating film 6, for example, about 3000 A, the thickness of the intrinsic silicon of 8, for example, from about 3000A, the thickness of the ohmic contact layer, for example, about IO 500 A. The present process is characterized in that the gate is not formed connection hole gate insulating film. (Step 2) Next, as shown in Figure 2, is formed by sputtering and photolithography for example Cr (pull each) composed of about 1300A source, drain electrode 12a, 12b. (工序3)接着,如图3所示,以源、漏电极12a、 12b为掩膜,用刻蚀法除去欧姆接触层10的中央部分,进行源、漏极的分离(分离^^蚀).这时,能够在同一刻蚀装置的同一腔内连续地进行用于源、漏板电叙的困形的刻蚀和分离刻蚀。 (Step 3) Next, as shown in FIG. 3, the source, drain electrodes 12a, 12b as a mask, removing the central portion of the ohmic contact layer 10 by etching, the source, the drain of the separation (separation ^^ erosion) At this time, it can be continuously carried out for the same source in the same cavity etching apparatus, drain board Syria sleepy-shaped etching and separation etching. 即,首先用Cl2族的刻蚀气体进行源漏极电极12a 、 12b的刻蚀, 接着把刻蚀气体换为SF6族的气体可以进行欧姆接触层10的中央部分的刻蚀.(工序4 )接着,如图4所示,例如用等离子CVD法形成保护膜14.该保护膜14例如是2000A左右的氮化硅膜(SiNx ), (工序5)接着,如图5所示,在保护膜14上形成用于连接外部端子(屏蔽线和IC的输出引线等)的开口20,同时形成连接孔16、 18.开口20和连接孔18贯通栅极绝缘膜6以及保护膜14而形成,连接孔16仅贯通保护膜14形成。 That is, the first etching with Cl2 gas Group etched source and drain electrodes 12a, 12b, and then the etching gas is changed to SF6 gas family may be etched in the central portion of the ohmic contact layer 10 (Step 4) Subsequently, as shown in FIG. 4, for example, by a plasma CVD method to form a protective film 14. The protective film 14, for example, approximately 2000A of silicon nitride film (SiNx), (Step 5) Next, as shown in FIG. 5, the protective film 14 is formed on the opening 20 for connection to an external terminal (IC shield wire and output lead, etc.), as well as contact holes 16, 18. The openings 20 and 18 through the connecting hole 6 and the gate insulating film and the protective film 14 is formed, the connection holes 16 through the protective film 14 is formed only. 形成开口20及连接孔18之际,柵极电极材料层4b、 4c分别起到刻蚀中止层(Stopper )的作用.另外,在形成连接孔16之际,源、漏电极12b起到刻蚀中止层的作用. (工序6 )接着,如图6所示,以500 A左右的厚度淀积ITO ( Indium Tin Oxide )膜,选择性地刻蚀、形成ITO构成的布线22a及电极22b, ITO 的刻蚀用HC1/HN03/H20的混合液的湿法刻蚀来进行.如上述,贯通栅极绝缘膜6及保护膜14的重迭膜形成开口20及连接孔18,从而,构成相当于2层绝缘膜厚度的深连接孔。 Forming the connection openings 20 and 18 on the occasion, a gate electrode material layer 4b, 4c respectively function as an etching stop layer (Stopper) Further, in the occasion of the connection hole 16 is formed, a source, a drain electrode 12b serve etching Role suspension layer. (Step 6) Subsequently, as shown in FIG. 6, to a thickness of about 500 A deposited ITO (Indium Tin Oxide) film is selectively etched to form the wiring electrodes 22a and 22b ITO formed, ITO etched with HC1 / HN03 / H20 of the mixture to wet etching. As mentioned above, the overlap film 6 and protective film on the gate insulating film 14 is formed through the opening 20 and the connecting hole 18, thereby constituting the equivalent of the thickness of the interlayer insulating film 2 deep connection hole. 然而,由于ITO的熔点高故与铝相比台阶复盖率好,从而即使经由深连接孔也不会造成连接不良,另外,除ITO之外,也可以f吏用金属氧化膜这样的高熔点的其它透明电极材料.例如,可使用SnOx 、 ZnOx 等金属氧化物。 However, since the ITO of high melting point as compared with the rate of the aluminum step coverage is good, so that even when connected via a deep hole will not cause poor connection. Further, in addition to ITO, may be a metal oxide film f officials such a high melting point Other transparent electrode materials, for example, may be used SnOx, ZnOx and other metal oxides. 在这样的情况下,台阶复盖率也是可实用化的。 In this case, the step coverage ratio can be also practical. 这样制造的背栅结构的TFT例如作为有源矩阵基板中象素部分的开关元件使用.还有,由ITO构成的电极22b成为用于连接外部端子(IC的输出引线等)的压焊区. (本制造方法的特征)图7A -图7F示出有关图1 -图6中记述的本实施形,各的TFT的制造工序。 Back-gate structure TFT thus produced is used as the switching element, for example, an active matrix substrate of the pixel portion. Also, electrodes made of ITO for connecting the external terminal 22b becomes (IC output lead, etc.) of the pressure pad. (feature of the method for manufacturing) Figure 7A - 7F illustrates a diagram relating to Figure 1 - FIG. 6 described in the present embodiment form, each of the TFT manufacturing process. 另一方面,图8A ~图8G示出对比例的TFT的命】造工序.该对比例是为了使有关本实施形态的TFT的制造方法的特征更明确而由本专利发明者设想出来的,不是以往的例子。 On the other hand, FIG. 8A ~ Figure 8G shows comparative life] a TFT manufacturing process. This is in order to make comparative method for manufacturing a TFT of the present embodiment is characterized in rather more clearly conceived by the present inventors of the patent, it is not Examples in the past. 对比例的图8A和图7A相同。 Same comparative 8A and 7A. 图8A -图8G中与图7A -图7F相同的部分上标注相同的参照编对比例的情况,如图8B所示,在形成漏极电极层之前,形成连接孔Kl , K2 。 Figure 8A - FIG. 8G and FIG. 7A - 7F Fig marked on the same parts of the same series of comparative reference case, as shown in Figure 8B, before forming the drain electrode layer, forming a connection hole Kl, K2. 而且,如图8C所示形成源、漏电极层12a、 12b以及相同才才料构成的源、漏电极材料12c、 12d。 Further, the formation of the source shown in Figure 8C, the drain electrode layer 12a, 12b and the source material was the same as before constructed, the drain electrode material 12c, 12d. 接着,如图8D所示形成ITO膜30。 Next, an ITO film 30 is formed as shown in Fig. 8D. 接着,如图8E所示进行欧姆层10的中央部分的刻蚀(分离刻蚀)。 Subsequently, as shown in the central portion of the etching performed 8E (separation etching) the ohmic layer 10 in FIG. 接着,如图8F所示形成保护膜40。 Subsequently, the protective film 40 is formed as shown in FIG. 8F. 最后,如图8G所示,形成开口K3.由此,源、漏电极材料层12d 的表面露出,形成用于连接外部连接端子的电极(压焊区)。 Finally, as shown in FIG. 8G, an opening is formed K3. Accordingly, the source, the surface of the drain electrode material layer 12d is exposed, to form an electrode (pressure pad) for connecting the external connection terminals. 若依据这样的对比例的制造方法,则在图8B中的连接孑L形成工序的基础上再加上图8G中的形成开口部分K3的工序,合计需要2次开口部分的形成工序.与此相反,本实施形态的制造方法中,如图7E所示, 一并形成开口16、 18、 20.即,在贯通保护膜14及栅极绝缘膜6的重迭膜形成开口的同时,也对源、漏电极层12b上的保护膜14刻蚀图形,由此,1 次开口形成工序即可.从而,能够削减l道曝光工序,与此相伴随,也将不需要光致抗蚀剂膜的淀积工序及其刻蚀工序.从而,合^f缩短3道工序,即,简化了制造加工。 If such a production method based on the ratio, the connection in Fig. 8B larvae L form together with the process on the basis of FIG. 8G opening portion forming step K3, requires twice the total opening portion forming step. And this In contrast, the manufacturing method of the present form of embodiment, shown in Figure 7E, collectively form an opening 16, 18, 20. That is, in the overlapping film through the protection film 14 and the gate insulating film 6 is formed at the same time opening, also source, the protective film 14 etched pattern on the drain electrode layer 12b, whereby a second opening forming step can Thus, the exposure step can be reduced road l, along with this, it will not need the photoresist film deposition process and an etching process. Thus, the co ^ f shortened three steps, namely, simplifying the manufacturing process. 还有,本实施形态的制造方法中,在同一腔内可以连续地进行图7B 所示的源、漏极电极层12a、 12b的图形刻蚀(干法刻蚀)和图7C所示的欧姆接触层10的中央部分的刻蚀(干法刻蚀)。 Also, the manufacturing method of the present embodiment aspect, the ohmic source and drain electrode layers in the same chamber may be continuously performed as shown in FIG. 7B 12a, 12b of the patterning (dry etching) and FIG. 7C etched central portion 10 of the contact layer (dry etching). 即,通过在同一腔内依次更换刻蚀气体,能够连续地刻蚀.与此相反,对比例的情况下,在图8c的源、漏极电极层12a、 12b 的图形刻蚀(干法刻蚀)后,进行图8D的ITD膜30的湿法刻蚀,接着,进行图8E的欧姆层10中央部分的刻蚀(干法刻蚀).由亍ITO 膜不能用干法刻蚀加工,仅可进行湿法刻蚀加工,故不能够在一个腔内连续地进行图8C、图8D、图8E的各刻蚀工序.由此,在各工序都要进行基板的手工搡作,作业麻烦,还有,本实施形态的情况下,保护膜14必须存在亍ITO膜22a、 22b和源、漏电极12a、 12b之间。 That is, the same chamber successively by replacement etching gas can be continuously etched. In contrast, the proportion of under case 8c in a graphics source, the drain electrode layer etching 12a, 12b are engraved (dry etching), the wet etching ITD Figure 8D film 30, and then, by etching the ohmic layer 10 of the central portion of FIG. 8E (dry etching) by the right foot of the ITO film can not be processed by dry etching, only wet etching process, it can not be continuously carried out in a chamber in FIG 8C, FIG. 8D, FIG. 8E each etching process. Thus, in each step should be carried out by hand as the substrate shoving, troublesome operations , as well as, in the case of the present embodiment, the protective film 14 must exist right foot ITO film 22a, 22b and the source, drain electrode 12a, between 12b. 这意味着在基板上的其它区域(未图示)可靠地把ITO膜构成的布线与用源、漏极电极同一材料构成的布线及电极电隔离。 This means (not shown) of the wiring is reliably formed with an ITO film with a source electrode and a drain electrode electric wiring formed of the same material isolated in other regions on the substrate. 然而,对比例的情况下,ITO膜30和源、漏极电极10a、 10b属于同一层。 However, under the circumstances ratio, ITO film 30 and the source, drain electrodes 10a, 10b belong to the same layer. 即,两者被重叠,在两者之间不存在保护膜.由此,在基板上其它区域(未图示),若异物存在,则尽管原本必须绝缘,但ITO膜构成的布线与用源、漏极电极同一材料构成的布线及电极有短路的危险.即,用本实施形态的制造方法形成的元件可靠性高-还有,由于对比例中在比较早的阶段形成ITO膜30 (图8D ), 故在其后的工序中,存在由作为ITO的成分的铟(In )和锡(Sn )等引起的污染的可能性。 That is, both are overlapped, the protective film does not exist between the two. Accordingly, in other regions (not shown) on the substrate, if foreign matter is present, even though the original must be insulated, but the ITO film formed with a source wiring , the drain electrode and the electrode wiring formed of the same material, i.e., the short-circuit danger, element manufacturing method of this embodiment is formed of a high reliability -. Also, since the proportion of relatively early stage in the formation of the ITO film 30 (FIG. 8D), so in the subsequent step, there is the possibility of contamination from the components as ITO indium (In) and tin (Sn) caused by. 与此相对,本实施形态的制造方法中,由于ITO膜22a、 22b在最后的工序中形成,故由ITO成分的锡(Sn )等引起的污染的可能性少。 On the other hand, the manufacturing method of the present embodiment, since the ITO films 22a, 22b are formed in the final step, it is less likely level component tin ITO (Sn) caused by contamination. 这样,若依据本实施形态的制造方法,则能够缩短制造工序,而且能够制造可靠性高的元件。 Thus, if the manufacturing method according to the present embodiment, it is possible to shorten the manufacturing process, and highly reliable device can be manufactured. (第2实施形态)下面,参照图9 ~图18说明本发明的第2实施形态。 (Second Embodiment) Referring to FIG. 9 to 18 illustrate a second embodiment of the present invention. 图9示出有关本发明第2实施形态的有源矩阵基板的平面布局。 Figure 9 shows a planar layout relating to the second embodiment of the present invention, an active matrix substrate. 图9的有源矩阵基板是在液晶显示装置中使用的.作为象素部分的开关元件及防止静电破坏用保护元件,使用由第1实施形态中说明过的制造方法制造的TFT。 The active matrix substrate of FIG. 9 is a display device using the liquid crystal as a switching element of the pixel portion and a protective device against electrostatic damage, for use by the first embodiment through the manufacturing method of the TFT. 象素部分4000 (图中,用虛线围起来的部分)由多个象素120构成,各象素构成为包含TFT (开关元件)3000. TFT3000 i殳在扫描线52和信号线54的交叉点上.信号线54 、扫描线52的各端部分别i殳有压焊区160A 、 160B ,这些压焊区和LC - COM线180之间连接第1保护元件140A 、 140B ,上迷压焊区和保护环100之间形成第2保护元件150A、 150B.另外,LC - COM线180还经由银点压焊区连接对向电极."压焊区160A、 160B "是用于连接键合引线和凸点电极(bump电极)或使用了聚酰亚胺带的电极等(外部端子)的电极.还有,"LC - COM线180"是给出作为液晶驱动基准的电位的线,公共电位LC - COM例如象图30所示的那样,设定在只比显示信号电压Vx的中点电位Vs低AV的电位处.即,如图29例示的那样,在象素部分的TFT3000中存在栅、源间电容Ccs,受其影响在显示信号电压Vx和最终的保持电压Vs之间产生电位差AV .为补偿该电位差AV ,把比显示信号电压Vx的中点电位Vb低AV的电位取为共同的基准电位,另外,图29中,X是信号线,Y是扫描线,Clc表示液晶的等效电容,Cad表示保持电容.还有,图30中,Vx是供给到信号线X上的显示信号的电压,VY是供给到扫描线Y上的扫描信号的电压。 Pixel portion 4000 (Fig, enclosed by a dotted line portion) 120 constituted by a plurality of pixels, each pixel configured to include TFT (switching element) 3000. TFT3000 i Shu scanning lines 52 and signal lines 54 intersect The point on the signal line 54, the scanning line 52 of each end portions Shu i have bonding pads 160A, 160B, the bonding pads and LC - connecting the first protection element 140A, 140B between 180 COM line, the fan pressure welding and guard ring forming region between 100 and second protective element 150A, 150B Furthermore, LC -. COM line 180 is also connected to the electrode pad via a silver point pressure "pressure pad 160A, 160B" is used to connect the bonding wire. and a bump electrode (bump electrode) or polyimide tape electrode and the like (external terminal) electrode as well,. "LC - COM line 180" is given as the liquid crystal driving reference potential line, the common potential LC - COM such as for example as shown in FIG. 30, set in just over a display signal voltage Vx midpoint potential Vs at low potential AV That is, as shown in FIG. 29 cases, there is a gate in TFT3000 pixel portion. , inter-source capacitance Ccs, affected the potential difference AV between the display signal voltage Vx and the final sustain voltage Vs. To compensate for this potential difference AV, the midpoint potential than the potential of the display signal voltage Vx Vb is taken low AV common reference potential, addition, FIG. 29, X is a signal line, Y is a scanning line, Clc represents the equivalent capacitance of the liquid crystal, Cad represents storage capacitor. Also, FIG. 30, Vx is supplied to the signal line X voltage display signal, VY is the voltage supplied to the scanning line Y scanning signal. 还有,"保护环100 "是设在压焊区160A 、 160B外側的线,作为液晶显示装置制造阶段中的静电措施。 Also, "the guard ring 100" is located in 160A, 160B outside wire bonding area, as the liquid crystal device manufacturing stage display static measures. LC - COM线180及保护环IOO都是共同电位线,从而,通过压焊区和这些线之间连接保护二极管能够使静电沿这些线释放。 LC - COM lines 180 and guard ring IOO is common potential line, which passes between the pressure pad and the cable enables the electrostatic discharge protection diode along these lines. 还有,保护环100如图27所示,在使TFT基板1300与对向基^l(彩色滤波器基板)对粘后,在驱动用IC连接之前沿划线(SB )切断,而LC - COM线180是留在最终制品中的线。 Also, guard ring 100 shown in Figure 27, when the TFT substrate 1300 and the opposing group ^ l (color filter substrate) after stick, driving off in connection with the cutting-edge IC crossed the (SB), and LC - COM line 180 is a line left in the final Products. 从而,在基板切断后到IC 连接之前,能够用第1保护元件140保护象素部分的TFT免遭静电破坏,从而,制品的可靠性提高。 Thus, after the substrate is cut before connecting to the IC can be used to protect the first TFT element of the pixel section 140 to protect against damage from static electricity, thereby improving the reliability of products. 还有,由于在最终制品中还留有保护二极管,故实际使用制品时的静电破坏强度也提高。 Also, since in the final product has left the protective diode, so the actual strength of the electrostatic damage when using products also increased. 进而,由于使用了TFT的保护二极管故容易控制阈值电压(Vth ),还能够减少泄放电流。 Furthermore, since the protective diode TFT so easy to control the threshold voltage (Vth), but also can reduce the leakage current. 因此,即使在最终制品中留有二极管也不会有不良影响.图11A -图11C示出保护元件的具体结构例.即,如图IIA所示,保护元件构成为把连接第1TFT ( Fl )的栅、 漏极构成的MOS二极管和连接第2TFT ( F2 )的柵'漏极构成的MOS 二极管相互反向并连。 Therefore, even in the final product leaving the diode will not have an adverse effect Figure 11A -. FIG. 11C shows a specific configuration example of the protective element, i.e., as shown in FIG IIA, the protective element is configured to connect the first 1TFT (Fl). The gate, drain MOS diode configuration and connects the first 2TFT (F2) gate 'drain MOS diode formed opposite to each other and connected. 其等故电路为图11B所示.从而,如图11C所示那样,该保护元件在电流、电压特'逸中沿双向具有非线性.各二极管在加入低电压时成为高阻抗,加入高电压时成为低阻抗状态.另外,由于各二极管实质上是晶体管,流过电流的能力大, 能够高速地吸收静电,因此保护能力高.图10中示出图9的压焊区160A、 160B周围鲁电保护元件的具体配置例。 Thereof, etc. Therefore, the circuit of FIG. 11B. Accordingly, as shown in FIG. 11C, the protective element along the current, voltage Laid 'Yi bidirectional nonlinearity. Each diode is added at a low voltage becomes high impedance, high voltage added When a low impedance state. In addition, since the diodes is substantially a transistor, the current flowing through the large capacity, a high speed electrostatic absorption, therefore a high protective capability. FIG. 10 shows a pressure pad of Fig. 9 160A, 160B around Lu electrical protection device specific configuration examples. 第l保护元件140A由连接了柵、漏极间的薄膜晶体管M60及M62 构成,同样,第1保护元件140B由薄膜晶体管M40及M42形成。 L-protection element 140A by the connection of the gate, a thin film transistor M60 and M62 constitute a drain between the same, the first protective element 140B is formed by a thin film transistor M40 and M42. 第2保护元件1S0A、 150B也一样,由薄膜晶体管M80、 M82及M20、 M22构成.这些保护元件起到这样的作用,即在被加入正或负的过大浪涌电压时导通,高速地将该浪涌电压沿LC - COM线180或保护环100幹放。 A second protective element 1S0A, 150B, too, by a thin film transistor M80, M82 and M20, M22 constitute These protection elements play such a role, that is, when it is added to the positive or negative excessive surge voltage is turned on, high speed The surge along the LC - COM line 180 or the protection ring 100 dry place. 另外,配置在压焊区外側的第2保护元件150除去静电保护功能外,还具有这样功能,即防止用保护环100短路各压焊区160而使得在阵列工序中不能进行最终检查。 In addition, pressure pads disposed on the outside of the second protective element 150 to remove electrostatic protection, but also has this function, which is to prevent a short circuit with a protective ring 100 each bonding pad 160 and the array so that the process can not be a final inspection. 用图14说明该功能'考虑如图14所示那样,在压焊区160A1上连接阵列试验器(具有放大器220 )的探头,对象素部分的TFT ( Ma )进行试验的情况。 Figure 14 illustrates the use of the function 'consideration, as shown in Figure 14, the array is connected on the pressure in the test pad 160A1 (having the amplifier 220) of the probe, part of the pixel TFT (Ma) of the test is conducted. 这时,第2保护元件150Al及第2保护元件150A2维持高阻状态. 从而,象素部分的TFT ( Ma ) TFT ( Mb )电隔离。 In this case, the second protective element 150Al second protective element 150A2 maintain high impedance state. Thus, TFT pixel portion (Ma) TFT (Mb) electrically isolated. 由此,可防止和其它晶体管的交调失真,能够仅对于所希望的TFT ( Ma )进行试验。 Accordingly, intermodulation distortion can be prevented, and other transistors, can be only for a desired TFT (Ma) were tested. 还有,如图27所示,若完成了TFT基板1300的制造,则在定向膜的涂數、研磨工序、密封材料(衬垫)涂敷工序、基板的对粘工序、 分断工序、液晶注入及封装工序等各工序结束之后并在连接驱动用IC 之前,沿划线(SB )切断除去保护环IOO.然而,由于存在着连接LC - COM线180和压焊区160之间的第1保护元件140,因而,即使在连接驱动用的IC之前,也形成静电保护。 Also, as shown, when the completion of the manufacture of the TFT substrate 1300, the number of the alignment film coating, polishing step, the sealing material (gasket) coating process, the substrate for adhesion step, the breaking step, the liquid crystal injection 27 and after the end of each step and before connecting the driving IC, along the dash (SB) cut and removed protection ring IOO packaging process, however, because there are connections LC -. COM wire bonding zone between 180 and 160 of the first protective element 140, and therefore, even before connecting the drive with the IC, also form an electrostatic protection. 还有,最终制品中也留有第1保护元件,但由于使用了TFT的保护元件进行了正确的阈值控制,因而不必担心由于泄放电流等降低制品的可靠性。 Also, the final product has left the first protective element, but the use of a protective element TFT were correct threshold control, so do not worry because the discharge current, reduce the reliability of the products. 接着,用图12及图13说明图11所示的第1及第2晶体管(Fl 、 F2 )的元件的结构.本实施形态中,如图12所示,把由作为象素电极材料ITO构成的膜(ITO膜)300、 320、 330用作为栅极,漏极连接用布线.图13中示出对应于图12的平面布局中的各部分(A ) — ( F )的断面结构.如图示那样,构成静电保护元件的第1薄膜晶体管Fl反第2薄膜晶体管F2都具有反交错结构(背栅结构)即,在玻靖3基板400上形成栅极电极层410 、 420、 430、 440, 在其上面形成栅极绝缘膜450,形成本征非晶硅层470、 472,介以n 型欧姆层480形成漏极电极(源极电极)层490,形成保护膜460以便复盖这些层,而且,用由作为象素电极材料的ITO构成的膜(ITO膜) 300、 320、 330进行栅、漏极间的连接。 Next, FIG. 12 and FIG. 13 illustrates the structure of the first and second transistors (Fl, F2) as shown in Fig. 11 element. In this embodiment, as shown in FIG. 12, the electrode material made of ITO as the pixel . The film (ITO film) 300, 320, 330 is used as a gate, a drain connected with the wiring pattern 13 shown in FIG. 12 corresponding to the layout of the various parts of (A) - (F) as the sectional structure. As illustrated, the first thin film transistor Fl constitute anti-electrostatic protection element F2 second thin film transistor having an inverted staggered structure (back-gate structure) that is, the gate electrode layer is formed on the glass substrate 400 Jing 3 410, 420, 430, 440, the gate insulating film 450 thereon is formed, forming an intrinsic amorphous silicon layer 470, 472, via an n-type ohmic layer 480 forming a drain electrode (source electrode) layer 490, a protective film 460 is formed so as to cover the layer, and, with a film made of ITO as the pixel electrode material formed (ITO film) 300, 320, 330 connect the gate, a drain between. ITO膜300、 320、 330经由贯通栅极电极层上的栅极绝缘膜450 以及保护膜460的2层膜的连接孔和贯通漏极电极层490上的保护膜460的连接孔,连接栅极电极层和漏极电极层.这种情况下,由于ITO是高熔点,与铝等相比台阶复盖率特性优良,因此,即使经由贯通2层膜的深连接孔也可确保良好的连接.还有,如在第.1实施形态中说明的那样,对于栅极、漏极的连接孔在用于连接外部连接端子的开口的形成(压焊区露出)工序中同时形成,故能够缩短工序数。 ITO films 300, 320, 330 via the gate insulating film layer on the gate electrode through the connection hole 450 and the connection hole 460 of the two-layer protective film and the protective film on the film 490 through the drain electrode layer 460, a gate connected to an electrode layer and a drain electrode layer. In this case, since the melting point ITO is excellent as compared with the aluminum step coverage rate characteristics, and therefore, even if the two-layer film via a through-hole may be deep connections ensure a good connection. Also, as in the first embodiment .1 described above, for the gate, drain connection hole is formed in the opening for the connection of external connection terminals (bond pads exposed) simultaneously forming step, it is possible to shorten the step number. 以上,说明以ITO膜作为布线使用,形成保护二极管的例子。 Above description to an ITO film as a wiring used to form a protective diode example. 但ITO膜作为布线的利用并不限于该例,还能够例如在图15所示形态中加以利用,即,图15中,ITO膜342被用于形成压焊区160近旁中的交叉布线342 .所谓"交叉布线"是在把液晶显示装置的内部布线导出到密封材料520的外側之际,为谋求由厚的层间绝缘膜进行的布线保护,把位于上即,ITO膜342连接漏极电极层490和与栅极电极相同材料构成的层(栅极电极材料层)412。 However, use of ITO film as the wiring is not limited to this embodiment, for example, it can also be used in the form shown in Figure 15, i.e., FIG. 15, ITO film 342 is used for bonding region 160 in the vicinity of the cross wiring 342 is formed. The so-called "cross-wiring" is the internal wiring in the liquid crystal display device to export to the outside of the sealing material 520 of the occasion, in order to seek protection from the thick wiring interlayer insulating film, and the ie, ITO film 342 connected to the drain electrode located on layer 490 and the gate electrode layer composed of the same material (gate electrode material layer) 412. 由此,栅极电极材料层412的导出外部的部分由栅极绝缘膜450及保护膜460的二者保护,提高了可靠性。 Thus, the portion of the gate to the outside of the electrode material layer 412 is protected both by the gate insulating film 450 and protective film 460, to improve the reliability. 另外,图15中,参照编号500和502示出定向膜,500表示密封材料,540表示对向电极,562表示玻璃基板,1400表示液晶.还有, 压焊区160上连接有例如键合引线600.有时也连接使用了凸点电极和聚统亚胺片的电极层,代替该键合引线,ITO膜能够在其它各种位置作为布线使用,为了易于了解而例示ITO膜能够作为布线使用的位置,则如图16所示.图16中用粗实线示出了ITO膜。 Further, FIG. 15, reference numerals 500 and 502 illustrated orientation film, 500 denotes a sealing material, 540 represents a counter electrode, 562 denotes a glass substrate, 1400 represents a liquid crystal. Further, the pressure pad is connected to a bonding wire 160 e.g. 600. Sometimes also connect using the bump electrode and polyethylene imine sheet electrode layer system, in place of the bonding wire, ITO film can be used as wiring in a variety of other locations, for ease of understanding illustrates ITO film can be used as a wiring position, shown in Figure 16. Figure 16 by the thick solid line shows the ITO film. 位置Al - A3中的ITO膜作为用于形成保护元件的布线使用,位16置A4中作为用于连接扫描线52和压焊区160B的布线使用,位置A5 中作为图15所示的交叉布线使用。 Location Al - A3 in the ITO film as a protective element for forming the wiring, the bit 16 is set as A4 scanning line for connecting the bonding pads 52 and the wiring 160B of use, A5 position as shown in FIG. 15 cross wiring use. 还有,位置A6中,作为用于连接水平方向的LC - COM线和垂直方向的LC - COM线的布线使用。 Also, the position A6 in a horizontal direction for connecting the LC - COM line and the vertical LC - COM wiring line use. 即,由于水平方向的LC - COM 线由栅极材料形成,垂直方向的LC - COM线用源极材料形成,故需要用ITO连接两者。 That is, since the LC horizontal - COM line is formed by the gate material, LC vertical - COM line with the source material, it needs to connect with both ITO. 另外,图16的位置A6中,银点压焊区110能够和水平方向的LC - COM线或者垂直方向的LC - COM线中任一条线在同一工序中形成为一体,在这样形成的情况下,可以经由ITO把不和银点压焊区110 形成为一体的LC - COM线(水平、垂直的任一条)与银点压焊区110 连接.下面,用图17、图18说明象素部分中各象素的结构。 In addition, FIG position A6 16, the silver point pressure pad 110 can and horizontal LC - COM lines or vertical LC - COM lines in any one line is formed in the same process as a whole, in the case of this form of can not and silver via ITO to point pressure pad 110 is formed as one of the LC -. COM lines (horizontal, vertical of any one) with a silver point pressure pad 110 is connected below with reference to FIG. 17, Figure 18 illustrates the pixel section each pixel structure. 图17示出象素部分的平面布局。 Figure 17 shows a planar layout of the pixel portion. 配置着连接到扫描线52及信号线54上的、起到开关元件作用的TFT (构成为含有栅极电极720、漏极电极740、未掺入杂质的本征非晶硅层475 ),漏极电极740上连接着象素电极(ITO ) 340 .图中, K2是连接孔,Cad表示保持电容.保持电容Cad由邻接的栅极布线和被延长的象素电极的重迭构成.图18示出图17中沿B - B经的断面结构。 Arranged connected to the scanning line 52 and signal line 54, to play the role of a switching element of TFT (the gate electrode 720 is configured to contain, a drain electrode 740, the impurity unincorporated intrinsic amorphous silicon layer 475), a drain connected to the electrode 740 with the pixel electrode (ITO) 340. FIG, K2 connecting hole, Cad represents retention capacitor. Cad by the retention capacitor wirings overlap the gate electrode and the adjacent pixel electrode is extended configuration. FIG. 18 Figure 17 shows along the B - B cross section through the structure. 成为和图15中说明过的结构同样的断面结构. (第3实施形态)用图19 -图26说明有关上述第2实施形态的TFT基板的制造方法。 And FIG. 15 become the described structure the same cross-sectional configuration (third embodiment) Fig. 19 - FIG. 26 illustrates the manufacturing method of the above second embodiment of the TFT substrate. 各图中,左側是形成象素部分的开关晶体管的区域,中央部分是形成保护元件的区域,右側是连接外部连接端子的区域(压焊区).(1 )如图19所示,首先,用光刻技术在玻璃基板(无碱基板) 400上形成例如由1800A左右的厚度Cr(铬)构成的电极720、 722、 ,、902 、 904 .Cr的淀积用磁控管栽射装置在50mTorr的减压下进行。 In each figure, the left region of the switching transistor pixel portion is formed, the central portion of the region forming the protective element, the right side is connected to the external terminal region (pressure pad) connected to (1) shown in FIG. 19, first, such as an electrode by the thickness of about 1800A Cr (chromium) formed by photolithography techniques to form 720, 722 on a glass substrate 400 (non-alkali substrate), deposited by magnetron planted ,, reflecting means 902, 904 .Cr of carried out under reduced pressure 50mTorr. 还有,Cr的加工由使用了Cl2族气体的干法刻蚀法进行.参照编号720 、卯0是构成TFT的栅极电极的层(栅极电极层), 参照编号722是相当于图17所示的扫描线52的层.还有,参照编号902、 904是由和栅极电极层相同材料构成的层(栅极电极材料层).(2 )接着,如图20所示,用等离子CVD法,连续地生成由氮化硅膜SiNx等构成的栅极绝缘膜910 、未掺入杂质的本征非晶硅膜以及n 型硅膜(欧姆层),接着,依挺使用了SF6族的刻蚀气体,把本征非晶硅膜及n型硅膜(欧姆层)刻蚀图形.由此,形成島状的本征非晶硅层475、 920以及n型硅yg(欧姆层) 477 、 922 。 Also, Cr processing performed by the use of a family of Cl2 gas dry etching method. Reference numeral 720, d 0 is the gate electrode of the TFT constituting the layer (gate electrode layer), reference numeral 722 in FIG. 17 is equivalent to scan line layer 52 shown in. Also, the reference numeral 902, 904 and the gate electrode layer is composed of the same material layer (gate electrode material layer). (2) Next, as shown in FIG. 20, plasma CVD method, the gate insulating film continuously formed film 910 made of silicon nitride SiNx or the like, the impurity of the intrinsic amorphous silicon film and the n-type silicon film (ohmic layer) is not incorporated, and then, depending on the use of SF6 quite family etching gas, an intrinsic amorphous silicon film and the n-type silicon film (ohmic layer) etched pattern. Thus, the formation of the island-like intrinsic amorphous silicon layer 475, 920 and the n-type silicon yg (ohmic layer) 477, 922. 栅极绝缘膜910的厚度例如是4000 A左右,本征硅层475 、 920 的厚度例如是3000 A左右,欧姆层477、 922的厚度例如是500 A左右,该工序中的特征在于不形成对于栅极绝缘膜的连接孔.从而.,不再需要光致抗蚀剂膜的涂敷工序、曝光工序、刻蚀除去工序这3道工序, 谋求得到工序数的缩短。 Thickness of the gate insulating film 910, for example, about 4000 A, the thickness of the intrinsic silicon layer 475, 920 is about 3000 A for example, the thickness of the ohmic layer 477, 922, for example, is about 500 A, wherein the step of forming the non- connection hole gate insulating film thus., no longer need to photoresist film coating step, exposure step, an etching step of removing these three steps, shortening seek to obtain the number of steps. (3 )接着,如图21所示,用溅射法及光刻法形成例如由Cr (铬) 构成的1500义左右的源、漏电极层740a、 740b 、 930a 、 930b 。 (3) Next, as shown in Figure 21, is formed by sputtering and photolithography 1500 defined by a source such as Cr (chromium) formed around the drain electrode layers 740a, 740b, 930a, 930b. (4 )接着,以源、漏电极层740a、 740b、 930b 、 930b为掩膜, 用刻蚀法除去欧姆层477、 922的中央部分,进行源极和漏极的分离。 (4) Then, the source, the drain electrode layer 740a, 740b, 930b, 930b as a mask, removing the central portion of the ohmic layer 477, 922 by etching, the separation of the source and drain. 在同一干法刻蚀装置的腔内连续地进行图21所示的源、漏电极层的图形化和图22所示的源、漏极的分离刻蚀,即,首先,用CL族的刻蚀气体进4亍源、漏极电极层740a、 740b、 930a 、 930b的加工,然后把刻蚀气体换为SFs族的气体,进行欧姆层477 、 922的中央部分的刻蚀。 Continuously source in the cavity shown in FIG. 21 the same dry etching apparatus, the source, drain separation etching 22 a drain electrode layer and patterned, that is, first of all, with the CL family moment etching gas into 4 right foot sources, 740a, 740b, 930a, 930b of the processing drain electrode layer, and then etching gas is converted into a gas SFs family, were 477, 922 of the central portion of etching the ohmic layer. 这样,由于连续地使用干法刻蚀,简化了制造作业.(5 )接着,如图23所示,用等离子CVD法形成保护膜940。 Thus, due to the continuous use of dry etching, simplifies the manufacturing operation. (5) Next, as shown in Figure 23, the plasma CVD method using a protective film 940 is formed. 该保护膜例如是2000 A左右的氮化硅膜SiNx .(6 )接着,如图24所示,用SF6族的刻蚀气体选择性地刻蚀保护膜940„即,在形成压焊区的开口160的同时,形成连接孔CP1及连接孔K8、 KIO。开口160及连接孔CP1是贯通栅极绝缘膜910及保护膜940的重迭膜而形成的开口,连接孔K8、 K10是仅贯通保护膜940的开口.这种情况下,栅极电极材料层902 、 904在选择孔CP1、开口160 的形成之际分别起到刻蚀中止层的作用,源、源极电极740a、 930b分别起引连接孔K8 、 KIO形成之际的刻蚀中止层的作用.(7 )接着,如图25所示,用磁控管溅射装置以500 A左右的厚度淀积ITO ( Indium Tin Oxide )膜,用HCI/HN03/H20的混合液刻蚀,加工成预定的图形.由此完成有源矩阵基板.图25中,参照编号950是由ITO构成的象素电极,参照编号952是构成保护二极管一部分的ITO构成的布线,参照编号954是用于连接外部端子的由ITO构成的电极(压焊区)。由于把台阶复盖率好的ITO作为布线使用,故确保良好的电连接. 作为象素电极材料,也可以使用金属氧化物这样高熔点的其它透明电极材料.例如,可以使用SnOx、 ZnOx等金属氧化物.还有,如从图25所知,在ITO层950 、 952和源、漏极电极740a 、 740b 、 930a 、 930b之间必须介以保护膜940 。这意味着在基板上的布线区域(未图示)中可靠地'电分离由ITO构成的布线层和源、漏极电极材料层.从而,不必担心因异物引起两者的短路.还有,本制造方法中由于在最后的工序(图25 )中形成ITO膜, 故不必担心由作为ITO成分的锡(Sn )、铟(In )引起的污染.这样,若依据本实施形态的制造方法,则能够缩短有源矩阵基板的制造工序,而且能够安装对于防止静电实施了足够的措施的可靠性高的薄膜电路。另外,图25中,直接把ITO膜952、 954连接到栅极电极层902 及栅极电极材料层904上,但也能够经由钼(Mo )、钽(Ta )、钛(Ti )等緩冲层连接两者。下面,说明使用完成了的有源矩阵基板组装液晶显示装置的工序.如图28所示,把对向基板1500和TFT基板1300祐在一起,在图27所示那样的单元分断工序后,进行液晶的封入,然后,连接驱动用IC,进而如图28所示那样,经过使用偏光板1200、 1600以及背景光源1000的组装工序,完成有源矩阵型液晶显示装置,图26中示出有源矩阵型液晶显示装置主要部分的断面图„图26 中,在与图15、图18等前面示出的附图相同的位置处标注相同的参照编号。 The protective film such as a silicon nitride film SiNx 2000 A is about. (6) Next, as shown in FIG etching with SF6 gas family protective film 24 is selectively etched 940 "That is, in the bonding region formed while opening 160, contact holes CP1 and connecting hole K8, KIO. openings opening 160 and the connecting hole CP1 is overlap film 910 and the protective film 940 is formed through a gate insulating film, the connection hole K8, K10 is only through opening the protective film 940. In this case, the gate electrode material layer 902, 904 acts as an etching stop layer, respectively, in the selection hole CP1, an opening 160 is formed on the occasion, the source, the source electrode 740a, 930b, respectively, from lead connection holes K8, effects on the occasion of the etching stop layer is formed of KIO. (7) Next, as shown in FIG. 25, with the magnetron sputtering apparatus to a thickness of about 500 A deposited ITO (Indium Tin Oxide) film , etched with a mixture of HCI / HN03 / H20, and processed into a predetermined pattern. The active matrix substrate is thus completed. FIG. 25, reference number 950 is a pixel electrode made of ITO, reference numeral 952 is a configuration protection diode一部分的ITO构成的布线,参照编号954是用于连接外部端子的由ITO构成的电极(压焊区)。由于把台阶复盖率好的ITO作为布线使用,故确保良好的电连接. 作为象素电极材料,也可以使用金属氧化物这样高熔点的其它透明电极材料.例如,可以使用SnOx、 ZnOx等金属氧化物.还有,如从图25所知,在ITO层950 、 952和源、漏极电极740a 、 740b 、 930a 、 930b之间必须介以保护膜940 。这意味着在基板上的布线区域(未图示)中可靠地'电分离由ITO构成的布线层和源、漏极电极材料层.从而,不必担心因异物引起两者的短路.还有,本制造方法中由于在最后的工序(图25 )中形成ITO膜, 故不必担心由作为ITO成分的锡(Sn )、铟(In )引起的污染.这样,若依据本实施形态的制造方法,则能够缩短有源矩阵基板的制造工序,而且能够安装对于防止静电实施了足够的措施的可靠性高的薄膜电路。另外,图25中,直接把ITO膜952、 954连接到栅极电极层902 及栅极电极材料层904上,但也能够经由钼(Mo )、钽(Ta )、钛(Ti )等緩冲层连接两者。下面,说明使用完成了的有源矩阵基板组装液晶显示装置的工序.如图28所示,把对向基板1500和TFT基板1300祐在一起,在图27所示那样的单元分断工序后,进行液晶的封入,然后,连接驱动用IC,进而如图28所示那样,经过使用偏光板1200、 1600以及背景光源1000的组装工序,完成有源矩阵型液晶显示装置,图26中示出有源矩阵型液晶显示装置主要部分的断面图„图26 中,在与图15、图18等前面示出的附图相同的位置处标注相同的参照编号。图26中,左側是有源矩阵部分,中央是保护元件(静电保护二极管)形成区域,右側是压焊区部分。在压焊区部分,在由ITO构成的电极(压焊区)954上经各向异性导电膜500连接液晶的驱动用LC5500的输出引线5200.参照编号5100 是导电粒子,参照编号5300是胶片带,参照编号5400是密封用的树脂, 图26中,作为驱动用IC的连接方法采用使用带载的方式(TAB ),而也可以采取其它方式,例如COG ( Chip On Glass )方式。本发明不限于上述实施形态,也可以变形使用了利用正交错结构的TFT的场合.还有,作为象素电极材料,也可以使用ITO之外的金属氧化物这样高熔点的其它透明电极材料.例如,可以使用SnOx、 ZnOx 等金属氧化物。这种情况下,台阶复盖率也可达到实用化。若把本实施例的液晶显示装置作为个人计算机等机器中的显示装置使用,则制品的价值将会提高.

Patent Citations
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Classifications
International ClassificationH01L27/02, G02F1/1362, H01L21/00, H01L29/786, G02F1/136, G02F1/1345
Cooperative ClassificationH01L2924/13091, G02F2202/103, H01L27/0266, H01L27/0255, G02F1/136204, H01L2224/48463
European ClassificationG02F1/1362A, H01L27/02B4F2, H01L27/02B4F6
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