CN100412934C - Active matrix display devices - Google Patents

Active matrix display devices Download PDF

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Publication number
CN100412934C
CN100412934C CNB2004800027259A CN200480002725A CN100412934C CN 100412934 C CN100412934 C CN 100412934C CN B2004800027259 A CNB2004800027259 A CN B2004800027259A CN 200480002725 A CN200480002725 A CN 200480002725A CN 100412934 C CN100412934 C CN 100412934C
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pixel
driving transistors
transistor
electric capacity
grid
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CN1742309A (en
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J·R·赫克托尔
M·J·蔡尔兹
D·A·费什
M·T·约翰逊
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Koninklijke Philips NV
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Koninklijke Philips Electronics NV
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Abstract

An active matrix display device uses an amorphous silicon drive transistor for driving a current through an LED display element. First and second capacitors are connected in series between the gate and source of the drive transistor, with a data input to the pixel provided to the junction between the first and second capacitors. The second capacitor is charged to a pixel data voltage, and a drive transistor threshold voltage is stored on the first capacitor. This pixel arrangement enables a threshold voltage to be stored on the first capacitor, and this can be done each time the pixel is addressed, thereby compensating for age-related changes in the threshold voltage.

Description

Active matrix display devices and driving method thereof
The present invention relates to active matrix display devices, special (but nonexcludability ground) relates to and has the transistorized active matrix electroluminescent display device of the thin film switch relevant with each pixel.
It is well-known adopting the matrix display of electroluminescence, illuminated display element.Display element can comprise the organic thin film electroluminescent elements that for example uses polymeric material, perhaps uses the light emitting diode (LED) of traditional III-V semiconducting compound.Development in electroluminescent organic material, particularly polymeric material recently shows their actual video display devices that can be used for.These materials generally comprise one or more layers semiconductive conjugated polymer that is clipped between the pair of electrodes, and one of them electrode is transparent, and another electrode has the material that is suitable in hole or the electronics injection of polymer layer.
Can utilize the CVD processing or make polymeric material by the spin coating technique that uses solvable conjugated polymer solution simply.Can also use ink jet printing.Electroluminescent organic material demonstrates the I-V attribute of similar diode, thereby Presentation Function and switching function can be provided simultaneously, and can be used in the passive display.Perhaps, these materials can be used for active matrix display devices, and wherein each pixel comprises a display element and a switchgear that is used to control by the electric current of this display element.
This class display device has the display element of current drives, thereby conventional analogue, drive scheme comprises to display element controllable current is provided.The known part of a current source transistor as dot structure that provide, the grid voltage that is provided for current source transistor determines to flow through the electric current of display element.After address phase, memory capacitance keeps this grid voltage.
Fig. 1 represents to be used for a kind of known image element circuit of the el display device of active array addressing.This display device comprises the panel of the row and column matrix array with the evenly spaced pixel shown in the square 1, and wherein pixel comprises the electro-luminescent display unit 2 that is positioned at the intersection point place between crossing row (selection) address wire group 4 and row (data) address wire group 6 and relevant switchgear.For simply, a few pixels only is shown among the figure.In fact, hundreds of pixel row and columns can be arranged.By comprising that the line scanning drive circuit 8 that links to each other with the end of each lead group and the peripheral drive circuit of column data drivers circuit 9 come address pixel 1 by row and column address wire group.
Electro-luminescent display unit 2 is included in this Organic Light Emitting Diode that is expressed as diode element (LED) and comprises pair of electrodes, accompanies one or more electroluminescent organic material active layers between this is to electrode.The display element of described array is contained on the side of insulating carrier together with relevant active matrix circuit.The negative electrode or the anode of display element are formed by transparent conductive material.This carrier is the transparent material such as glass, the electrode of close substrate of display element 2 can be made of the transparent conductive material such as ITO, thereby cross these electrodes and carrier by the transmittance that electroluminescence layer produces, so that can watch by the beholder who is in carrier opposite side place.Usually, the thickness of electroluminescent organic material layer is between 100nm and the 200nm.The exemplary that can be used for the suitable electroluminescent organic material of element 2 is known, and existing description in EP-A-0717446.Can also use as the conjugated polymer material described in the WO96/36959.
Fig. 2 expresses known pixels with a kind of schematic form of simplification and is used to provide the driving circuit arrangement of voltage-programmed operation.Each pixel 1 comprises EL display element 2 and relevant drive circuit.This drive circuit has address transistor 16, and this address transistor 16 is switched on by the row address pulse on the row lead 4.When address transistor 16 was switched on, the voltage on the column wire 6 can be delivered to the remainder of pixel.Particularly, address transistor 16 offers current source 20 with column conductor voltage, and this current source 20 comprises driving transistors 22 and memory capacitance 24.Column voltage is provided for the grid of driving transistors 22, even if after the address pulse end of being expert at, still by memory capacitance 24 grid is remained on this voltage.Driving transistors 22 is from power lead 26 current drawn.
That up to now, be used for that the most of active matrix circuits of light-emitting diode display use is low temperature polycrystalline silicon (LTPS) TFT.The threshold voltage of these devices is stable in time, and the pixel of not associating changes according at random mode to another pixel.This just produces the static noise that can not receive in image.In order to overcome this problem, multiple circuit has been proposed.In an example, when each address pixel, the image element circuit measurement provides the threshold voltage of the TFT of electric current, to overcome this change from pixel to pixel.This class circuit at be LTPS TFT, and use p type device.Can not make this class circuit with amorphous silicon hydride (a-Si:H) device, the current n type device that is limited to of described device.
But, considered to use a-Si:H.At least on the shorter scope on the substrate, in the amorphous silicon transistor change of threshold voltage less, but threshold voltage is very responsive for voltage stress.Apply the high voltage that is higher than the required threshold value of driving transistors, cause the bigger change of threshold voltage, the information content of shown image is depended in described change.Thereby exist than big-difference between the threshold voltage of the amorphous silicon transistor of conducting always and non-conducting always.In utilizing the light-emitting diode display of driven with amorphous silicon transistors, this discrepant wearing out is a serious problem.
Usually, the circuit of the use a-Si:H TFT that is proposed uses current-addressed, and not working voltage addressing.Certainly, recognize that also current programmed pixel can reduce or eliminate the influence that the transistor variations on the substrate is brought.For example, current programmed pixel can use current mirror to come the gate source voltage on the sampling transistor is sampled, and wherein drives required pixel driving current by sampling transistor.Use the gate source voltage of sampling to come the addressing driving transistors.This has alleviated the problem of the unevenness of device on a part, because sampling transistor and driving transistors are adjacent one another are on substrate, and can mate more accurately each other.The identical transistor of another kind of current sampling circuit use is sampled and is driven, thereby does not need the transistor coupling, but needs additional transistor and address wire.
It is very big to drive the required electric current of conventional LED matrix, this means that amorphous silicon is difficult to use in active matrix organic LED display.Recently, by using phosphorescence, the OLED of OLED and process solution-treated (solution-processed) has demonstrated high efficient.Article " Electrophosphorescent Organic Light EmittingDevices (electroluminescence organic light emitting apparatus) " (52.1 SID, 02 Digest with reference to people such as S.R.Forrest, in May, 2002, the 1357th page), article " Highly Efficient SolutionProcessible Dendrimer LED (solution can be handled dendritic polymer LED efficiently) " (L-8 SID 02 Digest with J.P.J.Markham, in May, 2002, the 1032nd page).Thereby the required electric current of these devices is within the accessible scope of a-Si TFT.But, other problem also begins to show.
It is oversize that the required minimum electric current of phosphorescence organic LED causes being listed as the duration of charging for big display.Another problem is the stability (but not absolute value) of the threshold voltage of TFT.Under constant bias, the threshold voltage of TFT increases, thereby simple constant-current circuit will shut-down operation after the short time.
Therefore, when realizing being suitable for to use the addressing scheme of (even being used for the phosphorescence light-emitting diode display), still have difficulties with pixel with non-crystalline silicon tft.
According to the present invention, a kind of active matrix display devices that comprises array of display pixels is provided, each pixel comprises:
The illuminated display element of current drives;
Be used for the amorphous silicon drive transistor that drive current flows through this display element;
Be connected in series in the grid of driving transistors and first and second electric capacity between source electrode or the drain electrode, the data of importing this pixel are provided for the node between first and second electric capacity, thereby second electric capacity is charged to the voltage that draws from pixel data voltage, and is stored on first electric capacity from the voltage that drive transistor threshold voltage draws.
This pixel arrangement can be stored threshold voltage on first electric capacity into, and can store when each address pixel, thus compensation and aging relevant threshold voltage change.Therefore, the amorphous silicon circuit that provides the every frame time of energy to measure the threshold voltage of the TFT that electric current once is provided is with the compensation aging effect.
Particularly, the threshold voltage that pixel layout of the present invention can overcome non-crystalline silicon tft increases, and can carry out voltage-programming to pixel in the enough short time simultaneously for big high resolution A MOLED display.
Each pixel can also comprise an input the first transistor between the node that is connected between the input data line and first and second electric capacity.This first transistor carries out timing to data voltage being imposed on pixel, to be used for storing data voltage into second electric capacity.
Each pixel can also comprise that one is connected the grid of driving transistors and the transistor seconds between the drain electrode.This is to be used for controlling electric current is provided to the first transistor from drain electrode (can be connected with power lead).Thereby,, first electric capacity can be charged to grid-source voltage by with the transistor seconds conducting.Can control transistor seconds by the first grid control line of between a pixel column, sharing.
In one example, first and second capacitances in series are connected between the grid and source electrode of driving transistors.Then, the 3rd transistor is connected the two ends of second electric capacity, and is subjected to the control of the 3rd shared between pixel column gate control lines.The second and the 3rd gate control lines comprises single shared control line.
Perhaps, first and second electric capacity can be connected in series between the grid and drain electrode of driving transistors.Then, the 3rd transistor is connected between the source electrode of input end and driving transistors.Can control the 3rd transistor by the 3rd gate control lines of between a pixel column, sharing.Equally, the second and the 3rd gate control lines can comprise single shared control line.
All use the 3rd transistor to come short circuit second electric capacity in each case, thereby only first electric capacity can the transistorized grid-source voltage of storing driver.
Each pixel can also comprise the 4th transistor that is connected between driving transistors source electrode and the earth potential line.This is the electric current leakage that is used for serving as driving transistors, does not particularly shine display element during the pixel programming sequence.Also can control the 4th transistor by the 4th gate control lines of between a pixel column, sharing.Between a pixel column, can share the earth potential line, and the earth potential line can comprise the 4th transistorized the 4th gate control lines that is used for adjacent lines of pixels.
In another kind is arranged, the electric capacity arrangement is connected between the grid and source electrode of driving transistors, and the source electrode of driving transistors links to each other with ground wire.The drain electrode of driving transistors links to each other with an end of display element, and the other end of display element links to each other with power lead.The circuit that so just provides a kind of complexity to reduce, but circuit component is in the anode-side of display element.
Each pixel can also comprise transistor seconds between the grid that is connected driving transistors and the drain electrode, be connected the short-circuit transistor at the second electric capacity two ends, be connected the charging transistor between the drain electrode of power lead and driving transistors and be connected the grid of driving transistors and drain between discharge transistor.
In some circuit of the present invention, but an end opposite with driving transistors of display element can link to each other with the switching voltage line.It can be the common cathode line of sharing between a pixel column.The ability that changes the voltage on this common cathode line need particularly be structured into the separated wires that is used for each separate rows with its " structuring ".
In order not need to provide structured electrodes, and share the public display element electrode opposite with driving transistors for all pixels that allow array, each pixel can also comprise second driving transistors.Second driving transistors may be provided between the power lead and first driving transistors, perhaps is provided between first driving transistors and the display element.In each case, second driving transistors provides a kind of approach that prevents irradiation display element during address phase, and does not need to change on the power lead or the voltage on the public display element terminal.
Display element can comprise electroluminescence (EL) display element, as the electroluminescent phosphorescence organic electro-luminescent display unit.
The present invention also provides a kind of method that is used to drive the active matrix display devices of the luminous array of display pixels that comprises current drives, each pixel comprises that a display element and one are used for the amorphous silicon drive transistor that drive current flows through this display element, and this method comprises for each pixel:
Drive current passes through this driving transistors arrival point, and first electric capacity is charged to the grid-source voltage that is produced;
With first capacitor discharge till driving transistors ends, thereby the first capacitance stores threshold voltage;
Will be between the grid of driving transistors and source electrode or drain electrode be charged to the data input voltage with second electric capacity of first capacitances in series; And
The grid voltage that utilization draws from the voltage at the first and second electric capacity two ends uses driving transistors to come drive current to flow through display element.
This method is measured drive transistor threshold voltage in each addressing sequence.This method is used for the non-crystalline silicon tft image element circuit, n type drive TFT particularly, thus must realize short pixel programming, so that can the big display of addressing.In the method, can measure (it is overlapping in time that order just is used for the addressing sequence of adjacent lines) by the threshold voltage that in pipeline system addressing sequence, carries out or realize this point by measuring all threshold voltages in frame beginning place at blanking cycle.
In pipeline system addressing sequence, switch to conducting and implement step the charging of second electric capacity by being connected address transistor between data line and the pixel input end.The address transistor conducting of each pixel of delegation will be used for simultaneously by common row address control line, and after the address transistor that is used for adjacent lines ends, the address transistor conducting of one-row pixels will be used for basically immediately.
In the blanking cycle sequence, at place's initial threshold measuring period of display frame period, first electric capacity of each pixel is charged, with the respective threshold voltage of storage pixel driving transistors, after threshold measurement cycle the pixel drive cycle in frame period.
By example the present invention is described below with reference to accompanying drawings, wherein:
Fig. 1 represents a kind of known EL display device;
Fig. 2 carries out the synoptic diagram of the known pixel circuit of current-addressed for using the input driving voltage to the EL display pixel;
Fig. 3 is the synoptic diagram of first example that is used for the pixel layout of display device of the present invention;
Fig. 4 is the sequential chart of first kind of method of operating of Fig. 3 pixel layout;
Fig. 5 is the sequential chart of second kind of method of operating of Fig. 3 pixel layout;
Fig. 6 is the sequential chart of the third method of operating of Fig. 3 pixel layout;
Fig. 7 represents to be used for the synoptic diagram of second example of the pixel layout of display device of the present invention;
Fig. 8 represents to be used for the parts numerical example of Fig. 3 or 7 circuit;
Fig. 9 represents to have the synoptic diagram of the 3rd example of the pixel layout of threshold voltage compensation of the present invention;
Figure 10 is the time sequential routine figure of the pixel layout of Fig. 9;
Figure 11 represents to have the synoptic diagram of the 4th example of the pixel layout of threshold voltage compensation of the present invention;
Figure 12 is the time sequential routine figure of the pixel layout of Figure 11;
Figure 13 represents to have the synoptic diagram of the 5th example of the pixel layout of threshold voltage compensation of the present invention;
Figure 14 is the sequential chart of first kind of method of operating of the pixel layout of Figure 13;
Figure 15 is the sequential chart of second kind of method of operating of the pixel layout of Figure 13;
Figure 16 is a kind of modification of the sequential chart of Figure 15;
Figure 17 represents to have the synoptic diagram of the 6th example of the pixel layout of threshold voltage compensation of the present invention;
Figure 18 is the sequential chart of first kind of method of operating of the pixel layout of Figure 17;
Figure 19 is the sequential chart of second kind of method of operating of the pixel layout of Figure 17;
Figure 20 is a kind of modification of the sequential chart of Figure 18.
Same reference numerals is used for same parts in different accompanying drawings, and will no longer be repeated in this description these parts.
Fig. 3 represents according to first kind of pixel arrangement of the present invention.In each preferred embodiment, each pixel has an electroluminescence (EL) display element 2 and is connected in series in amorphous silicon drive transistor T between power lead 26 and the cathode line 28 DDriving transistors T DBe used for drive current and flow through display element 2.
First capacitor C 1With second capacitor C 2Be connected in series in driving transistors T DGrid and source electrode between.The data that are input to pixel are provided for the node 30 between first and second electric capacity, and with second capacitor C 2Be charged to pixel data voltage, as described below.First capacitor C 1Be used for storing driver transistor threshold voltage thereon.
Input transistors A 1Be connected between the node 30 between the input data line 32 and first and second electric capacity.This first transistor carries out timing to data voltage being imposed on pixel, to be used for storing data voltage into second capacitor C 2On.
Transistor seconds A 2Be connected driving transistors T DGrid and the drain electrode between.This is to be used for controlling electric current is offered first capacitor C from power lead 26 1Thereby, by with transistor seconds A 2Conducting can be with first capacitor C 1Be charged to driving transistors T DGrid-source voltage.
The 3rd transistor A 3Be connected second capacitor C 2Two ends.This is to be used for second capacitance short-circuit, thereby only first electric capacity can the storing driver transistor T DGrid-source voltage.
The 4th transistor A 4Be connected driving transistors T DSource electrode and ground between.This is the electric current leakage that is used for serving as driving transistors, does not particularly shine display element during the pixel programming sequence.
Electric capacity 24 can comprise an additional memory capacitance (as the circuit of Fig. 2), perhaps can comprise the self-capacitance of display element.
By with transistor A 1To A 4The respective row conductors that links to each other of grid come oxide-semiconductor control transistors A 1To A 4Will further describe as following, can share some row lead.Thereby the addressing to pel array comprises each pixel column of addressing successively, and data line 32 comprises column wire, thus each row of addressing and one entire row of pixels of addressing simultaneously successively in the conventional mode.
The circuit of Fig. 3 can be operated according to multitude of different ways.At first will describe basic operation, explaining then described basic operation expanded to provides the pipeline system method for addressing.The pipeline system addressing means that certain timing of existence is overlapping between the control signal of adjacent lines.
Has only driving transistors T DUnder constant current mode, use.Other TFT A of in the circuit all 1To A 4All be used as the switch that operates in short dutycycle.Thereby the threshold voltage shift in these devices is less, can not influence circuit performance.Represent sequential chart among Fig. 4.Curve A 1To A 4Expression imposes on each transistorized grid voltage.Curve " 28 " expression imposes on the voltage of cathode line 28, and the blank parts of curve " data " is represented the timing of data-signal on data line 32.The time of data is represented not have on the data line 32 in the shadow region.From following description obviously as can be seen, in this time durations, can apply the data that are used for other pixel column,, thereby present the pipeline system operation so that data are almost imposed on data line 32 continuously.
This circuit operation is used for driving transistors T DThreshold voltage store C into 1On, store data voltage into C then 2On, thereby T DGrid-source voltage be that data voltage adds upper threshold voltage.
This circuit operation may further comprise the steps.
The negative electrode (line 28) that is used in the pixel in the delegation of display is in a voltage that is enough to keep the LED reverse biased in whole addressing sequence process.It is a positive pulse in the curve " 28 " of Fig. 4.
Address wire A 2And A 3Become high level, so that relevant TFT conducting.This is just with capacitor C 2Short circuit, and with capacitor C 1A side link to each other with power lead, its opposite side is linked to each other with the LED anode.
Then, address wire A 4Become high level, make its TFT conducting.This is in ground level with regard to the anode that makes LED, and at drive TFT T DThe big grid-source voltage of last generation.Thus with C 1Charging, but C 2Be not recharged, because it keeps short circuit.
Next, address wire A 4Become low level, corresponding TFT is ended, and drive TFT T DWith capacitor C 1Discharge is till it arrives its threshold voltage.Thus, with driving transistors T DThreshold voltage store C into 1On.Equally, second capacitor C 2On do not have voltage.
Make A 2Be low level, first capacitor C that records with isolation 1On threshold voltage, and make A 3Be in low level, thereby make second capacitor C 2No longer by short circuit.
Then, make A 4Be in high level once more, so that anode is linked to each other with ground.Then data voltage is imposed on second capacitor C 2, pass through A simultaneously 1On high level pulse make the input transistors conducting.
At last, A 4Become low level, make negative electrode be reduced to ground level subsequently.Then, the LED anode floats to its working point.
Perhaps A can be made 2And A 3Be in after the low level and make A 4Make negative electrode be reduced to ground level before being in high level.
The addressing sequence can be a pipeline system, thereby constantly can be to programming more than one-row pixels at any one.Thereby, line A 2To A 4And the address signal of row on cathode line 28 can be overlapping with the same signal at different rows.Therefore, the length of addressing sequence is not represented the long pixel programming time, and effective line time is only by working as address wire A 1Second capacitor C of charging during for high level 2Required time restriction.This time cycle is identical with the time cycle that is used for standard active array addressing sequence.The other parts of addressing mean that total frame time will only be prolonged by the required time that is provided with of display first few lines (set-up time) a little.But, in the frame blanking cycle, be easy to carry out this set, so the threshold voltage required time of measurement is not problem.
In the sequential chart of Fig. 5, express the pipeline system addressing.Wherein will be used for transistor A 2To A 4Control signal be combined into single curve, but the operation with described identical with reference to Fig. 4." data " curve representation almost uses data line 32 to provide data to continuous row continuously among Fig. 5.
In the method for Figure 4 and 5, threshold measurement operation and display operation combination, thus successively every capable pixel is carried out threshold measurement and demonstration.
Fig. 6 represents a kind of sequential chart of method, wherein measures threshold voltage for all pixels in the display when frame begins.Curve among Fig. 6 is corresponding with the curve among Fig. 4.The advantage of this method do not need to be structuring negative electrode (that is, as the method that realizes Figure 4 and 5 was required, different cathode line 28 were used for different rows), can cause certain image inhomogeneous but its shortcoming is leakage current.The circuit diagram of this method still is Fig. 3.
As shown in Figure 6, signal A 2, A 3, A 4In blanking cycle, be provided for all pixels in the display with the signal that is used for Fig. 6 cathode line 28, measure to carry out threshold voltage.In blanking cycle, signal A 4Be provided for each pixel simultaneously, thus all signal A 2To A 4Be provided for all row simultaneously.During this period, there are not data can be provided for pixel, thereby corresponding to the dash area of the data and curves of Fig. 6 bottom.
In addressing period subsequently, data are offered every row respectively successively, as signal A 1A among Fig. 6 1On pulse train represent to be used for the pulse of row continuously, and come timing is carried out in each pulse by data being imposed on data line 32.
Circuit among Fig. 3 has a large amount of row, is used for oxide-semiconductor control transistors and structuring cathode line (if necessary).Fig. 7 has represented to reduce a kind of circuit modification of required line number.Each slip chart illustrates signal A 2And A 3Closely similar.Emulation shows, in fact can make A 2And A 3Identical, thus only need an address wire.By will with transistor A among Fig. 3 4Relevant ground wire and the address wire A in the previous row 4Connect, can further reduce line number.Circuit among Fig. 7 represents to be used for address wire that n is capable and n-1 is capable.
Fig. 8 is illustrated in the parts numerical value that is used for Fig. 3 circuit that uses in the exemplary simulations.With μ m is that unit provides transistorized length (L) and width (W) size.The addressing time is that 16 μ s (are A 1The time of conducting).Utilization is than the voltage of the high 5V of threshold value on the drive TFT, and circuit will offer LED up to the electric current of 1.5 μ A.The TFT mobility is 0.41cm 2/ Vs.Suppose in top emission structure to be full aperture, then use in the pixel of 400 μ m * 133 μ m sizes efficient will obtain 280Cd/m as the LED (available super yellow polymkeric substance efficient (Super-yellow PolymerEfficiency) at present) of 10Cd/A 2
This emulation shows, when threshold voltage (being used for driving transistors) changes to up to 10V from 4V, only produces 10% output current change.Can calculate at room temperature that the life-span of this display is 60,000 hours, the life-span is 8000 hours in the time of 40 ℃.
A kind of modification of Fig. 9 presentation graphs 3 circuit.Although be not described in detail in this application, but the circuit of Fig. 9 therein each pixel have in the image element circuit of two or more driving transistorss of blocked operation and have special purposes.Can copy in the single pixel by the circuit of minimizing number of components in a simple manner Fig. 9.This can realize by making some TFT have dual-use function.When a plurality of driving transistors is provided, need carry out independent control to the source electrode or the grid of a plurality of drive TFT, and all TFT that are used to control two drive TFT must be operated in the basis (promptly having low duty ratio) of ending usually, unless these TFT itself have certain V TDrift correction.
Among Fig. 3 with address wire A 4The TFT that links to each other is bigger, because it need make the electric current that is provided by drive TFT pass through in addressing period.Thereby this TFT is the desirable candidate of dual purpose TFT, promptly simultaneously as drive TFT and addressing TFT.Regrettably, the circuit shown in Fig. 3 can not be realized this point.
In Fig. 9, use identical Reference numeral represent with Fig. 3 circuit in identical parts, and no longer be repeated in this description.
In this circuit, first and second capacitor C 1And C 2Be connected in series in driving transistors T DGrid and the drain electrode between.And, pixel input is offered node between the electric capacity.First capacitor C that is used for storage threshold voltage 1Be connected between drive transistor gate and the input end.Be used to store second capacitor C of data input voltage 2Directly be connected between pixel input end and the power lead (transistor drain is coupled).With control line A 3The transistor that links to each other is used to first capacitor C equally 1Provide charge path, first capacitor C 1With second capacitor C 2Bypass, thus capacitor C only used 1Come the storage threshold grid-source voltage.
Indication circuit operation among Figure 10, and have following steps:
In whole addressing sequence process, make the negative electrode of pixel in the display delegation be in the voltage that is enough to keep the LED reverse biased.
Address wire A 2And A 3Become high level,, do C like this with relevant TFT conducting 1With C 2The parallel connection combination link to each other with power lead.
Address wire A then 4Become high level,, do making the anode of LED be in ground level like this with its TFT conducting, and at drive TFT T DThe big grid-source voltage of last generation.
Next, address wire A 4Become low level, so that TFT ends, and drive TFT T DTo shunt capacitance C 1+ C 2Discharge is till it reaches threshold voltage.
Then, A 2And A 3Become low level, to isolate measured threshold voltage.
Afterwards, A 1Conducting, and store data voltage into capacitor C 1On.
At last, A 4Become low level, make negative electrode drop to ground level subsequently.
Similarly, as described above, can use this circuit addressing of execution pipeline formula or threshold measurement in blanking cycle.
Thereby voltage V Data-V TBe stored on the gate-to-drain of drive TFT.Therefore:
I = β 2 ( V gs - V T ) 2 = β 2 ( V ds - V dg - V T ) 2 = β 2 ( V ds - V data ) 2
Thereby, eliminated the threshold voltage dependence.Notice that this moment, electric current depended on the LED anode voltage.
Foregoing circuit has quite a large amount of parts (because independently grid and source electrode of drive TFT).The circuit that only has an isolated node (being source electrode or grid) can make component count still less.The circuit that describes below uses the circuit at the LED cathode side, and uses independently source voltage to realize having the threshold voltage measurement circuit of restore funcitons.Describe threshold voltage measurement circuit with reference to Figure 11, and be sequential chart among Figure 12.
In the circuit of Figure 11, each pixel has the driving transistors of being connected in series in T DGrid and first and second capacitor C between the ground wire 1, C 2The source electrode of driving transistors links to each other with ground wire, but when two circuit of combination, the source electrode of each driving transistors links to each other with the control corresponding line.The data that are input to pixel are provided for the node between first and second electric capacity equally.
Short-circuit transistor is connected second capacitor C 2Two ends, and be subjected to line A 2Control.As the circuit of front, do like this and can store grid-source voltage into capacitor C 1On, thereby shunt capacitance C 2With control line A 4Relevant charging transistor is connected power lead 50 and driving transistors T DDrain electrode between.Its with control line A 3Relevant and the discharge transistor of grid between drain electrode that be connected driving transistors is capacitor C 1Charge path is provided.
This circuit operation is as follows: keep A 2And A 3Be high level, then A 4Keep high level moving negative electrode to high level momently, and with capacitor C 1Be charged to high grid-source voltage.Power lead is a ground level, to apply reverse biased to LED.T then DDischarge into its threshold voltage (with line A 3Relevant discharge transistor is switched on), and be stored to C 1On.Next, make A 2And A 3Be in low level, make A 1Be in high level, and data are sent to C 2On.Make power lead be in high level once more then, to light LED.
Equally, the pipelining of addressing sequence perhaps can be measured threshold voltage in field blackout period.
In the above in Fig. 3,7 and 9 the common cathode circuit, need the structuring negative electrode in case during addressing period can with each separately the negative electrode of row switch to different voltage.
First kind of modification of Figure 13 presentation graphs 3 circuit wherein do not need the structuring negative electrode.At the power lead 26 and the first driving transistors T DBetween, provide and the first driving transistors T DThe second driving transistors T of series connection S
In this circuit, on power lead 26 (rather than cathode line 28), provide switchable voltage, this is to be used for the second driving transistors T SSwitch to and end.Express operation timing among Figure 14.
As shown in the figure, the class of operation of the operation of this circuit and Fig. 4 circuit seemingly.Replace the negative electrode 28 that is used to cut off display element, make power lead 26 during the addressing sequence, be in low level.So just with the second driving transistors T SEnd the second driving transistors T SBe a kind of by its grid is connected with the diode that drain electrode links together.
At transistor A 2-A 4During conducting, the initial part power lead 26 in the cycle is a high level, because use power lead to capacitor C during this period 1Charging, and the second driving transistors T during this period SIt must be conducting.This initial period is for the capacitor C that will be recharged 1Long enough.
When power lead is switched to low level, the second address transistor T SEnd.As a result, do not need the 4th transistor A 4Switch to and end.
Equally, according to the described similar mode of reference Fig. 5, as shown in Figure 15, addressing can be a pipeline system.
The addressing scheme of Figure 15 does not allow light output that any operation cycle (duty cycling) is arranged.This be a kind of be not thus if having time all shine driving transistors technology.So just threshold voltage shift can be reduced, and motion portrayal (motion portrayal) can be improved.For the operation cycle of driving transistors is provided, as expression ground among Figure 16, revise the operation timing of Figure 15.
As reference Figure 14 is described, in capacitor C 1After being recharged, make the voltage on the power lead 26 be in low level, thereby be cut to the electric current of display element 2.The first driving transistors T DStill will have the grid-source voltage that is higher than threshold value, and by transistor A 2And A 3Remove this voltage, thus driving transistors T DSource electrode-drain current remove capacitor C 1On electric charge, till reaching threshold voltage.
In the scheme of Figure 16, power lead is maintenance high level in a part (for example half) frame period only.As shown in Figure 16, in subsequently a certain moment in the frame period, power lead 26 is switched to low level.In order to ensure driving transistors T in all the other times in frame period DBe switched to become to end, after power lead is switched to low level, as shown in the figure on control line, be provided for transistor A like that 2And A 3Pulse.
In the example of Figure 13, the 4th transistor A 4Be connected to ground wire.But, this transistor can link to each other (but not linking to each other with ground as among Figure 13) with the power lead 26 of previous row.The timing of Figure 16 can realize this point, because when the threshold voltage of each drive TFT of measuring previous row, power lead is in ground level.In the time of the 4th transistor turns, can use this cycle (being labeled as 27 among Figure 16) to serve as the ground wire of next pixel column.Thereby, when the power lead that is used for previous row is low level, A 4Addressing period be in this cycle.
The circuit of Figure 13 is at the power lead 26 and the first driving transistors T DBetween added second driving transistors.This second driving transistors will by with the first driving transistors T DIdentical electric current, thus do not need valve value compensation.Grid-source voltage will float to the required level of second driving transistors, so that the first driving transistors T is provided DDesired electric current.
The another kind of selection is at the first driving transistors T DAnd add second driving transistors between the display element, this is in order not need to provide the structuring negative electrode equally.In addition, do not need equally second driving transistors is carried out specific compensation.
Express an example of this circuit among Figure 17.The second driving transistors T SGrid by the 4th transistor A 4Ground connection, the 5th transistor A 5Be connected between the 5th transistorized grid and the drain electrode.In others, this circuit is identical with Fig. 3, and operates according to same way as.
From following description obviously as can be seen, this circuit need or not provide switched voltage at the common cathode end of display element on power lead.
As shown in Figure 18, when address phase begins, transistor A 2-A 5All be switched into conducting.For the circuit of Fig. 3, do capacitor C like this 1Be charged to and make driving transistors T DThe level of conducting, and with capacitor C 2Short circuit.Driving transistors T DSource electrode by the 4th and the 5th transistor A 4, A 5Ground connection.During this period, the second driving transistors T SEnd, this is because grid passes through the 4th transistor A 4Be coupled to ground.
Make the 5th transistor A then 5Grid be in low level, end thereby it is switched to.According to the mode identical with Fig. 3 circuit, the drive current by driving transistors (because source electrode-grid voltage constant) is to capacitor C 1Discharge, till threshold voltage is stored.Thereby the voltage on the driving transistors source electrode is the power line voltage that is lower than threshold voltage, and it is at C 1Two ends descend.
Then with transistor A 2And A 3Switch to and end, so that each electric capacity is isolated.At A 1On apply before the addressing pulse, the 5th address transistor is switched on once more.Do like this by the 4th and the 5th transistor driving transistors T DSource electrode (thereby with data storage capacity C 2An end) move ground level to, thereby during address phase, can store data voltage into C 2On.
Transistor A when addressing pulse finishes 4End, so that allow the second driving transistors T SConducting (because its grid no longer keeps ground level), and drive display element.
Transistor A when addressing finishes 5Also end.A like this 5Just keep short dutycycle, to prevent that generation is significant aging in the operating process.A 5Gate-to-source and gate-to-drain stray capacitance can make second driving transistors keep conducting.
According to top described identical mode, can use the pipeline system addressing, and in Figure 19, express the pipeline system addressing.
Figure 20 represents a kind of modification to the described sequential of reference Figure 18.In this case, at transistor A 2And A 3Be switched to become by with after electric capacity is isolated, and be used for A 1Addressing pulse simultaneously, the 5th address transistor is switched on.In the beginning part of addressing pulse, data line 32 has ground voltage (shown in bottom curve).Thereby, in the beginning part of address phase, capacitor C 1With C 2Between also ground connection of node, thereby make capacitor C 2Both sides ground connection all.Therefore, even A 3End, at C 2Two ends do not have voltage yet.Help like this to guarantee data-signal is being loaded into C 2After going up, driving transistors T DThreshold voltage be retained in C 1Two ends.
Described physical circuit layout exists can be according to other modification of same way as work.In essence, the invention provides and a kind ofly threshold voltage can be stored on the electric capacity and store data-signal on another electric capacity circuit, these capacitances in series are connected between the grid and source electrode or drain electrode of driving transistors.For threshold voltage being stored on first electric capacity, this circuit can use the electric charge from first electric capacity to drive this driving transistors, till this driving transistors ends, and voltage that draws from described threshold gate-source voltage of first capacitance stores this moment.
Described circuit can be used for present obtainable LED matrix.But, electroluminescence (EL) display element can comprise the electroluminescent phosphorescence organic electro-luminescent display unit.The present invention can be used for a-Si:H active matrix OLED display.
Only illustrate above with the n transistor npn npn and realize foregoing circuit, and these all will be the amorphous silicon devices.Although preferably make n type device, but certainly realize for the circuit of replacing with p type device with amorphous silicon.
Those skilled in the art obviously can expect multiple other modification.

Claims (35)

1. active matrix apparatus that comprises array of display pixels, each pixel comprises:
The illuminated display element of current drives (2);
Be used for the amorphous silicon drive transistor (T that drive current flows through display element D);
Be connected in series in the grid of driving transistors and the first and second electric capacity (C between source electrode or the drain electrode 1, C 2), the data that are input to pixel are provided for first and second electric capacity (C 1, C 2) between node, thereby with the second electric capacity (C 2) be charged to a voltage that draws from pixel data voltage, and with a store voltages that draws from drive transistor threshold voltage to the first electric capacity (C 1) on.
2. device as claimed in claim 1, wherein each pixel also comprises and is connected input data line (32) and the first and second electric capacity (C 1, C 2) between node between input the first transistor (A 1).
3. device as claimed in claim 1 or 2, wherein driving transistors (T D) drain electrode link to each other with power lead (26).
4. device as claimed in claim 1 or 2, wherein each pixel also comprises the transistor seconds (A between the grid that is connected driving transistors and the drain electrode 2).
5. device as claimed in claim 4 is wherein controlled transistor seconds (A by the first grid control line of sharing between a pixel column 2).
6. device as claimed in claim 1 or 2, the wherein first and second electric capacity (C 1, C 2) be connected in series in driving transistors (T D) grid and source electrode between.
7. device as claimed in claim 6, wherein each pixel also comprises and is connected the second electric capacity (C 2) the 3rd transistor (A at two ends 3).
8. device as claimed in claim 7 is wherein controlled the 3rd transistor by the 3rd gate control lines of sharing between a pixel column.
9. device as claimed in claim 8, wherein the second and the 3rd gate control lines comprises single shared control line.
10. device as claimed in claim 1 or 2, the wherein first and second electric capacity (C 1, C 2) be connected in series in driving transistors (T D) grid and the drain electrode between.
11. device as claimed in claim 10, wherein each pixel also comprises and is connected input end and driving transistors (T D) source electrode between the 3rd transistor (A 3).
12. device as claimed in claim 11 is wherein controlled the 3rd transistor (A by the 3rd gate control lines of sharing between a pixel column 3).
13. device as claimed in claim 12, wherein the second and the 3rd gate control lines comprises single shared control line.
14. device as claimed in claim 1 or 2, wherein each pixel also comprises the 4th transistor (A that is connected between driving transistors source electrode and the earth potential line 4).
15. device as claimed in claim 14 is wherein controlled the 4th transistor (A by the 4th gate control lines of sharing between a pixel column 4).
16. device as claimed in claim 1 or 2, the wherein said described first and second electric capacity (C 1, C 2) be connected driving transistors (T D) grid and source electrode between, and the source electrode of driving transistors is connected to ground wire.
17. device as claimed in claim 16, wherein driving transistors (T D) drain electrode link to each other with an end of display element (2), the other end of display element links to each other with power lead.
18. device as claimed in claim 16, wherein each pixel also comprises and is connected the second electric capacity (C 2) the second short-circuit transistor (A at two ends 2).
19. device as claimed in claim 16, wherein each pixel also comprises the 3rd transistor (A between the grid that is connected driving transistors and the drain electrode 3).
20. device as claimed in claim 19 is wherein controlled the 3rd transistor (A by the gate control lines of sharing between a pixel column 3).
21. device as claimed in claim 16, wherein each pixel also comprises the 4th charging transistor (A between the drain electrode that is connected power lead (50) and driving transistors 4).
22. device as claimed in claim 1 or 2, wherein each pixel also comprises the second driving transistors (T S).
23. device as claimed in claim 22 is wherein at the power lead (26) and the first driving transistors (T D) between described second driving transistors is provided.
24. device as claimed in claim 23, wherein the grid of second driving transistors and drain electrode link together.
25. device as claimed in claim 22 is wherein at the first driving transistors (T D) and display element (2) between described second driving transistors is provided.
26. device as claimed in claim 25, wherein transistor (A 5) be connected the second driving transistors (T S) grid and the drain electrode between.
27. device as claimed in claim 25, wherein each pixel also comprises and is connected the second driving transistors (T S) grid and the 4th transistor (A between the earth potential line 4).
28. device as claimed in claim 1 or 2, wherein driving transistors (T D) comprise the n transistor npn npn.
29. device as claimed in claim 1 or 2, wherein said display element comprise electroluminescence (EL) display element.
30. device as claimed in claim 29, wherein said electroluminescence (EL) display element comprises the electroluminescent phosphorescence organic electro-luminescent display unit.
31. a method that is used to drive the active matrix display devices of a luminous array of display pixels that comprises current drives, wherein each pixel comprises that a display element (2) and one are used for the amorphous silicon drive transistor (T that drive current flows through this display element D), this method comprises for each pixel:
Drive current is by driving transistors (T D) arrival point, and with the first electric capacity (C 1) be charged to the grid-source voltage that is produced;
To the first electric capacity (C 1) discharge, till driving transistors ends, thus the first capacitance stores threshold voltage;
Will be between the grid of driving transistors and source electrode or drain electrode and the second electric capacity (C of first capacitances in series 2) be charged to the data input voltage; And
Utilization is from the first and second electric capacity (C 1, C 2) grid voltage that the voltage at two ends draws, use driving transistors (T D) come drive current to flow through display element.
32. method as claimed in claim 31 will be wherein by being connected the address transistor (A between data line and the pixel input end 1) switch to conducting, implement the described step that second electric capacity is charged.
33. method as claimed in claim 32 wherein switches to conducting by common row address control line with the address transistor of each pixel in the delegation simultaneously.
34. method as claimed in claim 33 wherein will be used for the address transistor conducting of one-row pixels immediately after the address transistor that is used for adjacent lines is cut off.
35. method as claimed in claim 31 is wherein to the first electric capacity (C of each pixel 1) charge, with the respective threshold voltage at the initial threshold storage pixel measuring period driving transistors of display frame period, the pixel drive cycle in frame period is after threshold measurement cycle.
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Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100739334B1 (en) 2006-08-08 2007-07-12 삼성에스디아이 주식회사 Pixel, organic light emitting display device and driving method thereof
JP5055963B2 (en) * 2006-11-13 2012-10-24 ソニー株式会社 Display device and driving method of display device
KR100815756B1 (en) * 2006-11-14 2008-03-20 삼성에스디아이 주식회사 Pixel, organic light emitting display device and driving method thereof
JP4245057B2 (en) * 2007-02-21 2009-03-25 ソニー株式会社 Display device, driving method thereof, and electronic apparatus
JP2008226491A (en) * 2007-03-08 2008-09-25 Sony Corp Organic electroluminescent display device
CN101345023B (en) * 2007-07-12 2012-01-25 奇美电子股份有限公司 Control method, display panel and electronic system
TWI383355B (en) * 2008-05-27 2013-01-21 Univ Nat Cheng Kung A driving circuit and a pixel circuit having the driving circuit
CN101866619B (en) * 2010-05-06 2013-01-23 友达光电股份有限公司 Pixel circuit of organic light-emitting diode, display and driving method thereof
CN101859542B (en) * 2010-05-11 2012-05-23 友达光电股份有限公司 Organic light emitting diode display device and organic light emitting diode pixel circuit thereof
TWI415076B (en) 2010-11-11 2013-11-11 Au Optronics Corp Pixel driving circuit of an organic light emitting diode
CN102903319B (en) * 2011-07-29 2016-03-02 群创光电股份有限公司 Display system
KR102549647B1 (en) 2011-10-18 2023-07-03 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Light-emitting device
KR102082372B1 (en) 2011-11-30 2020-02-27 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Display device
CN103578405B (en) * 2012-07-19 2016-12-07 群康科技(深圳)有限公司 Display floater, pixel-driving circuit, driving pixels approach and electronic installation
CN103117036B (en) * 2013-01-25 2016-09-21 京东方科技集团股份有限公司 The measuring circuit of threshold voltage shift amount of a kind of TFT, method and apparatus
CN103117040B (en) * 2013-01-25 2016-03-09 北京大学深圳研究生院 Image element circuit, display device and display drive method
KR102635824B1 (en) * 2016-12-30 2024-02-08 엘지디스플레이 주식회사 Organic light emitting display panel and organic light emitting display apparatus using the same
CN109859688B (en) * 2019-04-04 2021-07-06 深圳市华星光电半导体显示技术有限公司 Pixel driving circuit and display panel
TWI801736B (en) * 2020-06-03 2023-05-11 大陸商北京集創北方科技股份有限公司 Circuit layout structure, LED display driver chip, LED display device, and information processing device
CN114241978A (en) * 2021-12-21 2022-03-25 昆山国显光电有限公司 Pixel circuit, driving method thereof and display panel

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11219146A (en) * 1997-09-29 1999-08-10 Mitsubishi Chemical Corp Active matrix light emitting diode picture element structure and method
US6229506B1 (en) * 1997-04-23 2001-05-08 Sarnoff Corporation Active matrix light emitting diode pixel structure and concomitant method
US20020038998A1 (en) * 2000-09-29 2002-04-04 Yoshimasa Fujita Luminescent display device of active matrix drive type and fabrication method therefor
US20020089496A1 (en) * 2001-01-10 2002-07-11 Takaji Numao Display device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6229506B1 (en) * 1997-04-23 2001-05-08 Sarnoff Corporation Active matrix light emitting diode pixel structure and concomitant method
JPH11219146A (en) * 1997-09-29 1999-08-10 Mitsubishi Chemical Corp Active matrix light emitting diode picture element structure and method
US20020038998A1 (en) * 2000-09-29 2002-04-04 Yoshimasa Fujita Luminescent display device of active matrix drive type and fabrication method therefor
US20020089496A1 (en) * 2001-01-10 2002-07-11 Takaji Numao Display device

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
CURRENT-SOURCE A-SI:H THIN-FILM TRANSISTOR CIRCUIT FOR ACTIVE-MATRIX ORGANIC LIGHT-EMITTING DISPLAYS. YI HE,REIJI HATTORY,JERZY KANICKI.IEEE ELECTRON DEVICE LETTERS,Vol.21 No.12. 2000
CURRENT-SOURCE A-SI:H THIN-FILM TRANSISTOR CIRCUIT FOR ACTIVE-MATRIX ORGANIC LIGHT-EMITTING DISPLAYS. YI HE,REIJI HATTORY,JERZY KANICKI.IEEE ELECTRON DEVICE LETTERS,Vol.21 No.12. 2000 *
FOUR-THIN FILM TRANSISTOR POXEL ELECTRODE CIRCUITS FOR ACTIVE-MATRIX ORGANIC LIGHT-EMITTING DISPLAYS. YI HE,REIJI HATTORY,JERZY KANICKI.JAPANESE JOURNAL OF APPLIED PHYSICS,Vol.40 No.3A,PART 1. 2001
FOUR-THIN FILM TRANSISTOR POXEL ELECTRODE CIRCUITS FOR ACTIVE-MATRIX ORGANIC LIGHT-EMITTING DISPLAYS. YI HE,REIJI HATTORY,JERZY KANICKI.JAPANESE JOURNAL OF APPLIED PHYSICS,Vol.40 No.3A,PART 1. 2001 *

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