CN100389477C - 制造纳米soi晶片的方法及由该法制造的纳米soi晶片 - Google Patents
制造纳米soi晶片的方法及由该法制造的纳米soi晶片 Download PDFInfo
- Publication number
- CN100389477C CN100389477C CNB031275508A CN03127550A CN100389477C CN 100389477 C CN100389477 C CN 100389477C CN B031275508 A CNB031275508 A CN B031275508A CN 03127550 A CN03127550 A CN 03127550A CN 100389477 C CN100389477 C CN 100389477C
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- Prior art keywords
- wafer
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- splitting
- bonding wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/959—Mechanical polishing of wafer
Abstract
Description
加速电压(KeV) | 10 | 20 | 30 | 50 | 75 | 100 | 150 | 200 |
Rp(nm) | 180.8 | 299.4 | 389.6 | 542.4 | 718 | 900 | 1300 | 1780 |
Rp(nm) | 55.9 | 73.1 | 81.5 | 91.5 | 99.3 | 106.6 | 120.3 | 129.5 |
Vac(Kev) | 26 | 42 | 45.2 |
ΔRp(nm) | 77 | 87 | 88 |
rms(nm) | 3.16 | 5.72 | 6.55 |
Claims (56)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2002-0047351A KR100511656B1 (ko) | 2002-08-10 | 2002-08-10 | 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼 |
KR200247351 | 2002-08-10 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1495849A CN1495849A (zh) | 2004-05-12 |
CN100389477C true CN100389477C (zh) | 2008-05-21 |
Family
ID=31492866
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB031275508A Expired - Lifetime CN100389477C (zh) | 2002-08-10 | 2003-08-06 | 制造纳米soi晶片的方法及由该法制造的纳米soi晶片 |
Country Status (4)
Country | Link |
---|---|
US (2) | US6884694B2 (zh) |
JP (2) | JP2004080035A (zh) |
KR (1) | KR100511656B1 (zh) |
CN (1) | CN100389477C (zh) |
Families Citing this family (68)
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FR2748851B1 (fr) * | 1996-05-15 | 1998-08-07 | Commissariat Energie Atomique | Procede de realisation d'une couche mince de materiau semiconducteur |
FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
TW484184B (en) * | 1998-11-06 | 2002-04-21 | Canon Kk | Sample separating apparatus and method, and substrate manufacturing method |
FR2823373B1 (fr) * | 2001-04-10 | 2005-02-04 | Soitec Silicon On Insulator | Dispositif de coupe de couche d'un substrat, et procede associe |
KR100511656B1 (ko) * | 2002-08-10 | 2005-09-07 | 주식회사 실트론 | 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼 |
KR20040044628A (ko) * | 2002-11-21 | 2004-05-31 | 주식회사 실트론 | Soi 웨이퍼의 soi층 두께 제어 방법 |
JP4407127B2 (ja) * | 2003-01-10 | 2010-02-03 | 信越半導体株式会社 | Soiウエーハの製造方法 |
JP4509488B2 (ja) * | 2003-04-02 | 2010-07-21 | 株式会社Sumco | 貼り合わせ基板の製造方法 |
US7592239B2 (en) | 2003-04-30 | 2009-09-22 | Industry University Cooperation Foundation-Hanyang University | Flexible single-crystal film and method of manufacturing the same |
US20040218133A1 (en) * | 2003-04-30 | 2004-11-04 | Park Jong-Wan | Flexible electro-optical apparatus and method for manufacturing the same |
WO2005024916A1 (ja) * | 2003-09-05 | 2005-03-17 | Sumco Corporation | Soiウェーハの作製方法 |
JP4285244B2 (ja) * | 2004-01-08 | 2009-06-24 | 株式会社Sumco | Soiウェーハの作製方法 |
KR100691310B1 (ko) * | 2004-04-06 | 2007-03-12 | 박재근 | 유기 el 디스플레이 및 그 제조 방법 |
EP1751788B1 (en) * | 2004-04-28 | 2018-11-28 | Iucf-Hyu (Industry-University Cooperation Foundation Hanyang University) | Flexible single-crystal film and method of manufacturing the same |
US7692179B2 (en) * | 2004-07-09 | 2010-04-06 | Hewlett-Packard Development Company, L.P. | Nanowire device with (111) vertical sidewalls and method of fabrication |
JP4617820B2 (ja) * | 2004-10-20 | 2011-01-26 | 信越半導体株式会社 | 半導体ウェーハの製造方法 |
CN1312328C (zh) * | 2005-05-16 | 2007-04-25 | 浙江大学 | 用于纳米光子技术的单晶硅纳米膜的制备方法 |
CN100369188C (zh) * | 2005-05-16 | 2008-02-13 | 中国科学院半导体研究所 | 镜像电荷效应量子元胞自动机的制作方法 |
FR2889887B1 (fr) * | 2005-08-16 | 2007-11-09 | Commissariat Energie Atomique | Procede de report d'une couche mince sur un support |
FR2891281B1 (fr) | 2005-09-28 | 2007-12-28 | Commissariat Energie Atomique | Procede de fabrication d'un element en couches minces. |
KR100738460B1 (ko) * | 2005-12-23 | 2007-07-11 | 주식회사 실트론 | 나노 에스오아이 웨이퍼의 제조방법 |
JP5064695B2 (ja) * | 2006-02-16 | 2012-10-31 | 信越化学工業株式会社 | Soi基板の製造方法 |
DE102006015076B4 (de) * | 2006-03-31 | 2014-03-20 | Advanced Micro Devices, Inc. | Halbleiterbauelement mit SOI-Transistoren und Vollsubstrattransistoren und ein Verfahren zur Herstellung |
US7790565B2 (en) * | 2006-04-21 | 2010-09-07 | Corning Incorporated | Semiconductor on glass insulator made using improved thinning process |
JP5314838B2 (ja) * | 2006-07-14 | 2013-10-16 | 信越半導体株式会社 | 剥離ウェーハを再利用する方法 |
JP2008153411A (ja) * | 2006-12-18 | 2008-07-03 | Shin Etsu Chem Co Ltd | Soi基板の製造方法 |
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CN107146758B (zh) * | 2016-12-27 | 2019-12-13 | 上海新傲科技股份有限公司 | 带有载流子俘获中心的衬底的制备方法 |
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CN1162834A (zh) * | 1995-12-30 | 1997-10-22 | 现代电子产业株式会社 | Soi基片及其制造方法 |
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-
2002
- 2002-08-10 KR KR10-2002-0047351A patent/KR100511656B1/ko active IP Right Grant
-
2003
- 2003-03-19 US US10/391,297 patent/US6884694B2/en not_active Expired - Lifetime
- 2003-08-06 CN CNB031275508A patent/CN100389477C/zh not_active Expired - Lifetime
- 2003-08-11 JP JP2003291700A patent/JP2004080035A/ja active Pending
-
2005
- 2005-03-21 US US11/084,033 patent/US7338882B2/en not_active Expired - Lifetime
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2009
- 2009-04-20 JP JP2009102446A patent/JP2009164643A/ja active Pending
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CN1162834A (zh) * | 1995-12-30 | 1997-10-22 | 现代电子产业株式会社 | Soi基片及其制造方法 |
CN1169025A (zh) * | 1996-02-28 | 1997-12-31 | 佳能株式会社 | 半导体衬底的制造方法 |
US6133608A (en) * | 1997-04-23 | 2000-10-17 | International Business Machines Corporation | SOI-body selective link method and apparatus |
US6166411A (en) * | 1999-10-25 | 2000-12-26 | Advanced Micro Devices, Inc. | Heat removal from SOI devices by using metal substrates |
Also Published As
Publication number | Publication date |
---|---|
US7338882B2 (en) | 2008-03-04 |
US20040029358A1 (en) | 2004-02-12 |
CN1495849A (zh) | 2004-05-12 |
KR100511656B1 (ko) | 2005-09-07 |
US20050164435A1 (en) | 2005-07-28 |
JP2009164643A (ja) | 2009-07-23 |
KR20040014719A (ko) | 2004-02-18 |
JP2004080035A (ja) | 2004-03-11 |
US6884694B2 (en) | 2005-04-26 |
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