CA2401810A1 - Thermal diode for energy conversion - Google Patents
Thermal diode for energy conversion Download PDFInfo
- Publication number
- CA2401810A1 CA2401810A1 CA002401810A CA2401810A CA2401810A1 CA 2401810 A1 CA2401810 A1 CA 2401810A1 CA 002401810 A CA002401810 A CA 002401810A CA 2401810 A CA2401810 A CA 2401810A CA 2401810 A1 CA2401810 A1 CA 2401810A1
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- Prior art keywords
- converter
- recited
- collector
- emitter
- gap region
- Prior art date
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- 238000006243 chemical reaction Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 claims abstract 14
- 239000007787 solid Substances 0.000 claims abstract 7
- 238000000034 method Methods 0.000 claims abstract 6
- 238000005215 recombination Methods 0.000 claims abstract 4
- 230000006798 recombination Effects 0.000 claims abstract 4
- 238000005057 refrigeration Methods 0.000 claims abstract 2
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 claims 10
- 239000000463 material Substances 0.000 claims 6
- 230000004888 barrier function Effects 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 3
- 238000009792 diffusion process Methods 0.000 claims 2
- 238000002347 injection Methods 0.000 claims 2
- 239000007924 injection Substances 0.000 claims 2
- 238000005468 ion implantation Methods 0.000 claims 2
- 229910004262 HgTe Inorganic materials 0.000 claims 1
- 229910052769 Ytterbium Inorganic materials 0.000 claims 1
- 239000007795 chemical reaction product Substances 0.000 claims 1
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 239000002019 doping agent Substances 0.000 claims 1
- 230000005611 electricity Effects 0.000 claims 1
- 229910052738 indium Inorganic materials 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- NAWDYIZEMPQZHO-UHFFFAOYSA-N ytterbium Chemical compound [Yb] NAWDYIZEMPQZHO-UHFFFAOYSA-N 0.000 claims 1
- 230000000903 blocking effect Effects 0.000 abstract 1
- 239000000969 carrier Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/10—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects
- H10N10/13—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects characterised by the heat-exchanging means at the junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors with potential-jump barrier or surface barrier
- H01L29/93—Variable capacitance diodes, e.g. varactors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J45/00—Discharge tubes functioning as thermionic generators
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
- H02N3/00—Generators in which thermal or kinetic energy is converted into electrical energy by ionisation of a fluid and removal of the charge therefrom
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
Abstract
Solid state thermionic energy converter semiconductor diode implementation and method for conversion of thermal energy to electric energy, and electric energy to refrigeration.
In embodiments of this invention a highly doped N region (16) can serve as an emitter region, from which carriers can be injected into a gap region. The gap region can be P-type, intrinsic, or moderately doped N-type (14). A hot ohmic contact (20) is connected to the N-type region. A cold ohmic contact (12) serves as a collector and is connected to the other side of the gap region. The cold ohmic contact has a recombination region formed between the cold ohmic contact and the gap region and a blocking compensation layer that reduces the thermoelectric back flow component.
The heated emitter relative to the collector generates an EMF which drives current through a series load.
The inventive principle works for hole conductivity, as well as for electrons.
In embodiments of this invention a highly doped N region (16) can serve as an emitter region, from which carriers can be injected into a gap region. The gap region can be P-type, intrinsic, or moderately doped N-type (14). A hot ohmic contact (20) is connected to the N-type region. A cold ohmic contact (12) serves as a collector and is connected to the other side of the gap region. The cold ohmic contact has a recombination region formed between the cold ohmic contact and the gap region and a blocking compensation layer that reduces the thermoelectric back flow component.
The heated emitter relative to the collector generates an EMF which drives current through a series load.
The inventive principle works for hole conductivity, as well as for electrons.
Claims (66)
1. A solid state thermionic converter, comprising:
an emitter having at least a region comprising a first donor having a concentration Nd*;
a collector; and a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector, said gap region comprising a semiconductor, said semiconductor comprising a second donor having a concentration Nd, said concentration of said second donor being selected such that the natural logarithm of the ratio Nd*/Nd is between a numerical value greater than 0 and about 7.
an emitter having at least a region comprising a first donor having a concentration Nd*;
a collector; and a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector, said gap region comprising a semiconductor, said semiconductor comprising a second donor having a concentration Nd, said concentration of said second donor being selected such that the natural logarithm of the ratio Nd*/Nd is between a numerical value greater than 0 and about 7.
2. A converter as recited in claim 1, further comprising a compensated region disposed between said gap region and said collector, said compensated region being configured to suppress electric current from said collector to said gap region.
3. A converter as recited in claim 1, wherein said natural logarithm of the ratio Nd*/Nd, is in a range between about 3 and about 7.
4. A converter as recited in claim 1, wherein the temperature of said emitter is higher than the temperature of said collector when an electric current flows from said emitter to said collector.
5. A converter as recited in claim 1, wherein said emitter comprises a metal.
6. A converter as recited in claim 1 wherein said gap region comprises an n-type semiconductor.
7. A 'converter as recited in claim 1, further comprising a recombination region either disposed in electric communication between said gap region and said collector or comprising a portion of said collector in electric communication with said gap region.
8. A converter as recited in claim 1, wherein said emitter comprises InSb.
9. A converter as recited in claim 1, wherein said emitter comprises InSb doped with Te.
10. A converter as recited in claim 1, wherein said gap region comprises InSb doped with Te at a concentration in the range from about 10 16 Cm-3 to about 3 ~ 10 19 cm-3.
11. A converter as recited in claim 1, wherein said emitter comprises InSb doped with Te at a concentration in the range from about 10 18 cm-3 to about 3 ~ 10 19 cm-3.
12. A converter as recited in claim 1, wherein said gap region comprises InSb doped with Te at a concentration of about 10 18 cm-3.
13. A converter as recited in claim 1, wherein the thickness of said emitter is at least about 400 A.
14. A converter as recited in claim 1, wherein said gap region comprises a semiconductor whose dimensionless normalized conductivity x is within the range from about 1 to about 0.001.
15. A converter as recited in claim 1, wherein said gap region comprises HgSe.
16. A converter as recited in claim 1, wherein said gap region comprises HgTe.
17. A converter as recited in claim 1, wherein said gap region comprises Bi1-ySby, wherein y is within the range from about 0.05 to about 0.2.
18. A converter as recited in claim 1, wherein said gap region comprises Se Z Te1-z, wherein z satisfies 0 < z < 1.
19. A converter as recited in claim 1, wherein said gap region comprises Hg1_xCdXTe, wherein x is within the range from about 0.08 to about 0.2.
20. A converter as recited in claim 1, wherein said gap region comprises Hg1_xCdXTe, wherein x is about 0.08.
21. A converter as recited in claim 1, wherein said gap region comprises a doped semiconductor with a dopant concentration in the range from about 10 15 cm-3 to about 10 20 cm-3.
22. A converter as recited in claim 1, wherein said gap region comprises a p-type semiconductor.
23. A converter as recited in claim 1, wherein said gap region comprises an intrinsic semiconductor.
24. A converter as recited in claim 1, wherein the energy barrier for electron injection from said emitter to said gap region is in the range from about 4kBT
to about 5kBT, where kB is the Boltzman constant and T is the absolute temperature at which the electron injection takes place.
to about 5kBT, where kB is the Boltzman constant and T is the absolute temperature at which the electron injection takes place.
25. A converter as recited in claim 1, wherein said emitter is thermally insulated.
26. A converter as recited in claim 1, further comprising:
a first ohmic contact in electric and thermal communication with said emitter;
a metal-semiconductor-interface-barrier-reduction layer between said first olunic contact and said emitter; and a second ohmic contact in electric communication with said collector.
a first ohmic contact in electric and thermal communication with said emitter;
a metal-semiconductor-interface-barrier-reduction layer between said first olunic contact and said emitter; and a second ohmic contact in electric communication with said collector.
27. A converter as recited in claim 26, wherein said collector is formed on said second ohmic contact.
28. A converter as recited in claim 26, further comprising a thermally conducting layer deposited on at least one of said first and second ohmic contacts.
29. A converter as recited in claim 1, further comprising:
a cold ohmic contact in electric and thermal communication with said gap region, wherein said cold ohmic contact comprises said collector next to said gap region, wherein said collector includes a recombination collector region; and a compensated region disposed between said gap region and said collector, said compensated region being configured to suppress electric current from said collector to said gap region; and
a cold ohmic contact in electric and thermal communication with said gap region, wherein said cold ohmic contact comprises said collector next to said gap region, wherein said collector includes a recombination collector region; and a compensated region disposed between said gap region and said collector, said compensated region being configured to suppress electric current from said collector to said gap region; and
30. A converter as recited in claim 29, wherein said recombination collector region is formed on said cold ohmic contact.
31. A converter as recited in claim 1, further comprising:
a compensated region such that said gap region is located between said emitter and said compensated region, and wherein said collector is in electric and thermal contact with said compensated region, said compensated region having p-type doping such that electric current from said collector to said gap region can be substantially suppressed while allowing thermionic current from said gap region to said collector.
a compensated region such that said gap region is located between said emitter and said compensated region, and wherein said collector is in electric and thermal contact with said compensated region, said compensated region having p-type doping such that electric current from said collector to said gap region can be substantially suppressed while allowing thermionic current from said gap region to said collector.
32. A converter as recited an claim 31, wherein the temperature of said emitter is higher than the temperature of said collector when an electric current flows between said emitter and said collector.
33. A solid state thermionic converter comprising a plurality of individual converters arranged in series, wherein each of said individual converters is configured as recited in claim 31.
34. A converter as recited in claim 31, wherein said compensated region is formed by ion implantation into said gap region.
35. A converter as recited in claim 31, wherein said compensated region comprises vacancies created by ion implantation.
36. A converter as recited in claim 31, wherein said emitter is thermally insulated.
37. A solid state thermionic converter of thermal energy, comprising:
an emitter having at least a reaction product of Hg1_XCdxTe with a substrate comprising In;
a collector; and a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector, said gap region comprising a semiconductor selected from the group consisting of n-type, p-type and intrinsic semiconductors.
an emitter having at least a reaction product of Hg1_XCdxTe with a substrate comprising In;
a collector; and a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector, said gap region comprising a semiconductor selected from the group consisting of n-type, p-type and intrinsic semiconductors.
38. A converter as recited in claim 37, further comprising a compensated region disposed between said gap region and said collector, said compensated region being configured to suppress electric current from said collector to said gap region.
39. A converter as recited in claim 37, wherein said substrate comprises In-Ga.
40. A converter as recited in claim 37, wherein x is within the range from about 0.08 to about 0.25.
41. A converter as recited in claim 37, wherein x is within the range from about 0.08 to about 0.09.
42. A converter as recited in claim 37, wherein said substrate comprises Inl_ WGaW, wherein w is within the range from about 0.1 to about 0.3.
43. A converter as recited in claim 37, wherein said emitter is provided with a diffusion barrier.
44. A converter as recited in claim 37, wherein said emitter is provided with a diffusion barrier comprising ytterbium.
45. A converter as recited in claim 37, wherein said emitter is thermally insulated.
46. A solid state thermionic converter of thermal energy, comprising:
a plurality of plates Pi, with 1 < i > m, where m is the total number of said plates, each one of said plates Pi having an emitter Ei having at least a region comprising a first donor having a concentration Nd*;
a collector Ci; and a gap region G; between said emitter E; and said collector C; in electric and thermal communication with said emitter E; and said collector Ci, said gap region Gi, comprising a semiconductor, said semiconductor comprising a second donor having a concentration Nd, said concentration of said second donor being selected such that the natural logarithm of the ratio Nd*/Nd, is between a numerical value greater than 0 and about 7, and such that 1 < i <_ m;
wherein each plate Pi having an emitter Ej+i,, a gap region Gj+i, and a collector Cj+i, so configured is connected in series with a group of an emitter Ej, a gap region Gj, and a collector Cj, for 1 < j < (m-1), the indexes i and j being integers, and such that collector Cj is in electric communication with emitter Ej+i for each j satisfying 1 < j < (m-1).
a plurality of plates Pi, with 1 < i > m, where m is the total number of said plates, each one of said plates Pi having an emitter Ei having at least a region comprising a first donor having a concentration Nd*;
a collector Ci; and a gap region G; between said emitter E; and said collector C; in electric and thermal communication with said emitter E; and said collector Ci, said gap region Gi, comprising a semiconductor, said semiconductor comprising a second donor having a concentration Nd, said concentration of said second donor being selected such that the natural logarithm of the ratio Nd*/Nd, is between a numerical value greater than 0 and about 7, and such that 1 < i <_ m;
wherein each plate Pi having an emitter Ej+i,, a gap region Gj+i, and a collector Cj+i, so configured is connected in series with a group of an emitter Ej, a gap region Gj, and a collector Cj, for 1 < j < (m-1), the indexes i and j being integers, and such that collector Cj is in electric communication with emitter Ej+i for each j satisfying 1 < j < (m-1).
47 47. A converter as recited in claim 46, wherein said natural logarithm of the ratio Nd*/Nd, is in a range from about 3 to about 7.
48. A converter as recited in claim 46, further comprising a compensated region disposed between said gap region Gi and said collector Ci, said compensated region Ri being configured to suppress electric current from said collector to said gap region, wherein each plate Pj having an emitter Ej+1, a gap region Gj+1, a compensated region Rj+1, and a collector Cj+1, so configured is connected in series with a group of an emitter Ej, a gap region Gj, a compensated region Rj+1, and a collector Cj, for 1 < j<s (m-1).
49. A converter as recited in claim 48, wherein emitters Ei, and Ej comprise substantially the same materials, collectors Ci and Cj comprise substantially the same materials, and compensated regions Ri and Rj comprise substantially the same materials, fori.notidentj,and 1 <i<m,1<j<m.
50. A converter as recited in claim 46, such that the temperature of each of said emitter Ei; is higher than the temperature of each of said collector Ci when an electric current flows between said emitter Ei and said collector Ci.
51. A converter, as recited in claim 46, wherein said first plate P1 comprises InSb.
52. A converter as recited in claim 46, wherein said first plate P1 comprises InSb doped with Te.
53. A converter as recited in claim 46, wherein said first plate P1 comprises InSb doped with Te at a concentration of about 1018 cm-3.
54. A converter as recited in claim 46, wherein at least said first plate emitter E1 comprises InSb doped with Te.
55. A converter as recited an claim 46, wherein at least said first plate emitter Ei comprises InSb doped with Te at a concentration of about 3-10 19 cm-3.
56. A converter as recited in claim 46, wherein said first plate P1 is coated with a material comprising In-Ga.
57. A converter as recited in claim 46, wherein at least said first plate P1 is coated with a material having In 1_u Ga 09 , wherein a is in a range from about 0 to about 0.3.
58. A converter as recited in claim 46, wherein at least said first plate P1 is coated with a material having In 1_u Gau, wherein a is about 0.25.
59. A converter as recited in claim 46, wherein at least one of said plates comprises Hg1_XCdXTe, with x being in the range from about 0.08 to about 0.2.
60. A converter as recited in claim 46, wherein at least one of said plates comprises Hg1_xCdXTe, with x being in a range from about 0.08 to about 0.14.
61. A converter as recited in claim 46, wherein said first emitter E1 is thermally insulated.
62. A method for converting thermal energy into electricity by using a solid state thermionic converter, comprising:
electrically coupling a thermionic converter to an external load, said thermionic converter having an emitter;
a collector; and a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector;
and delivering thermal energy to said emitter of said thermionic converter such that a temperature gradient is established between said emitter and said collector, and an electric potential difference is established between said emitter and said collector when said thermal energy is delivered to said emitter, said thermionic converter converting said thermal energy into electric energy with an efficiency of at least 25% of an ideal Carnot cycle efficiency.
electrically coupling a thermionic converter to an external load, said thermionic converter having an emitter;
a collector; and a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector;
and delivering thermal energy to said emitter of said thermionic converter such that a temperature gradient is established between said emitter and said collector, and an electric potential difference is established between said emitter and said collector when said thermal energy is delivered to said emitter, said thermionic converter converting said thermal energy into electric energy with an efficiency of at least 25% of an ideal Carnot cycle efficiency.
63. The method recited in claim 62, wherein the temperature of said emitter is in a range from about 20°C to about 400°C.
\
\
64. A method for refrigeration by using a solid state thermionic converter, comprising:
establishing externally an electric potential difference across a thermionic converter having a thermally insulated emitter having at least a region having a first donor concentration Nd*;
a collector;
a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector, said gap region comprising a semiconductor, said semiconductor comprising a second donor having a concentration Nd , said concentration of said second donor being selected such that the natural logarithm of the ratio Nd*/Nd is between a numerical value greater than 0 and about 7; and delivering a thermal load to said emitter such that said thermal load is cooled by heat flow as said externally established electric potential difference causes the flow of electric current between said emitter and said collector.
establishing externally an electric potential difference across a thermionic converter having a thermally insulated emitter having at least a region having a first donor concentration Nd*;
a collector;
a gap region between said emitter and said collector in electric and thermal communication with said emitter and said collector, said gap region comprising a semiconductor, said semiconductor comprising a second donor having a concentration Nd , said concentration of said second donor being selected such that the natural logarithm of the ratio Nd*/Nd is between a numerical value greater than 0 and about 7; and delivering a thermal load to said emitter such that said thermal load is cooled by heat flow as said externally established electric potential difference causes the flow of electric current between said emitter and said collector.
65. A method as recited in claim 64, wherein said natural logarithm of the ratio Nd*/Nd, is in a range between about 3 and bout 7.
66. A method as recited in claim 64, with said thermionic converter further having a compensated region disposed between said gap region and said collector, said compensated region being configured to suppress electric current from said collector to said gap region.
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/519,640 US6489704B1 (en) | 1999-03-11 | 2000-03-06 | Hybrid thermionic energy converter and method |
US09/519,640 | 2000-03-06 | ||
US21356400P | 2000-06-22 | 2000-06-22 | |
US60/213,564 | 2000-06-22 | ||
US09/721,051 | 2000-11-22 | ||
US09/721,051 US6396191B1 (en) | 1999-03-11 | 2000-11-22 | Thermal diode for energy conversion |
PCT/US2001/007046 WO2001069657A2 (en) | 2000-03-06 | 2001-03-06 | Thermal diode for energy conversion |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2401810A1 true CA2401810A1 (en) | 2001-09-20 |
CA2401810C CA2401810C (en) | 2010-05-11 |
Family
ID=27395886
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA2401810A Expired - Fee Related CA2401810C (en) | 2000-03-06 | 2001-03-06 | Thermal diode for energy conversion |
Country Status (10)
Country | Link |
---|---|
US (1) | US6396191B1 (en) |
EP (1) | EP1282935B1 (en) |
KR (1) | KR100743506B1 (en) |
CN (1) | CN1428020B (en) |
AU (2) | AU2001268030B2 (en) |
BR (1) | BR0109001A (en) |
CA (1) | CA2401810C (en) |
IL (1) | IL151600A0 (en) |
MX (1) | MXPA02008675A (en) |
WO (1) | WO2001069657A2 (en) |
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DE102011102886A1 (en) | 2011-05-31 | 2012-12-06 | Hans-Josef Sterzel | Generator, useful as converter for converting light or heat into electric energy, comprises intermetallic compounds as low work function materials, where the intermetallic compounds consist of electron donor and electron acceptor |
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EP1282935A2 (en) | 2003-02-12 |
WO2001069657A8 (en) | 2002-07-04 |
KR20030047875A (en) | 2003-06-18 |
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CN1428020B (en) | 2012-05-09 |
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KR100743506B1 (en) | 2007-07-27 |
AU2001268030B2 (en) | 2004-09-02 |
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CA2401810C (en) | 2010-05-11 |
US6396191B1 (en) | 2002-05-28 |
WO2001069657A2 (en) | 2001-09-20 |
AU6803001A (en) | 2001-09-24 |
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