CA2198487C - Method of programming a frequency synthesizer and a radio having a frequency synthesizer - Google Patents
Method of programming a frequency synthesizer and a radio having a frequency synthesizerInfo
- Publication number
- CA2198487C CA2198487C CA002198487A CA2198487A CA2198487C CA 2198487 C CA2198487 C CA 2198487C CA 002198487 A CA002198487 A CA 002198487A CA 2198487 A CA2198487 A CA 2198487A CA 2198487 C CA2198487 C CA 2198487C
- Authority
- CA
- Canada
- Prior art keywords
- frequency
- synthesizer
- tuning
- output frequency
- loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 9
- 239000013078 crystal Substances 0.000 description 13
- 239000003990 capacitor Substances 0.000 description 2
- 230000032683 aging Effects 0.000 description 1
- 230000003679 aging effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002277 temperature effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
- H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
Abstract
In order to program the output frequency of a synthesizer such as that of a two-way radio, first the reference oscillator (20) is warped or tuned substantially to one limit of its tuning range. The "N" divisor of the synthesizer divider (13) is then selected to produce a loop output close to the desired loop output frequency. The reference oscillator (20) is then tuned to provide the desired loop output frequency.
Description
2 1 9 8 4 8 7 PCT/USg~ll0~4 ~:TEIOD OF ~ROGRAl~NG A FREQUENCY SYl~ Ic~
AND A RADIO HAVING A FREQUENCY SY~
Tecbnical Field This invention relates in general to frequency synth.oci7~rR in general and particularly to methods of calibrating a frequency synthesizer.
R~
In a typical frequency synthesizer, such as the circuit illustrated in FIG. 1, the output frequency of a reference oscillator 20 is rnlihr~t~pd or tuned to a pre~.ot~rminnfl value. A desired output frequency is then produced by adjusting the "N" value of the divide-by-N divider 13 in the synthesizer loop 11. The N value can be ms~t.h~m~ti~lly det~rminl~d simply since the reference oscillator frequency is prP~l~f~rminf~fl When utilizing this approach, it is necessary that the crystal oscillator 20 be capable of being tuned to this pr~t~rminf~d value. Crystals are subject to variations in tolerance due to manufacturing processes, as well as aging and temperature effects. For example, a reference crystal with a nominal frequency of 10.240 MHz can have a minimum pullability or rl~nt of 15 parts per million (PPM) per picofarad (pF). This ir~sla~t~s to a m~imnm of 22 KHz at a transmit frequency of 433.92 MHz when a tuning varactor is moved 3.4 PF. If the synthesizer is used in a trnncmittC~r that is frequency mnd~ tprl~ the varactor 26 can be mn-lnl~t-~d by varying the voltage applied to the varactor 26, thereby providing a varying r~rnrit~nre and the FM mndlll~t.inn At 423.225 MHz, the local oscillator (LO) frequency for the receiver, the pullability is 21.6 KHz. This would make the tolerance of the crystal 20 PPM, which combined with a 10 PPM t~mpPr~tllre tolerance and 23 PPM aging 3~ tolerance totals 53 PPM or 24 KHz at 433.92 MHz. In this slpplir~t.ir)n~ a tighter crystal .sperifit ~ti~n would be needed (at a higher cost), if the reference oscillator were tuned by the varactor only. A tuning approach that permits the use of a less precise and less expensive crystal while p~rmitiing tuning operation of the frequency synthesizer to produce a desired output would be desirable.
21q84~7 S ,~ o~theInvention Briefly, according to the invention, there is provided a method of tuning a frsquency synthesizer by adjusting the loop divider until the output frequency is close to the desired frequency. The refersnce 5 oscillator is then adJusted to produce the desired synthesizer output frequency.
Briei'D~ .. . af the l~wings FIG. 1 is a block diagram of a m;l Luyru~ ebbul controlled frequency 10 synthesizer that can be utilized in accordance with the present invention.
De1ailed 1~ .. . c~the Pl eferr~ r ~ ~
The method of ylu~L~..,ing a frequency synthesizer or a radio having a synthesizer can be best l~nrierFtoo(l by review of FIG. 1, which 15 ;llnct~AtPc a sllh~-~qntir~lly conventional frequency synthesizer 10. The frequency b.ylltlleb;~; 10 includes a synthesizer loop 11, having a ~:ullvu~liulLal voltage control osciLlator 12, divide-by-N loop divider 13, phase ~:u..,pal~tul 14, and hl~eOIJ~u~/rllter 15, which serves as a loop filter. The N value of the loop divider 13 is provided, as by a controller 20 such as mi~luylu~c~bbuL 16. The referencs signal is provided to comparator 14 as by reference oscillator 20 and amplifier 21. If desired, the amplifier 21 can be included on a single integrated circuit with ~nmrnn~nt~ of the synthesizer loop 11.
Refersnce oscillator 20 includes a crystal 22, a load circuit 25 cûmposed of cAp~itor~ 23, 24, 25, and a varactor or variable capacitor 26.
A coupling or DC blocking capacitor 27 couples varactor 26 to crystal 22, while resistors 28 and 29 are used for DC biasing purposes. A DC voltage is derived from an output of mh lu~uru~e~ Jr 16 by a digital-to-analog converter (D/A) 30, which can be a simple, discrete D/A impl...,.,-.,l~ii....
30 in the preferred impl~m~nt~tinn The DC voltage from D/A 30 is applied to the varactor 26 to change the ~ ~L~ I A I~I'~ of the varactor 26 and thereby pull or warp the output frequency of crystal 22. It should be understood that the specific illustrated reference oscillator topology and loop topology are not critical and other circuit topologies can be utilized with this 35 method. Tuning values can be stored in a memory such as _n EEPROM
(not shown) a~,~n~ _ I ed with " d~lVy~ U~ bbUI 16. Since the crystal 22 is not necessarily a high precision crystal, the varactor 26 may not be capable of pulling the crystal 22 to a desired nominal oscillator frequency.
To program a desired VCO output frequency for applications such as a radio transmitter or receiver, the synthesizer loop 11 is coarse tuned 6 by adjusting the divisor "N" of the loop divider 13 until the output frequency is close to the desired output frequency. The reference oscillator 20 is then adjusted by tuning the value applied to D/A 30 and consequently, the analog voltage applied to varactor 26, until a desired VCO output frequency has been obtained. The coarse and fine tuning 10 values for this particular output frequency can then be stored.
Arl~liti~mal VCO output frequencies can be tlPtPrminPd and stored in a similar manner, as, for e~ample, a transmit or receive frequency that is offset from the other frequency, or another channel for a radio.
Preferably, the varactor 26 is tuned towards one limit of its tuning range 15 by D/A 30 prior to tuning the divider 13. Divider 13 is then tuned (by selecting values of "N") until it is within tuning range of the varactor 26.
The input to D/A 30 is then changed to tune the varactor 26 to warp the crystal 22 in order to provide the desired VCO frequency. F,RRPnt;allY, any desired VCO output frequency is provided by iteratively tuning first the N
20 value applied divide-by-N divider 13 and then by iteratively adjusting the digital value applied to D/A 30 until the desired VCO output frequency has Rnh--lantially been achieved.
While the preferred Pmho~ of the invention have been illustrated and described, it will be clear that the invention is not so 25 limited. Numerous mo~1;fi~atif)nR~ changes, variations, 5nh~ ~;h~ nR
and equivalents will occur to those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.
AND A RADIO HAVING A FREQUENCY SY~
Tecbnical Field This invention relates in general to frequency synth.oci7~rR in general and particularly to methods of calibrating a frequency synthesizer.
R~
In a typical frequency synthesizer, such as the circuit illustrated in FIG. 1, the output frequency of a reference oscillator 20 is rnlihr~t~pd or tuned to a pre~.ot~rminnfl value. A desired output frequency is then produced by adjusting the "N" value of the divide-by-N divider 13 in the synthesizer loop 11. The N value can be ms~t.h~m~ti~lly det~rminl~d simply since the reference oscillator frequency is prP~l~f~rminf~fl When utilizing this approach, it is necessary that the crystal oscillator 20 be capable of being tuned to this pr~t~rminf~d value. Crystals are subject to variations in tolerance due to manufacturing processes, as well as aging and temperature effects. For example, a reference crystal with a nominal frequency of 10.240 MHz can have a minimum pullability or rl~nt of 15 parts per million (PPM) per picofarad (pF). This ir~sla~t~s to a m~imnm of 22 KHz at a transmit frequency of 433.92 MHz when a tuning varactor is moved 3.4 PF. If the synthesizer is used in a trnncmittC~r that is frequency mnd~ tprl~ the varactor 26 can be mn-lnl~t-~d by varying the voltage applied to the varactor 26, thereby providing a varying r~rnrit~nre and the FM mndlll~t.inn At 423.225 MHz, the local oscillator (LO) frequency for the receiver, the pullability is 21.6 KHz. This would make the tolerance of the crystal 20 PPM, which combined with a 10 PPM t~mpPr~tllre tolerance and 23 PPM aging 3~ tolerance totals 53 PPM or 24 KHz at 433.92 MHz. In this slpplir~t.ir)n~ a tighter crystal .sperifit ~ti~n would be needed (at a higher cost), if the reference oscillator were tuned by the varactor only. A tuning approach that permits the use of a less precise and less expensive crystal while p~rmitiing tuning operation of the frequency synthesizer to produce a desired output would be desirable.
21q84~7 S ,~ o~theInvention Briefly, according to the invention, there is provided a method of tuning a frsquency synthesizer by adjusting the loop divider until the output frequency is close to the desired frequency. The refersnce 5 oscillator is then adJusted to produce the desired synthesizer output frequency.
Briei'D~ .. . af the l~wings FIG. 1 is a block diagram of a m;l Luyru~ ebbul controlled frequency 10 synthesizer that can be utilized in accordance with the present invention.
De1ailed 1~ .. . c~the Pl eferr~ r ~ ~
The method of ylu~L~..,ing a frequency synthesizer or a radio having a synthesizer can be best l~nrierFtoo(l by review of FIG. 1, which 15 ;llnct~AtPc a sllh~-~qntir~lly conventional frequency synthesizer 10. The frequency b.ylltlleb;~; 10 includes a synthesizer loop 11, having a ~:ullvu~liulLal voltage control osciLlator 12, divide-by-N loop divider 13, phase ~:u..,pal~tul 14, and hl~eOIJ~u~/rllter 15, which serves as a loop filter. The N value of the loop divider 13 is provided, as by a controller 20 such as mi~luylu~c~bbuL 16. The referencs signal is provided to comparator 14 as by reference oscillator 20 and amplifier 21. If desired, the amplifier 21 can be included on a single integrated circuit with ~nmrnn~nt~ of the synthesizer loop 11.
Refersnce oscillator 20 includes a crystal 22, a load circuit 25 cûmposed of cAp~itor~ 23, 24, 25, and a varactor or variable capacitor 26.
A coupling or DC blocking capacitor 27 couples varactor 26 to crystal 22, while resistors 28 and 29 are used for DC biasing purposes. A DC voltage is derived from an output of mh lu~uru~e~ Jr 16 by a digital-to-analog converter (D/A) 30, which can be a simple, discrete D/A impl...,.,-.,l~ii....
30 in the preferred impl~m~nt~tinn The DC voltage from D/A 30 is applied to the varactor 26 to change the ~ ~L~ I A I~I'~ of the varactor 26 and thereby pull or warp the output frequency of crystal 22. It should be understood that the specific illustrated reference oscillator topology and loop topology are not critical and other circuit topologies can be utilized with this 35 method. Tuning values can be stored in a memory such as _n EEPROM
(not shown) a~,~n~ _ I ed with " d~lVy~ U~ bbUI 16. Since the crystal 22 is not necessarily a high precision crystal, the varactor 26 may not be capable of pulling the crystal 22 to a desired nominal oscillator frequency.
To program a desired VCO output frequency for applications such as a radio transmitter or receiver, the synthesizer loop 11 is coarse tuned 6 by adjusting the divisor "N" of the loop divider 13 until the output frequency is close to the desired output frequency. The reference oscillator 20 is then adjusted by tuning the value applied to D/A 30 and consequently, the analog voltage applied to varactor 26, until a desired VCO output frequency has been obtained. The coarse and fine tuning 10 values for this particular output frequency can then be stored.
Arl~liti~mal VCO output frequencies can be tlPtPrminPd and stored in a similar manner, as, for e~ample, a transmit or receive frequency that is offset from the other frequency, or another channel for a radio.
Preferably, the varactor 26 is tuned towards one limit of its tuning range 15 by D/A 30 prior to tuning the divider 13. Divider 13 is then tuned (by selecting values of "N") until it is within tuning range of the varactor 26.
The input to D/A 30 is then changed to tune the varactor 26 to warp the crystal 22 in order to provide the desired VCO frequency. F,RRPnt;allY, any desired VCO output frequency is provided by iteratively tuning first the N
20 value applied divide-by-N divider 13 and then by iteratively adjusting the digital value applied to D/A 30 until the desired VCO output frequency has Rnh--lantially been achieved.
While the preferred Pmho~ of the invention have been illustrated and described, it will be clear that the invention is not so 25 limited. Numerous mo~1;fi~atif)nR~ changes, variations, 5nh~ ~;h~ nR
and equivalents will occur to those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.
Claims (4)
1. A method of tuning a frequency synthesizer to a desired frequency, comprising the steps of:
coarse tuning the frequency synthesizer by adjusting the divisor of the loop divider until the output frequency is close to the desired frequency; and then adjusting the reference oscillator to produce the desired output frequency.
coarse tuning the frequency synthesizer by adjusting the divisor of the loop divider until the output frequency is close to the desired frequency; and then adjusting the reference oscillator to produce the desired output frequency.
2. A method of programming the output frequency of a synthesized radio comprising the steps of:
coarse tuning the synthesized radio by changing the divisor of the loop divider;
fine tuning the synthesized radio by warping the loop reference oscillator; and storing the coarse and fine tuning values.
coarse tuning the synthesized radio by changing the divisor of the loop divider;
fine tuning the synthesized radio by warping the loop reference oscillator; and storing the coarse and fine tuning values.
3. A method of programming the operating frequency of a synthesized radio as defined in claim 2, comprising the further steps of:
repeating the steps of claim 2 to coarse and fine tune the synthesized radio for at least a second frequency; and and storing the coarse and fine tuning for the second frequency.
repeating the steps of claim 2 to coarse and fine tune the synthesized radio for at least a second frequency; and and storing the coarse and fine tuning for the second frequency.
4. A method of programming a synthesizer, comprising the steps of:
operating a controller to provide "N" values to a divide-by-N
divider;
selecting a value of "N" that approximately provides a desired output frequency;
operating the controller to provide digital values corresponding to analog voltage values;
applying the analog voltage values to a tunable loop reference oscillator to pull the oscillator frequency; and selecting a digital value that corresponds to desired loop output frequency.
operating a controller to provide "N" values to a divide-by-N
divider;
selecting a value of "N" that approximately provides a desired output frequency;
operating the controller to provide digital values corresponding to analog voltage values;
applying the analog voltage values to a tunable loop reference oscillator to pull the oscillator frequency; and selecting a digital value that corresponds to desired loop output frequency.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/298,492 US5570066A (en) | 1994-08-30 | 1994-08-30 | Method of programming a frequency synthesizer |
| US08/298,492 | 1994-08-30 | ||
| PCT/US1995/010554 WO1996007261A1 (en) | 1994-08-30 | 1995-08-18 | Method of programming a frequency synthesizer and a radio having a frequency synthesizer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2198487A1 CA2198487A1 (en) | 1996-03-07 |
| CA2198487C true CA2198487C (en) | 1999-11-09 |
Family
ID=23150756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002198487A Expired - Fee Related CA2198487C (en) | 1994-08-30 | 1995-08-18 | Method of programming a frequency synthesizer and a radio having a frequency synthesizer |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5570066A (en) |
| EP (1) | EP0777942A4 (en) |
| AU (1) | AU3367895A (en) |
| CA (1) | CA2198487C (en) |
| WO (1) | WO1996007261A1 (en) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6249155B1 (en) | 1997-01-21 | 2001-06-19 | The Connor Winfield Corporation | Frequency correction circuit for a periodic source such as a crystal oscillator |
| US5881374A (en) * | 1997-01-31 | 1999-03-09 | Telefonaktiebolaget L M Ericsson (Publ) | Circuitry and method for detecting frequency deviation caused by aging of an oscillator |
| US5952890A (en) * | 1997-02-05 | 1999-09-14 | Fox Enterprises, Inc. | Crystal oscillator programmable with frequency-defining parameters |
| US5960405A (en) | 1997-02-05 | 1999-09-28 | Fox Enterprises, Inc. | Worldwide marketing logistics network including strategically located centers for frequency programming crystal oscillators to customer specification |
| CN1153352C (en) | 1997-03-18 | 2004-06-09 | 皇家菲利浦电子有限公司 | Receiver tuning system |
| WO1998042076A2 (en) * | 1997-03-18 | 1998-09-24 | Koninklijke Philips Electronics N.V. | Receiver tuning system |
| EP0905910A3 (en) * | 1997-09-25 | 2003-04-16 | Siemens Aktiengesellschaft | Process and apparatus for changing frequency in a multichannel radio system |
| DE19743275A1 (en) * | 1997-09-30 | 1999-04-08 | Siemens Ag | Transmitter for generating a high-frequency transmission signal |
| FR2790790B1 (en) | 1999-03-12 | 2001-04-27 | Siemens Automotive Sa | METHOD FOR DETERMINING THE PRESSURE IN THE FUEL INJECTION RAMP OF AN INTERNAL COMBUSTION ENGINE AND CORRESPONDING DEVICE |
| US6323739B1 (en) * | 2000-01-18 | 2001-11-27 | Denso Corporation | Adjusting untrimmed VCO during operation of the oscillator |
| DE60115158T2 (en) | 2000-06-28 | 2006-06-29 | Thomson Licensing | High-frequency oscillator |
| FR2811167A1 (en) * | 2000-06-30 | 2002-01-04 | Cit Alcatel | FREQUENCY SYNTHESIS METHOD AND DEVICE USING A FRACTIONAL PHASE LOCKED LOOP |
| US7162002B2 (en) * | 2002-03-01 | 2007-01-09 | Broadcom Corporation | Phase-interpolator based PLL frequency synthesizer |
| US7161443B2 (en) * | 2004-09-30 | 2007-01-09 | Broadcom Corporation | Temperature compensated crystal oscillator |
| US7675369B2 (en) * | 2006-06-12 | 2010-03-09 | Honeywell International Inc. | Frequency hopping oscillator circuit |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4320357A (en) * | 1978-11-13 | 1982-03-16 | Wulfsberg Paul G | VHF-FM Frequency synthesizer |
| DE2856211A1 (en) * | 1978-12-27 | 1980-07-03 | Licentia Gmbh | DIGITAL PHASE CONTROL WITH ONE AUXILIARY |
| JPS598966B2 (en) * | 1979-04-10 | 1984-02-28 | 株式会社東芝 | Television receiver control device |
| DE3122302A1 (en) * | 1981-06-04 | 1982-12-23 | Siemens AG, 1000 Berlin und 8000 München | Oscillator circuit with a freely tunable oscillator and at least one crystal-stabilised oscillator |
| US4485404A (en) * | 1982-09-01 | 1984-11-27 | Rca Corporation | Digital aft system which is activated during vertical retrace intervals |
| US4568888A (en) * | 1983-11-08 | 1986-02-04 | Trw Inc. | PLL Fast frequency synthesizer with memories for coarse tuning and loop gain correction |
| EP0278140A1 (en) * | 1987-02-12 | 1988-08-17 | Hewlett-Packard Limited | Clock signal generation |
| US4940950A (en) * | 1988-08-12 | 1990-07-10 | Tel-Instrument Electronics Corporation | Frequency synthesis method and apparatus using approximation to provide closely spaced discrete frequencies over a wide range with rapid acquisition |
| US5152005A (en) * | 1990-01-22 | 1992-09-29 | Motorola, Inc. | High resolution frequency synthesis |
| US4993048A (en) * | 1990-04-18 | 1991-02-12 | Unisys Corporation | Self-clocking system |
| FR2680058B1 (en) * | 1991-07-30 | 1994-01-28 | Sgs Thomson Microelectronics Sa | METHOD AND DEVICE FOR SYNCHRONIZING A SIGNAL. |
| US5267189A (en) * | 1991-09-30 | 1993-11-30 | Wilke William G | Rational fraction synthesizer |
| JPH05259903A (en) * | 1992-02-06 | 1993-10-08 | Nec Eng Ltd | Frequency synthesizer |
| US5301366A (en) * | 1992-04-07 | 1994-04-05 | Rockwell International Corporation | High performance frequency tuning with low cost synthesizer |
| US5420545A (en) * | 1993-03-10 | 1995-05-30 | National Semiconductor Corporation | Phase lock loop with selectable frequency switching time |
-
1994
- 1994-08-30 US US08/298,492 patent/US5570066A/en not_active Expired - Lifetime
-
1995
- 1995-08-18 AU AU33678/95A patent/AU3367895A/en not_active Abandoned
- 1995-08-18 WO PCT/US1995/010554 patent/WO1996007261A1/en not_active Application Discontinuation
- 1995-08-18 EP EP95930216A patent/EP0777942A4/en not_active Withdrawn
- 1995-08-18 CA CA002198487A patent/CA2198487C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| AU3367895A (en) | 1996-03-22 |
| US5570066A (en) | 1996-10-29 |
| EP0777942A1 (en) | 1997-06-11 |
| EP0777942A4 (en) | 1997-12-17 |
| WO1996007261A1 (en) | 1996-03-07 |
| CA2198487A1 (en) | 1996-03-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| MKLA | Lapsed |