CA2186684A1 - Dynamic library task switching - Google Patents

Dynamic library task switching

Info

Publication number
CA2186684A1
CA2186684A1 CA002186684A CA2186684A CA2186684A1 CA 2186684 A1 CA2186684 A1 CA 2186684A1 CA 002186684 A CA002186684 A CA 002186684A CA 2186684 A CA2186684 A CA 2186684A CA 2186684 A1 CA2186684 A1 CA 2186684A1
Authority
CA
Canada
Prior art keywords
task
tse
providing
segment
dll
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002186684A
Other languages
French (fr)
Other versions
CA2186684C (en
Inventor
Kenneth B. Grigsby
Aleksander L. Smundak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
Informix Software Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Informix Software Inc filed Critical Informix Software Inc
Publication of CA2186684A1 publication Critical patent/CA2186684A1/en
Application granted granted Critical
Publication of CA2186684C publication Critical patent/CA2186684C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44557—Code layout in executable memory
    • G06F9/44563—Sharing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44521—Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading

Abstract

A method for providing per-instance data memory in a particular dynamic link library loaded in a random access memory address space both as part of a first task and as part of a second task loaded in the address space simultaneously, in a computer having memory management hardware including a local descriptor table to map selectors to base addresses. The method includes providing a task switch enhancer DLL (the TSE); providing in the TSE a DLL registration routine to register a DLL
with the TSE; providing in the particular DLL a call to the DLL registration routine; providing in the TSE a task registration routine to register a task with the TSE;
providing in the first task and in the second task a call to the task registration routine; providing a routine requesting the operating system to provide a switching notification whenever execution of any task is about to begin or end and whenever any task is about to cease to exist; providing in the TSE a segment allocation routine for allocating a memory segment for storing per-instance data of a DLL for a task as a substitute for an original per-instance data segment for that task, and maintaining a substitute base address being a base address for the allocated segment in the LDT entry and maintaining an original base address being the original base address of the original segment in the LDT entry; calling the TSE
segment allocation routine for a per-instance data segment of the particular DLL for the first task during initialization of the first task and calling the TSE
segment allocation routine for a per-instance data segment of the particular DLL for the second task during initialization of the second task; providing in the TSE a base address setup routine to store in the LDT entry the substitute base address of a per-instance segment of a task before that task begins execution; and invoking the base address setup routine for the substitute base address for the first task in response to a switching notification received by the TSE that the first task is about to begin execution.

49357.P11
CA002186684A 1995-09-29 1996-09-27 Dynamic library task switching Expired - Fee Related CA2186684C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/537,235 1995-09-29
US08/537,235 US5802368A (en) 1995-09-29 1995-09-29 Dynamic Library Task Switching

Publications (2)

Publication Number Publication Date
CA2186684A1 true CA2186684A1 (en) 1997-03-30
CA2186684C CA2186684C (en) 2002-11-26

Family

ID=24141798

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002186684A Expired - Fee Related CA2186684C (en) 1995-09-29 1996-09-27 Dynamic library task switching

Country Status (6)

Country Link
US (1) US5802368A (en)
EP (1) EP0766170A1 (en)
JP (1) JPH09288586A (en)
AU (1) AU706491B2 (en)
BR (1) BR9603951A (en)
CA (1) CA2186684C (en)

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US6363436B1 (en) * 1997-01-27 2002-03-26 International Business Machines Corporation Method and system for loading libraries into embedded systems
US6110227A (en) * 1998-06-24 2000-08-29 Microsoft Corporation Systems and methods for pre-processing variable initializers
GB2340265B (en) * 1998-07-31 2003-04-23 Sony Uk Ltd Data processing
US6543047B1 (en) 1999-06-15 2003-04-01 Dell Usa, L.P. Method and apparatus for testing custom-configured software/hardware integration in a computer build-to-order manufacturing process
US7249155B1 (en) * 2000-02-09 2007-07-24 International Business Machines Corporation Method for processing a request to multiple instances of a server program
US7124408B1 (en) * 2000-06-28 2006-10-17 Microsoft Corporation Binding by hash
US7117371B1 (en) 2000-06-28 2006-10-03 Microsoft Corporation Shared names
US20050132084A1 (en) * 2003-12-10 2005-06-16 Heung-For Cheng Method and apparatus for providing server local SMBIOS table through out-of-band communication
DE102004017050A1 (en) * 2004-04-07 2005-10-27 Robert Bosch Gmbh Data consistency in data processing systems
US7721340B2 (en) * 2004-06-12 2010-05-18 Microsoft Corporation Registry protection
US7559091B2 (en) * 2004-06-12 2009-07-07 Microsoft Corporation Software obfuscation
US9015727B2 (en) * 2008-04-02 2015-04-21 Qualcomm Incorporated Sharing operating system sub-processes across tasks
US9223598B1 (en) * 2012-11-26 2015-12-29 Parallels IP Holdings GmbH Displaying guest operating system statistics in host task manager
CN103995705B (en) * 2014-06-04 2017-04-19 中国科学院信息工程研究所 Operating system address space randomized distribution system and method
CN106681782B (en) * 2016-12-09 2019-12-24 北京奇虎科技有限公司 Method and device for compiling dynamic link library SO file of android installation package
US11209997B2 (en) 2017-11-22 2021-12-28 Blackberry Limited Method and system for low latency data management
US10831670B2 (en) 2017-11-22 2020-11-10 Blackberry Limited Method and system for low latency data management
CN112799816B (en) * 2021-02-01 2023-03-31 安徽芯纪元科技有限公司 Multitask program specified task debugging method of embedded operating system

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
CA1312959C (en) * 1987-11-06 1993-01-19 Kiritkumar Talati Virtual interface system and method for enabling software applications to be environment-independent
CA2054026A1 (en) * 1990-10-31 1992-05-01 William Monroe Turpin Goal oriented electronic form system
US5247681A (en) * 1990-12-18 1993-09-21 International Business Machines Corporation Dynamic link libraries system and method
US5255379A (en) * 1990-12-28 1993-10-19 Sun Microsystems, Inc. Method for automatically transitioning from V86 mode to protected mode in a computer system using an Intel 80386 or 80486 processor
US5365606A (en) * 1991-11-27 1994-11-15 Visystems, Inc. Virtual software machine running multiple program modules in a single address space of a target computer
US5596755A (en) * 1992-11-03 1997-01-21 Microsoft Corporation Mechanism for using common code to handle hardware interrupts in multiple processor modes
US5530858A (en) * 1993-04-01 1996-06-25 Intel Corporation Method and apparatus for background processing for PCMCIA card services
GB9311935D0 (en) * 1993-06-09 1993-07-28 Madge Networks Ltd Processor
US5410698A (en) * 1993-10-12 1995-04-25 Intel Corporation Method and system for dynamic loading of software libraries
US5517651A (en) * 1993-12-29 1996-05-14 Intel Corporation Method and apparatus for loading a segment register in a microprocessor capable of operating in multiple modes
US5581768A (en) * 1995-02-27 1996-12-03 Intel Corporation Method and apparatus for executing applications in place from write once/seldom memories

Also Published As

Publication number Publication date
BR9603951A (en) 1998-06-09
AU706491B2 (en) 1999-06-17
EP0766170A1 (en) 1997-04-02
US5802368A (en) 1998-09-01
CA2186684C (en) 2002-11-26
JPH09288586A (en) 1997-11-04
MX9604437A (en) 1997-09-30
AU6790896A (en) 1997-04-10

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