CA2151369A1 - Method and apparatus for bus access arbitration of nodes organized into acyclic token passing and alternatively propagating request to root node and grant signal to the child node - Google Patents

Method and apparatus for bus access arbitration of nodes organized into acyclic token passing and alternatively propagating request to root node and grant signal to the child node

Info

Publication number
CA2151369A1
CA2151369A1 CA002151369A CA2151369A CA2151369A1 CA 2151369 A1 CA2151369 A1 CA 2151369A1 CA 002151369 A CA002151369 A CA 002151369A CA 2151369 A CA2151369 A CA 2151369A CA 2151369 A1 CA2151369 A1 CA 2151369A1
Authority
CA
Canada
Prior art keywords
bus
nodes
node
bus access
alternatively
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002151369A
Other languages
French (fr)
Other versions
CA2151369C (en
Inventor
Florin Oprescu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Apple Inc
Original Assignee
Florin Oprescu
Apple Computer, Inc.
Apple Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Florin Oprescu, Apple Computer, Inc., Apple Inc. filed Critical Florin Oprescu
Priority to CA002408252A priority Critical patent/CA2408252C/en
Publication of CA2151369A1 publication Critical patent/CA2151369A1/en
Application granted granted Critical
Publication of CA2151369C publication Critical patent/CA2151369C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40078—Bus configuration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
    • G06F15/17343—Direct connection machines, e.g. completely connected computers, point to point communication networks wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40084—Bus arbitration
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/48—Routing tree calculation

Abstract

A bus arbitration scheme is implemented in a system where an arbitrary assembly of nodes on a system bus have been resolved into an acyclic directed graph. The hierarchical arrangement of nodes has one node designated a root while all other nodes have established parent/child relationships with the nodes to which they are linked. Each node may have a plurality of connected child ports with a predetermined acknowledgment priority scheme established. Fair bus access arbitration provides for bus granting in a sequence corresponding to the predetermined port priorities allowing all nodes a turn on the bus. The root node may always assert its priority access status to gain bus access which is useful for accommodating a root node which requires isochronous data transfer. Alternatively, a token passing arbitration scheme may be implemented where the token for bus access is passed around the nodes according to the above-described predetermined port priority scheme. Preemptive bus initialization may be triggered by any node upon detection of a necessitating error or addition or removal of a connection to an existing node.
CA002151369A 1992-12-21 1993-12-16 Method and apparatus for bus access arbitration of nodes organized into acyclic token passing and alternatively propagating request to root node and grant signal to the child node Expired - Lifetime CA2151369C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA002408252A CA2408252C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US07/994,983 1992-12-21
US07/994,983 US5630173A (en) 1992-12-21 1992-12-21 Methods and apparatus for bus access arbitration of nodes organized into acyclic directed graph by cyclic token passing and alternatively propagating request to root node and grant signal to the child node
PCT/US1993/012311 WO1994015302A1 (en) 1992-12-21 1993-12-16 Method and apparatus for arbitrating on an acyclic directed graph

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CA002408252A Division CA2408252C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph

Publications (2)

Publication Number Publication Date
CA2151369A1 true CA2151369A1 (en) 1994-07-07
CA2151369C CA2151369C (en) 2004-02-10

Family

ID=25541282

Family Applications (4)

Application Number Title Priority Date Filing Date
CA2698356A Expired - Lifetime CA2698356C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph
CA2503335A Expired - Lifetime CA2503335C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph
CA002408252A Expired - Lifetime CA2408252C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph
CA002151369A Expired - Lifetime CA2151369C (en) 1992-12-21 1993-12-16 Method and apparatus for bus access arbitration of nodes organized into acyclic token passing and alternatively propagating request to root node and grant signal to the child node

Family Applications Before (3)

Application Number Title Priority Date Filing Date
CA2698356A Expired - Lifetime CA2698356C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph
CA2503335A Expired - Lifetime CA2503335C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph
CA002408252A Expired - Lifetime CA2408252C (en) 1992-12-21 1993-12-16 Method and apparatus for pre-emptively arbitrating on an acyclic directed graph

Country Status (9)

Country Link
US (2) US5630173A (en)
EP (4) EP1132821B1 (en)
JP (7) JP3638949B2 (en)
KR (1) KR100290517B1 (en)
AU (1) AU5953994A (en)
CA (4) CA2698356C (en)
DE (4) DE69334228D1 (en)
HK (3) HK1037036A1 (en)
WO (1) WO1994015302A1 (en)

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Also Published As

Publication number Publication date
KR950704745A (en) 1995-11-20
JP2006229992A (en) 2006-08-31
EP1132821A2 (en) 2001-09-12
CA2698356A1 (en) 1994-07-07
EP1094395A3 (en) 2006-04-19
AU5953994A (en) 1994-07-19
US5630173A (en) 1997-05-13
JP2004030648A (en) 2004-01-29
JP3638949B2 (en) 2005-04-13
CA2698356C (en) 2011-04-12
EP0674788B1 (en) 2005-04-27
EP1094394A2 (en) 2001-04-25
EP1094394B1 (en) 2007-09-12
EP1094395B1 (en) 2008-07-02
WO1994015302A1 (en) 1994-07-07
DE69334172D1 (en) 2007-10-31
JP4195470B2 (en) 2008-12-10
JP2002314565A (en) 2002-10-25
JP3834562B2 (en) 2006-10-18
EP1132821A3 (en) 2006-04-19
DE69333798T2 (en) 2006-03-09
CA2408252A1 (en) 1994-07-07
JP3663385B2 (en) 2005-06-22
DE69334172T2 (en) 2008-06-12
CA2408252C (en) 2005-07-26
DE69334228D1 (en) 2008-08-14
JP2006238452A (en) 2006-09-07
CA2151369C (en) 2004-02-10
EP1094394A3 (en) 2006-04-19
CA2503335A1 (en) 1994-07-07
EP0674788A1 (en) 1995-10-04
HK1037035A1 (en) 2002-01-25
DE69334171D1 (en) 2007-10-25
JP4195469B2 (en) 2008-12-10
CA2503335C (en) 2010-06-29
JP3663386B2 (en) 2005-06-22
EP1132821B1 (en) 2007-09-12
DE69333798D1 (en) 2005-06-02
JP4209428B2 (en) 2009-01-14
US5802289A (en) 1998-09-01
EP1094395A2 (en) 2001-04-25
KR100290517B1 (en) 2001-09-17
DE69334171T2 (en) 2008-06-12
HK1037037A1 (en) 2002-01-25
JPH08504989A (en) 1996-05-28
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JP2006217639A (en) 2006-08-17

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