CA2115731A1 - Dynamically Programmable Bus Arbiter with Provisions for Historical Feedback and Error Detection and Correction - Google Patents

Dynamically Programmable Bus Arbiter with Provisions for Historical Feedback and Error Detection and Correction

Info

Publication number
CA2115731A1
CA2115731A1 CA2115731A CA2115731A CA2115731A1 CA 2115731 A1 CA2115731 A1 CA 2115731A1 CA 2115731 A CA2115731 A CA 2115731A CA 2115731 A CA2115731 A CA 2115731A CA 2115731 A1 CA2115731 A1 CA 2115731A1
Authority
CA
Canada
Prior art keywords
provisions
correction
error detection
bus arbiter
dynamically programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2115731A
Other languages
French (fr)
Other versions
CA2115731C (en
Inventor
Mikiel Loyal Larson
Wayne Richard Wilcox
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of CA2115731A1 publication Critical patent/CA2115731A1/en
Application granted granted Critical
Publication of CA2115731C publication Critical patent/CA2115731C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Abstract

An arbitration circuit that uses a unique history register that is combined with a value representing bus requests to index into a table. All possible combinations of history register requests are stored in the table along with a corresponding grant. A block of the table is selected by the history register, and then the request is used to index into the block to determine which request receives a grant. The grant is then shifted into the history register. Advantageously, more than one table may be stored in memory which can be selected by an arbiter controller.
CA002115731A 1993-05-17 1994-02-15 Dynamically programmable bus arbiter with provisions for historical feedback and error detection and correction Expired - Fee Related CA2115731C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US6338093A 1993-05-17 1993-05-17
US063,380 1993-05-17

Publications (2)

Publication Number Publication Date
CA2115731A1 true CA2115731A1 (en) 1994-11-18
CA2115731C CA2115731C (en) 2000-01-25

Family

ID=22048816

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002115731A Expired - Fee Related CA2115731C (en) 1993-05-17 1994-02-15 Dynamically programmable bus arbiter with provisions for historical feedback and error detection and correction

Country Status (7)

Country Link
US (1) US5481680A (en)
EP (1) EP0625753B1 (en)
JP (1) JP3088241B2 (en)
CN (1) CN1040586C (en)
AT (1) ATE191804T1 (en)
CA (1) CA2115731C (en)
DE (1) DE69423928T2 (en)

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US6108735A (en) * 1995-09-29 2000-08-22 Intel Corporation Method and apparatus for responding to unclaimed bus transactions
US5805840A (en) * 1996-03-26 1998-09-08 Advanced Micro Devices, Inc. Bus arbiter employing a transaction grading mechanism to dynamically vary arbitration priority
US5805838A (en) * 1996-05-31 1998-09-08 Sun Microsystems, Inc. Fast arbiter with decision storage
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US5815674A (en) * 1996-07-15 1998-09-29 Micron Electronics, Inc. Method and system for interfacing a plurality of bus requesters with a computer bus
US5875309A (en) * 1997-04-18 1999-02-23 3Com Corporation Arbitration system using linked table
US5884051A (en) * 1997-06-13 1999-03-16 International Business Machines Corporation System, methods and computer program products for flexibly controlling bus access based on fixed and dynamic priorities
US6006303A (en) * 1997-08-28 1999-12-21 Oki Electric Industry Co., Inc. Priority encoding and decoding for memory architecture
US6073199A (en) * 1997-10-06 2000-06-06 Cisco Technology, Inc. History-based bus arbitration with hidden re-arbitration during wait cycles
KR100236948B1 (en) * 1997-11-28 2000-01-15 이계철 Cell bus arbitration method
JPH11250005A (en) * 1998-03-05 1999-09-17 Nec Corp Bus controlling method, its device and storage medium storing bus control program
US6032218A (en) * 1998-05-28 2000-02-29 3Com Corporation Configurable weighted round robin arbiter
KR20010080706A (en) * 1998-12-07 2001-08-22 추후제출 Multi-master bus system and method for operating the same
US6487171B1 (en) 1999-05-19 2002-11-26 3Com Corporation Crossbar switching matrix with broadcast buffering
US7197589B1 (en) * 1999-05-21 2007-03-27 Silicon Graphics, Inc. System and method for providing access to a bus
US6574232B1 (en) 1999-05-26 2003-06-03 3Com Corporation Crossbar switch utilizing broadcast buffer and associated broadcast buffer management unit
US6718422B1 (en) * 1999-07-29 2004-04-06 International Business Machines Corporation Enhanced bus arbiter utilizing variable priority and fairness
US6704822B1 (en) * 1999-10-01 2004-03-09 Sun Microsystems, Inc. Arbitration protocol for a shared data cache
GB9923512D0 (en) * 1999-10-05 1999-12-08 Koninkl Philips Electronics Nv Radio local area network
US6708240B1 (en) * 2000-03-31 2004-03-16 Intel Corporation Managing resources in a bus bridge
US6584531B1 (en) * 2000-04-27 2003-06-24 Lsi Logic Corporation Arbitration circuit with plural arbitration processors using memory bank history
DE60026908D1 (en) * 2000-07-05 2006-05-18 St Microelectronics Srl Arbitration method and circuit architecture thereto
US6980519B1 (en) * 2000-07-14 2005-12-27 Lucent Technologies Inc. Multi-table based grant generator for improved granularity in an ATM-PON
US6631433B1 (en) * 2000-09-27 2003-10-07 Emc Corporation Bus arbiter for a data storage system
US6665760B1 (en) 2000-09-29 2003-12-16 Rockwell Automation Technologies, Inc. Group shifting and level shifting rotational arbiter system
DE10116795A1 (en) * 2001-04-04 2002-10-17 Infineon Technologies Ag bus system
CA2428977C (en) * 2002-05-16 2010-08-10 Tundra Semiconductor Corporation Buffer management in packet switched fabric devices
US6944698B2 (en) * 2002-07-08 2005-09-13 International Business Machines Corporation Method and apparatus for providing bus arbitrations in a data processing system
US7051135B2 (en) * 2002-11-22 2006-05-23 Ess Technology, Inc. Hierarchical bus arbitration
KR100486308B1 (en) * 2003-08-21 2005-04-29 삼성전자주식회사 Arbiter providing programmability of arbitration algorithms
US7065594B2 (en) * 2003-09-23 2006-06-20 Tellabs Petaluma, Inc. Method and apparatus of allocating minimum and maximum bandwidths on a bus-based communication system
US7200732B2 (en) * 2004-01-23 2007-04-03 Tellabs Petaluma, Inc. Method and apparatus of adding grant information to a memory
US20050246463A1 (en) * 2004-04-29 2005-11-03 International Business Machines Corporation Transparent high-speed multistage arbitration system and method
US7739436B2 (en) * 2004-11-01 2010-06-15 Sonics, Inc. Method and apparatus for round robin resource arbitration with a fast request to grant response
US7454546B1 (en) * 2006-01-27 2008-11-18 Xilinx, Inc. Architecture for dynamically reprogrammable arbitration using memory
US20130019041A1 (en) * 2011-07-12 2013-01-17 Lsi Corporation Bit slice round robin arbiter
CN108153689B (en) * 2016-12-06 2020-04-24 比亚迪股份有限公司 Method and apparatus for polling arbitration

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Also Published As

Publication number Publication date
EP0625753B1 (en) 2000-04-12
US5481680A (en) 1996-01-02
ATE191804T1 (en) 2000-04-15
CN1104785A (en) 1995-07-05
JP3088241B2 (en) 2000-09-18
DE69423928D1 (en) 2000-05-18
DE69423928T2 (en) 2001-07-19
CA2115731C (en) 2000-01-25
EP0625753A1 (en) 1994-11-23
JPH06332841A (en) 1994-12-02
CN1040586C (en) 1998-11-04

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