CA2110892C - Electrical interconnection method and apparatus utilizing raised connecting means - Google Patents

Electrical interconnection method and apparatus utilizing raised connecting means

Info

Publication number
CA2110892C
CA2110892C CA002110892A CA2110892A CA2110892C CA 2110892 C CA2110892 C CA 2110892C CA 002110892 A CA002110892 A CA 002110892A CA 2110892 A CA2110892 A CA 2110892A CA 2110892 C CA2110892 C CA 2110892C
Authority
CA
Canada
Prior art keywords
projections
electrically conductive
electrical connector
layered
conductively
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002110892A
Other languages
French (fr)
Other versions
CA2110892A1 (en
Inventor
Mohi Sobhani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of CA2110892A1 publication Critical patent/CA2110892A1/en
Application granted granted Critical
Publication of CA2110892C publication Critical patent/CA2110892C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70Coupling devices
    • H01R12/71Coupling devices for rigid printing circuits or like structures
    • H01R12/712Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
    • H01R12/714Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit with contacts abutting directly the printed circuit; Button contacts therefore provided on the printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits
    • H05K3/365Assembling flexible printed circuits with other printed circuits by abutting, i.e. without alloying process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16104Disposition relative to the bonding area, e.g. bond pad
    • H01L2224/16105Disposition relative to the bonding area, e.g. bond pad the bump connector connecting bonding areas being not aligned with respect to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81194Lateral distribution of the bump connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0367Metallic bump or raised conductor not used as solder bump
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09481Via in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/0959Plated through-holes or plated blind vias filled with insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745Recess in conductor, e.g. in pad or in metallic substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/167Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base

Abstract

A pair of electrical circuits (20, 22), which may be both flexible or one flexible and one rigid, are interconnected by projections, such as bumps (24) and rings (26). The projections are formed from substantially inelastic dielectric material, such as an epoxy, defining bumps (34) and rings (36), which are plated with copper (38). Projections (24, 26) of one circuit are disposed to interconnect with mating projections on the other circuit, the interconnection being bump to bump, bump to ring, or bump to pad. The projections may be formed on a copper-clad substrate (42) or on plated-through holes (72) on a printed wiring board (70).
Alternately, polygonal pads (94) on a circuit (90) may be joined to a projection. Further, a plurality of bump projections (106), electrically connected to the same or different circuits, may collectively interconnect with a single oval ring projection (108).

Description

~- 2110892 ELECTRICAL INTERCONNECTION METHOD AND APPARATUS
UTILIZING RAISED CONNECTING MEANS
BACKGROUND OF THE INVENTION

1. Field of the Invention The present invention relates to a metho~ and 5apparatus for interconnecting electrical conductors by use of electrical protuberances, such as raised bumps and rings.
2. Description of Related Art and Other Considerations There are many techniques for obtaining 10interconnections among Drinted wiring boards, and ceramic and silicon wafers. Connectors, which are soldered and aligned to mating connectors, are very expensive. Hand wiring and soldering do not result in cost savings and the high density connections which are increasingly desired in the industry.
lSBumps or projecting metallic contacts, as an alternate to soldered and alignable connectors, are known techniques for interconnecting flexible to flexible circuits, flexible to rigid printed circuits, or such circuits to electric components. Examples utilizing such bumps are 20described in United States Patents, Numbers 4,125,310 and 4,4S3,795. These patents describe a plurality of generally resilient metallic raised projections. In the latter patent, a resilient backup arrangement is used to avoid overstressing and squashing of the resilient contacts or projections beyond 25their elastic limit, which overstressing precludes repeated mating and unmating of connectors. These terminations otherwise effectively and reliably interconnect mating circuits, but their manufacture can be difficult, time consuming and costly. Many times, repeated etching and 30plating operations are required. Special attention is often reauired to select sDecial materials, methodology, tooling and artwork. Many techniques limit the size of the bumps and, therefore, the density of interconnection which is desired.
It is, therefore, desirable to avoid these problems.

"- 21 1 0892 SUMMARY OF THE INVENTION
The present invention is directed to enabling the interconnection of a pair of electrical circuit, whether both are flexible or one is flexible and the other is rigid.
Electrically conductive material on a first connector is placed on a substrate on which there are sites that define positions of electrical connections. Projections of substantially inelastic dielectric material, e.g., epoxy resin, are affixed to these sites, and an electrically conductive layer is placed atop each of the projections and the electrically conductive material adjacent to the projections.
The inelastic dielectric material must be carefully selected to match its coefficient of thermal expansion with that of the circuit, to have good adhesion to its base material, and not to bubble or expand after it is cured or to burst the underlying copper.
Each of the projections may comprise a rounded mount or a walled structure. The walls are preferably fully enclosed and may be circular, oval or other shape, for example, polygonal. When configured as an enlarged ring or oval, the walled structure may be used to contact a plurality of mounts on a mating cable.
Several advantages are derived from the present invention. It is possible to obtain a higher density interconnection than was previously obtainable. The cost of manufacture is relatively low. Connection and disconnection between mating cables are simple and repeatable. The use of solder connections, special connectors and wired inter-connections are avoided. Facile interchangeability amongstdifferent types of flexible or rigid cables and printed wiring boards is obtainable.
B

2 1 1 08'~2 2a Other aspects of this invention are as follows:
An electrical connector adapted to interconnect with a mating electrical connector comprising:
a substrate;
electrically conductive material on said substrate having sites defining positions of electrical interconnections;
electrically insulative projections comprising walls of substantially inelastic dielectric material affixed to and projecting from said sites; and an electrically conductive layer on and supported by each of said projections and on and electrically coupled to said electrically conductive material adjacent thereto, said conductively layered walls formed as conductively layered enclosures which are sized and shaped to mate and electrically interconnect with a plurality of conductively layered projections formed on said mating electrical connector.
An electrical connector adapted to interconnect with a mating electrical connector comprising:
a substrate;
electrically conductive material on said substrate having sites defining positions of electrical interconnections;
electrically insulative projections of substantially inelastic dielectric material affixed to and projecting from said sites; and an electrically conductive layer on and supported by each of said projections and on and electrically coùpled to said electrically conductive material adjacent thereto;
said conductively layered projections comprising conductively layered walls wherein said walls comprise enclosures which are sized and shaped to mate with a plurality of conductively layered projections on said mating electrical connector.

2b A method for enabling interconnection of a first electrical connector with a mating electrical connector comprising the steps of:
for the first connector, placing electrically conductive material on a substrate having sites defining positions of electrical interconnections;
affixing electrically insulative projections comprising walls of substantially inelastic dielectric material to the sites;
placing an electrically conductive layer on and supported by each of the projections and on and electrically coupled to the electrically conductive material adjacent thereto;
providing the mating electrical connector with electrically conductive pads having areas disposed to mate with at least respective ones of the projections having the electrically conductive layers thereon;
and sizing and shaping the walls as enclosures with the conductive layer thereon which are thereby matable and electrically interconnectable with a plurality of the conductively layered projections on the mating electrical connector.
A method for enabling interconnection of a first electrical connector with a mating electrical connector comprising the steps of:
for the first connector, placing electrically conductive material on a substrate having sites defining positions of electrical interconnections;
affixing electrically insulative projections of substantially inelastic dielectric material to the sites;
placing an electrically conductive layer on and supported by each of the projections and on and electrically coupled to the electrically conductive material adjacent thereto;

`~~ 2c 21 1 0892 providing the mating electrical connector with electrically conductive pads having areas disposed to mate with at least respective ones of the layered projections having the electrically conductive layers S thereon; and forming the projections and their layers as conductively layered walls by configuring at least one of the walls as an enclosure with the conductive layer thereon which is sized and shaped to mate with a plurality of conductively layered projections on the mating electrical connector.
An electrical connector comprising:
(a) a first member comprising:
a first substrate;
electrically conductive material on said first substrate having first sites defining positions of electrical interconnections;
first projections of substantially inelastic dielectric material affixed to and projecting from said first sites said first projections comprising rounded mounts; and a first electrically conductive layer on and supported by each of said first projections and electrically coupled to said electrically conductive material adjacent thereto; and (b) a second member comprising:
a second substrate;
electrically conductive material on said second substrate having second sites defining positions of electrical interconnections;
second projections of substantially inelastic dielectric material affixed to and projecting from said second sites, said second projections comprising ring structures; and a second electrically conductive layer on and supported by each of said second projections and electrically coupled to said electrically conductive W

21 108q2 ` -2d material adjacent thereto, wherein said first member is mated to said second member to produce electrical interconnection therebetween.
Other aims and advantages, as well as a more complete understanding of the present invention, will appear from the following explanation of exemplary embodiments and the accompanying drawings thereof.

- 211~892 BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 illustrates, in cross-section, a pair of flexible cables which are interconnectable, in accordance with the teachings of the present invention, using a rounded mount positionable to contact with a ring;
FIG. 2 is a top view of one of the flexible cables depicted in FIG. l;
FIGS. 3-9 illustrate a method for forming the bump and ring formations shown in FIGS. 1 and 2;
FIGS. 10-12 show an alternate embodiment of the present invention utilizing plated-through holes as bases for the bump or ring interconnects;
FIG. 13 is a view of a further embodiment of the present invention utilizing a combination of bump projections and flat interconnections for mating, for example, with bump projections on a companion circuit; and FIG. 14 is a perspective view of still another embodiment of the present invention showing a plurality, illustrated as two, of bump projections contactable with a single oval projection on a mating connector.

DESCRIPTION OF THE PREFERRED EMBO~IMENTS
As shown in FIGS. 1 and 2, a pair of flexible circuits 20 and 22 each comprise a pair of protuberances configured as bumps 24 and rings 26. Bump 24 of circuit 20 is positioned to face ring 26 of circuit 22, while ring 26 of circuit 20 faces bump 24 of circuit 22. Therefore, when circuits 20 and 22 are placed in contact with one another, their respective bumps and rings form mating interconnections.
Each circuit 20 and 22 is similarly fabricated, and comprises a substrate 28, an electrically conductive layer 30 adhered thereto, electrically conductive pads 32 on layer 30, projections 34 and 36 of relatively inelastic dielectric material, and a conductive layer 38 on the projections.
Substrate 28 may comprise a ceramic or silicon semiconductor, a polyimide plastic, epoxy glass, aluminum `- 2110~92 nitride, or other suitable electronic material. The material of layer 30, pads 32, and layer 38 may be copper. Pads 32 define the sites of the projecting electrical interconnects, and projections 34 and 36 define respective bump and ring 5 outlines.
While copper layer 38 is shown also to form an interconnection 40 between bumps 24 and rings 26 of respective circuits 20 and 22, it is to be understood that the particular circuit design may not require that such an interconnection 1040 exist between every bump and ring pair.
While bumps 24 are depicted as generally circular, they may be configured in any convenient manner. Likewise, rings 26 are illustrated also as circular in configuration;
however, they also may be of any other configuration, such as 15elliptical, oval, and polygonal.
Each of flexible circuits 20 and 22 are fabricated according to the process depicted in FIGS. 3-9. As shown in FIG. 3, a conventional cladded article 42 of conventional design and construction comprises a substrate 44 having copper 20cladding 46 distributed thereover. Substrate 44 is formed of any conventional plastic material, e.g., a polyimide plastic.
As shown in FIG. 4, sites 48 on article 42 are selected for the formation of respective bumps 24 and rings 26, and are precisely located by the positioning of a screen 2550 on copper cladding 46. Screen 50 has openings 52 and 54 therein, which respectively define the sites for bumps 24 and rings 26. For the production of a bump and a ring, opening 52 forms a simple round opening, while opening 54 is angular in shape in order to define the ring.
30As shown in FIG. 5, a relatively inelastic dielectric material, such as an epoxy resin, is deposited by conventional methods on copper cladding 46 through openings 50 and 52 of screen 50, and thereby forms an epoxy base 56 for bump 24 and an epoxy ring 58 for ring 26.
35It is important that the dielectric material have several characteristics. The inelastic dielectric material must be carefully selected to match its coefficient of thermal expansion with that of the circuit, to provide good adhesion to its base material, and not to bubble or expand after it is cured or to burst the underlying copper. Thus, the dielectric material is so selected that its coefficient of thermal expansion be below that of the underlying conductor, for example copper, to prevent any degradation through volume expansion.
The preferred dielectric material comprises a non-metallic epoxy resin, known in the industry as EPON (a trademark of Shell Chemical Company) and more specifically comprises EPON 825, which is essentially pure diglycidyl ether of Bisphenol A, a thermosetting resin, which is chemically activated and heat cured to an irreversible condition. A
preferred epoxy composition used in the present invention comprises EPON 825, a curing agent, such as a diamine, and an accelerator. A particular composition used in constructing the present invention comprised EPON 825 and an accelerated amine curing agent comprising menthane diamine (250.0 + 2.0 parts by weight, pbw), metaphenylene diamine (100.0 + 2.0 pbw), and N-benzyl dimethylamine (1.5 + 0.2 pbw) as the accelerator. Optionally, an anhydride curing agent, such as nadic methyl anhydride, may be used. The preferred composition in accordance with the present invention also comprises glass powder, to enable the curing process to be sufficiently rapid, so as to provide an acceptable end item whose geometry can be controlled, and to avoid relaxation and flow of the resin from the desired geometry.
Screen 50 is then removed to present the configuration illustrated in FIG. 6.
A combination of electroless and electroplated copper 60, as illustrated in FIG. 7, is then deposited by conventional techniaues over copper cladding 46 and epoxy projections 56 and 58. As is standard in the industry, an electroless coating is first deposited over the formation depicted in FIG. 6 to insure that copper will cover the dielectric materials comprising projections 56 and 58 as well as cladding 46, the electroless deposit thereby forming an electrically conductive surface for the subsequent deposition of an electroplate of copper.
The final definition of the completed circuit is obtained by use of a photoresist 62 and mask/artwork 64 above the photoresist, as illustrated in FIG. 8. Using conventional photographic and etching techniques, which employ photoresist 62 and mask/artwork 64, selective portions of copper cladding 46 and copper plate 60 are etched away, as outlined by the mask and developed photoresist portions designated by indicium 66, thus resulting in the confi~ur3tion illustrated in FIG.
9, as well as in FIGS. 1 and 2.
Referring now to FIGS. 10-12, a second embodiment of the present invention relates to projections, such as bumps and rings as above described, formed on a printed wiring board 70 having plated-through holes 72 therein. Such a board with plated-through holes is of conventional construction, board 70 including a matrix 74 of dielectric material and internal conductive traces or leads 76 for connecting one or more plated-through holes 72. As is conventional, plated-through holes 72 are formed with through openings 78 therein.
To form projections on the plated-through holes, as shown in FIG. 11, openings 78 are filled with conductive material 80. Then, by processing similar to that described with respect to FIGS. 3-9, projections 82 of epoxy resin and their coverings of an electroless and electroplated copper plate 84 are formed on the filled plated-through holes, as shown in FIG. 12. While shown as bumps, the projections may be configured as desired and be formed not only on an uDDer surface 86 but also on a lower surface 88 of printed wiring board 70.
Referring now to FIG. 13, a further embodiment of the present invention, comprising a flexible or rigid circuit 90, includes a plurality of projections 92 coupled to rectangular pads 94 by connections 96. While shown as having rectangular configurations, pads 94 may take any polygonal or other configuration. The purpose of pads 94 is to provide a contacting surface of sufficiently large area for contact with one or more projections on a mating circuit.
In FIG. 14, a circuit assembly 100 is shown as comprising a pair of circuits 102 and 104. The two circuits are interconnected by means of bump projections 106 and a ring projection 108. Both projections 106 and 108 are formed in the manner described above with respect to FIGS. 3-9, or may comprise the plated-through hole configuration depicted in FIGS. 10-12. Ring projection 108 preferably is ovular in configuration and is sufficiently large in area so as to encompass both bump projections 106. While shown as only two bump projections, projections 106 may comprise more than two.
In this embodiment, the plurality of bump projections 106 may be all interconnected with one another, in order to insure that there would be at least one electrical conr.ection with oval ring projection 108. Alternately or in addition, the plurality of bump projections 106 may lead to different circuitry and other connections on circuit 102, in order to utilize ring projection 108 to connect the several bump projections and their respective circuits on circuit 102.
Although the invention has been described _with respect to particular embodiments thereof, it should be realized that various changes and modifications may be made therein without departing from the scope of the invention.

Claims (16)

1. An electrical connector adapted to interconnect with a mating electrical connector comprising:
a substrate;
electrically conductive material on said substrate having sites defining positions of electrical interconnections;
electrically insulative projections comprising walls of substantially inelastic dielectric material affixed to and projecting from said sites; and an electrically conductive layer on and supported by each of said projections and on and electrically coupled to said electrically conductive material adjacent thereto, said conductively layered walls formed as conductively layered enclosures which are sized and shaped to mate and electrically interconnect with a plurality of conductively layered projections formed on said mating electrical connector.
2. An electrical connector according to Claim 1 in which said projections consist of a material whose coefficient of thermal expansion matches that of said substrate, which provides good adhesion to said conductive material and layer, and which resists bubbling or expansion after it is cured, which resists bursting said conductive material and layer, and which resists any degradation through volume expansion.
3. An electrical connector according to Claim 1 in which said substantially inelastic dielectric material comprises an epoxy resin.
4. An electrical connector according to Claim 1 in which said enclosure is configured as a ring.
5. An electrical connector adapted to interconnect with a mating electrical connector comprising:
a substrate;

electrically conductive material on said substrate having sites defining positions of electrical interconnections;
electrically insulative projections of substantially inelastic dielectric material affixed to and projecting from said sites; and an electrically conductive layer on and supported by each of said projections and on and electrically coupled to said electrically conductive material adjacent thereto;
said conductively layered projections comprising conductively layered walls wherein said walls comprise enclosures which are sized and shaped to mate with a plurality of conductively layered projections on said mating electrical connector.
6. An electrical connector according to Claim 5 in which at least one of said conductively layered enclosures is configured as an oval for enclosing at least two of said plurality of conductively layered projections.
7. A method for enabling interconnection of a first electrical connector with a mating electrical connector comprising the steps of:
for the first connector, placing electrically conductive material on a substrate having sites defining positions of electrical interconnections;
affixing electrically insulative projections comprising walls of substantially inelastic dielectric material to the sites;
placing an electrically conductive layer on and supported by each of the projections and on and electrically coupled to the electrically conductive material adjacent thereto;
providing the mating electrical connector with electrically conductive pads having areas disposed to mate with at least respective ones of the projections having the electrically conductive layers thereon; and sizing and shaping the walls as enclosures with the conductive layer thereon which are thereby matable and electrically interconnectable with a plurality of the conductively layered projections on the mating electrical connector.
8. A method according to Claim 7 further comprising the step of using for the projections a material whose coefficient of thermal expansion matches that of the substrate, which provides good adhesion to the conductive material, and which resists bubbling or expansion after it is cured, which resists bursting the conductive material, and which resists any degradation through volume expansion.
9. A method according to Claim 7 in which said sizing and shaping step comprises the step of forming the projections on the mating electrical connector as mating mounts and a ring.
10. A method for enabling interconnection of a first electrical connector with a mating electrical connector comprising the steps of:
for the first connector, placing electrically conductive material on a substrate having sites defining positions of electrical interconnections;
affixing electrically insulative projections of substantially inelastic dielectric material to the sites;
placing an electrically conductive layer on and supported by each of the projections and on and electrically coupled to the electrically conductive material adjacent thereto;
providing the mating electrical connector with electrically conductive pads having areas disposed to mate with at least respective ones of the layered projections having the electrically conductive layers thereon; and forming the projections and their layers as conductively layered walls by configuring at least one of the walls as an enclosure with the conductive layer thereon which is sized and shaped to mate with a plurality of conductively layered projections on the mating electrical connector.
11 11. A method according to Claim 10 in which said forming step comprises the step of configuring the plurality of conductively layered projections on the mating electrical connector as a plurality of rounded conductively layered mounts, and configuring the conductively layered enclosure as a conductively layered oval for enclosing the plurality of conductively layered rounded mounts.
12. An electrical connector comprising:
(a) a first member comprising:
a first substrate;
electrically conductive material on said first substrate having first sites defining positions of electrical interconnections;
first projections of substantially inelastic dielectric material affixed to and projecting from said first sites said first projections comprising rounded mounts; and a first electrically conductive layer on and supported by each of said first projections and electrically coupled to said electrically conductive material adjacent thereto; and (b) a second member comprising:
a second substrate;
electrically conductive material on said second substrate having second sites defining positions of electrical interconnections;
second projections of substantially inelastic dielectric material affixed to and projecting from said second sites, said second projections comprising ring structures; and a second electrically conductive layer on and supported by each of said second projections and electrically coupled to said electrically conductive material adjacent thereto, wherein said first member is mated to said second member to produce electrical interconnection therebetween.
13. An electrical connector according to Claim 12 in which said first and second projections consist of a material whose coefficient of thermal expansion matches that of said substrate, which provides good adhesion to said conductive material and layer, and which resists bubbling or expansion after it is cured, which resists bursting said conductive material and layer, and which resists any degradation through volume expansion.
14. An electrical connector according to Claim 12 in which said substantially inelastic dielectric material comprises an epoxy resin.
15. An electrical connector according to Claim 12 wherein said first member further includes means defining plated-through holes in said first substrate filled with electrically conductive matter, said filled plated-through hole means supporting said electrically conductive material and layer and any of said substantially inelastic dielectric material thereunder.
16. An electrical connector according to Claim 15 in which said filled plated-through hole means extends to opposed sides of said first substrate and supports said electrically conductive material on said opposed sides.
CA002110892A 1992-12-14 1993-12-07 Electrical interconnection method and apparatus utilizing raised connecting means Expired - Fee Related CA2110892C (en)

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US990,475 1992-12-14
US07/990,475 US5342207A (en) 1992-12-14 1992-12-14 Electrical interconnection method and apparatus utilizing raised connecting means

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CA2110892C true CA2110892C (en) 1997-03-25

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JP2716354B2 (en) 1998-02-18
US5415555A (en) 1995-05-16
DE69301531D1 (en) 1996-03-21
US5342207A (en) 1994-08-30
EP0602610A1 (en) 1994-06-22
EP0602610B1 (en) 1996-02-07
DE69301531T2 (en) 1996-06-27
CA2110892A1 (en) 1994-06-15
JPH06237059A (en) 1994-08-23

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