CA2089977A1 - Osd circuit for displaying advertising picture data - Google Patents
Osd circuit for displaying advertising picture dataInfo
- Publication number
- CA2089977A1 CA2089977A1 CA002089977A CA2089977A CA2089977A1 CA 2089977 A1 CA2089977 A1 CA 2089977A1 CA 002089977 A CA002089977 A CA 002089977A CA 2089977 A CA2089977 A CA 2089977A CA 2089977 A1 CA2089977 A1 CA 2089977A1
- Authority
- CA
- Canada
- Prior art keywords
- data
- signals
- advertising
- picture
- color
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
- H04N9/641—Multi-purpose receivers, e.g. for auxiliary information
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/47—End-user applications
- H04N21/478—Supplemental services, e.g. displaying phone caller identification, shopping application
Abstract
Abstract of the disclosure An OSD circuit for displaying advertising picture data on the screen of a television receiver is disclosed, and the circuit includes: an oscillator, a first counter, a second counter, a third counter, an F/F circuit, a ROM, and an automatic color adjusting means. The oscillator supplies clock signals to the first counter, and the first and second counters supplies horizontal and vertical scanning addresses to the so as for the advertising picture data to be outputted from the ROM. The third counter supplies a delay signal for displaying of an advertising picture data of a picture scene at a time, thereby inhibiting the output of the ROM for a certain period of time. The F/F circuit prevents a dual display of the advertising picture on the screen, and the ROM stores the advertising picture data separately for main color data, first sub-color data, second sub-color data and brightness data.
The automatic color adjusting means receives the advertising data consisting of the main color data, the first sub-color data and the second sub-color data from the ROM, and supplies an advertising picture having a color definitely contrasting to the color of the picture of the currently broadcasting program.
If the OSD circuit of the present invention is applied to television receivers, not only advertising picture data can be continuously displayed for a certain period of time in a successive manner, but also a clear and harmonized picture color can be obtained.
The automatic color adjusting means receives the advertising data consisting of the main color data, the first sub-color data and the second sub-color data from the ROM, and supplies an advertising picture having a color definitely contrasting to the color of the picture of the currently broadcasting program.
If the OSD circuit of the present invention is applied to television receivers, not only advertising picture data can be continuously displayed for a certain period of time in a successive manner, but also a clear and harmonized picture color can be obtained.
Description
~g~77 OSD CIRCUIT FOR DISPLAYING ADVERTISING PICTURE DATA
Field of the invention The present invention relates to an OSD (on screen display) circuit for displaying advertising picture data on the screen of a television receiver, and particularly to an advertising data displaying circuit in which an advertising data continuously and successively appears on a part of the screen of a television receiver together with the picture of the broadcasting program in order to give a high advertising effect.
B~ck~round of the invention Conventionally, there has been developed an OSD type television receiver which i~ capable of displaying special data lsuch as the selected channel number, sound volume r current time and the like) in the form of an OSD picture on a part of the screen in addition to the picture of the currently broadcasting program. However, such OSD data can be displayed or erased as desired by the watchinq person, and the color of the OSD picture is limited to a mono color ~ont data.
Summary of the invention !
Therefore it is the object of the presen~ invention to 2~89977 provide an OSD circuit for displaying advertising picture data, in which it is possible to continuously and successively display advertising picture data of various colo:rs and a complicated design in the form of an OSD picture on a part of the screen of a television receiver, and the OSD picture cannot ~e erased by the user as desired, the color of the OSD picture be:ing made to be contrasting to the color of the picture of the broadcasting program.
In achieving the ~bove object, the OSD circuit according to the present invention includes: an oscillating means for supplying clock signals to a first counter means; first and second counter means for supplying horizontal and vertical scanning addresses so as for an advertising picture data to be outputted from a ROM; a third counter means for holding the advertising picture data so as for the next data not to be outputted from the ROM for a certain peri~d of time, by outputting to the ROM a delay signal corresponding to displaying an advertizing picture scene; an F/F (flip-flop~ circuit for preventing a dual display of the advertising data; a ROM for storing the advertising data separately for main color data, first sub-color data, sPcond sub-color data and brightness data; and an automatic color adjusting means for adjusting the color o the advertising pic~ure data to one definitely contrasting to the color of the picture of the currently broadcasting program, after receipt of the advertising data consisting of main color data, first sub-color data, and second sub-color data.
Brief description of the drawin~s The above object and other advantages of the present invention will become more apparent by describing in detail the preferred embodiment o~ the present invention with referencQ to the attached drawings in which:
Figure 1 is a block diagram showing the constitution of the OSD circuit for displaying advertising picture data according to the present invention; and Figures 2a and 2b illustrate wave patterns of the signals outputted from the respective blocks of Figure 1.
Description of the ~referred embodiment As shown in Figure 1, the OSD circuit for displaying advertising picture data according to the present invention includes: an oscillator 3; a ~irst counter 6; a second- .
counter 7; a third counter 8; a F/F tflip-10p) circuit 31;
ROMs 9, 10 and 11; and an automatic color adjusting means.
The oscillator 3 receives horizontal synchronizing signals '' '': `"- ' .:
. '' '~
20899r,~
1 from among television video signals, and then, performs oscillations to supply clock signals to the first counter 6, after making the clock signals synchronized with ~h~ horizontal synchronizing signals.
The first counter 6 generates horizontal scanning addresses and supplies them to the ROMs 9, 10 and 11 for horizontally scanning the advertising data after receipt of the clock signals from the oscillator 3. Then the first counter 6 is cleared upon receipt of a next horizontal synchroniæing signal, so that the horizontal scanning address should return to the initial value.
The second counter 7 generates vertical scanning addresses to supply them to the ROMs 9, 10 and 11 after receipt of the horizontal synchronizing signals (in the form of clock signals~
and by counting them. Then the second counter 7 is cleared upon receipt of a next vertical synchronizing signal 2, so that the vertical scanning address should return to the initial value.
The third counter 8 generates dslay signals for displaying an advertising data block of a picture scene for a certain period of time, by receiving and counting the vertical synchronizing signals in the form of clock signals. Further, the third counter 8 supplies delay signals through a decoder 12 to the ROMs 9, 10 and 11, so that the ROMs 9, 10 and 11 should output the same advertising data groups ~or a cer~ain period of time.
2~8~7~
Further, the third counter 8 is cleared upon receipt of a power-on signal from a power-on detector 13, so that the decoder 12 should be always able to select the ROMs g, 10 and 11 always in the same order.
The F/F circuit 31 supplies carry signals of the first counter 6 to disable the ROMs 9, 10 and 11, so that the dual display of the advertising data due to an address overflow of the first counter 6 should be prevented.
The ROMs g, 10 and 11 store the advertising data separately for main color data, first sub-color data, second sub-color data and brightness signal data.
The automat:ic color adjusting means receives advertising data consisting of main color data, first sub-color data and second sub-color data through a buffer 15 from the ROMs 10 and 11, and then, carries out color adjustments in such a manner that the color of the advertising data should be definitely contrasting with the color of the currently broadcasting program.
The automatic color adjusting means further includes: a multiplexer 19, a sample/hold circuit 20, an integrating circuit 22, R-G, G-B and ~R comparators 23, 2~ and 25, and a data selector 26.
The multiplexer 19 selects one at a time from among R
(red), G (green) and B (blu~) video signals of R, G and B lines 2~8~77 16, 17 and 18 under the control of the delay signals of the third counter 8, and supplies the selected signals to the sample/hold circuit 20.
The sample/hold circuit 20 samples out a plurality of sets of signals from among the R, G and B signals as required for the picture data after receipt of the R, G and B signals from the multiplexer 19 in a successive manner. The sample/hold circuit sends t~le sampled signals through a demultiplexer 21 to the integrating circuit 22. Further, the sample/hold circuit 20 receives a hold signals which is formed by the sum addition of a blank signal of the second counter 7 and an OE signal of the F/F circuit 31, so that the advertising picture data which are outputted through the R, G and B lines should not be read during the sampling.
The integrating circuit 22 extracts ~, G and B average value signals from among the R, G and B sampled data groups which are received through the demultiplexer 21.
The R-G, G-~ and B-R comparators 23, 24 and 25 respectively compare the magnitudes of the R, G and B signals after extraction of them from the picture signals for the peripheral portions of the advertising picture. Then the comparators 23, 24 and 25 supply the compared data to the data selector 26.
The data selector 26 combines the advertising picture data 2 ~) 8 9 ~
,, supplied from the buffer 15, basad on the compared results of the comparators 23, 24 and 25. Then the data selector 26 forms an advertising picture da~a of a clear and harmoniæed color which is definitely contrasting to the color of the currently broadcasting program. Then the data selector 26 supplies the mentioned data through R, G and B driving circuits 27, 28 and 29 to the R, G and B lines 16, 17 and 18, so that the data should be displayed in the form o~ an OSD picture.
The circuit of the present invention constituted as above will now be described as to its operations.
First, by using the horizontal synchronizing signals 1 as inhibiting signals, the oscillator 3 operates in such a manner as to output its output in synchronization with the horizontal synchronizing signals.
Then the first counter 6 is let to count using the output signals of the oscillator 3 as clock signals, and the outputs of the first counter 6 are used as the horizontal scanning addresses for the ~OMs 9, 10 and 11. By using the hor.izontal synchronizing signals 1 as clock signals, the second counter 7 is let to count, so as for the outputs of the second counter 7 to be usad as the vertical scanning addresses for the ROMs 9, 10 and 11. Undar this condition, when a next horizontal synchroniæing signal 1 is inputted, the first counter 6 is 208~g77 cleared, so that the horizontal scanning address should return to the initial value. Meanwhile, if a vertical synchronizing signal 2 is inputted, the second counter 7 is cleared, so that the vertical scanning address shoul.d return to the initial value. Then the count of the ROM addresses for the portion of one picture scene is terminated, and the count of a next picture portion is started.
Further, the third counter 8 is let to count using the vertical synchronizing signals 2 as clock signals to generate delay signals, so that an advertising picture block of one picture scen~ should be made to appear on the screen of a television receiver for a certain period of time. The delay signal is supplied through the decoder 12 to the ROMs 9, 10 and ~1, so that the next picture data should not be outputted from the ROMs 9, 10 and 11. The decoder 12 controls the output enable signals of the ROM 9, 10 and 11 by utilizing the output signals of the third counter 8. The third counter 8 is cleared by the power-on detecting signals of the power-on detector 13, and therefore, the ~OMs 9, 10 and 11 are always selected in a successive mannerO
Meanwhile, if a carry signal is generated fr~m the first counter 6 at the time point when the horizontal scanning of a first round is terminated, the ROMs 9,10 and 11 are disabled :
20g997~1 by the F/F circuit 31 which uses the carry signals as clock signals. Consequently, there is prevent:ed a dual display of the advertisin~ data caused hy an address overflow of the first counter 6, so that another advertising picture should not be displayed at another place on the screen.
If the output data of the ROMs 9, 10 and 11 consists of 8 bits, the data of the actual advertising picture sonsists of 4 bits. Therefore, if the data i5 divided into upper 4 bits and lower 4 bits by means of the data selector 14, and if the data are sent to the buffer 15 by 4 bits and 4 bits, then the memory spaces of the ROMs 9, 10 and 11 can be saved.
The advertising data outputted in the above described manner is converted into a color which is definitely contrasting to the color of the picture of the currently broadcasting program.
These converted data are outputted through the R, G and B
driving circuits 27, 28 and 29 to the R, G and B lines 16, 17 an~
18, before being displayed on the relevant portion of the television screen.
Now the operation of the automatic color adjusting circuit will be described further.
First, the multiplexer 19 receives R, G and B signals of the picture data of the currently broadcasting program through the R, G and B lines 16, 1~ and 1~ respectively, and selects 2~g9977 A
signals one by one from the R, G and B signals to output them to the sample/hold circuit 20 under the conkrol of the third counter 8.
The sample/hold circuit 20 receives the R, G and B signals from the multiplexer 19 in a sequential manner, and carries out a plurality of required samplings from the R, G and B signals of the picture data to output them through the demultiplexer 21 to the integrating circuit 22. Further, the sample/hold circuit 20 receives hold signals which are formed by the sum addition of blank signals of the second counter 7 and OE signals of the F/F circuit 31, so that the advertising pi.cture data should not be read during the sampling~
From the R, G and B data groups which are selected in the above described manner, average value signals are extracted by the integrating circuit 22.
The R~G, G-B and B R comparators 23, 24 and 25 compar2 the R, G and B average value signals after receipt of them from the integrating circuit 22, and the result of the comparisons are outputted to the data selector 26.
For example, the outpuk data after the comparisons of the R-G, G-B and B-R colors are as shown in the following table. ë
208~77 .. . ..
R<G G<B B~R Magnitudes of R, G and B signals O O 1 R>G>B
O 1 0 B>R>G
O 1 1 R>B>G
1 0 0 G>B>R
1 0 1 G>R>B
l 1 0 B>G>R
In the above table, the values under the heading of R~G, G<B and B<R are the output values of the R-G, G-B and B-R
comparators.
Based on the compared results of the comparators 23, 24 and 25, the data selector 26 combines the output signals of the R-G, G-B and B-R comparators 23, 24 and 25 with the main color signals, the first sub-color signals and the second sub-color signals. Then the data selector 26 selects one from among the R, G and ~ lines in order to output the main color signals, the ~irst sub-color signals or the second sub-color signals. Thus the color which is most contrasting to the color of the currently broadcasting program is outputted through the R, G and B driving circuits 27, 2~ and 29 to the R, G and B lines 16, 17 an~ 18.
2~8~77 As an example, the data selector 26 is formed by using a logic array based on the following table and ~ormulas.
R<G G<B B<R R out G out B out _ _ _ _ i R out = A & [(R<G ~ G<B & B<R ) + (R<G & G<B & B<R 3 ]
. + B ~ [ ( R<G & G<B ~ B<R ) + (R<G & G<B & B<R)]
+ C & [ ( R<G & G<B ~ P,<R) + ~ R<G ~ G<B & B<R)]
:~ :
, ~8~77 I
G out = A & [( R<G & G<B & B<R ) + ( R<~ & G<B & B<~) ]
B & [( R<G & G<B & B<R) + (R<G & G~B & B<R ) ]
+ C & [ (R<G & G<B & B<R ) + (R<G & G<B ~ B<R)]
B out = A & [ ( R<G & G<B & B<R) + (R<G & G<B & B<R)]
+ B & [( R<G & G<B & B<R) + (R<G & G<B & B<R )]
+ C & [ ( R<G & G<B & B<R ) + (R<G & G<B & B<R ) ]
In the a~ove table and ~ormula~, the s~mbols represent as follows:
: R<G: output value of the ~-G comparator 23;
G<B: output value of the &-B comparator 24;
B<R: output value of the B-R comparator 25;
A: value of the main color data supplied from the ROM
B: value of the first sub-color data supplied ~rom the ROM;
C: value of the second sub-color data supplied ~rom the ROM;
R out: values of R signals outputted to the ~ driving 2089~ ~7 circuit;
G out: values o~ the G signals outputted to the G driving circuit;
B out: values of B signals outputted to the B driving circuit.
Therefore, there can be formed an advertising on-screen display having colors definitely contrasting to the peripheral colors of the picture of the currently broadcasting program.
If the OSD circuit for displaying advertising picture data according to the present invention as described above is applied to a television receiv~r, not only the advertising picture data can be successively and continuously displayed for a certain period o~ time on a proper place of the screen, but also the color of the advertising picture can be automatically adjusted in such a manner as to be contrasted from and harmonized with the peripheral coloræ of the picture of the currently broadcasting program. Therefore, if a television receiver with the OSD
circuit of the present invention employed is installed for di~playing advertisements in public areas such as hotels, railway sta~ions, express bus termi.nals and the like, high advertising effects can be obtained with low costs.
Further, the OSD oircuit of displaying advertising pictures according to the present invention can be appl.ied to all kinds 20~77 Il of pictur~ displaying apparatuses including VCR (video cassette recorder), LDP (laser disc player) and the like.
. ' ~
Field of the invention The present invention relates to an OSD (on screen display) circuit for displaying advertising picture data on the screen of a television receiver, and particularly to an advertising data displaying circuit in which an advertising data continuously and successively appears on a part of the screen of a television receiver together with the picture of the broadcasting program in order to give a high advertising effect.
B~ck~round of the invention Conventionally, there has been developed an OSD type television receiver which i~ capable of displaying special data lsuch as the selected channel number, sound volume r current time and the like) in the form of an OSD picture on a part of the screen in addition to the picture of the currently broadcasting program. However, such OSD data can be displayed or erased as desired by the watchinq person, and the color of the OSD picture is limited to a mono color ~ont data.
Summary of the invention !
Therefore it is the object of the presen~ invention to 2~89977 provide an OSD circuit for displaying advertising picture data, in which it is possible to continuously and successively display advertising picture data of various colo:rs and a complicated design in the form of an OSD picture on a part of the screen of a television receiver, and the OSD picture cannot ~e erased by the user as desired, the color of the OSD picture be:ing made to be contrasting to the color of the picture of the broadcasting program.
In achieving the ~bove object, the OSD circuit according to the present invention includes: an oscillating means for supplying clock signals to a first counter means; first and second counter means for supplying horizontal and vertical scanning addresses so as for an advertising picture data to be outputted from a ROM; a third counter means for holding the advertising picture data so as for the next data not to be outputted from the ROM for a certain peri~d of time, by outputting to the ROM a delay signal corresponding to displaying an advertizing picture scene; an F/F (flip-flop~ circuit for preventing a dual display of the advertising data; a ROM for storing the advertising data separately for main color data, first sub-color data, sPcond sub-color data and brightness data; and an automatic color adjusting means for adjusting the color o the advertising pic~ure data to one definitely contrasting to the color of the picture of the currently broadcasting program, after receipt of the advertising data consisting of main color data, first sub-color data, and second sub-color data.
Brief description of the drawin~s The above object and other advantages of the present invention will become more apparent by describing in detail the preferred embodiment o~ the present invention with referencQ to the attached drawings in which:
Figure 1 is a block diagram showing the constitution of the OSD circuit for displaying advertising picture data according to the present invention; and Figures 2a and 2b illustrate wave patterns of the signals outputted from the respective blocks of Figure 1.
Description of the ~referred embodiment As shown in Figure 1, the OSD circuit for displaying advertising picture data according to the present invention includes: an oscillator 3; a ~irst counter 6; a second- .
counter 7; a third counter 8; a F/F tflip-10p) circuit 31;
ROMs 9, 10 and 11; and an automatic color adjusting means.
The oscillator 3 receives horizontal synchronizing signals '' '': `"- ' .:
. '' '~
20899r,~
1 from among television video signals, and then, performs oscillations to supply clock signals to the first counter 6, after making the clock signals synchronized with ~h~ horizontal synchronizing signals.
The first counter 6 generates horizontal scanning addresses and supplies them to the ROMs 9, 10 and 11 for horizontally scanning the advertising data after receipt of the clock signals from the oscillator 3. Then the first counter 6 is cleared upon receipt of a next horizontal synchroniæing signal, so that the horizontal scanning address should return to the initial value.
The second counter 7 generates vertical scanning addresses to supply them to the ROMs 9, 10 and 11 after receipt of the horizontal synchronizing signals (in the form of clock signals~
and by counting them. Then the second counter 7 is cleared upon receipt of a next vertical synchronizing signal 2, so that the vertical scanning address should return to the initial value.
The third counter 8 generates dslay signals for displaying an advertising data block of a picture scene for a certain period of time, by receiving and counting the vertical synchronizing signals in the form of clock signals. Further, the third counter 8 supplies delay signals through a decoder 12 to the ROMs 9, 10 and 11, so that the ROMs 9, 10 and 11 should output the same advertising data groups ~or a cer~ain period of time.
2~8~7~
Further, the third counter 8 is cleared upon receipt of a power-on signal from a power-on detector 13, so that the decoder 12 should be always able to select the ROMs g, 10 and 11 always in the same order.
The F/F circuit 31 supplies carry signals of the first counter 6 to disable the ROMs 9, 10 and 11, so that the dual display of the advertising data due to an address overflow of the first counter 6 should be prevented.
The ROMs g, 10 and 11 store the advertising data separately for main color data, first sub-color data, second sub-color data and brightness signal data.
The automat:ic color adjusting means receives advertising data consisting of main color data, first sub-color data and second sub-color data through a buffer 15 from the ROMs 10 and 11, and then, carries out color adjustments in such a manner that the color of the advertising data should be definitely contrasting with the color of the currently broadcasting program.
The automatic color adjusting means further includes: a multiplexer 19, a sample/hold circuit 20, an integrating circuit 22, R-G, G-B and ~R comparators 23, 2~ and 25, and a data selector 26.
The multiplexer 19 selects one at a time from among R
(red), G (green) and B (blu~) video signals of R, G and B lines 2~8~77 16, 17 and 18 under the control of the delay signals of the third counter 8, and supplies the selected signals to the sample/hold circuit 20.
The sample/hold circuit 20 samples out a plurality of sets of signals from among the R, G and B signals as required for the picture data after receipt of the R, G and B signals from the multiplexer 19 in a successive manner. The sample/hold circuit sends t~le sampled signals through a demultiplexer 21 to the integrating circuit 22. Further, the sample/hold circuit 20 receives a hold signals which is formed by the sum addition of a blank signal of the second counter 7 and an OE signal of the F/F circuit 31, so that the advertising picture data which are outputted through the R, G and B lines should not be read during the sampling.
The integrating circuit 22 extracts ~, G and B average value signals from among the R, G and B sampled data groups which are received through the demultiplexer 21.
The R-G, G-~ and B-R comparators 23, 24 and 25 respectively compare the magnitudes of the R, G and B signals after extraction of them from the picture signals for the peripheral portions of the advertising picture. Then the comparators 23, 24 and 25 supply the compared data to the data selector 26.
The data selector 26 combines the advertising picture data 2 ~) 8 9 ~
,, supplied from the buffer 15, basad on the compared results of the comparators 23, 24 and 25. Then the data selector 26 forms an advertising picture da~a of a clear and harmoniæed color which is definitely contrasting to the color of the currently broadcasting program. Then the data selector 26 supplies the mentioned data through R, G and B driving circuits 27, 28 and 29 to the R, G and B lines 16, 17 and 18, so that the data should be displayed in the form o~ an OSD picture.
The circuit of the present invention constituted as above will now be described as to its operations.
First, by using the horizontal synchronizing signals 1 as inhibiting signals, the oscillator 3 operates in such a manner as to output its output in synchronization with the horizontal synchronizing signals.
Then the first counter 6 is let to count using the output signals of the oscillator 3 as clock signals, and the outputs of the first counter 6 are used as the horizontal scanning addresses for the ~OMs 9, 10 and 11. By using the hor.izontal synchronizing signals 1 as clock signals, the second counter 7 is let to count, so as for the outputs of the second counter 7 to be usad as the vertical scanning addresses for the ROMs 9, 10 and 11. Undar this condition, when a next horizontal synchroniæing signal 1 is inputted, the first counter 6 is 208~g77 cleared, so that the horizontal scanning address should return to the initial value. Meanwhile, if a vertical synchronizing signal 2 is inputted, the second counter 7 is cleared, so that the vertical scanning address shoul.d return to the initial value. Then the count of the ROM addresses for the portion of one picture scene is terminated, and the count of a next picture portion is started.
Further, the third counter 8 is let to count using the vertical synchronizing signals 2 as clock signals to generate delay signals, so that an advertising picture block of one picture scen~ should be made to appear on the screen of a television receiver for a certain period of time. The delay signal is supplied through the decoder 12 to the ROMs 9, 10 and ~1, so that the next picture data should not be outputted from the ROMs 9, 10 and 11. The decoder 12 controls the output enable signals of the ROM 9, 10 and 11 by utilizing the output signals of the third counter 8. The third counter 8 is cleared by the power-on detecting signals of the power-on detector 13, and therefore, the ~OMs 9, 10 and 11 are always selected in a successive mannerO
Meanwhile, if a carry signal is generated fr~m the first counter 6 at the time point when the horizontal scanning of a first round is terminated, the ROMs 9,10 and 11 are disabled :
20g997~1 by the F/F circuit 31 which uses the carry signals as clock signals. Consequently, there is prevent:ed a dual display of the advertisin~ data caused hy an address overflow of the first counter 6, so that another advertising picture should not be displayed at another place on the screen.
If the output data of the ROMs 9, 10 and 11 consists of 8 bits, the data of the actual advertising picture sonsists of 4 bits. Therefore, if the data i5 divided into upper 4 bits and lower 4 bits by means of the data selector 14, and if the data are sent to the buffer 15 by 4 bits and 4 bits, then the memory spaces of the ROMs 9, 10 and 11 can be saved.
The advertising data outputted in the above described manner is converted into a color which is definitely contrasting to the color of the picture of the currently broadcasting program.
These converted data are outputted through the R, G and B
driving circuits 27, 28 and 29 to the R, G and B lines 16, 17 an~
18, before being displayed on the relevant portion of the television screen.
Now the operation of the automatic color adjusting circuit will be described further.
First, the multiplexer 19 receives R, G and B signals of the picture data of the currently broadcasting program through the R, G and B lines 16, 1~ and 1~ respectively, and selects 2~g9977 A
signals one by one from the R, G and B signals to output them to the sample/hold circuit 20 under the conkrol of the third counter 8.
The sample/hold circuit 20 receives the R, G and B signals from the multiplexer 19 in a sequential manner, and carries out a plurality of required samplings from the R, G and B signals of the picture data to output them through the demultiplexer 21 to the integrating circuit 22. Further, the sample/hold circuit 20 receives hold signals which are formed by the sum addition of blank signals of the second counter 7 and OE signals of the F/F circuit 31, so that the advertising pi.cture data should not be read during the sampling~
From the R, G and B data groups which are selected in the above described manner, average value signals are extracted by the integrating circuit 22.
The R~G, G-B and B R comparators 23, 24 and 25 compar2 the R, G and B average value signals after receipt of them from the integrating circuit 22, and the result of the comparisons are outputted to the data selector 26.
For example, the outpuk data after the comparisons of the R-G, G-B and B-R colors are as shown in the following table. ë
208~77 .. . ..
R<G G<B B~R Magnitudes of R, G and B signals O O 1 R>G>B
O 1 0 B>R>G
O 1 1 R>B>G
1 0 0 G>B>R
1 0 1 G>R>B
l 1 0 B>G>R
In the above table, the values under the heading of R~G, G<B and B<R are the output values of the R-G, G-B and B-R
comparators.
Based on the compared results of the comparators 23, 24 and 25, the data selector 26 combines the output signals of the R-G, G-B and B-R comparators 23, 24 and 25 with the main color signals, the first sub-color signals and the second sub-color signals. Then the data selector 26 selects one from among the R, G and ~ lines in order to output the main color signals, the ~irst sub-color signals or the second sub-color signals. Thus the color which is most contrasting to the color of the currently broadcasting program is outputted through the R, G and B driving circuits 27, 2~ and 29 to the R, G and B lines 16, 17 an~ 18.
2~8~77 As an example, the data selector 26 is formed by using a logic array based on the following table and ~ormulas.
R<G G<B B<R R out G out B out _ _ _ _ i R out = A & [(R<G ~ G<B & B<R ) + (R<G & G<B & B<R 3 ]
. + B ~ [ ( R<G & G<B ~ B<R ) + (R<G & G<B & B<R)]
+ C & [ ( R<G & G<B ~ P,<R) + ~ R<G ~ G<B & B<R)]
:~ :
, ~8~77 I
G out = A & [( R<G & G<B & B<R ) + ( R<~ & G<B & B<~) ]
B & [( R<G & G<B & B<R) + (R<G & G~B & B<R ) ]
+ C & [ (R<G & G<B & B<R ) + (R<G & G<B ~ B<R)]
B out = A & [ ( R<G & G<B & B<R) + (R<G & G<B & B<R)]
+ B & [( R<G & G<B & B<R) + (R<G & G<B & B<R )]
+ C & [ ( R<G & G<B & B<R ) + (R<G & G<B & B<R ) ]
In the a~ove table and ~ormula~, the s~mbols represent as follows:
: R<G: output value of the ~-G comparator 23;
G<B: output value of the &-B comparator 24;
B<R: output value of the B-R comparator 25;
A: value of the main color data supplied from the ROM
B: value of the first sub-color data supplied ~rom the ROM;
C: value of the second sub-color data supplied ~rom the ROM;
R out: values of R signals outputted to the ~ driving 2089~ ~7 circuit;
G out: values o~ the G signals outputted to the G driving circuit;
B out: values of B signals outputted to the B driving circuit.
Therefore, there can be formed an advertising on-screen display having colors definitely contrasting to the peripheral colors of the picture of the currently broadcasting program.
If the OSD circuit for displaying advertising picture data according to the present invention as described above is applied to a television receiv~r, not only the advertising picture data can be successively and continuously displayed for a certain period o~ time on a proper place of the screen, but also the color of the advertising picture can be automatically adjusted in such a manner as to be contrasted from and harmonized with the peripheral coloræ of the picture of the currently broadcasting program. Therefore, if a television receiver with the OSD
circuit of the present invention employed is installed for di~playing advertisements in public areas such as hotels, railway sta~ions, express bus termi.nals and the like, high advertising effects can be obtained with low costs.
Further, the OSD oircuit of displaying advertising pictures according to the present invention can be appl.ied to all kinds 20~77 Il of pictur~ displaying apparatuses including VCR (video cassette recorder), LDP (laser disc player) and the like.
. ' ~
Claims (3)
1. An OSD (on-screen display) circuit for displaying advertising picture data on the screen of a television receiver, comprising:
an oscillating means 3 for generating oscillating signals synchronized with horizontal synchronizing signals 1 after receipt of the horizontal synchronizing signals 1 from among television video signals, and for supplying the oscillating signals as clock signals to a first counter means 6;
said first counter means 6 generating horizontal scanning addresses to supply them to ROMs 9, 10 and 11 by counting the clock signals from said oscillating means 3, and being cleared upon receipt of a next horizontal synchronizing signal so as for the horizontal scanning address to return to the initial value;
a second counter means 7 for generating vertical scanning addresses by counting the horizontal synchronizing signals as clock signals in order to supply them to said ROMs 9, 10 and 11, and for being cleared upon receipt of a vertical synchronizing signal 2 so as for the vertical scanning address to return to the initial value;
a third counter means 8 for generating delay signals required for displaying an advertising data block of one picture scene for a certain period of time on the screen by counting the vertical synchronizing signals 2 as clock signals, and for supplying the delay signals through a decoder 12 to said ROMs 9, 10 and 11 so as for said ROMs 9, 10 and 11 to output the same advertising picture data groups for a certain period of time;
said third counter means 8 being cleared upon receipt of a power-on signal from a power-on detector 13 so as for said decoder 12 to select said ROMs 9, 10 and 11 in a predetermined sequence, and so as for an advertising data to be outputted in a predetermined sequence;
an F/F (flip-flop) circuit 31 for generating disabling signals to said ROMs 9, 10 and 11 by using carry signals as clock signals after receipt the carry signals from said first counter means 6, in order to prevent a dual display of the advertising picture data on the screen, said dual display being attributable to an address overflow in said first counter means 6;
said ROMs 9, 10 and 11 storing advertising data separately for main color data, first sub-color data, second sub-color data and brightness data; and an automatic color adjusting means for selecting colors definitely contrasting to the colors of the picture of the currently broadcasting program, after receipt of an advertising data (consisting of main color data, first sub-color data and second sub-color data) through a buffer 15 from said ROMs 9, 10 and 11.
an oscillating means 3 for generating oscillating signals synchronized with horizontal synchronizing signals 1 after receipt of the horizontal synchronizing signals 1 from among television video signals, and for supplying the oscillating signals as clock signals to a first counter means 6;
said first counter means 6 generating horizontal scanning addresses to supply them to ROMs 9, 10 and 11 by counting the clock signals from said oscillating means 3, and being cleared upon receipt of a next horizontal synchronizing signal so as for the horizontal scanning address to return to the initial value;
a second counter means 7 for generating vertical scanning addresses by counting the horizontal synchronizing signals as clock signals in order to supply them to said ROMs 9, 10 and 11, and for being cleared upon receipt of a vertical synchronizing signal 2 so as for the vertical scanning address to return to the initial value;
a third counter means 8 for generating delay signals required for displaying an advertising data block of one picture scene for a certain period of time on the screen by counting the vertical synchronizing signals 2 as clock signals, and for supplying the delay signals through a decoder 12 to said ROMs 9, 10 and 11 so as for said ROMs 9, 10 and 11 to output the same advertising picture data groups for a certain period of time;
said third counter means 8 being cleared upon receipt of a power-on signal from a power-on detector 13 so as for said decoder 12 to select said ROMs 9, 10 and 11 in a predetermined sequence, and so as for an advertising data to be outputted in a predetermined sequence;
an F/F (flip-flop) circuit 31 for generating disabling signals to said ROMs 9, 10 and 11 by using carry signals as clock signals after receipt the carry signals from said first counter means 6, in order to prevent a dual display of the advertising picture data on the screen, said dual display being attributable to an address overflow in said first counter means 6;
said ROMs 9, 10 and 11 storing advertising data separately for main color data, first sub-color data, second sub-color data and brightness data; and an automatic color adjusting means for selecting colors definitely contrasting to the colors of the picture of the currently broadcasting program, after receipt of an advertising data (consisting of main color data, first sub-color data and second sub-color data) through a buffer 15 from said ROMs 9, 10 and 11.
2. The OSD circuit for displaying advertising picture data on the screen of a television receiver as claimed in claim 1, wherein said automatic color adjusting means comprises:
a multiplexer means 19 for selecting signals one by one from R,G and B signals of the television video signals through R, G and B lines 16, 17 and 18 under the control of the delay signals of said third counter means 8, in order to supply them to a sample/hold means 20;
said sample/hold means 20 sampling a plurality of signals for each set of the R, G and B signals after receipt of them from said multiplexer 19 in a sequential manner in order to send the sampled signals through a demultiplexer 21 to an integrating means 22;
said sample/hold means 20 holding the advertising picture data of said R, G and B lines 16, 17 and 18 so as for the data not to be read during the sampling upon receipt of a hold signal, said hold signal being formed by the sum addition of a blanking signal of said second counter means 7 and an OE signal of said F/F circuit 31;
said integrating means 22 extracting R, G and B average value signals from the R, G and B sampling data after receipt of them from said demultiplexer 21;
R-G, G-B and B-R comparing means 23, 24 and 25 for comparing the magnitudes of the picture signals extracted from the peripheral regions of the advertising portion, in order to output the compared data to a data selecting means 26;
said data selecting means 26 combining the advertising picture data after receipt of them from said buffer means 15 based on the compared results of said comparing means 23, 24 and 25; and said data selecting means sending through R, G and B driving circuits 27, 28 and 29 to said R, G and B lines 16, 17 and 18 an advertising picture data having the most clear and harmonized colors contrasting to the colors of the picture of the currently broadcasting program, thereby forming an OSD picture.
a multiplexer means 19 for selecting signals one by one from R,G and B signals of the television video signals through R, G and B lines 16, 17 and 18 under the control of the delay signals of said third counter means 8, in order to supply them to a sample/hold means 20;
said sample/hold means 20 sampling a plurality of signals for each set of the R, G and B signals after receipt of them from said multiplexer 19 in a sequential manner in order to send the sampled signals through a demultiplexer 21 to an integrating means 22;
said sample/hold means 20 holding the advertising picture data of said R, G and B lines 16, 17 and 18 so as for the data not to be read during the sampling upon receipt of a hold signal, said hold signal being formed by the sum addition of a blanking signal of said second counter means 7 and an OE signal of said F/F circuit 31;
said integrating means 22 extracting R, G and B average value signals from the R, G and B sampling data after receipt of them from said demultiplexer 21;
R-G, G-B and B-R comparing means 23, 24 and 25 for comparing the magnitudes of the picture signals extracted from the peripheral regions of the advertising portion, in order to output the compared data to a data selecting means 26;
said data selecting means 26 combining the advertising picture data after receipt of them from said buffer means 15 based on the compared results of said comparing means 23, 24 and 25; and said data selecting means sending through R, G and B driving circuits 27, 28 and 29 to said R, G and B lines 16, 17 and 18 an advertising picture data having the most clear and harmonized colors contrasting to the colors of the picture of the currently broadcasting program, thereby forming an OSD picture.
3. The OSD circuit for displaying advertising picture data on the screen of a television receiver as claimed in claim 2, wherein the logic formulas for the R, G and B color data of the advertising picture data outputted from said data selecting means to said R, G and B driving circuits 27, 28 and 29 comprises a logic array as specified below:
R out = A & [(R<G & ??? & ??? ) + (R<G & G<B & ??? )]
+ B & [( ??? & G<B & ??? ) + (R<G & ??? & B<R)]
+ C & [( ??? & ??? & B<R) + ( ??? & G<B & B<R)]
G out = A & [( ??? & G<B & ??? ) + ( ??? & G<B & B<R)]
+ B & [( ??? & ??? & B<R) + (R<G & G<B & ???)]
+ C & [(R<G & ??? & ??? ) + ( R<G & ??? & B<R)]
B out = A & [( ??? & ??? & B<R) + (R<G & ??? & B<R)]
+ B & [( ??? & G<B & B<R) + (R<G & ??? & ??? )]
+ C & [( ??? & G<B & ??? ) + (R<G & G<B & ???(]
where the symbols in the above formulas represent as follows:
R<G: output value of said R-G comparing means 23;
G<B: output value of said G-B comparing means 24;
B<R: output value o said B-R comparing means 25;
A: value of the main color data supplied from said ROM;
B: value of the first sub-color data supplied from said ROM, C: value of the second color data supplied from said ROM;
R out: values of the R signals outputted to said R driving circuit;
G out: values of the G signals outputted to said G driving circuit; and B out: values of the B signals outputted to said B driving circuit.
R out = A & [(R<G & ??? & ??? ) + (R<G & G<B & ??? )]
+ B & [( ??? & G<B & ??? ) + (R<G & ??? & B<R)]
+ C & [( ??? & ??? & B<R) + ( ??? & G<B & B<R)]
G out = A & [( ??? & G<B & ??? ) + ( ??? & G<B & B<R)]
+ B & [( ??? & ??? & B<R) + (R<G & G<B & ???)]
+ C & [(R<G & ??? & ??? ) + ( R<G & ??? & B<R)]
B out = A & [( ??? & ??? & B<R) + (R<G & ??? & B<R)]
+ B & [( ??? & G<B & B<R) + (R<G & ??? & ??? )]
+ C & [( ??? & G<B & ??? ) + (R<G & G<B & ???(]
where the symbols in the above formulas represent as follows:
R<G: output value of said R-G comparing means 23;
G<B: output value of said G-B comparing means 24;
B<R: output value o said B-R comparing means 25;
A: value of the main color data supplied from said ROM;
B: value of the first sub-color data supplied from said ROM, C: value of the second color data supplied from said ROM;
R out: values of the R signals outputted to said R driving circuit;
G out: values of the G signals outputted to said G driving circuit; and B out: values of the B signals outputted to said B driving circuit.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920003372A KR930018994A (en) | 1992-02-29 | 1992-02-29 | T.V built-in image display circuit |
| KR92-3372 | 1992-02-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2089977A1 true CA2089977A1 (en) | 1993-08-30 |
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ID=19329824
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002089977A Abandoned CA2089977A1 (en) | 1992-02-29 | 1993-02-19 | Osd circuit for displaying advertising picture data |
Country Status (18)
| Country | Link |
|---|---|
| US (1) | US5325183A (en) |
| JP (1) | JPH07123306B2 (en) |
| KR (1) | KR930018994A (en) |
| CN (1) | CN1076071A (en) |
| AR (1) | AR248324A1 (en) |
| AU (1) | AU3375193A (en) |
| BR (1) | BR9300684A (en) |
| CA (1) | CA2089977A1 (en) |
| CZ (1) | CZ29093A3 (en) |
| DE (1) | DE4224346C2 (en) |
| ES (1) | ES2070714B1 (en) |
| FR (1) | FR2688089B1 (en) |
| GB (1) | GB2264604A (en) |
| HU (1) | HUT64664A (en) |
| MX (1) | MX9204615A (en) |
| PL (1) | PL297884A1 (en) |
| PT (1) | PT101206A (en) |
| ZA (1) | ZA931334B (en) |
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-
1992
- 1992-02-29 KR KR1019920003372A patent/KR930018994A/en not_active Application Discontinuation
- 1992-07-23 DE DE4224346A patent/DE4224346C2/en not_active Expired - Fee Related
- 1992-08-03 JP JP4227895A patent/JPH07123306B2/en not_active Expired - Lifetime
- 1992-08-07 FR FR9209844A patent/FR2688089B1/en not_active Expired - Fee Related
- 1992-08-07 GB GB9216761A patent/GB2264604A/en not_active Withdrawn
- 1992-08-07 MX MX9204615A patent/MX9204615A/en not_active IP Right Cessation
- 1992-08-17 US US07/931,186 patent/US5325183A/en not_active Expired - Fee Related
-
1993
- 1993-02-19 CA CA002089977A patent/CA2089977A1/en not_active Abandoned
- 1993-02-23 AU AU33751/93A patent/AU3375193A/en not_active Abandoned
- 1993-02-25 ZA ZA931334A patent/ZA931334B/en unknown
- 1993-02-26 CZ CZ93290A patent/CZ29093A3/en unknown
- 1993-02-26 AR AR93324394A patent/AR248324A1/en active
- 1993-02-26 PL PL29788493A patent/PL297884A1/en unknown
- 1993-02-26 BR BR9300684A patent/BR9300684A/en not_active IP Right Cessation
- 1993-02-26 HU HU9300549A patent/HUT64664A/en unknown
- 1993-02-26 ES ES09300386A patent/ES2070714B1/en not_active Expired - Lifetime
- 1993-02-26 PT PT101206A patent/PT101206A/en not_active Application Discontinuation
- 1993-02-27 CN CN93101881A patent/CN1076071A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07184232A (en) | 1995-07-21 |
| KR930018994A (en) | 1993-09-22 |
| FR2688089A1 (en) | 1993-09-03 |
| ES2070714R (en) | 1996-11-01 |
| ES2070714A2 (en) | 1995-06-01 |
| PL297884A1 (en) | 1993-11-02 |
| GB9216761D0 (en) | 1992-09-23 |
| AR248324A1 (en) | 1995-07-12 |
| AU3375193A (en) | 1993-09-02 |
| BR9300684A (en) | 1993-08-31 |
| HU9300549D0 (en) | 1993-05-28 |
| HUT64664A (en) | 1994-01-28 |
| DE4224346A1 (en) | 1993-09-16 |
| MX9204615A (en) | 1993-09-01 |
| ES2070714B1 (en) | 1997-06-01 |
| PT101206A (en) | 1994-07-29 |
| FR2688089B1 (en) | 1994-06-03 |
| DE4224346C2 (en) | 1993-12-23 |
| US5325183A (en) | 1994-06-28 |
| ZA931334B (en) | 1993-09-30 |
| GB2264604A (en) | 1993-09-01 |
| JPH07123306B2 (en) | 1995-12-25 |
| CN1076071A (en) | 1993-09-08 |
| CZ29093A3 (en) | 1993-11-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| FZDE | Discontinued | ||
| FZDE | Discontinued |
Effective date: 19950819 |