CA2074241A1

CA2074241A1 - Silicon-on-silicon differential input sensors

Info

Publication number: CA2074241A1
Application number: CA002074241A
Authority: CA
Inventors: Peter V. Loeppert; Warren S. Graber
Original assignee: Peter V. Loeppert; Warren S. Graber; Monolithic Sensors Inc.
Current assignee: Monolithic Sensors Inc
Priority date: 1991-07-22
Filing date: 1992-07-20
Publication date: 1993-01-23
Also published as: EP0528551A2; EP0528551A3; US5178015A; AU2044892A

Abstract

ABSTRACT

An improved diaphragm sensor employs silicon-on-silicon technology and has monolithic integrated signal conditioning circuitry. The support circuitry minimizes the effects of stray capacitance and may be configured to provide either analog or digital output to external terminals. It has a wide band of linearity and is particularly useful for accurately measuring pressure less than 0.5 PSI. The sensor is constructed by joining a silicon top plate having a mechanical pressure stop, a reduced thickness silicon diaphragm and a back plate having CMOS
circuitry thereon. These components are bonded together by eutectric soldering.

Description

2~7~

PATENT
DOC~ET NO. 2067 SILICON-ON-SILICON DIFF~RE~TIAL INP~ SE~SORS

BACKGROUND AND OBJECTS OF THE INVENTION

The present invention relates to diaphragm pressure sensors, and more particularly, ~o silicon-on-silicon diferen-tial inpu~ sensors with integrated signal conditioning circuitry and the process for producing them.

Sensors having a reduced thickness silicon diaphragm affixed to a glass wafer are known in the art. ~.5. Patent No.
4,543,457 issued to Petersen et al. on September 24, 1985 ("the Petersen patent") discloses such a sensor. Sensors of this type ," ' may be used to measure a variety of parameters, such as pressure, t~mperature, acceleration or humidity. Silicon diaphra~m sensors are reliable and may be~'fab'rica~ed-a't''low cost. The output of such a sensor changes as the diaphragm is deflected by the condi-tion sought to be measured.
. .

A particular type of sensor uses variable capaci~ance.
In variable capaci~ance sensors, the diaphragm i5 spaced apart from a confronting electrical plate. The capacitance be~ween the diaphragm and the confronting pla~e changes in response to the deflection of the diaphragm. The usefulness of a given sensor is determined in part by the range of conditions over which the change in capacitance remains linear with respect to the change ' ' ' ~

- 2~7~2~1 in input condition. Superior performance has been obtained with diaphragms of corrugated and bossed construction. These diaphragms deflect while remaining substantially parallel with the confronting contact, minimizing the undesirable effects of diaphragm curvature on sensor accuracy. Corrugated diaphragms have much larger regions of linearity than diaphragms without corrugations.

A major difficulty with conventional silicon-on-glass sensors of the type shown in ~he prior art is the difference ~etween the coefficients of th~rmal expansion of silicon and glass. The silicon diaphra~ms are typically ~onded to glass wafers by electrostatic bonding methods. Sensor inaccuracies result due to temperature change~ because the silicon diaphragm and the glass wafer have different coefficients of expansion.
This affects the g~ometric configuration of the device, resulting in degraded measurement accuracy. This problem could be avoided by mounting the silicon diaphragm on a wafPr of similar ~ilicon mat~rial; however, stray capacitances are introduced into the system when the diaphragm is bonded to silicon material.

' ' ~ 207~2~

Such stray capacitances present serious problems because they obscure accurate measurement of the capacitance between the diaphragm and the confronting electrode on the silicon wafer, effectively rendering measurements from the sensor useless. Historically, the thermal expansion problem, which arises from mounting the silicon diaphragm on glass, has been perceived by those skilled in the art as the least troublesome of the two. On the other hand, if the stray capacitance problem could be solved, silicon-on-silicon configurations free from thermal expansion problems could be produced.

Another problem with the silicon-on-glass construction is that it precludes the use of on board, integrated electronics for conver~ing t~e output of the sensor into meaningful form and transmitting it to external electrodes. Instead, the circuitry must be produced -~eparately and affixed to the gla~s wafer at a later tLme. These ~hybrid~ sensors are costly and inefficient to manufacture. Prior attempts to create on -piece silicon-on-silicon sensors have failed because ~he micro-electronics opera~
~ions necessary to deposit integrated circuitry on the silicon are incompatible with the process of micro~machining operations necessary to create the diaphragm. No suitable solution to these problems has heretofore been found.

: "
: ' ' ' ~' ' ' 20742~
.

Accordingly, it is an object of the invention to pro~ide a siLicon-on-silicon capacitive sensor.

It is another object of the invention to provide such a sensor having monolithic integrated circuitry.

It is a further object of the in~ention to provide such a sensor having durable construction and capable of being pro-duced at low cost.

These and other objects of the invention will become apparent to those skilled in the art when the following detailed description of the invention i5 read in conjunction with the accompanying drawings.

S~M~K~ OF THE INVENTION

The present invention is a silicon-on-silicon capaci-tive sensor with monolithic integrated signal condi~ioning circuitry. It oversomes the thermal mismatch problem that occurs when a reduced thickness silicon diaphragm is mounted on a glass back plate. The support circuitry is designed to minimize the undesirable effects o~ stray capacitance historically encountered in prior attemp~s to utilize silicon-on-silicon technolosy. The support circuitry may be configured to provide either analog or `' - 4 -~- : , 2~7~2~

digital outputs. The sensor may be us~d to measure a variety of parameters, such as pressure, acceleration, temperature or h~nidity. It has a wide band of linearity and is particularly useful for accurately measuring pressures less than 0.5 PSI.

The sensor of the present in~ention is constructed by bonding together three silicon components: (1) a top plate having a mechanical pressure stop, (2) a reduced thic~ness diaphragm and (3) back plate containing CMOS circuitry. The diaphragm and ~ack plate have two sets of confronting electrodes.
One set provides a reference capacitance and the other a variable capacitance dependent on the deflection of the diaphragm. The three components are produced separately, avoiding the historic problem of incompatibility between micromachining and CNOS
processing, which has previously made monolithic integrated support circuitry Lmpractical. The components are then bonded together by eutectic soldering.

BRIEF DESCRIPTION OF THE DRANINGS

FIG. 1 is a cross-sectional side view of the capacitive sensor of the present in~ention.

FIG. 2 is a plan view in partial section of the capaci-tive sensor of the present invention.

, 207~2~1 FIG. 3 is a side view in partial section of a fully assembled sensor constructed according to the teachings of the present invention.

FIG. 4 is a schematic drawing of a first embodiment of integrated analog siynal conditioning circuitry which may be deposited on the C~OS back plate of the present in~ention.

FIG. 4a is a timing diagram showing various signals associated with the circuit of FIG. 4.

FIG. 5 is a schematic drawing of a second ambodLment of integrated analog signal conditioning circuit~y which may ~e deposited on the CMOS back plate of the present invention.

FIG. 6 is a schematic drawing of an embodiment of integrated digital signal conditioning circuitry which may be deposited on the CMOS back plate of the present invention.

FIG. 7 is a schematic drawing of~a relaxation oscilla-tor suitable for use in the circuit of FIG. 6.

FIG. 7a is a schematic useful in understanding the effect of the guard region.

:, ,- ~ .
, - . .:
. ~
`: ~

20742~1 DETAILED DESCRIPTION OF THE PREFE~RED EMBODIMENT

Referring to the drawings, F~G. 1 shows a cross-sectional side view of the capacitive sensor of the present invention. ~ silicon top plate 10 provides a mechanical pressure stop that limits the travel of the diaphragm when the sensor is exposed to pressures beyond its measurement range. The top plate 10 also ac~s as a buffer against package-induced stress. A first fluid a~cess port 12 is formed in the top plate 10 by anisotropic etching, a process well-known in the art.

A diaphragm ring 14 has a central portion defining a reduced-thickness silicon diaphragm 16. The diaphragm 16 is typically 800-1200 microns square. ~he diaphragm 16 includes a bo~s ~tructure 18, which contributes to the linearity of the sensor by reducing curvature of ths diaphragm as it travels responsive to the force being measured. The boss 18 is created by anisotropic etching of the diaphragm ring 14 and is typically 500-800 microns square a~ the bot~om tapering ~o 50-80 microns square at the top. The boss 18 al50 prevents destruction of the diaphragm under transient conditions by abutting the top plate 10. Thus, movement of the diaphragm 16 is lLmited to the useful range of the sensor. I~ should be noted that the location of the port 12 is offset from the position where the boss 18 would . ... ...

.

2~7~241 strike the top plate 10 to prevent it from becoming lodged therein.

Additionally, the diaphragm 16 is constructed to include corrugations 20. As previously noted, corrugations contribute to the linearity of the sensor. They reduce stress on the diaphragm 16 as it is deflected. The corrugations 20 are created by i50tropiC etching and are typically 10 microns deep and 25 microns wide. The diaphragm ring 14 also has a uniform recess 22 etched therein. The upper surface of recess 22 forms one of the electrode surfaces for a reference capacitance, as well as contributing to the flexibility of the diaphragm 16. An etch stop is difused (typically 2 microns deep) into the bottom of the diaphragm to set the thickness of the reduced-thickness portion of the diaphragm. A P+ etch stop may be used; howe~er, a lightly doped N-type electromechanical etch stop i pref~rred to preserve the well-behaved, low-stress nature of the bulk silicon.

The diaphragm 16 has a second fluid access port etched therein. The second port permits pressure equalization on both sides of the diaphragm. Thus, the measurements made by the sensor reflect the difference between the pressure source pre-sented to the firs~ port 12 and the second port. The top plate 10 is eutectically soldered to the diaphragm 14.

, '....... ~ ~ . ' :
, . : . . , :
,` ~ ~ ' '' ' ' :

2~7~24~

The diaphra~m ring 14 is eutectically soldered to a back plate 26. The back plate 26 has a conducti~e pad 28 deposited thereon directly beneath the boss 18 to form a measure-ment capacitor in combination with the underside of diaphragm 16.
The capacitance of the measurement capacitor changes as the diaphragm flexes responsive to the pressure differential provided to the first and second ports.

A second conductive pad 30 is deposited on the upper surface of the back plate 26 to create a reference capacitor when brought into confrontation with the underside of the diaphragm ring 14 exposed by the formation of the recess 22. The capaci-tance of the reference capacitor remains constan~ during opera-tion of the sensor because this portion of the diaphragm ring remains at a fixed distance from the conducti~e pad 30.

A third conductive pad 32 (see FIG. 2) is deposited on the back plate 26 to act as a common terminal for the reference capacitor and the measurement capacitor. As will be apparent to those skilled in the art, the en~ire diaphragm ring 14 is conduc-tive, thereby providing a common conduc~i~e surface for both ~he reference and measurement capacitors. The third conductiYe pad 32 electrically connects the ring 14 to the integrated signal conditioning circuitry, as will be fully described hereinafter.

-- _ g _ .. .- . :, 2~7~24~

FIG. 2 shows a plan view of the capacitive sensor of ~he present invention in partial section. The layout of the conductive pads 28, 30 and 32 may ~e clearly seen. The back plate 26 has an area 34 onto which integrated signal conditioning circuitry may be deposited. Inputs and outputs from this circuitry are electrically connected to a plurality of bond pads 36. The bond pads 36 may be connected to external leads by conventional wire bonding methods.

FIG. ~ shows a side view in partial section of a fully assembled sensor. A plastic housing 38 encloses the sensor assembly, providing openings for the first port 12 and the second port 24. The sensor assemhly is secured to a base 4Q having a plurality of external leads 42 mounted thereto. Wire bonds 44 connect the external leads 42 to the bond pads 36, effectively providi~g external access to the output from the signal condi-tioning circuitry.

A significant aspect of the present in~en~ion is the design of the integrated signal conditioning circui~ry. ~he diaphragm has b~en designed such that its deflection is linear with the sen~or input. This results in the measured capaci~ance C~e~ varying inversely with ~he sensor input. The object of the integrated circuitry is to gener te an output direc~ly propor-tional to the ratio of the reference capacitance to the measured `- -- 10 --207~2~1 capacitance and thus is directly proportional to the sensor input. Including the reference capacitance in the ratio cancels the effects of process variations on the gap between the capacitor plates and the variation o~ the dielectric constant of the fluid between the capacitor plates. A second object of the circuitry is to minimize the effects of stray capacitance intro-duced between each of the capacitor plates and the substrate which are introduced by the silicon on silicon technology. A
constraint that the circuits must meet is that the diaphra~m serves as a common terminal to both capacitors.

FIG. 4 shows an example of a switched capacitor analog signal conditioning circuit suitable for use with the sensor of the present invention. This circuit uses a switched capacitor gain cell to amplify a known dc input voltage V~ so that the output of the circuit Voutr af~er sampling at the second stage, varies proportionally with the ratio of the reference capacitance Cr~r to the measured capacitance C~. C~ar is the fi~ed capaci-tance between the second conductive pad 30 and the portion of the diaphra~m ring 14 ~xposed by the recess 22 (see YIG. 1). C~
the capacitance between the first conductive pad 28 and the diaphragm 16. As previously described, this capacitance varies as the diaphragm 16 deforms responsive to the condition ~eing measured.

- 20~42~

The circuit of Figure 4 is preferably implemented in CMOS technology where the switches will be simple complementary transistor pairs. The switches are turned on and off periodi-cally as indicated in Figure 4a. A logical 1 in Figure 4a indicates that the associated switches are closed. ~1 and ~ are non-o~erlapping waveforms of a two phase clock. Operation of the gain cell with this clock effects multiplication of V~er by the ratio of Cre~ to C~8. Clock signal ~3 samples the output from operational amplifier 46. The sample is held by capacitor 49 and VOUt is buffered by operational amplifier 48.

Stray or parasitic capacitances 45 and 47 are intro-duced into the circuit because of the use of silicon in the construction of the diaphragm ring 14 and the C~OS bac~ plate 26.
The exact values of the stray capacitances 45 and 47 are diffi-cult to determine with any precision, but are large compared to Cr~r and C~.. The topology of the cireuit of Figure 4 forces the stray capacitances 45 to low impedance nodes where ~heir effect on the output is minimized. The stray capacitance 47 is con- ;
nected to a virtual ground and its effecti~e value is reduced by a factor equal to the open loop gain of the operational amplifier 46, thus minLmizing its effact on the output.

.

.

:, ,.

- ~742~1 FIG. 5 shows a second embodiment of analog signal conditioning circuitry employing an integratorJdifferentiator technique. This circuit employs the well-known fact that an op-amp integrator multiplies its input by l/RC while an op-amp differentiator multiplies its input by RC. VOUt is forced to be proportional to CrOr/C=eo~ by employing an integrator~ the output of which changes proportionally to l/C~9~ followed by a differentiator having an output proportional to Cr~. An input voltage signal is generated by incorporating an integrating op-amp circuit 50 into a simple relaxation oscilla~or circuit 52.
Two current sources 54 are employed to set the charging current.
V~t, the output of the integrator stage of the circuit, is presented to a differentiating stage 58 through Cr~f. Thus, VOUt is a square wave having an amplitude proportional to Cr~C~a. -The efects of stray capacitance 60 is minimized because it is driven by the low impedance output of the integrating op-amp 50.
The stray capacitances 56 are minLmized by connection to ~irtual grounds. Their ~alues are reduced by a factor equal ~o the open loop gain of the amplifiers. It will be apparent to those skilled in the art tha~ Yout may be input to a peak detection circuit on a sample and hold to obtain a dc voltage proportional to the parameter being measured by the sensor.

_ _ 13 -, 2~7~2~1 ^

FIG. ~ shows an embodiment of digital signal condition-ing circuitry sui~able for use with the present inven~ion. In this embodLment, the diaphragm, as the common terminal of both the measured and reference capacitors, is grounded. This results in s~ray capacitances in parallel with the reference and measured capacitances. In order to minimize the effect of ~he strays, electrically conductive guard regions 33 are introduced directly below electxodes 28 and 30. These regions are of opposite polarity to the polari~y of the base and therefor form a PN
junction as illustrated.

As shown in Figure 7, these guard regions 33 are driven ~y a unity gain buffer amplifier 63 effecti~ely removing C
from the circui~. A relaxation oscillator incorporating this structure then is only responsive to the desired capacitance CY2~8--Specifically, with reference to FI~S. 6 and 7, a first oscillator 62 i8 constructed so that the output frequency is proportional to the reciprocal of C~. The output of the first oscillator 62 is connected to an input of counter 64 of the type commonly known in the art. A second oscillator 66 is constructed so that the output frequency is proportional to the reciprocal of Cr~. The output of the second oscillator 66 is connected to a counter 68, the purpose of which is to control the ga~ing or ;. . :

':- : ..
, :

2~24~

integration tLme of the first counter.

The operation proceeds as follows. ~t the beginning of a cycle, counter 68 is preloaded with a value A and counter 64 is preloaded with a value B. Both counters accumulate counts from their respective oscillators ~or a period of time until counter 68 reaches zero. ~t this ti~e, the value in counter 64 is transferred to external circui~y and the cycle is repeated. The value at the output is equal to Ra*C~/C~n ~ gb, wher~ Ka and Rb are directly proportional to the preload values A and B, thus permitting simple adjustment of both the span and offset of the sensor. The circuitry of Figure 6 allows a digital sensor output without costly and complex analog to digital conversion circui~-ry.

The present invention has been described with respect to certain embodiments and conditions~ which are not meant to lLmit the i~vention. Those skilled in the art will understand that variations from the embodLments and conditions described herein may be made without departing ~rom the invention as set forth in the appended claims.

.

:' ,

Claims

1. A silicon-on-silicon capacitive device for sensing differential fluid pressure comprising:

a) a silicon top plate having a first fluid port formed therein;

b) a silicon base having conductive traces disposed thereon;

c) a silicon diaphragm secured in a chamber defined between said base and said top plate, said diaphragm having a central portion that responds to external stimulus from said fluid, said diaphragm element having conductive portions corresponding to the traces on said base element to define a reference capacitor and a measured capacitor, and;

d) integrated circuit means deposited on said silicon base and electrically connected to said reference and measured capacitors for minimizing the effect of stray capacitance and providing an output pro-portional to the ratio of the reference capaci-tance to measured capacitance.

2. The silicon-on-silicon sensing device of claim 1 wherein said silicon diaphragm includes portions defining a pressure stop, said pressure stop limiting the deflection of said diaphragm by abutting said top plate before said diaphragm is deflected enough to be damaged.

3. The device according to claim 1 wherein said reference and measured capacitors are surrounded by conductive guard regions of a polarity opposite to the polarity of the silicon base thereby to form a PN junction to isolate said capacitors from the base.

4. The silicon-on-silicon sensing device of claim 1 wherein said silicon diaphragm includes corrugated portions to enhance the linearity of the deflection of said diaphragm respon-sive to fluid entering said fluid port.

5. The silicon-on-silicon sensing device of claim 1 wherein the diaphragm and the base define a second fluid port for external fluid communication of the space between the diaphragm and base whereby the output is proportional to said measured capacitance and reflects the differential deflection of the diaphragm between stimulus from the first fluid port and the second fluid port.

6. The silicon-on-silicon sensing device of claim 1 wherein said signal conditioning circuitry comprises:

a) a gain stage for generating an analog voltage, which periodically is proportional to the ratio of said reference capacitance to said measured capac-itance;

b) a sampling stage for receiving the analog voltage from said gain stage, and producing said output;

c) switch means for connecting said voltage to said sampling stage only when said voltage is propor-tional to said ratio.

7. The silicon-on-silicon sensing device of claim 1 wherein said signal conditioning circuitry comprises:

a) an integrator stage for generating a voltage pro-portional to said measured capacitance value, and;

b) a differentiator stage receiving said voltage and generating said output proportional to the ratio of said reference capacitance to said measured capacitance.

8. The silicon-on-silicon sensing device of claim 3 wherein said signal conditioning circuitry comprises:

a) a first oscillator for generating a waveform having a frequency proportional to said reference capacitance;

b) a second oscillator for generating a waveform having a frequency proportional to said measured capacitance, and;

c) counter means receiving the waveforms generated by the oscillators for producing said proportional output.

9. The device according to claim 8 wherein said first and second oscillators include means for substantially reducing the effect of stray capacitances formed by the interposition of said guard regions between the base and said measured and refer-ence capacitors.

10. A method of forming a device for sensing differen-tial fluid pressure comprising the steps of:

a) forming a silicon top plate having a fluid port therein;

b) forming a silicon base having three conductive areas deposited thereon to permit sensing of ref-erence and measured capacitances;

c) depositing integrated signal conditioning circuitry on said base element connected to said conductive areas for producing an output signal proportional to the ratio of said reference and measured capacitances.

d) forming a silicon diaphragm element having a reduced-thickness portion which responds to dif-ferential fluid pressure, said diaphragm element having conductive areas corresponding to the con-ductive areas deposited on said base;

e) bonding said diaphragm element between said top plate and said base for movement within a chamber defined thereby, said conductive regions on said base and said diaphragm forming reference and measured capacitors.