CA2052385C - Variable band-pass filter circuit - Google Patents
Variable band-pass filter circuit Download PDFInfo
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- CA2052385C CA2052385C CA002052385A CA2052385A CA2052385C CA 2052385 C CA2052385 C CA 2052385C CA 002052385 A CA002052385 A CA 002052385A CA 2052385 A CA2052385 A CA 2052385A CA 2052385 C CA2052385 C CA 2052385C
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- pass filter
- bpf
- variable band
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/04—Frequency selective two-port networks
Abstract
A variable band-pass filter circuit includes a variable band-pass filter which filters an input signal such as a chrominance signal. An output the variable band-pass filter is phase-compared with a reference signal in a phase comparator. An output of the phase comparator is applied to the variable band-pass filter as a control signal. The output of the variable band-pass filter is level-limited by a limiter and then applied to an adder which further receives the reference signal. One of the input signal arid an output of the adder is selected by a switch to be applied to an input of the variable band-pass filter. A reference signal component is removed by a sample hold circuit to be prevented from being outputted from an output of the variable ban-pass filter.
Description
TITLE OF THE INVENTION
Variable Band-pass Filter Circuit BACKGROUND OF THE INVENTTON
Field of the invention The present invention relates to a variable band-pass filter circuit. More specifically, the present invention relates to a control Circuit which automatically controls a variable band-pass filter constructed within an integrated circuit.
Description of the prior art Recently, an integrated circuit used in a video recording and reproducing apparatus such as a VTR has a tendency to be constructed such that the integrated circuit incorporates a variable band-pass filter and the variable band-pass filter is automatically adjusted within the integrated circuit or from -the outside.
Conventionally, as a method for automatically controlling such a kind of variable band-pass filter (hereinafter, simply called as "BPF"), a methad shown in Fig. 6 or Fig. 7 is known.
In a conventional circuit 1, a first and second BPF's 2a and 2b which are to be controlled and a reference BPF 3 are used. The BPF's 2a, 2b and 3 are formed by the same circuit configuration, the same _ 1 _ :_~
constants and the same pattern configuration in an actual integrated circuit in order to ensure strong correlation between them.
Then, to an input of the reference BPF 3, a reference signal having a predetermined frequency is applied from a reference signal source (not shown), and an output of the reference BPF 3 is applied to a phase comparator ~. In the phase comparator 4, phases of the output of the reference BPF 3 and the reference signal are compared with each other, and a control signal (a control voltage or a control current) for controlling the reference BPF 3 is outputted.
A BPF generally has a characteristic shown in Fig.
8A, wherein a phase becomes 0 degree at a reference frequency f0, the phase varies up to minus 90 degrees when a frequency is deviated toward a higher direction, and the phase varies up to plus 90 degrees when a frequency is deviated toward a lower direction.
Therefore, a level of the control signal from the phase comparator 4 represents a phase deviation, i.e., frequency deviation of the output of the reference BPF 3 and, by controlling the reference BPF 3 by means of the control signal, it is possible to adjust the reference BPF 3 such that a center frequency of the reference BPF
3 becomes coincident with a frequency f0 of the e"e i°~D ~~ t"' s~'~ ~.~s~n a.", ~,~:~
reference signal.
On the other hand, since the BPF's 2a and 2b to be controlled have strong correlation to the reference BPF
Variable Band-pass Filter Circuit BACKGROUND OF THE INVENTTON
Field of the invention The present invention relates to a variable band-pass filter circuit. More specifically, the present invention relates to a control Circuit which automatically controls a variable band-pass filter constructed within an integrated circuit.
Description of the prior art Recently, an integrated circuit used in a video recording and reproducing apparatus such as a VTR has a tendency to be constructed such that the integrated circuit incorporates a variable band-pass filter and the variable band-pass filter is automatically adjusted within the integrated circuit or from -the outside.
Conventionally, as a method for automatically controlling such a kind of variable band-pass filter (hereinafter, simply called as "BPF"), a methad shown in Fig. 6 or Fig. 7 is known.
In a conventional circuit 1, a first and second BPF's 2a and 2b which are to be controlled and a reference BPF 3 are used. The BPF's 2a, 2b and 3 are formed by the same circuit configuration, the same _ 1 _ :_~
constants and the same pattern configuration in an actual integrated circuit in order to ensure strong correlation between them.
Then, to an input of the reference BPF 3, a reference signal having a predetermined frequency is applied from a reference signal source (not shown), and an output of the reference BPF 3 is applied to a phase comparator ~. In the phase comparator 4, phases of the output of the reference BPF 3 and the reference signal are compared with each other, and a control signal (a control voltage or a control current) for controlling the reference BPF 3 is outputted.
A BPF generally has a characteristic shown in Fig.
8A, wherein a phase becomes 0 degree at a reference frequency f0, the phase varies up to minus 90 degrees when a frequency is deviated toward a higher direction, and the phase varies up to plus 90 degrees when a frequency is deviated toward a lower direction.
Therefore, a level of the control signal from the phase comparator 4 represents a phase deviation, i.e., frequency deviation of the output of the reference BPF 3 and, by controlling the reference BPF 3 by means of the control signal, it is possible to adjust the reference BPF 3 such that a center frequency of the reference BPF
3 becomes coincident with a frequency f0 of the e"e i°~D ~~ t"' s~'~ ~.~s~n a.", ~,~:~
reference signal.
On the other hand, since the BPF's 2a and 2b to be controlled have strong correlation to the reference BPF
3 as described above, by applying the control signal for controlling the reference BPF 3 to these BPF's 2a and 2b as control signals therefor, the BPF's 2a and 2b can be controlled in the same manner as that of the reference BPF 3, and resultingly, center frequencies of the BPF's 2a and 2b become coincident with the frequency f0 of the reference signal.
In addition, in a case of the conventional circuit shown in Fig. 6, the reference BPF 0 may be replaced with an all-pass filter. In this case, the all-pass filter has a characteristic shown in Fig. 8B, for example. That is, in the all-pass filter, a phase is minus 180 degrees at a reference frequency f0, the phase varies up to minus 3~0 degrees when the frequency becomes high, and the phase varies up to 0 degree when the frequency becomes low. Therefore, even if the all-pass filter is used instead the reference BPF 0, it is possible to perform an operation similar to that described above.
In another conventional circuit 1 shown in Fig. 7, a fact that an output of a BPF is 0 degree in phase at a reference frequency f0 and a fact that the BPF
a oscillates at f0 by positively feeding-back the output of the BPF to an input thereof by means of a loop having a gain of one or more are utilized. That is, in the prior art shown in Fig. 7, an amplifier 5 having a gain of one or more is connected between the output and the input of the reference BPF 3, and the output of the reference BPF 3 is positively fed-back to the input thereof through the amplifier 5. Then, an oscillation output signal of the reference BPF 3 is compared with the reference signal by the phase comparator 4 and a control signal is outputted from the phase compaxator 4.
As similar to the prior art in Fig. 6, the control signal is applied to the BPF's 2a and 2b to be controlled and to the reference BPF 3.
In any prior arts shown in Fig. 6 and Fig. 7, since the BPF's 2a, 2b and 3 are formed on the same integrated circuit chip, the same show relatively strong correlation therebetween; however, when the respective BPF's 2a, 2b and 3 are to be adjusted at the same frequency fp, actually, there is a deviation or fluctuation of a frequency at a degree of about ~ 2 due to dispersion of components in the integrated circuit.
In addition, when the BPF 2a and BPF 2b axe to be ' adjusted at different frequencies, that is, when the center frequency of the BPF 2a is adjusted to be coincident with the center frequency of the reference BPF 3 and the center frequency of the BPF 2b is to be adjusted at a half of the center frequency of the reference BPF 3, the control current from the phase comparator 4 is halved and applied to the BPF 2b. Tn this case, since dispersion of components of a circuit for adjusting the control current are added to the above described dispersion, the frequency may be deviated at a degree of about 5 ~s.
Furthermore, in the prior art shown in Fig. 6, when a BPF having a high quality factor tQ> is utilized as the reference BPF in order to respond to a requirement of high accuracy, if the reference frequency f0 and the frequency of the reference BPF are deviated from each other, an output level from the reference BPF
becomes small, and therefore, there is an occasion where the reference BPF cannot be controlled.
SUMMARY OF THE INVENTION
Therefore, a principal object of the present invention is to provide a BPF circuit in which a BPF can be controlled with high accuracy.
In brief, a BPF circuit in accordance uaith the present invention comprises a first BPF; reference ,r signal applying means for applying a reference signal;
phase-comparing means for phase-comparing an output of a first BPF with the reference signal to output a control signal for controlling the first BPF; level limiting means for receiving the output signal from the first BPF; and adding means for applying an output from the level limiting means and the reference signal in a superposed manner to an input of the fixst BPF.
To the input of the first BPF, a signal in which the reference signal and the output of the first BPF
through the level limiting means are added to each other is applied. If a level of a reference signal component contained in the output of the first BPF becomes smaller than a predetermined level because a frequency of the reference signal and a frequency of the first BPF are deviated from each other, a positive feed-back loop including the level limiting means is formed.
Consequently, in the phase comparing means, an oscillation output from the first BPF and the reference signal are phase-compared with each ather.
In addition, when the deviation between the frequency of the reference signal and a center frequency of the first BPF is relatively small, the first BPF does not oscillate, and therefore, the phase comparing means compares the reference signal component included in the s,yj ~~ a~;;~~
output of the first BPF and the reference signal with each other.
In one embodiment, a control signal from the phase comparing means is directly applied to the first BPF;
however, in another embodiment, the control signal is applied to a second BPF to be controlled. In the former embodiment, the above described superposed signal and an input signal are switched by a switch so that one of them can be applied to the input of the first BPF in a time-sharing manner. Then, as necessary, a switch and a sample hold circuit are connected to the output of the first BPF to remove a reference signal component included in the output signal of the first BPF.
In accordance with the present invention, since an oscillation circuit is automatically constructed by the first BPF when the frequency of the reference signal and the frequency of the BPF are deviated from each other, as different from the prior arts, there is no occasion where the BPF cannot be controlled, and therefore, it is possible to stably and surely control the BPF.
The objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the embodiments of the present invention when taken in conjunction with accompanying drawings.
~...~
BRIEF DESCRIPTION OF T~iE DRAWINGS
Fig, 1 is a block diagram showing one embodiment in accordance with the present invention;
Fig. 2A and Fig. 2B are circuit diagrams respectively showing different examples of a variable filter which can be utilized in the embodiment;
Fig. 3 is a circuit diagram showing in detail the variable data shown in Fig. 2B.
Fig. 4A and Fig. 4B are block diagrams ZO respectively showing operations of Fig. l embodiment;
Fig. 5 is a block diagram showing another embodiment in accordance with the present invention;
Fig. 6 is a block diagram showing a prior art;
Fig. 7 is a block diagram showing another pribr ~' art; and Fig. 8A and Fig. 8B are graphs respectively showing characteristics of a BPF and an all-pass filter.
BETATI~ED DESCRIPTION OF TFiE PREFERRED EMBODIMENTS
A BPF circuit 10 of one embodianent in accordance with the present invention, as shown in Fig. l, includes a BPF 12, and a switch 14 is connected to an input of the BPF 12 and a switch 16 is connected to an output thereof. An input signal is applied to a contact l4a of the switch 14 and an output of an adder 18 is applied to - 8 _ a contact 14b. The switch 14 is controlled by a control pulse, and therefore, to the BPF 12, the input signal or the output of the adder 18 is applied in a time-sharing manner. Specifically, in a case where the input signal is a chrominance signal, during a period between the chraminance signal and a burst signal, the switch 14 is switched to a side of the contact 14b so that the output of the adder 18 can be applied to the BPF 12.
The switch 16 is also turned-on or -off by the control pulse and, during a period when the switch 16 is turned-off, the output of the BPF 12 is sampled and held by a sample hold circuit 20. Therefore, when the chrominance signal is inputted to the BPF 12 through the switch 14, the output of the BPF 12 is outputted through the switch 16 as it is. However, during a period when the output of the adder 18 is inputted to the BPF 12, an output of the sample hold circuit 20 is withdrawn as an output signal. Therefore, it is possible to prevent the reference signal from being superposed or added to the output signal (chrominance signal) and being outputted.
The output of the BPF 12 is also applied to one input of a phase comparator 22, and the other input of the phase comparator 22 receives the reference signal.
Although not shown, the phase comparator 22 includes the same combination as that of the switch 16 and the sample _ g _ ~~~~~3 hold circuit 20 and, when the reference signal exists at the output of the BPF 12, the reference signal is not used as a phase--comparing signal. An output of the phase comparator 22 is directly applied to a control input of the BPF 12.
The output of the BPF 12 is further applied to the adder 18 through a limiting ampli:Eier (hereinafter, may be called as "limiter" simply) 24. The reference signal is further applied to the adder 18. Therefore, from the adder 18, a superposed signal obtained by adding the output of the BPF 12 which is a constant level through the limiter 1~ and the reference signal is outputted.
As the above described BPF 12, a variable filter of a type incorporated in an integrated circuit as shown in Fig. 2A or Fig. 2B (and Fig. 3) can be utilized.
A characteristic of a variable filter shown in Fig. 2A becomes as follows:
jw c2(vl - v4) = (v3 - v2) - ... (1) r2 jw cl(v2 - v5> _ (vl - v2> ... (2) rl If vl is eliminated from the equations (1) and (2), a following equation (3> can be obtained.
~~~~~~3 j w clj w c2rlr2v2 - j w clj w c2rlr2v5 - v3 - v2 + j w c2r2v~ - j w c2r2v2 . . .
In a case where such a variable filter is constructed as a low pass filter, it is set as v4 = v5 = 0, v3 = vin and v2 = vout~
In this case, a transfer function is given by a following equation (4) on the assumption that jw - S.
v2 vout T(S) = - ---v3 vin rlr2clc2 r2c2 1 S2 + S ~ + -rlr2clc2 rlr2clc2 w 02 _ ~ ... (4>
S2 + w 0 S + w 02 Accordingly, a frequency and a quality factor Q are given by following equations (5) and (6).
w 0 ' rlr2clc2 ... (5) ~~D~~~~3 clrl - ... (6) c2r2 In a case where the above described variable filter is constructed as a BPF, it is set as v3 = v5 = ' 0, v4 = vin and v2 = vout~ and therefore, a transfer function, frequency and Q are respectively given by equations (7>, (8> and (9> on the assumption that jw -S' v2 vout TtS) _ _ v4 vin r1r2C1C2 r2C2 1 S2 ~ S
rlr2c1C2 rlr2Clq2 - ... (7) S2 + S -r c~ 02 w 0 rlr2clc21 ... t8) - lz -clrl Q _ ... (9>
c2r2 Otherwise, the variable filter can operate as a high-pass filter by setting as v3 = v5 = vin, v4 = 0, and v2 = vout or as an all-pass filter by setting as v3 - v5 ' vin v4 - -vin and v2 = vout~ That is, by suitable selecting an input and an output terminal, it is possible to construct various kinds of filter with the same filter configuration.
Fig. 2B shows a filter configuration used in Fig.
1 embodiment, and a detailed circuit thereof is shown in Fig. 3. In this case, a characteristic becomes as follows:
jw c2(vl - vg) + jc~ c3(vl - v2) 1.
- (v3 - v2) K2 ... (10>
r2 jc~ cl(v2 - v5) _ (vlL2 - v2L1) Kl rl Rl~ R2~
L1 ~ L2 =
Rl + R1' R2 + R2~
R4~ R3~
K1 = Kz= ... (11) R4 .i- R4 ~ R3 + R3 r Since the variable filter is used as a BPF, as described above, it is set as v3 = v5 = 0, v4 = vin, and v2 = vout, and vl is eliminated from the equations (10) and (11), a transfer function and a frequency are respectively given by equations (12) and (13) on the assumption that jc~ - S.
~2 vout T(S) _ v4 yin S
c3 cl(1+ )rl c2 S2 + S ~ L1K1 .~ K2K1L2 c3 c3 cl(1+ >rl c,lc2rlr2(1+ ) c2 C2 ...
(12>
W 0 =
c3 clc2rlr2(1+ ) c2 2kT
rl = r2 =
qI
qI K2K1L~
w 0 2kT c ... (13) clc2(1+ ) c2 . =a.~
Therefore, by changing I of respective differential pairs shown in Fig. 3, it is possible to vary the center frequency f0 of the BPF. Therefore, in Fig. 1 embodiment, the output of the phase comparator 22, i.e., the control signal controls the currents I.
In Fig. 1 embodiment, in a case where the center frequency of the BPF 12 is largely deviated due to an external disturbance, if the Q of the BPF 12 is high, a level of the reference signal component outputted from the BPF 12 is lowered, and therefore, there is an occasion where the BPF 12 cannot be controlled. In this case, in Fig. 1 embodiment, the BPF 12 is caused to oscillate and, by utilizing an oscillation frequency, it is controlled such that the center frequency of the BPF
12 is retracted or returned to a vicinity of the frequency f0 of the reference signal. This will be described with reference to Fig. 4A and Fig. 4B.
In Fig. 4A, a level of the output vout of the reference signal component which depends on the input vin of the reference signal becomes smaller than an oscillation level, the BPF oscillates at the frequency f0 of the reference signal.
On the assumption that a transfer function of the BPF is FtS), a following equation (14> is given.
~ .''~'~s~~~'a w 0 --.-. S
Q
F(S) = ... t14) w 0 S2 + s + w p2 Q
vl ~ vin + v2 v2 ' Avout vout - v1F(S) Vout ° (vi.n + Avout)F(S) The above described transfer function is given by an equation (15>.
vout F(S>
- ... (15) vin 1 - AF(S>
Accordingly, an equation (16> can be obtained.
w 0 S
F(S) .15 T(S) =
1-AF(S) w 0 S2 + (1-A) S ~+ w 02 ... (l~) As shown in Fig. 4B, if the BPF 12 oscillates in Fig. 1 embodiment, the reference signal is not passed through the BPF 12, and therefore, the transfer function is given by an equation (17).
w 0 ( - w >2 iF(S)~ -( w 02 _ w 2)2 + ( w 0 w )2 Q
... (17) ~;~~'~~~...~3 a In a case of w o = w , since ~F(S>~= 1, an equation (18> is obtainable in Fig. 4B.
v2 A
... (18) vin - 1 - A
since a limiting amplifier is inserted, actually, v2 is a constant level, and therefore, a gain A is changed in accordance with an input level to the limiting amplifier.
If a level ratio by which vin and v2 are added to each other is B, v2 - B, where B>1 Vin = B = --vin 1 _ A
B
A =
1 + B ... (19) ~T(S)~ is evaluated by substituting the above into T(S), an equation t20> is obtainable.
t w w 0 )2 ~T(S)) - Q
1 w w 0 t w 02 _ w 2)2 + ( , )2 1+B Q
... (20) _ 17 If ~T(S)~> B, a frequency of the input vin is looped. Tf ~T(S)~< B, the output of the BPF 12 dependent on the input vin becomes smaller than the oscillation level, and therefore, the BPF 12 oscillates.
In addition, it is possible to suitably set a range wherein the BPF is controlled by the superposed signal from the adder 18 and a range wherein the BPF is controlled by the oscillation, by addition ration of the levels of vin and v2.
ZO Thus, in Fig. 1 embodiment, when the level of the reference signal component contained in the output of the BPF 12 becomes smaller than a predetermined level which is determined by the limiter 29, automatically, the oscillation circuit is constructed by the BFF 12, and therefore, the BPF 12 can be stably and surely controlled always.
In Fig. 1 embodiment, the output of the phase comparator 22 is directly applied to the BPF 12;
however, an embodiment shown in Fig. 5, such the BPF 12 is used as a reference BPF 12'. That is, in Fig. 5 embodiment, the reference BPF 12' having the same structure as that of the BPF 12 in Fig. 1 embodiment is used and, in the phase comparator 24, an output of the reference BPF 12' and the reference signal are phas a compared with each other. Then, the output of the phase 18 _ ~~~~n~~3 comparator 24, i.e., control signal is applied to the reference BPF 12' as well as BPF's 12a and 12b to be controlled. Therefore, the BPF's 12a and 12b can be controlled in the same manner as that of the reference BPF 12' as similar to Fig. 7 prior art. Resultingly, it is controlled such that the center frequency of the BPF's 12a and 12b becomes frequency which is the same as that of the reference BPF 12' or having predetermined relationship with the reference BPF 12'.
Thus, in the present invention, a method in which a center frequency of the BPF is controlled by inputting the reference signal to the BPF and a method in which the center frequency of the BPF is controlled by oscillating the BPF are used jointly, that is, the methods are automatically changed, and therefore, it is .
possible to stably control the BPF 12 (or 12a, 12b and 12'> always.
Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.
In addition, in a case of the conventional circuit shown in Fig. 6, the reference BPF 0 may be replaced with an all-pass filter. In this case, the all-pass filter has a characteristic shown in Fig. 8B, for example. That is, in the all-pass filter, a phase is minus 180 degrees at a reference frequency f0, the phase varies up to minus 3~0 degrees when the frequency becomes high, and the phase varies up to 0 degree when the frequency becomes low. Therefore, even if the all-pass filter is used instead the reference BPF 0, it is possible to perform an operation similar to that described above.
In another conventional circuit 1 shown in Fig. 7, a fact that an output of a BPF is 0 degree in phase at a reference frequency f0 and a fact that the BPF
a oscillates at f0 by positively feeding-back the output of the BPF to an input thereof by means of a loop having a gain of one or more are utilized. That is, in the prior art shown in Fig. 7, an amplifier 5 having a gain of one or more is connected between the output and the input of the reference BPF 3, and the output of the reference BPF 3 is positively fed-back to the input thereof through the amplifier 5. Then, an oscillation output signal of the reference BPF 3 is compared with the reference signal by the phase comparator 4 and a control signal is outputted from the phase compaxator 4.
As similar to the prior art in Fig. 6, the control signal is applied to the BPF's 2a and 2b to be controlled and to the reference BPF 3.
In any prior arts shown in Fig. 6 and Fig. 7, since the BPF's 2a, 2b and 3 are formed on the same integrated circuit chip, the same show relatively strong correlation therebetween; however, when the respective BPF's 2a, 2b and 3 are to be adjusted at the same frequency fp, actually, there is a deviation or fluctuation of a frequency at a degree of about ~ 2 due to dispersion of components in the integrated circuit.
In addition, when the BPF 2a and BPF 2b axe to be ' adjusted at different frequencies, that is, when the center frequency of the BPF 2a is adjusted to be coincident with the center frequency of the reference BPF 3 and the center frequency of the BPF 2b is to be adjusted at a half of the center frequency of the reference BPF 3, the control current from the phase comparator 4 is halved and applied to the BPF 2b. Tn this case, since dispersion of components of a circuit for adjusting the control current are added to the above described dispersion, the frequency may be deviated at a degree of about 5 ~s.
Furthermore, in the prior art shown in Fig. 6, when a BPF having a high quality factor tQ> is utilized as the reference BPF in order to respond to a requirement of high accuracy, if the reference frequency f0 and the frequency of the reference BPF are deviated from each other, an output level from the reference BPF
becomes small, and therefore, there is an occasion where the reference BPF cannot be controlled.
SUMMARY OF THE INVENTION
Therefore, a principal object of the present invention is to provide a BPF circuit in which a BPF can be controlled with high accuracy.
In brief, a BPF circuit in accordance uaith the present invention comprises a first BPF; reference ,r signal applying means for applying a reference signal;
phase-comparing means for phase-comparing an output of a first BPF with the reference signal to output a control signal for controlling the first BPF; level limiting means for receiving the output signal from the first BPF; and adding means for applying an output from the level limiting means and the reference signal in a superposed manner to an input of the fixst BPF.
To the input of the first BPF, a signal in which the reference signal and the output of the first BPF
through the level limiting means are added to each other is applied. If a level of a reference signal component contained in the output of the first BPF becomes smaller than a predetermined level because a frequency of the reference signal and a frequency of the first BPF are deviated from each other, a positive feed-back loop including the level limiting means is formed.
Consequently, in the phase comparing means, an oscillation output from the first BPF and the reference signal are phase-compared with each ather.
In addition, when the deviation between the frequency of the reference signal and a center frequency of the first BPF is relatively small, the first BPF does not oscillate, and therefore, the phase comparing means compares the reference signal component included in the s,yj ~~ a~;;~~
output of the first BPF and the reference signal with each other.
In one embodiment, a control signal from the phase comparing means is directly applied to the first BPF;
however, in another embodiment, the control signal is applied to a second BPF to be controlled. In the former embodiment, the above described superposed signal and an input signal are switched by a switch so that one of them can be applied to the input of the first BPF in a time-sharing manner. Then, as necessary, a switch and a sample hold circuit are connected to the output of the first BPF to remove a reference signal component included in the output signal of the first BPF.
In accordance with the present invention, since an oscillation circuit is automatically constructed by the first BPF when the frequency of the reference signal and the frequency of the BPF are deviated from each other, as different from the prior arts, there is no occasion where the BPF cannot be controlled, and therefore, it is possible to stably and surely control the BPF.
The objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the embodiments of the present invention when taken in conjunction with accompanying drawings.
~...~
BRIEF DESCRIPTION OF T~iE DRAWINGS
Fig, 1 is a block diagram showing one embodiment in accordance with the present invention;
Fig. 2A and Fig. 2B are circuit diagrams respectively showing different examples of a variable filter which can be utilized in the embodiment;
Fig. 3 is a circuit diagram showing in detail the variable data shown in Fig. 2B.
Fig. 4A and Fig. 4B are block diagrams ZO respectively showing operations of Fig. l embodiment;
Fig. 5 is a block diagram showing another embodiment in accordance with the present invention;
Fig. 6 is a block diagram showing a prior art;
Fig. 7 is a block diagram showing another pribr ~' art; and Fig. 8A and Fig. 8B are graphs respectively showing characteristics of a BPF and an all-pass filter.
BETATI~ED DESCRIPTION OF TFiE PREFERRED EMBODIMENTS
A BPF circuit 10 of one embodianent in accordance with the present invention, as shown in Fig. l, includes a BPF 12, and a switch 14 is connected to an input of the BPF 12 and a switch 16 is connected to an output thereof. An input signal is applied to a contact l4a of the switch 14 and an output of an adder 18 is applied to - 8 _ a contact 14b. The switch 14 is controlled by a control pulse, and therefore, to the BPF 12, the input signal or the output of the adder 18 is applied in a time-sharing manner. Specifically, in a case where the input signal is a chrominance signal, during a period between the chraminance signal and a burst signal, the switch 14 is switched to a side of the contact 14b so that the output of the adder 18 can be applied to the BPF 12.
The switch 16 is also turned-on or -off by the control pulse and, during a period when the switch 16 is turned-off, the output of the BPF 12 is sampled and held by a sample hold circuit 20. Therefore, when the chrominance signal is inputted to the BPF 12 through the switch 14, the output of the BPF 12 is outputted through the switch 16 as it is. However, during a period when the output of the adder 18 is inputted to the BPF 12, an output of the sample hold circuit 20 is withdrawn as an output signal. Therefore, it is possible to prevent the reference signal from being superposed or added to the output signal (chrominance signal) and being outputted.
The output of the BPF 12 is also applied to one input of a phase comparator 22, and the other input of the phase comparator 22 receives the reference signal.
Although not shown, the phase comparator 22 includes the same combination as that of the switch 16 and the sample _ g _ ~~~~~3 hold circuit 20 and, when the reference signal exists at the output of the BPF 12, the reference signal is not used as a phase--comparing signal. An output of the phase comparator 22 is directly applied to a control input of the BPF 12.
The output of the BPF 12 is further applied to the adder 18 through a limiting ampli:Eier (hereinafter, may be called as "limiter" simply) 24. The reference signal is further applied to the adder 18. Therefore, from the adder 18, a superposed signal obtained by adding the output of the BPF 12 which is a constant level through the limiter 1~ and the reference signal is outputted.
As the above described BPF 12, a variable filter of a type incorporated in an integrated circuit as shown in Fig. 2A or Fig. 2B (and Fig. 3) can be utilized.
A characteristic of a variable filter shown in Fig. 2A becomes as follows:
jw c2(vl - v4) = (v3 - v2) - ... (1) r2 jw cl(v2 - v5> _ (vl - v2> ... (2) rl If vl is eliminated from the equations (1) and (2), a following equation (3> can be obtained.
~~~~~~3 j w clj w c2rlr2v2 - j w clj w c2rlr2v5 - v3 - v2 + j w c2r2v~ - j w c2r2v2 . . .
In a case where such a variable filter is constructed as a low pass filter, it is set as v4 = v5 = 0, v3 = vin and v2 = vout~
In this case, a transfer function is given by a following equation (4) on the assumption that jw - S.
v2 vout T(S) = - ---v3 vin rlr2clc2 r2c2 1 S2 + S ~ + -rlr2clc2 rlr2clc2 w 02 _ ~ ... (4>
S2 + w 0 S + w 02 Accordingly, a frequency and a quality factor Q are given by following equations (5) and (6).
w 0 ' rlr2clc2 ... (5) ~~D~~~~3 clrl - ... (6) c2r2 In a case where the above described variable filter is constructed as a BPF, it is set as v3 = v5 = ' 0, v4 = vin and v2 = vout~ and therefore, a transfer function, frequency and Q are respectively given by equations (7>, (8> and (9> on the assumption that jw -S' v2 vout TtS) _ _ v4 vin r1r2C1C2 r2C2 1 S2 ~ S
rlr2c1C2 rlr2Clq2 - ... (7) S2 + S -r c~ 02 w 0 rlr2clc21 ... t8) - lz -clrl Q _ ... (9>
c2r2 Otherwise, the variable filter can operate as a high-pass filter by setting as v3 = v5 = vin, v4 = 0, and v2 = vout or as an all-pass filter by setting as v3 - v5 ' vin v4 - -vin and v2 = vout~ That is, by suitable selecting an input and an output terminal, it is possible to construct various kinds of filter with the same filter configuration.
Fig. 2B shows a filter configuration used in Fig.
1 embodiment, and a detailed circuit thereof is shown in Fig. 3. In this case, a characteristic becomes as follows:
jw c2(vl - vg) + jc~ c3(vl - v2) 1.
- (v3 - v2) K2 ... (10>
r2 jc~ cl(v2 - v5) _ (vlL2 - v2L1) Kl rl Rl~ R2~
L1 ~ L2 =
Rl + R1' R2 + R2~
R4~ R3~
K1 = Kz= ... (11) R4 .i- R4 ~ R3 + R3 r Since the variable filter is used as a BPF, as described above, it is set as v3 = v5 = 0, v4 = vin, and v2 = vout, and vl is eliminated from the equations (10) and (11), a transfer function and a frequency are respectively given by equations (12) and (13) on the assumption that jc~ - S.
~2 vout T(S) _ v4 yin S
c3 cl(1+ )rl c2 S2 + S ~ L1K1 .~ K2K1L2 c3 c3 cl(1+ >rl c,lc2rlr2(1+ ) c2 C2 ...
(12>
W 0 =
c3 clc2rlr2(1+ ) c2 2kT
rl = r2 =
qI
qI K2K1L~
w 0 2kT c ... (13) clc2(1+ ) c2 . =a.~
Therefore, by changing I of respective differential pairs shown in Fig. 3, it is possible to vary the center frequency f0 of the BPF. Therefore, in Fig. 1 embodiment, the output of the phase comparator 22, i.e., the control signal controls the currents I.
In Fig. 1 embodiment, in a case where the center frequency of the BPF 12 is largely deviated due to an external disturbance, if the Q of the BPF 12 is high, a level of the reference signal component outputted from the BPF 12 is lowered, and therefore, there is an occasion where the BPF 12 cannot be controlled. In this case, in Fig. 1 embodiment, the BPF 12 is caused to oscillate and, by utilizing an oscillation frequency, it is controlled such that the center frequency of the BPF
12 is retracted or returned to a vicinity of the frequency f0 of the reference signal. This will be described with reference to Fig. 4A and Fig. 4B.
In Fig. 4A, a level of the output vout of the reference signal component which depends on the input vin of the reference signal becomes smaller than an oscillation level, the BPF oscillates at the frequency f0 of the reference signal.
On the assumption that a transfer function of the BPF is FtS), a following equation (14> is given.
~ .''~'~s~~~'a w 0 --.-. S
Q
F(S) = ... t14) w 0 S2 + s + w p2 Q
vl ~ vin + v2 v2 ' Avout vout - v1F(S) Vout ° (vi.n + Avout)F(S) The above described transfer function is given by an equation (15>.
vout F(S>
- ... (15) vin 1 - AF(S>
Accordingly, an equation (16> can be obtained.
w 0 S
F(S) .15 T(S) =
1-AF(S) w 0 S2 + (1-A) S ~+ w 02 ... (l~) As shown in Fig. 4B, if the BPF 12 oscillates in Fig. 1 embodiment, the reference signal is not passed through the BPF 12, and therefore, the transfer function is given by an equation (17).
w 0 ( - w >2 iF(S)~ -( w 02 _ w 2)2 + ( w 0 w )2 Q
... (17) ~;~~'~~~...~3 a In a case of w o = w , since ~F(S>~= 1, an equation (18> is obtainable in Fig. 4B.
v2 A
... (18) vin - 1 - A
since a limiting amplifier is inserted, actually, v2 is a constant level, and therefore, a gain A is changed in accordance with an input level to the limiting amplifier.
If a level ratio by which vin and v2 are added to each other is B, v2 - B, where B>1 Vin = B = --vin 1 _ A
B
A =
1 + B ... (19) ~T(S)~ is evaluated by substituting the above into T(S), an equation t20> is obtainable.
t w w 0 )2 ~T(S)) - Q
1 w w 0 t w 02 _ w 2)2 + ( , )2 1+B Q
... (20) _ 17 If ~T(S)~> B, a frequency of the input vin is looped. Tf ~T(S)~< B, the output of the BPF 12 dependent on the input vin becomes smaller than the oscillation level, and therefore, the BPF 12 oscillates.
In addition, it is possible to suitably set a range wherein the BPF is controlled by the superposed signal from the adder 18 and a range wherein the BPF is controlled by the oscillation, by addition ration of the levels of vin and v2.
ZO Thus, in Fig. 1 embodiment, when the level of the reference signal component contained in the output of the BPF 12 becomes smaller than a predetermined level which is determined by the limiter 29, automatically, the oscillation circuit is constructed by the BFF 12, and therefore, the BPF 12 can be stably and surely controlled always.
In Fig. 1 embodiment, the output of the phase comparator 22 is directly applied to the BPF 12;
however, an embodiment shown in Fig. 5, such the BPF 12 is used as a reference BPF 12'. That is, in Fig. 5 embodiment, the reference BPF 12' having the same structure as that of the BPF 12 in Fig. 1 embodiment is used and, in the phase comparator 24, an output of the reference BPF 12' and the reference signal are phas a compared with each other. Then, the output of the phase 18 _ ~~~~n~~3 comparator 24, i.e., control signal is applied to the reference BPF 12' as well as BPF's 12a and 12b to be controlled. Therefore, the BPF's 12a and 12b can be controlled in the same manner as that of the reference BPF 12' as similar to Fig. 7 prior art. Resultingly, it is controlled such that the center frequency of the BPF's 12a and 12b becomes frequency which is the same as that of the reference BPF 12' or having predetermined relationship with the reference BPF 12'.
Thus, in the present invention, a method in which a center frequency of the BPF is controlled by inputting the reference signal to the BPF and a method in which the center frequency of the BPF is controlled by oscillating the BPF are used jointly, that is, the methods are automatically changed, and therefore, it is .
possible to stably control the BPF 12 (or 12a, 12b and 12'> always.
Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.
Claims (5)
1. A variable band-pass filter circuit, comprising:
a first variable band-pass filter;
reference signal applying means for applying a reference signal;
phase-comparing means for phase-comparing an output of said first variable band-pass filter with said reference signal to output a control signal for controlling said first variable band-pass filter;
level limiting means for receiving said output signal from said first variable band-pass filter; and adding means for adding an output from said level limiting means and said reference signal to each other so as to apply the same to an input of said first variable band-pass filter.
a first variable band-pass filter;
reference signal applying means for applying a reference signal;
phase-comparing means for phase-comparing an output of said first variable band-pass filter with said reference signal to output a control signal for controlling said first variable band-pass filter;
level limiting means for receiving said output signal from said first variable band-pass filter; and adding means for adding an output from said level limiting means and said reference signal to each other so as to apply the same to an input of said first variable band-pass filter.
2. A variable band-pass filter circuit in accordance with claim 1, further comprising a first switch which is controlled by a switching signal in a first state wherein an input signal to be filtered by said variable band-pass filter circuit is applied to said input of said first variable band-pass filter through said first switch or in a second state wherein an output of said adding means is applied to said input of said first variable band-pass filter through said switch.
3. A variable band-pass filter circuit in accordance with claim 2, further comprising sample hold means for sampling and holding said output of said first variable band-pass filter in synchronization with switching of said first switch, whereby a reference signal component contained in said output of said first variable band-pass filter can be prevented from being outputted from said first variable band-pass filter.
4. A variable band-pass filter circuit in accordance with claim 1 or 2, wherein said control signal is further applied to a second variable band-pass filter which receives an input signal to be filtered by said variable band-pass filter circuit, whereby said second variable band-pass filter can be controlled in the same manner as that of said first variable band-pass filter.
5. A variable band-pass filter circuit in accordance with claim 4, wherein said first variable band-pass filter and said second variable band-pass filter are both incorporated in the same integrated circuit chip.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2260778A JP2962800B2 (en) | 1990-09-29 | 1990-09-29 | Control circuit for variable bandpass filter |
| JP2-260778 | 1990-09-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2052385A1 CA2052385A1 (en) | 1992-03-30 |
| CA2052385C true CA2052385C (en) | 2000-10-24 |
Family
ID=17352598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002052385A Expired - Fee Related CA2052385C (en) | 1990-09-29 | 1991-09-27 | Variable band-pass filter circuit |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5182478A (en) |
| EP (1) | EP0479201B1 (en) |
| JP (1) | JP2962800B2 (en) |
| CA (1) | CA2052385C (en) |
| DE (1) | DE69108501T2 (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4038111A1 (en) * | 1990-11-29 | 1992-06-04 | Thomson Brandt Gmbh | UNIVERSAL FILTER |
| JP2840490B2 (en) * | 1991-11-29 | 1998-12-24 | 三菱電機株式会社 | Active filter circuit |
| KR100189961B1 (en) * | 1992-04-09 | 1999-06-01 | 윤종용 | Noise elimination apparatus |
| US5345119A (en) * | 1992-09-16 | 1994-09-06 | At&T Bell Laboratories | Continuous-time filter tuning with a delay-locked-loop in mass storage systems or the like |
| JPH07193454A (en) * | 1993-12-27 | 1995-07-28 | Nec Corp | Bandpass filter |
| US5635863A (en) * | 1995-05-25 | 1997-06-03 | Vtc, Inc. | Programmable phase comparator |
| US6043810A (en) * | 1995-06-12 | 2000-03-28 | Samsung Electronics, Co., Ltd. | Digitizer controller |
| US6141425A (en) * | 1996-09-30 | 2000-10-31 | Sony Corporation | Sound quality adjustment circuit |
| JP2002076842A (en) * | 2000-08-30 | 2002-03-15 | Sony Corp | Filter, filter control method, and receiver |
| JP2002374149A (en) * | 2001-06-12 | 2002-12-26 | Sharp Corp | Variable-frequency filter circuit |
| DE102004047871A1 (en) * | 2004-10-01 | 2006-04-06 | Deutsche Thomson-Brandt Gmbh | Signal input circuit |
| KR20080072790A (en) * | 2005-05-25 | 2008-08-07 | 콸콤 인코포레이티드 | Filter calibration |
| CN101213752B (en) * | 2005-07-04 | 2011-03-30 | 松下电器产业株式会社 | Semiconductor device and radio circuit device using same |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1156199B (en) * | 1978-04-18 | 1987-01-28 | Selenia Ind Elettroniche | IMPROVEMENT IN CIRCUITS AUTOMATIC TUNING FOR FILTERS CONTROLLED IN VOLTAGE BY DIGITAL PHASE CONTROL |
| JPS60214617A (en) * | 1984-04-11 | 1985-10-26 | Hitachi Ltd | Filter integrated circuit |
| JPH0626296B2 (en) * | 1984-10-29 | 1994-04-06 | 株式会社日立製作所 | Unadjusted filter |
| JPS61281613A (en) * | 1985-05-20 | 1986-12-12 | Sanyo Electric Co Ltd | Automatic adjusting device for active filter |
| JPS62117407A (en) * | 1985-11-18 | 1987-05-28 | Sanyo Electric Co Ltd | Automatic adjuster for active filter |
| JPH0681317B2 (en) * | 1986-06-16 | 1994-10-12 | 株式会社日立製作所 | Color synchronization circuit |
| JPH0787332B2 (en) * | 1986-07-18 | 1995-09-20 | 株式会社東芝 | Automatic time constant adjustment circuit for filter circuit |
| US5023491A (en) * | 1988-01-18 | 1991-06-11 | Nec Corporation | Filter circuit arrangements with automatic adjustment of cut-off frequencies |
-
1990
- 1990-09-29 JP JP2260778A patent/JP2962800B2/en not_active Expired - Fee Related
-
1991
- 1991-09-27 CA CA002052385A patent/CA2052385C/en not_active Expired - Fee Related
- 1991-09-30 DE DE69108501T patent/DE69108501T2/en not_active Expired - Fee Related
- 1991-09-30 US US07/767,783 patent/US5182478A/en not_active Expired - Lifetime
- 1991-09-30 EP EP91116686A patent/EP0479201B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CA2052385A1 (en) | 1992-03-30 |
| US5182478A (en) | 1993-01-26 |
| JPH04138711A (en) | 1992-05-13 |
| DE69108501D1 (en) | 1995-05-04 |
| DE69108501T2 (en) | 1996-01-11 |
| EP0479201A3 (en) | 1992-05-20 |
| EP0479201A2 (en) | 1992-04-08 |
| EP0479201B1 (en) | 1995-03-29 |
| JP2962800B2 (en) | 1999-10-12 |
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| EEER | Examination request | ||
| MKLA | Lapsed |