CA1298361C - Circuit for automatically controlling the gain-bandwidth product of operational amplifiers - Google Patents
Circuit for automatically controlling the gain-bandwidth product of operational amplifiersInfo
- Publication number
- CA1298361C CA1298361C CA000564036A CA564036A CA1298361C CA 1298361 C CA1298361 C CA 1298361C CA 000564036 A CA000564036 A CA 000564036A CA 564036 A CA564036 A CA 564036A CA 1298361 C CA1298361 C CA 1298361C
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- Canada
- Prior art keywords
- signal
- voltage
- current
- gain bandwidth
- output
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/04—Modifications of control circuit to reduce distortion caused by control
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G5/00—Tone control or bandwidth control in amplifiers
- H03G5/16—Automatic control
- H03G5/18—Automatic control in untuned amplifiers
Abstract
ABSTRACT
A system for automatically controlling the gain bandwidth product of multiple operational amplifiers fabricated on the same chip, in which one of the amplifiers forms a reference amplifier, and its gain bandwidth product is determined to provide a reference signal used to control a bias circuit determinative of the gain bandwidth products of all the amplifiers, the value of these products being determined by the frequency of a square wave control signal applied to an input of the reference amplifier. The reference amplifier is highly compensated and placed in the configuration of voltage follower so as to generate an alternating exponential ramp signal, which is rectified to provide a series of ramps of common polarity and applied to a voltage to current converter to provide a current signal dependent on the frequency of the control signal and the gain bandwidth product of the reference amplifier.
The difference between this current and a reference current provides the reference signal.
A system for automatically controlling the gain bandwidth product of multiple operational amplifiers fabricated on the same chip, in which one of the amplifiers forms a reference amplifier, and its gain bandwidth product is determined to provide a reference signal used to control a bias circuit determinative of the gain bandwidth products of all the amplifiers, the value of these products being determined by the frequency of a square wave control signal applied to an input of the reference amplifier. The reference amplifier is highly compensated and placed in the configuration of voltage follower so as to generate an alternating exponential ramp signal, which is rectified to provide a series of ramps of common polarity and applied to a voltage to current converter to provide a current signal dependent on the frequency of the control signal and the gain bandwidth product of the reference amplifier.
The difference between this current and a reference current provides the reference signal.
Description
lZ~83fil The present invention relates to electronic integrated circuits and more particularly to a system for automatically controlling the gain bandwidth product of multiple operational amplifiers fabricated on a single ehip.
Integrated circuits implementing a plurality of operational amplifiers on a single silicon chip, the amplifiers sometimes including internally connected RC
networks so as to implement integrator circuits, are commereially available. Such cireuits can advantageously be used to design integrated filters, since the number of external components required is very limited. More partieularly, eapaeitors and external induetors can be avoided by the use of suitable techniques, such as the "Active R" technique.
Various problems occur in the industrial application of such filters. A first disadvantage is the limited accuracy of the individual integrated elements, such as transistors, resistors and capacitors, owing to unavoidable fabrication tolerances. As a consequence, the gain bandwidth (G*B) product of the amplifiers or of the integrators of an integrated circuit generally varies from one integrated circuit to another. Since the filter cut ~29~361 off frequency depends on that product, filters are obtained having different characteristics from those computed, bringing the necessity for an external tuning element, which a skilled technician can adjust on test. Such an operation is costly and requires a more complicated integrated circuit, since external pinc connected to internal test points should be provided, which pins have no other purpose but to assist tuning. This problem becomes evens more serious if the filter is used in a relatively complex system, such as a modem.
Another disadvantage is gain bandwidth product variations dependent on temperature which affect bias current ratios, integrated capacitors, transistor parameters and so on. This cannot be avoided by one time adjustment, so that an automatic control system is required.
A desirable filter would require neither initial tuning ror adjustment during operation for thermal drift.
Its cut off frequency ought to be fixed from the start and not depend on individual integrated circuit characteristics.
Some systems for automatically controlling gain bandwidth product are already known in the literature;
more particularly two systems of this kind are described in an article entitled "Continuous-Time MOSFET-C Filters in VLSI" by Yannis Tsividis et al, IEEE Journal of Solid State Circuits, Vol. SC-21, No. l, February 1986, pages 15-29 and shown in Figures l(b) and l(c).
These are indirect methods, i.e. methods in which control of gain bandwidth product is carried out on one or more amplifiers placed on the same silicon chip as the amplifiers actually used to implement the filter.
Since the amplifiers were fabricated together, fabrication ` ~2g8361 tolerances are the same, and being in close proximity on the chip, temperature variations are common to all the amplifiers. One or more amplifiers can then be used to measure G*B and to extract a signal proportional to it, which signals control the G*B of all the amplifiers present in the same integrated circuit. More particularly this error signal can be used to control bias currents upon which the amplifier G*Bs are dependent. Such methods are also kr,own as "indirect tuning" methods, since, by controlling G*B, filter cut off frequencies can be controlled; these filters hence become tunable to desired frequencies on the basis of a previous programming.
In the method of the system illustrated in Figure l(b) of the cited article, at least two operational amplifiers are used to implement a reference filter of the "biquad" type, to whose input a clock signal of predetermined frequency is applied. This signal is also applied to a comparison circuit, which compares its phase with the phase of the same signal extracted at the filter output. An error signal is obtained from the comparison, which acts on the filter amplifiers to keep the phase difference at the chosen frequency to a predetermined and constant value, thus compensating for fabrication tolerances and temperature variations. The method requires a sinusoidal signal input, which often presents some difficulties in a digital signal environment, and uses at least two amplifiers as well as other elements for implementing the reference filter. The method further requires a four quadrant analog multiplier for implementing the comparison circuit. The design of such a multiplier is known to present considerable difficulties due to circuit complexity, required to avoid non-linearity introduced by component transistors. The relationship between the G*B product and the signal frequency at the reference filter input is also rather difficult to compute.
1291~361 In the method illustrated in Figure l(c), at least two amplifiers are interconnected to obtain a voltage controlled oscillator. The signal produced is compared in a phase comparator with an external reference signal, and the error signal, after filtering, is used to stabilize the integrated oscillator frequency, thus implementing a phase locked loop (or PLL). Since the fabrication tolerances and temperature variations of the integrated circuit which comprises the amplifiers result in correspcnding variations in the frequency of the signal generated by the voltage controlled oscillator, its correction based on the frequency of the external signal causes correction of the G*B products of all the amplifiers. This system unfortunately requires a further filter to limit residual ripple on the error signal, and hence a further external capacitor. In fact it is not advisable to rely for this operation on the loop filter alone, which would give it a very low cut off frequency, since locking difficulties could arise. The whole system should be designed as carefully as possible to ensure locking of the integrated oscillator, since otherwise G*B
product control may be lost. The system also requires a circuit to control the signal level at the output of the voltage controlled oscillator, in order to prevent it from reaching either of the power supply voltage levels (+Vcc, -Vcc) owing to input voltage drift.
The above disadvantages are addressed by a system according to the present invention for automatically controlling the gain bandwidth product of operational amplifiers, which allows indirect control of their G*B
product through the frequency of a square wave signal applied at an input, requires the use of a sing~e external capacitor and but a single operational amplifier to measure the G*B product, and whose circuitry can readily be implemented in an integrated circuit.
l~g83fi~
According to the invention there is provided a system for automatically controlling the gain bandwidth products of multiple operational amplifiers fabricated on a single chip and having a common bias generator for controlling said gain bandwidth products, wherein one of the operational amplifiers is highly compensated and connected in voltage follower configuration to provide an alternating exponential ramp signal on receipt of a rectangular wave reference signal, and further comprising means to rectify said alternating ramp signal, a voltage to current converter receiving the output of a rectifier and charging a capacitor at a rate dependent both on the frequency of the reference signal and the gain bandwidth product of said one amplifier, a current source discharging said capacitor at a constant rate so as to produce a current difference signal, and means responsive to said current difference signal to generate a control signal for said bias generator which varies with said difference signal, in a sense such as to oppose changes in said gain bandwidth products.
The foregoing and other features of the present invention will be made clearer by the following description of an exemplary preferred embodiment thereof, with reference to the annexed drawings in which:
Figure 1 is a block diagram of a system according to the invention; and Figure 2 is a timing diagram showing principal wave forms at different points in the circuit.
The circuit described below carries out measurement of gain bandwidth product using one of several operational amplifiers on a chip, highly compensated so that the first pole of the transfer function occurs at very low frequency. This can be achieved by the use of a -~ low value capacitor~, which can be integrated on the chip.
Such an amplifier acts in known manner as a low pass RC
network, with a cut off frequency dependent on its G*B
product, when connected as a voltage follower. More particularly, its transfer function is given by G*B/(s+G*B), where s is the complex variable and G*B
product represents the inverse of its time constant. By measuring the modifications made by such a circuit to a square wave signal applied to its input, its G*B product can be derived and thereafter corrected if necessary so as to bring it again to a predetermined value.
A square wave control signal on line 1 in Figure 1 has a duty cycle of 50% and a frequency fc appropriate to the G*B product desired. More particularly, in the interest of linearity of the various system blocks, and by a suitable choice of circuit elements, the relation can be made particularly simple, i.e. G*B = 0.3497 fc.
The signal on line 1 of Figure 1 is applied to a squaring circuit SQ, which also receives on line 3 a dc reference voltage Ao generated by a suitable source GT.
At its output on line 3 a signal appears similar to that present on line 1, but with positive and negative levels Ao and -Ao respectively. This signal is applied to the non-inverting input of one of the operational amplifiers Ml of the integrated circuit, connected in voltage follower configuration. The other amplifiers M2, ... Mn can be used to carry out any desired functions, for example filtering functions, their G*B products undergoing indirect control by the frequency of the signal on line 1.
The output of amplifier M1 on line 4 is a signal V4 as shown in Figure 2. It consists of a sequence of exponentially decreasing and increasing downward and upward ramps with a time constant which is the transfer function 1;~9836~
of the low pass network implemented by amplifier M1.
The signal on line 4 is applied to the input of a rectifying circuit CR, at whose output on line 5 a signal appears similar to that shown by curve V5 of Fig. 2. It consists of a sequence of positive amplitude, exponentially increasing ramps. The signal supplied on line 5 is applied to a voltage-to-current converter RD which has a transfer function Ril. This converter is designed to convert the input ramp voltage into a current by dividing it by a resistance Ril of suitable value, as explained further below. The mean value of the output current depends upon the amplitude of the reference voltage Ao, upon the G*B
product of the amplifier, upon the frequency fc of the reference signal on line l and upon the value of resistance Ril, according to a rather complex relationship. More particularly, it is directly proportional to voltage Ao.
The current on line 6 charges a capacitor C
whose other terminal connected to the negative power-supply voltage -Vee. The capacitor is also discharged through a constant-current generator GC, slaved to the reference voltage source GT, so that the current traversing it be equal to Ao/Ri2, the value of Ri2 being determined as hereinafter discussed. Capacitor C can keep a constant charge only if the mean value of the current supplied from converter RD is equal to the current drawn by source GC.
Since both currents are directly proportional to the voltage Ao generated by source GT, any possible variation in the potential of this source does not affect the magnitude of the charge accumulated by capacitor C, and thus the potential across it. This potential controls a bias circuit CP, which by varying currents applied to the operational amplifiers on line 7, controls their G*B
products so that these are inversely proportional to the voltage across C.
12983~
An undesired increase in G*B causes a reduction in the time constant of integrator M1 and hence a more rapid increase of the voltage ramp at its output. That causes an increase in the mean value of the current which charges capacitor C and thus a higher voltage across its terminals, which in turn causes a reduction of the G*B
product through the action of bias circuit CP, so as to correct its value.
Supposing on the contrary that a reduction of the G*B product is desired, then the frequency of the signal on line 1 is reduced, thus obtaining a proportionally more rapid increase of the ramp at the output of integrator M1 and a higher mean value, since the response of a low-pass network to a lower frequency signal is more rapid. Correction then occurs as in the preceding case of an undesired G*B increase.
The preferred ratio between G*B and fc mentioned above, can be obtained by a suitable choice of the ratio of Ril to Ri2. More particularly, it is possible to demonstrate that G*B=0.3497 fc when Ril/Ri2 is 0.261857 and the peak value of signal V5 (Fig. 2) equals Ao/2 V5 = Ao(R2-R1)/(R2+R1) (2) In relationships (l) and (2), signals V4 and V5 present the same multiplier Ao, representing the value of the voltage generated by source GT, so that any variation of this value does not affect the comparison between the amplitude of signals V4 and V5. In fact Ao appears as a common node voltage at the differential inputs of the comparator CA.
As shown in Figure 1, the signal on line 6 is applied to a circuit CD which compares its period with that of the signal a supplied by logic circuit LC on line 12g836~
7. Circuit CD has an exclusive -OR function, providing an output current on line 8 when the duration of the high level portion of signal V6 (Figure 2) falls short of that of signal V7, drawing an input current in the opposite case, and drawing no current in the case of equality. The magnitude I8 of this current (see Figure 2), is represented as negative to indicate that it is being sunk by circuit CD.
The output of exclusive -OR circuit CD is applied by line 8 to a terminal of a capacitor C, whose other terminal is connected to the negative power supply voltage -Vee. The capacitor C is charged or discharged as a function of the current supplied by CD, presenting a voltage signal V8 with a profile similar to that shown in Figure 2. The waveform represents a voltage of decreasing value, since the current signal I8 has a negative value.
The voltage across capacitor C controls a bias circuit CP, which by varying the currents sent to the operational amplifiers controls their G*B products. More specifically the value of G*B is inversely proportional to the voltage across C. An undesired increase in G*B causes a reduction in the time constant of integrator Ml and hence a more rapid increase of the voltage ramp at its output. That causes the generation of shorter pulses at output 6 of comparator CA, more particularly shorter than those at output 7 of LC. As a consequence the current generated by CD charges capacitor C and an increased voltage at the input of bias circuit CP causes a corrective reduction of the G*B product. If a reduction of G*B product is desired, the signal frequency at input 1 is reduced, thus obtaining a proportionally more rapid increase of the ramp at the output of integrator Ml: in fact the response of a low pass network to a lower frequency signal is more rapid.
Correction is then carried out as in the preceding case of an undesired G*B increase.
Integrated circuits implementing a plurality of operational amplifiers on a single silicon chip, the amplifiers sometimes including internally connected RC
networks so as to implement integrator circuits, are commereially available. Such cireuits can advantageously be used to design integrated filters, since the number of external components required is very limited. More partieularly, eapaeitors and external induetors can be avoided by the use of suitable techniques, such as the "Active R" technique.
Various problems occur in the industrial application of such filters. A first disadvantage is the limited accuracy of the individual integrated elements, such as transistors, resistors and capacitors, owing to unavoidable fabrication tolerances. As a consequence, the gain bandwidth (G*B) product of the amplifiers or of the integrators of an integrated circuit generally varies from one integrated circuit to another. Since the filter cut ~29~361 off frequency depends on that product, filters are obtained having different characteristics from those computed, bringing the necessity for an external tuning element, which a skilled technician can adjust on test. Such an operation is costly and requires a more complicated integrated circuit, since external pinc connected to internal test points should be provided, which pins have no other purpose but to assist tuning. This problem becomes evens more serious if the filter is used in a relatively complex system, such as a modem.
Another disadvantage is gain bandwidth product variations dependent on temperature which affect bias current ratios, integrated capacitors, transistor parameters and so on. This cannot be avoided by one time adjustment, so that an automatic control system is required.
A desirable filter would require neither initial tuning ror adjustment during operation for thermal drift.
Its cut off frequency ought to be fixed from the start and not depend on individual integrated circuit characteristics.
Some systems for automatically controlling gain bandwidth product are already known in the literature;
more particularly two systems of this kind are described in an article entitled "Continuous-Time MOSFET-C Filters in VLSI" by Yannis Tsividis et al, IEEE Journal of Solid State Circuits, Vol. SC-21, No. l, February 1986, pages 15-29 and shown in Figures l(b) and l(c).
These are indirect methods, i.e. methods in which control of gain bandwidth product is carried out on one or more amplifiers placed on the same silicon chip as the amplifiers actually used to implement the filter.
Since the amplifiers were fabricated together, fabrication ` ~2g8361 tolerances are the same, and being in close proximity on the chip, temperature variations are common to all the amplifiers. One or more amplifiers can then be used to measure G*B and to extract a signal proportional to it, which signals control the G*B of all the amplifiers present in the same integrated circuit. More particularly this error signal can be used to control bias currents upon which the amplifier G*Bs are dependent. Such methods are also kr,own as "indirect tuning" methods, since, by controlling G*B, filter cut off frequencies can be controlled; these filters hence become tunable to desired frequencies on the basis of a previous programming.
In the method of the system illustrated in Figure l(b) of the cited article, at least two operational amplifiers are used to implement a reference filter of the "biquad" type, to whose input a clock signal of predetermined frequency is applied. This signal is also applied to a comparison circuit, which compares its phase with the phase of the same signal extracted at the filter output. An error signal is obtained from the comparison, which acts on the filter amplifiers to keep the phase difference at the chosen frequency to a predetermined and constant value, thus compensating for fabrication tolerances and temperature variations. The method requires a sinusoidal signal input, which often presents some difficulties in a digital signal environment, and uses at least two amplifiers as well as other elements for implementing the reference filter. The method further requires a four quadrant analog multiplier for implementing the comparison circuit. The design of such a multiplier is known to present considerable difficulties due to circuit complexity, required to avoid non-linearity introduced by component transistors. The relationship between the G*B product and the signal frequency at the reference filter input is also rather difficult to compute.
1291~361 In the method illustrated in Figure l(c), at least two amplifiers are interconnected to obtain a voltage controlled oscillator. The signal produced is compared in a phase comparator with an external reference signal, and the error signal, after filtering, is used to stabilize the integrated oscillator frequency, thus implementing a phase locked loop (or PLL). Since the fabrication tolerances and temperature variations of the integrated circuit which comprises the amplifiers result in correspcnding variations in the frequency of the signal generated by the voltage controlled oscillator, its correction based on the frequency of the external signal causes correction of the G*B products of all the amplifiers. This system unfortunately requires a further filter to limit residual ripple on the error signal, and hence a further external capacitor. In fact it is not advisable to rely for this operation on the loop filter alone, which would give it a very low cut off frequency, since locking difficulties could arise. The whole system should be designed as carefully as possible to ensure locking of the integrated oscillator, since otherwise G*B
product control may be lost. The system also requires a circuit to control the signal level at the output of the voltage controlled oscillator, in order to prevent it from reaching either of the power supply voltage levels (+Vcc, -Vcc) owing to input voltage drift.
The above disadvantages are addressed by a system according to the present invention for automatically controlling the gain bandwidth product of operational amplifiers, which allows indirect control of their G*B
product through the frequency of a square wave signal applied at an input, requires the use of a sing~e external capacitor and but a single operational amplifier to measure the G*B product, and whose circuitry can readily be implemented in an integrated circuit.
l~g83fi~
According to the invention there is provided a system for automatically controlling the gain bandwidth products of multiple operational amplifiers fabricated on a single chip and having a common bias generator for controlling said gain bandwidth products, wherein one of the operational amplifiers is highly compensated and connected in voltage follower configuration to provide an alternating exponential ramp signal on receipt of a rectangular wave reference signal, and further comprising means to rectify said alternating ramp signal, a voltage to current converter receiving the output of a rectifier and charging a capacitor at a rate dependent both on the frequency of the reference signal and the gain bandwidth product of said one amplifier, a current source discharging said capacitor at a constant rate so as to produce a current difference signal, and means responsive to said current difference signal to generate a control signal for said bias generator which varies with said difference signal, in a sense such as to oppose changes in said gain bandwidth products.
The foregoing and other features of the present invention will be made clearer by the following description of an exemplary preferred embodiment thereof, with reference to the annexed drawings in which:
Figure 1 is a block diagram of a system according to the invention; and Figure 2 is a timing diagram showing principal wave forms at different points in the circuit.
The circuit described below carries out measurement of gain bandwidth product using one of several operational amplifiers on a chip, highly compensated so that the first pole of the transfer function occurs at very low frequency. This can be achieved by the use of a -~ low value capacitor~, which can be integrated on the chip.
Such an amplifier acts in known manner as a low pass RC
network, with a cut off frequency dependent on its G*B
product, when connected as a voltage follower. More particularly, its transfer function is given by G*B/(s+G*B), where s is the complex variable and G*B
product represents the inverse of its time constant. By measuring the modifications made by such a circuit to a square wave signal applied to its input, its G*B product can be derived and thereafter corrected if necessary so as to bring it again to a predetermined value.
A square wave control signal on line 1 in Figure 1 has a duty cycle of 50% and a frequency fc appropriate to the G*B product desired. More particularly, in the interest of linearity of the various system blocks, and by a suitable choice of circuit elements, the relation can be made particularly simple, i.e. G*B = 0.3497 fc.
The signal on line 1 of Figure 1 is applied to a squaring circuit SQ, which also receives on line 3 a dc reference voltage Ao generated by a suitable source GT.
At its output on line 3 a signal appears similar to that present on line 1, but with positive and negative levels Ao and -Ao respectively. This signal is applied to the non-inverting input of one of the operational amplifiers Ml of the integrated circuit, connected in voltage follower configuration. The other amplifiers M2, ... Mn can be used to carry out any desired functions, for example filtering functions, their G*B products undergoing indirect control by the frequency of the signal on line 1.
The output of amplifier M1 on line 4 is a signal V4 as shown in Figure 2. It consists of a sequence of exponentially decreasing and increasing downward and upward ramps with a time constant which is the transfer function 1;~9836~
of the low pass network implemented by amplifier M1.
The signal on line 4 is applied to the input of a rectifying circuit CR, at whose output on line 5 a signal appears similar to that shown by curve V5 of Fig. 2. It consists of a sequence of positive amplitude, exponentially increasing ramps. The signal supplied on line 5 is applied to a voltage-to-current converter RD which has a transfer function Ril. This converter is designed to convert the input ramp voltage into a current by dividing it by a resistance Ril of suitable value, as explained further below. The mean value of the output current depends upon the amplitude of the reference voltage Ao, upon the G*B
product of the amplifier, upon the frequency fc of the reference signal on line l and upon the value of resistance Ril, according to a rather complex relationship. More particularly, it is directly proportional to voltage Ao.
The current on line 6 charges a capacitor C
whose other terminal connected to the negative power-supply voltage -Vee. The capacitor is also discharged through a constant-current generator GC, slaved to the reference voltage source GT, so that the current traversing it be equal to Ao/Ri2, the value of Ri2 being determined as hereinafter discussed. Capacitor C can keep a constant charge only if the mean value of the current supplied from converter RD is equal to the current drawn by source GC.
Since both currents are directly proportional to the voltage Ao generated by source GT, any possible variation in the potential of this source does not affect the magnitude of the charge accumulated by capacitor C, and thus the potential across it. This potential controls a bias circuit CP, which by varying currents applied to the operational amplifiers on line 7, controls their G*B
products so that these are inversely proportional to the voltage across C.
12983~
An undesired increase in G*B causes a reduction in the time constant of integrator M1 and hence a more rapid increase of the voltage ramp at its output. That causes an increase in the mean value of the current which charges capacitor C and thus a higher voltage across its terminals, which in turn causes a reduction of the G*B
product through the action of bias circuit CP, so as to correct its value.
Supposing on the contrary that a reduction of the G*B product is desired, then the frequency of the signal on line 1 is reduced, thus obtaining a proportionally more rapid increase of the ramp at the output of integrator M1 and a higher mean value, since the response of a low-pass network to a lower frequency signal is more rapid. Correction then occurs as in the preceding case of an undesired G*B increase.
The preferred ratio between G*B and fc mentioned above, can be obtained by a suitable choice of the ratio of Ril to Ri2. More particularly, it is possible to demonstrate that G*B=0.3497 fc when Ril/Ri2 is 0.261857 and the peak value of signal V5 (Fig. 2) equals Ao/2 V5 = Ao(R2-R1)/(R2+R1) (2) In relationships (l) and (2), signals V4 and V5 present the same multiplier Ao, representing the value of the voltage generated by source GT, so that any variation of this value does not affect the comparison between the amplitude of signals V4 and V5. In fact Ao appears as a common node voltage at the differential inputs of the comparator CA.
As shown in Figure 1, the signal on line 6 is applied to a circuit CD which compares its period with that of the signal a supplied by logic circuit LC on line 12g836~
7. Circuit CD has an exclusive -OR function, providing an output current on line 8 when the duration of the high level portion of signal V6 (Figure 2) falls short of that of signal V7, drawing an input current in the opposite case, and drawing no current in the case of equality. The magnitude I8 of this current (see Figure 2), is represented as negative to indicate that it is being sunk by circuit CD.
The output of exclusive -OR circuit CD is applied by line 8 to a terminal of a capacitor C, whose other terminal is connected to the negative power supply voltage -Vee. The capacitor C is charged or discharged as a function of the current supplied by CD, presenting a voltage signal V8 with a profile similar to that shown in Figure 2. The waveform represents a voltage of decreasing value, since the current signal I8 has a negative value.
The voltage across capacitor C controls a bias circuit CP, which by varying the currents sent to the operational amplifiers controls their G*B products. More specifically the value of G*B is inversely proportional to the voltage across C. An undesired increase in G*B causes a reduction in the time constant of integrator Ml and hence a more rapid increase of the voltage ramp at its output. That causes the generation of shorter pulses at output 6 of comparator CA, more particularly shorter than those at output 7 of LC. As a consequence the current generated by CD charges capacitor C and an increased voltage at the input of bias circuit CP causes a corrective reduction of the G*B product. If a reduction of G*B product is desired, the signal frequency at input 1 is reduced, thus obtaining a proportionally more rapid increase of the ramp at the output of integrator Ml: in fact the response of a low pass network to a lower frequency signal is more rapid.
Correction is then carried out as in the preceding case of an undesired G*B increase.
Claims (3)
1. A system for automatically controlling the gain bandwidth products of multiple operational amplifiers fabricated on a single chip and having a common bias generator for controlling said gain bandwidth products, wherein one of the operational amplifiers is highly compensated and connected in voltage follower configuration to provide an exponential ramp signal on receipt of a rectangular wave reference signal, and further comprising means to rectify said exponential ramp signal, a voltage to current converter receiving the output of a rectifier and charging a capacitor at a rate dependent both on the frequency of the reference signal and the gain bandwidth product of said one amplifier, a current source discharging said capacitor at a constant rate so as to produce a current difference signal, and means responsive to said current difference signal to generate a control signal for said bias generator which varies with said difference signal, in a sense such as to oppose changes in said gain bandwidth products.
2. A system for automatically controlling the gain bandwidth product of multiple operational amplifiers fabricated on a single chip, wherein the gain bandwidth product of one of the amplifiers is measured and the resulting signal is used to control, through a bias circuit, the gain bandwidth, products of all the amplifiers, the value of these products being determined by the frequency of a control signal applied to a system input, comprising:
a) a squaring circuit, which receives at its input a rectangular wave control signal with a predetermined frequency and a 50% duty cycle, and provides at an output a corresponding rectangular wave signal with an amplitude equal to that of a reference voltage;
b) a source of reference voltage;
c) an operational amplifier, which is one of the operational amplifiers fabricated on said chip, said amplifier being highly compensated so that the first pole of its transfer function is at very low frequency, the amplifier being connected in voltage follower configuration, and receiving at a non-inverting input the signal from the output of said squaring circuit;
d) a rectifying circuit which receives at its input the output from said operational amplifier (M1);
e) a voltage to current generator with a transfer function equal to a first resistive value which receives a voltage signal from the rectifying circuit and converts it into a current signal at an output;
f) a constant-current generator which draws a current equal to said reference voltage divided by a second resistive value from the output of the voltage to current converter; and g) a capacitor connected between a negative voltage source and the output of the voltage to current converter, said output being applied to said bias circuit in a sense such as to control amplifier gain bandwidth product in inverse proportion to the potential across the capacitor.
a) a squaring circuit, which receives at its input a rectangular wave control signal with a predetermined frequency and a 50% duty cycle, and provides at an output a corresponding rectangular wave signal with an amplitude equal to that of a reference voltage;
b) a source of reference voltage;
c) an operational amplifier, which is one of the operational amplifiers fabricated on said chip, said amplifier being highly compensated so that the first pole of its transfer function is at very low frequency, the amplifier being connected in voltage follower configuration, and receiving at a non-inverting input the signal from the output of said squaring circuit;
d) a rectifying circuit which receives at its input the output from said operational amplifier (M1);
e) a voltage to current generator with a transfer function equal to a first resistive value which receives a voltage signal from the rectifying circuit and converts it into a current signal at an output;
f) a constant-current generator which draws a current equal to said reference voltage divided by a second resistive value from the output of the voltage to current converter; and g) a capacitor connected between a negative voltage source and the output of the voltage to current converter, said output being applied to said bias circuit in a sense such as to control amplifier gain bandwidth product in inverse proportion to the potential across the capacitor.
3. A system as claimed in Claim 2, wherein the gain bandwidth product (G*B) is equal to the frequency of the control signal multiplied by about 0.3497, and the ratio between the first and second resistive values is about 0.261857.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT67330-A/87 | 1987-04-17 | ||
| IT8767330A IT1208875B (en) | 1987-04-17 | 1987-04-17 | CIRCUIT FOR AUTOMATIC PRODUCT CONTROL BAND GAIN OF OPERATIONAL AMPLIFIERS |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1298361C true CA1298361C (en) | 1992-03-31 |
Family
ID=11301504
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000564036A Expired CA1298361C (en) | 1987-04-17 | 1988-04-13 | Circuit for automatically controlling the gain-bandwidth product of operational amplifiers |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4835490A (en) |
| EP (1) | EP0287063B1 (en) |
| JP (1) | JP2534537B2 (en) |
| CA (1) | CA1298361C (en) |
| DE (2) | DE3887916T2 (en) |
| IT (1) | IT1208875B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2672750B1 (en) * | 1991-02-08 | 1996-12-20 | Thomson Composants Militaires | AMPLIFICATION CIRCUIT WITH EXPONENTIAL GAIN CONTROL. |
| US6600374B2 (en) * | 2001-06-25 | 2003-07-29 | Rambus Inc. | Collective automatic gain control |
| JP2003258604A (en) | 2002-03-06 | 2003-09-12 | Mitsubishi Electric Corp | Semiconductor integrated circuit with mounted filter |
| US7385448B2 (en) | 2006-05-17 | 2008-06-10 | Intelleflex Corporation | Circuitry for adaptively generating and using a reference voltage |
| US7692484B2 (en) * | 2006-10-26 | 2010-04-06 | Stmicroelectronics Belgium Nv | Bandwidth calibration of active filter |
| CN113131888A (en) * | 2020-01-10 | 2021-07-16 | 微龛(广州)半导体有限公司 | Bandwidth-adjustable amplifier circuit, method, medium, terminal and optical receiver |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3603859A (en) * | 1969-05-09 | 1971-09-07 | Us Air Force | System for multichannel variable-time constant control |
| US3714588A (en) * | 1970-10-13 | 1973-01-30 | Nasa | Self tuning bandpass filter |
| FR2259486B1 (en) * | 1974-01-25 | 1978-03-31 | Commissariat Energie Atomique | |
| US4439744A (en) * | 1981-12-24 | 1984-03-27 | Rca Corporation | Variable power amplifier |
| US4760347A (en) * | 1987-01-20 | 1988-07-26 | Novatel Communications Ltd. | Controlled-output amplifier and power detector therefor |
-
1987
- 1987-04-17 IT IT8767330A patent/IT1208875B/en active
-
1988
- 1988-04-07 US US07/178,556 patent/US4835490A/en not_active Expired - Lifetime
- 1988-04-13 EP EP88105879A patent/EP0287063B1/en not_active Expired - Lifetime
- 1988-04-13 DE DE3887916T patent/DE3887916T2/en not_active Expired - Fee Related
- 1988-04-13 DE DE198888105879T patent/DE287063T1/en active Pending
- 1988-04-13 CA CA000564036A patent/CA1298361C/en not_active Expired
- 1988-04-15 JP JP63091914A patent/JP2534537B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2534537B2 (en) | 1996-09-18 |
| US4835490A (en) | 1989-05-30 |
| DE3887916T2 (en) | 1994-08-04 |
| IT8767330A0 (en) | 1987-04-17 |
| DE287063T1 (en) | 1991-09-26 |
| EP0287063B1 (en) | 1994-02-23 |
| EP0287063A3 (en) | 1990-11-28 |
| DE3887916D1 (en) | 1994-03-31 |
| EP0287063A2 (en) | 1988-10-19 |
| IT1208875B (en) | 1989-07-10 |
| JPS63280504A (en) | 1988-11-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKLA | Lapsed |