CA1208382A - Programmable video test pattern generator for display systems - Google Patents

Abstract

ABSTRACT

A front for test patterns is made programmable by programming individual "characters" to be displayed on a video display. The individual characters are assigned memory locations and can be adjusted in height and width, as well as in color and intensity. Complex characters are formed by programming additional features onto a character memory space assigned to each character.
The system provides a greater ratio of pattern generating capa-bility-to-required hardware, while providing most features of a fixed character generator. The system's programmability is particularly adapted to use with a test system which has capabilities of increment-ally varying scan rate and raster patterns, as well as a capability of random stroke and fixed mode stimuli generation.

Description

' Disclosure 247-82-0060 PROGRAMMABLE VIDEO TEST PATTER~I GENERATOR FOR DISPLAY SYSTEMS

Cathode ray tube (CRT) type displays are becoming the primary man-machine interface used in, for example9 avionic display systems. Testing in the maintenance environment has been costly, complex, and time consuming.
Direct view (i.e., Heads-Down) and Heads-Up CRT displays are used in naviyation, flight control, and weapons management systems. These displays are being used increasingly to rep1ace and augment the multitude o; electron-mechanical displays, instruments, gauges, and dials that comprlse many of today s aircraft instrument panels. As this trend continues, with the attendant improvements in data processing and computer assistance, the pilot and aircrew will become systems managers. This relieves them of many routine monitoring tasks and permits them to devote more time to the critical tasks which are suitably presented on the CRT displays. There are additional benefits such as hardware simplification, commonality, and improved reliability and maintainability. With the increased usage of these devices, there is a growing need for more reliable, faster, and complete testing.
D;rect-view CRT dlsplays (Heads-Down Displays) are televislon-type instruments which are situated in both aircraft control panels (below the windscreen) as well as located in rear cabins. This type of display produces a diffused, non-collimated light image which can be described in rectilinear coordinates (i.e., horizontal and vertical). These displays process sensory information derived from a variety of sources. These include radar, TV
cameras, infrared detection systems, and electronically generated graphic and alphanumeric aircraft status information. The resulting display may by presented as a raster scan, random scan (i.e., stroke), or a combination of both.
To evaluate the capability of these displays to adequately reproduce the 7mages derived from the above sensory sources-and to determine the cause of any problems, it is necessary to test at least the following parameters:
Photo-optical Response Brightness - Area in raster mode - Line in stroke mode Contrast Shades of gray in raster mode Relative to reflected ambient in stroke mode

- 2 Color -- Hue (photometric frequency response) and saturation for raster and stroke modes.
- Four colors (red, yellow, orange, and green) for beam penetra tion CRTs.
- Eight or more colors for shadow-mask CRTs.
Resolution - In Raster Mode Hori70ntal resolution (in dir~ctlon of scanning lines) includes video channel and CRT characteristics (TV lines or lile pairs) Vertical resolution (perpendicular to scanning lines) includes line width and spacing (number of lines per height) - In Stroke Mode Line width measurement Orthogonality and center Llnearity - total and differential linearity for raster and stroke mode Character - fidelity in stroke mode Registration - overlap of symbol position in mixed stroke and raster display mode Electronic Circuitry Response Sync and video separation - in composi$e videc mode Amplitudes - Video in raster and stroke modes - Deflection in stroke mode and in separated H/V raster mode Writing rates in stroke mode Scan conformity - in raster mode Slew and settling times - in raster and stroke modes Bandwidth - Video channel in raster mode - Deflection channel in stroke mode The Heads-Up Display (HUD) is an electro-optical device for combining an electronîcally generated image with the real-world.scene. The HUD is located in such a way that the image is projected in a collimated fashion to produce images that are focused at infinityO The overlaying of images with real-wor1d scenes is necessary to perform target detectlon, identification, tracking, and landing guîdance, thus increasing the Tmportance of posîtional placement accuracy Due to the nature of collumated images, the tnforma~ion d1splayed is characterized in angular coordinates (i.e., azlmuth and ~01~3~2 !-elevation). These type displays also process similar sensor data as previously discussed. Earlier HUD displays rnainly utilized a stroke type symbology format. Avionic display systems currently in development combine existing stroke formats with raster scan formats and are capable of operating in stroke mode alone or raster mode combined with overlayed stroke symbology.
The evaluation of these displays to adequately reproduce the input sensory information requires testing all of the parameters previously described with the differences of:
Contrast - relative to real-world Tmages Positional measurements - elevation and azimuth angles It has been customary to separate the display functlons and Image generation electronics in the avionics into two black boxes. Thls Ts usually due to the space requirements in the cockpit and because, in some cases, one electronics box may be used to generate signals to more than one remotely located CRT display.
To satisfy the testing requirements for a vast majority of present and future avionic displays, a choice of programmable electronic waveforms and CRT test patterns with programmable parameters must be made available. The patterns that should be chosen should not only verify CRT quality,' but should be useful in verifying and fault-isolating the display unit's electronics.
Figure 1 shows a typical set of test patterns. Each of the patterns is useful for testing raster displays, whereas patterns d-f and h-j are also quite useful for testing stroke-scanned displays. Each of the displays in figure 1 should have programmable features which, at the very least, includes programmable color and/or intensity. These tests are used as follows:
Parameters To Be Verified Applicab1e Test Patterns Brightness 9, i, b Contrast Ratios a, f Black Level b, a, g Low Frequency Response b Mid Frequency Response b, j Interlace (Line Pairing) c Centering Orthogonal7ty d Size d, b Linearity e, f Horizontal Resolution and Modulation k, I
Transfer Function

3~21~) 8~ r `

Parameters To Be Verified Applicable Test Patterns ~Continu~d) Vertical Resolution h, g Spot Size h, 9, f Color a, b, c Gray Scale Gamma Correction a, c Focus k, f, h, j, i Stroke Character Fidelity n Deflection Small Signal Band W;dth Deflection Transient Response and V7deo Deflection Timing Writing Speed Brightness Positional Accuracy Stroke Resolution Position Registration n Position Overlay Between Raster and Stroke ZO Geometric Aberrations, Parallax and h, j Cross Talk Note that, despite the complexity, each test pattern has a certain degree of repeatabili'ty, not only by the definition ofp "pattern", but also as interpreted when conscructing the display of the pattern.
in addition to the number of different patterns, these raster patterns are generated in a number of formats. These formats range ;n vertical resolution from less than 240 lines per frame ~non-interlaced) to greater than 1,029 lines per frame (interlaced) and in horizontal resolutions from less than 240 TV lines to greater than 1,000 TV lines per pTcture height.
Standard raster formats are defined by EiA standards RS~170 and -412A, NATO
STANAG 3350, NTSC, and the~European standards (SECAM and numerous PAL
variations). These standards differ not only In horizontal and verttcal resolutions, but in sync, blanking, equalizing, and serration timing, and differ in sync and video amplltudes. In the mil7tary, the waveforms are usually modified versions of the standards, with differences in vertical blanking time, equalizlng and serration formats, and waveform amplitudes.
Communication to the display unit may be in composite video format, thus requiring the programmable generation of all the composite video waveform parameters in a combined single complex waveform. For the sync separated 3~ , format, the same programmability is necessary while transmitting videc (with blanking) and sync signals over individual transmission lines in proper time-phase synchronization. The separate deflection and video format still requires the internal generation of all the timing parameters, but with the addition of the transmission of separate horizontal and vertical deflection waveforms. These deflection signals can be in either the usual sawtooth (TV sweep) waveform, the triangular B-scan, the PPI arc-scan (sinusoidal), or a variety of other formats. In each oF these, the amplitudes of the deflection waveform must be programmable For stroke generation, the pertinent parameters that must be programm-able are:
Vectors and arcs - starting positions - terminating position or length and angle - radius and direction (arcs only) i5 - writing speeds - intensity and color Spec;al symbols - starting position - symbol content - symbol orientation (angular) - writing speeds - intensity and color -Based upon analysis of HUD's used on current military aircraft, symbol positional accuracy at the center of the screen ;s fairly high. For direct view, the usual screen hidth ranges from 4 to 8 inches wieh narrow l;ne widths. This reqùires stimulus with a high resolution. Based upon obtaining the minimum required brightness in cockpit environments and the amount of symbology presented for current and proposed aircraft, writing speeds for HUD's can vary considerably. For direct view displays, the linear writTng speeds are significantly faster.
To express a raster waveform with sufficient resolution to address only 400 TV line horizontal resolution would require Z10,000 data points for a 525-line raster, and over a million points for l,000-line rasters with 1,000 TV line resolution. For color, these figures would increase by a factor of at least 3 (23 colors). Algorithms can be devised to calculate the points for repeating raster patterns and thereby considerably reduce the number of points specified, depending on the pattern. Nevertheless, this would create a situation that sti11 requires a programmer to define a large number of points and would a1so need additional memory to store the values.
Also5 if the test requirement document (TRD) has been conveniently written 3,3~

in optical measurement terms, the programmer would be requTred to understand the complex relationship between signals and patterns.
One technique that might be considered to obtain the various electronic waveform stimuli would be to optically scan a set of suitable test pattern targets with a TV vidicon camera or similar device. The camera output would then be scan-converted to the desired format. The accuracies and stability that could be achieved would be limited by the camera and associated data conversion electronics. Furthermore in order to scan-convert eo different formats and at different scan rates, electronic circwitry must provide the necessary programmable scan-conversion timing signals. Since programmable electronics must be provided, it is more fruitful to Include programmable electronic test pattern generation and thus avold the scannef, target, and mechanical accuracy limitations. In addition, electronlc implementation prov7des flexible pattern generation through software, reduced Syseem slze, and increased reliability.
A more general method of testing display systems, including both raster `' and stroke, has been made available by the development of a programmable display test unit. This unit is capable of providing synchronized video waveforms compatible with EIA standards as well as non-standard formats with-in the EIA stated ranges. The raster patterns produced are limited to horizontal lines, vertical lines, cross-hatch, resolutlon, and gray scales.
Character symbology is only generated in stroke mode and contains a fTxed -repertoire of characters.
The basic technique of waveform generation for the raster mode is video activation at the appropriate synchronized time uslng registers set for a particular vertical line (or a set of particular vertical lines) and for a particular horizontal line (or a set of particular horizontal lines Character generation is performed through a symbol formatting memory contain-ing 256 character locations and a separate symbol memory with a 11mited number of character shapes. The symbol memory contains dlgltal Information for a fixed number of strokes for each character,.which is converted to analog form by video drive circuits. These signals, together with position information, allows the fixed symbol repertoire to be placed over the entire screen with 10-bit resolution. Furthermore, stroke and raster are multiplexed in real time to provide mixed mode.
This system uses an adapted video test procedure which approaches the machine-independent and user-oriented test language. However, since the language contains several fixed selectable parameters that are character-istic of the hardware limitations, the goal of a video test procedure has not 3L2(~S~31!32 f - 7 - Disclosure 247-82-0060 been completely rnet. Examination of the raster display source statements for raster test patterns reveals a finite or fixed range of discrete values for horizontal resolution that may be programmed. ThPy range from 140 to 840 vertical line pairs. In addition, the programmability of the gray scale can only assume values of 8, 10, or 11 shades. The proposed language staternents for test pattern selection is limited to a fixed set which does not alloy for synthesizing and varying other raster patterns.
In the stroke statements, the variables used to identify characters, special symbols, and stroke patterns are uniquely coded. While this seems to be a suitable approach, it requires a library of particular symbols and patterns.
This approach would cause a proliferation of library contene. The best way to circumvent this prob1ern wou1d be to al10w the generation of arbitrary strokes (vectors and arcs.
Although this approaeh provides a flexible choice of synchronization parameters, it limits the test patterns and characters that may be produced. New test conditions and situations may not be accommodated with-out some change in both hardware and/or software.
It is accordingly an object of the invention to provide a more general and universal approach to video test stimuli which may be used, for example, in an avionic intermediate shop for various military and commercial aircraft.
It is desired that, without compromistng resolutTon and without limitlng the number of different scan formats of a video system which may be tested, the approach be f!exible as to the types of test patterns produced. It is a further object Jo provide a system which i5 programmable with respect to test patterns generated and yet does not require a large amount of memory whlch would be required For a system having a 1:1 correspondence of memory storage to displayed pixels. It is also desired that the programming be readily effected by use of a "high level language" not requiring the use of detailed machine level pattern mapping.

SUMMARY OF THE INVENTION

This invention contemplates-a programmable video test pattern generator for display systems in which programmed display test patterns are generated.
This is accomplished by issuing a high !evel statement of the pattern, establishing a coordinate 10cation for a character on the raster and determin-ing if the location has been assigned a character. If a character has been - assigned, new information is obtained from the high level statement in order to construct a new pattern for the character. If the location does not have - 8 - Disclosure 247-82-~060 a character assigned, a blank character is obtained in memory. If more information is required to fulfill the requirement of the high level state-ment, the procedure is repeated from the step of determining the coordinate location for the character. This system is adaptable to equiprnent having a large variety of raster patterns and scan rates. Data representing the generated display patterns may be serially shifted to video circuits in the system at the system's pixel clock rate.
in a further aspect of the inventton, an apparatus is provided to accomplish the above functions. Such apparatus could create a large number l of different test patterns whose features may be programmed. The attri-butes of the patterns may be superimposed.

'3~2 g BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows representations of video test pattern displays;
Figure 2 is a block diagram showing a video display generator used with the invention;
Figure 3 is a block diagram showing a timing and synchronous generator used in a vldeo display generator of Figure 2;
Figure 4 is a block diagram of a memory control circuit used for generating characters to be displayed through the vldeo display generator of Figure 2;
Figure 5 is a flow chart showing the character generation technique used to generate characters to be displayed by the video display generator according tO the invention;
Figure 6 is a block diagram showing the use of built in test equipment - to give the system a self~test capability.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

As indicated, the system according to the invention is intended to generate display patterns such as is shown on Figure 1, as well as other patterns which are not shown, partly because the system is designed such that the patterns arè programmed into memory as software and consequently would not necessarily exist pr;or to that tlmeO As indicated in Figure 2, these displays are provided through a multi-processor 11 to a video display generator 13. The video display generator includes a timing and sync generator 15 which provides timing signals which enable a CRT scanning system to function. These signals include time references for horizontal and vertical sync, blanking and drive. The timtng and sync generator a1so provides a dependent reference signal to a waveform generator 17. The waveform generator 17 controls the raster output by controlling horizontai and verticai sweeps9 as we!l as a video output signal. The dependent reference signal occurs at approximately a predetermined frequency that is established as a multiple of a horizontal line period, as will be described later. The timing and sync generator also provides timing signals through a video generator 19 and a color raster circuit which includes a raster control and logic module 21, a raster memory 23 and a color video output circuit 25. In most systems using separate color circuits, one color (usually green) is included in the output of the video generation section.
Therefore, the composite video generator 19 is also part of the color raster ~2~"3~3~

circuit. In various color display systems, the composite video generator 19 and/or the color vîdeo output module 25 will provide all of the color information.
A ron-raster scanning capability is provided by a stroke display processor 31 which receives a timing signal from the timing and sync generator 15 and addresses a display file 33 in order to obtain a specific display. The stroke display processor 31 provides a signal to a drawing circuit 35 which in turn provides X and Y deflection timing signals to an output driver 37.
~0 Referring to Figure 3, the timing and sync timing generator 15 uses a plurality of phase locked loops (PLL's) 41-44 to produce signals at desired oscillations in ratios which can be rogrammed so as to change the scanning pattern to be used. An oscillator I, which in the prototype design is a 6 MHz oscillator, provides a reference signal to a divider network 49 which provides a plurality of output frequencies. A series of frequencies representing different field rates is fed from the divider network 49 to a frequency selection multiplexer 50 which is used to control which field is used.
Phase locked loop 41 is a scan line PLL and is used to provide an oscillat;on signal at the rate of line scanning. This is accomplished by providing a line counter 51 in the feedback section of PLL 41. Line counter -I is controlled in accordance with scan line data by scan line data latches 53. The signal synthesized by the scan line PLL 41 is provided to phase locked loop 42 which is a pixel frequency generator. The pixel frequency generator 42 multiplies the frequency oueput of PLL 41 in accordance with a selected number of pixels per line. A pixel counter 55 is controlled by pixel data latches 57 and controls the output frequency of the pixel frequency generator 42 as a multiple of the output frequency of PLL 41. The count signal provided from the pixel counter 55 to a pixel phase detector 59 occurs at the same frequençy as that of the output phase locked loop 41 and occurs as a periodic pulse. This signal is provided to a line counter 53 which is controlled by the scan line data latches 53 in order to provide an output at a field frequency rate. A frame frequency divider 63 provTdes an output at a frame rate which typically has a frequency of 1/2 the field frequency rate.
The pixel frequency generator provides a pixel clock output and a reference output at the pixel frequency which is typically in the range of 8 to 60 MHz. The pixel frequency generator also provides an output which is divided by a character clock counter 65 which is controlled by a character ~L2~ 3f3:2 r l clock data 13 tches 67.
Phase locked ioop 43 is a dependent reFerence frequency generator and generates a reference frequency which is nominally fixed to a given value such as 10 MHz. This provides a reference frequency for controlling the S video signal as the scan progresses across the raster. For this reason, it is advantageous that the frequency from PLL 43 be a multiple of the scan line frequency. This causes a signal to retain a constant phase angle at the initiation of each scanned line, thereby eliminating waviness. In order to accomplish the necessary synchronization with the initiation of scan l;nes, a signal representat;ve of the scan line frequency is derived from PLL 42 and is therefore representative of the timing of one of the pixels on each scanned line. The dependent reference frequency therefore is a precise integral multiple of the scan line frequency. Therefore, the dependent reference frequency is permitted to be offset from the nominally mixed frequency value in order to become an integral multiple of the scan line frequency. While 10 MHz is suggested as the nominal frequency, it is also possible to provide for a dependent reference frequency at different rates such as 20 MHz or more by mere programming. Higher frequencies increase resolution but entail greater hardware costs due to the high frequency. The dependent reference frequency controls periodic functions such as horizontal and vertical sync and blanking.
Phase locked lops 41, 42 and 43 are intended primarily for controlling the raster scan function of the testing equipment be;ng described. If a display, such as a heads up display (HUD), utilizing a stroke scanning system is being tested, a stroke frequency is generated by phase locked loop 44. The dependent reference frequency may be generated from the dependent reference frequency generator 43 even though such a frequency signal sould not necessarily be locked into phase with the stroke frequency signal produced by phase locked loop 44. The frequency output of phased locked loop 44 is controlled by stroke data latches 67 through a stroke counter 69.
Because of the use of counters 51, 55 and 6~, the number of lines and pixels displayed and the stroke output of the apparatus is able to be 7ncrementally varied by merely controlling the data latches 53, 57 and 67.
Additionally, the dependent reference frequency generator 43 is also provided with a data latch 71 controlling a counter 73. This enables.the dependent frequency to be maintained at the desired nominal value and, if desired, to be changed within limits established by the capabilities of the hardware of the system. Typically, the dependent reference frequency generator 43 will provide a dependent reference frequency output that deviates from the nominal frequency by less than l and more likely by less than ~.5%.
In order to enhance the stability of timing and sync generator 15, means are provided to wring the phase locked loops 41-44 to lock onto appropriate frequencies. In the preferred embodiment, this is accomplished by a lock sweep generator 74 which transmits sweep signals to each of the phase locked loops 41-44 through switches 75 in a manner known to those skilled in the art. Conveniently, the lock sweep generator 71t derives its sweep signal from oscillator 47. Alternatively, each phase locked loop may have its own sweeping circuit or its own broad frequency stabilization circuit (not shown.
Referring to figure 2, the video display generator 13 receives, from the multiprocessor 11, commands which include a representation of an image to be displayed. In the preferred application, the video ir~ge is that of one of the test patterns shown in Figure 1. The patterns are programmable and are consequently not fixed in quantity and may be rr~odified in accordance with a specific use of the test system.
Referring to Figure 4, a pattern memory and control circuit 81 includes a frame buffer memory 83, a font address circuit 85 and a character memory 87. The frame buffer memory 83 is divided into segments which provide an ;ndication of a portion of a composite video image each portion represents.
The character memory 87 is divided into specific character blocks with each character representing a portion of a test pattern. The font address circuit 85 addresses the character memory 87 in order to associate each plrtton cf the frame buffer 83 with a character in the character memory 870 A
programmable row and column counter 89 determines which section of the frame buffer memory 83 is being addressed by the multiprocessor 11 and in which section of the frame buffer memory 83 is addressing the harac~er memory 87.
The frame buffer memory 83, the character memory 87 and the font address circuit 85 are mounted on a rnemory circuit card 91. The system obtains Information concerning a constructed image by the programmable row and column counter 89 addressing the memory circuit card 91 in accordance with the scan pattern of the display system.
Referring to Figure 5, the patterns are constructed by constructing a plurality of characters from a high level statement. After issuing a statement, an x, y location for a first character is chosen. The micro-processor then determirles whether a character in the character memory meets the requirements of the high level statement for the x, y 10cation. If no character exists in merry to meet the requirements, then a character which meets part of the requirements and which is not already assigned to another 1~0~ r location is searched for. Of course, in the first location chosen, no such character will exist; however, in subsequent steps, it is likely that some of the same characters will repeat themselves. If no character can be found, then a "blank" character is chosen from memory; that is, a blank space in the character memory 87 is chosen and is assigned to the first location. The address of the assigned character is put into the frame buffer memory 83 and is assigned a color, an intensity and a size.
The character is then constructed by providing information from the high level statement concerning the charater content, such as the height and width of the character. In the case of complex information, an anding of patterns is applied in order to supply additional information to the character stored. After one character construction step, a microprocessor looks at the high level statement to determine whether there is more information in the statement to be assigned to characters. If more information remains in the statement, the multiprocessor returns to the step of deciding a location for the character, thus initiating a repeat of the process. When no more infor-mation is in the statement, the pattern is considered to be constructed.
Because of the repetition of characters in patterns, it is necessary to only provide a sma11 amount of characters in memory.
In the preferred embodiment, the characters may have a width of from

4 to 16 spaces, as determined by divider 93; thus providing an appropriate number of characters to be displayed, particularly given the repeat features of most test patterns. The character width is variable and therefore divider 93 should be a variable divider. Likewise, the character memory 87 is expected to store varying size characters which typically range, in width and in height, from 4 to 16 pixels. This gives the program a capability of displaying 1 pixel width features in various raster formats.
The use of programming to create the video patterns shown in Figure 1 allows the patterns' attributes to be more readily changed as necessary for a part;cular test. Programmability facilitates the use of the selected display on different scan formats while maintaining one-pixel resolution.
For example, the vertical lines of the pattern shown in Figure ljlor lk may be displayed as one-pixel wide. The program is able to adapt to the different scan rates, inter alia, by virtue of the outputs from the pixel frequency generator 42 and the dependent reference frequency generator 43 being used to time the program's output.
Referring to Figure 1, programmability offers flexibility as follows:
FEATURES PROGRAMMABLE TEST PATTERN
__ _ _ programmable position a-c, h, i ~L~0~ 2 FEATURES PROGRAMMABLE (Conti nued) TEST PATTERN
programmable quantity or size a-c/ e, f, h-l programmable color and intensity b, d-h, j-l programmable color intensity for each element a, c, i programmable content c, i While the preferred embodiment, as so far described, is directed to a system for testing video apparatus, the system is also capable of self-testing. This is particularly significant since the system has as its function stimulation of a unit under test to produce errors and/or glitches whose source is not always known. For this reason, built in test equipment (B.I~T.L.) is incorporated into the circuitry. Referring to Figure 2, a B.I.T.E. module 101 is connected to the multiprocessor. Referring to Figure 6, each of N printed circuit boards in the system provides analog and digital information concerning the system outputs at various test points. These test points are located throughout the systems's software, as exemplified by digital and analog test points TPl through TP5 and TPl' through TP4', as shown in Figure 3A Signals from the test points on each card are channeled through test point multiplexers, such as multiplexer 103 shown in Figure 3 or multiplexers 105-108 shown in Figure 6.
Referring to Figure 6, a pair of printed circuit boards are shown having analog multiplexers 105 and 106 and separate digital multiplexers 107 and 108. Because of the different functions on cach card and the different test readings, each multiplexer need not be the same. For example, cw /, 3~%

analog multiplexer 105 has a single output, whereas analog multiplexer 106 has two outputs. The various outputs are, in turn, controlled by input multiplexers 109 and 110, w.ith input multiplexer 109 being an analog multiplexer and input multiplexer 110 being a digital multiplexer. The digital multiplexer signal is then processed by a programmable delay generator 113 and counter timer 115 which is used to process the digital signals to obtain measurements of frequency, time interval, pulse width and time delay. A comparator 117 derives digital siynals from analog signals from.the analog multiplexer 107 and provides the digital comparison value to the digital input multiplexer 110. The outputs of the counter/timer 115 and time selected values from the analog input multiplexer 109 are provided to an output data bus via an output buffer 118.
A sample and hold circuit 119 is used to sample signals from the analog multiplexer 109 in response to an internal strobe signal from the programmable delay generator 113. The sampled value, after being converted to digital ~w/,t~ 14~ -~0~

form, is provided to the output data bus via the output buffer I. The use of the internal strobe signal from the programmable delay generator 113 allows the sampltng of an analog value at a predetermlned point in time.
An external strobe is used to provide signals to circuits outside of the B.l.T.E. module so that various signals throughout the system can be sampled at appropriate times by programming the programmable delay generator 113.
The multiprocessor 11 is able to obtain readings from the various test points from various functions performed by the equipment. The programmable delay generator 113 enables these readings be analyzed with respect to frequency, time interval, pulse width and time delay in order to determine whether an error appearing in a test is a result of the equipment being tested or the test equipment itself.
It is anticipated that numerous changes will be made to the preferred embodirnent of the invention. For example, an ability to change scanning frequency and frame rates can be enhanced or deleted. It is anticipated that the specific features and the specific hardware required for producing these features can and will be changed in accordance with the economics of production and the individual whims of the engineers reducing the invention to practice Accordingly, it is urged that the invention be read only as limited by the ciaims.
.,

Claims (19)

WHAT IS CLAIMED IS:

1. A programmable video test pattern generator for display systems characterized by:
a), issuing a high level statement of a pattern;
b) determining a coordinate location for a character on the display;
c) determining if the coordinate location has been assigned a character;
d) constructing a new pattern segment by adding new information obtained from the high level statement to information previously in the assigned character if the coordinate location has been assigned a character;
e) obtaining a blank character from a file and constructing a new pattern segment by adding information obtained from the high level statement to the blank character if the coordinate location has not been assigned a character;
f) determining whether more information is available from the high level statement; and g) returning to step b and repeating steps b through g if more infor-mation is available from said high level statement.

2. The method of Claim 1, further characterized in the equipment having any scan rate within a given range, having any number of scanned lines within a given range and having any number of pixels in each line within a given range.

3. The method of Claim 1 whereby the equipment is further character-ized by producing any number of pixels per line within a given range and generating test patterns conforming to display requirements of the equip-ment.

4. The method of Claim 1 or 3 further characterized in placing the new information within the characters to a resolution of one pixel.

5. The method of Claim 1 characterized in that the number of display test patterns available is not fixed.

6. The method of Claim 2 further characterized in that the number of display test patterns is not fixed.

7. The method of Claim 1 further characterized in that each display test pattern has features which can be programmed.

8. The method of Claim 1 further characterized by superimposing features Or more than one test pattern.

9. The method of Claim 1 further characterized by initiating a start step prior to the step of issuing the high level statement for inquiring if the high level statement is to be cleared.

10. The method of Claim 1 further characterized by manipulating the character size during the step of constructing a new pattern segment.

11. The method of Claim 1 further characterized by searching to find an assigned character which meets the requirements of the high level statement in order to make the programmable characters more efficient, when it has been determined that the coordinate location has not been assigned a character.

12. The method of Claim 2 further characterized by serially shifting data representing the generated test patterns to video circuits in the system at a pixel clock rate of the video circuits.

13. A programmable video test pattern generator for display systems characterized by:
a) means for interpreting a high level statement of a pattern;
b) means for determining a coordinate location for a character on the display;
c) means for determining if the coordinate location has been assigned a character;
d) means for constructing a new pattern segment by adding new informa-tion obtained from the high level statement to information previously in the assigned character if the coordinate location has been assigned a character e) means for obtaining a blank character from a file by adding informa-tion obtained from the high level statement to the blank character if the coordinate location has not been assigned a character;
f) means for determining whether more information is available from the high level statement for the display test pattern, so that if more information is available from the high level statement for the display test pattern, the means for determining the coordinate location may subsequently be activated.

14. Apparatus of Claim 13 further characterized in that means are provided for the system to be used for testing equipment having any line and field scan rates within a given range, having any number of scanned lines within a given range and having any number of elements in each line with a given range.

15. Apparatus of Claim 13 further characterized In that means are provided for the system to be used for testing equipment which is able to produce any number of pixels per line within a given range so that the test patterns generated conform to display requirements of the equipment.

16. Apparatus of Claim 13 characterized in that the number of display test patterns which may be generated is not fixed.

17. Apparatus of Claim 13 further characterized by means for each display test pattern having features which can be programmed.

18. The apparatus of Claim 13 further characterized by means for superimposing features of more than one test pattern.

19. The apparatus of Claim 13 further characterized by means for serially shifting data representing the patterns to video circuits in the system at a pixel clock rate of the equipment being tested.