CA1191905A

CA1191905A - Spread spectrum modem

Info

Publication number: CA1191905A
Application number: CA000406395A
Authority: CA
Inventors: Sherman M. Chow; Pok F. Lee
Original assignee: Canadian Patents and Development Ltd
Current assignee: Canadian Patents and Development Ltd
Priority date: 1982-06-30
Filing date: 1982-06-30
Publication date: 1985-08-13
Also published as: US4481640A

Abstract

ABSTRACT

A MODEM for a high frequency radio data link which substantially enhances the recovery of data transmitted via the link in the face of multipath distortion and fading. A serial digital input signal for transmission is split into odd bit and even bit data streams, having synchronous bit timing. Each pair of bits, referred to as a symbol, is phase shifted by .pi./4 which encodes its timing, for later clock recovery. The resulting signal is then twice differentially phase encoded which facilitates the recovery, when demodulated, of the original symbols overcoming the effect of Doppler shift and/or transmitted oscillator center frequency offset. The resulting signal then phase modulates a subcarrier signal having a frequency much higher than the symbol rate, and the phase modulated subcarrier is converted to a spread spectrum signal for transmission. This digital signal is provided to a high frequency analog transmitter for transmission with the signal spread over a particular HF
channel, to a receive point. The spread spectrum signal thus substantially reduces or eliminates the effect of multipath fading, the double differential coding of the symbols substantially reduces or eliminates the effect of frequency shift due to slow changing Doppler shifts or other causes, and the phase shifting of each symbol, formed of two binary bits, in effect encodes the clock timing into the signal.

Description

~ 3~

01 This invent;.on relates to apparatus useful in 02 communication systems, and is particularly d:irected to a MODEM
03 (moclulator-demodulator) use~Eul for the transmiss;.on and/or 04 reception oE data signals via a high Erequency communication 05 link.
06 Since high Erequency radio waves propagate beyond the 07 line of sight by means of ionospheric reElecti.ons, long range 08 communication between various locations several hundreds or 09 several thousands of miles apart is possible, without usi.ng earth satell.ite repeaters~ Such li.nks are commonly used to and between 11 remote locations, such as off-shore drilling platforms, marine 12 tra-EEic, and airplanes on transcontinental El.ightsO In the past, 13 such systems transmitted voice si.gna].s whi.ch are of course analog 14 i.n form, but the need now exists for the transmissi.on of digital signals.
16 ~lowever high frequency radio waves are subject to 17 various forms of deteriorati.on when travelli.ng between a 18 transmissi.on and a receivi.ng point. For example, the signals 19 usally travel over several paths to the same point. Consequently due to different path lengths, a single signal element appears to 21 "smear" in ti.me, or the same signal can arrive time spaced from 22 preceding similar elements, giving the appearance of echo. Due 23 to ionospheric variati.ons, the time shifts often vary, causing a 24 constantly changing si.gnal form. Varlation i.n the ionosphere can also give rise to Doppler shifts in the frequency or phase of the 26 high Erequency signal. Further, the signal passing via various 27 signal pa-ths may fade; the phenomenon oE fading is both path 28 selective and frequency selective, and ;.s both ti.me varying and 29 narrow-band and wide-band frequency select:ive, and affects virtually any frequency bands below the maxi.mum usable frequency.
31 While the above-described problems associated with high 32 frequency communicati.on i.s significan-t w:i.th respect to analog 33 signals, the;.r effect on a reliable moclern data communication 34 l:i.n]~ ;.s more profound. Clearly echo and multipath fading can s;.gnificantly efEect the reliability of the data.
36 One way oE attemptlng to counteract time dlspersive 37 afEects oE mult;.path ls by keying data at a relati.vely low rate 3~ (e.g. 75 hertz) leavi.rlg the problem oE frequency se].ective fading 39 - 1 - ~"~:~q~

01 either unattended, or partly attende~ lhrough the use of dual 02 in-band divers:ity techniques. ~he use of code diversity at the 03 expense of the data transmi.ssion rate has in the past prov.ided 04 reasonably reliable dat~ l;nks. However the cost of MODEMs 05 applied to this purpose is very high.
06 U.S. Patent 2,982,853 issued May 2nd, 1961, invented by 07 R. Price and P.E. Green, describes the use of a wide-band signal, 08 and a system for resolving i.ndiv:idual multipath signals. In 09 this system the signal arriving over each path is detected individually, and all detected signals are added after wei.ghti.ng 11 by a factor maximizing the signal-to-noise ratio of the sum. The 12 signals detected from each path are individually delayed by a 13 proper amount, causing them to arrive at an addition point at the 14 same time. Thus ambiguity between contiguous signal elernents is removed. The -time-aligned individual signals are added to form 16 maximum strength signals.
17 In the aforenoted patent, different binary sequences 18 are used to denote mark and space. Thus the received slgnal can 19 be correlated with a local matching code. However, it has been Eound that errors can be :introduced, and due to the sequence 21 lengths required, data signal transmi.sslon remains relatively 22 slow.
23 Further, the above system requlres the .instantaneous 24 values and complex impulse response of the ionospheric channel to be accurately estimated periodically. Circuitry of considerable 26 complexity is required to accompli.sh this.
27 In the present i.nvention, estimati.on of channel 28 character.istics ;.s not requ.ired, thus si.mpliEying its 29 implementation. In the present invent.ion, informati.on is encoded as phase changes between adjacent symbols. The transmiss.ion rate 31 is cons;.derably faster (300 b.i-ts per second in the preferred 32 embodi.ment), and means is provided for continuously recovering 33 clock t:i.m;.ng. The signal is converted to spread spectrum, whi.ch 34 reduces the effect of select:i.ve path fad.i.ng.
Further, the structure oE the present invent.ion is 36 direct:Ly appl:i.cable to manufacture usi.ng VLSI technology~ whi.ch 37 cons;.derab.ly reduces :its cost.
3~ ~ccord.i.ng to the present invent.i.on, a serial digital 01 input signal is split into odcl b:it and even bi.t data streams, 02 having synchronous b-it timing. Each pair of bits, referred to as 03 a symbol, is phase shifted by ~/4 which encodes its timing, Eor 04 later cloc:k recovery. The resulting s:ignal is then twice 05 differentiall.y phase encoded which facilitates the recovery, when 06 demodulated, of the original symbols overcom;ng the e-fEect of 07 Doppler shift and/or transmitted oscillator center ~Erequency 08 offset. The resulting signal then phase modulates a subcarrier 09 signal having a frequency much h;gher than the symbol rate, and the phase modulated subcarrier is converted to a spread spectrum 11 signal for transmission. This digital signal is provided to a 12 high frequency analog transmitter for transm.ission with the 13 signal spread over a 3 KHz ~IF channel, to a receive point.
14 The spread spectrum signal thus suhstantially reduces or elimi.nates the effect of multipath fadi.ng, the double 16 differential coding of the symbols substan-tially reduces or 17 eliminates the eEfect of frequency shlft due to Doppler or other 18 causes, and the phase sh:ifting of each symbol, formed of two 19 binary bits, in effect encodes the clock -timing into the signal.
~ highly reliable data transmission link results.
21 ~n order -to receive the above-described form of s.ignal, 22 a demodulator accordi.ng to the invention .includes a circuit for 23 rece;ving the signal after conversion to digi-tal form, a pair of 24 matched filters for coherent detection of he d:ig.ital spread spectrum signal, one fllter being matched to the :in-phase 26 component of the spread spectrum signal and one being matched to 27 lts quadrature component. The i.n-phase and quadrature 28 autocorrelation functions of the spread spectrum digital code 29 modulati.ng the subcarrier signal is thus provided. The autocorrelation functi.ons are then differen-tially decoded to 31 provide in-phase and quadrature digital words comprised of the 32 square oE the autocorrelati.on functions, but devoid of the 33 subcarrier signal (imp:L:ici.-t demodulation~. The i.n-phase and 34 quadrature digi.tal words are then passed through low pass filters having rectangular impu].se response over the symbol interval, and 36 simultaneously through d:i.fferenti.ators, to provide four signals 37 correspondi.ng to the ~E:ilter i.n-phase and ~luadrature digital words 38 and different.iated i.n-phase and quadrature digi.tal words. The .~ ~ .3 ~

01 four signals are then di.f~erential:Ly decoded to provide a digital 02 variable signal represelltative to the polarity of each bit of an 03 odd bit data stream, a decision variable signal representative of 04 the polarity of each bit of an even bit data stream, and a clock 05 trans:ition signalO The circuitry detects each negative 06 transition of the cloc]c transition signal, and forms a first 07 clock signal; each of the decision variable signals is sampled at 08 times related to each detected negative transition of the clock 09 transition signal. The samples oE the decisi.on var:iables are then multiplexed to form an outpu-t data stream, ancl the rate of 11 the first clock signal is mu]tiplecl by two to provide an output 12 clock signal. The complete form of the original .input signal is 13 thus recovered.
14 The use of the words "data" and values" herein denotes signal pulses, groups of which have predetermined meaning.
16 A better understanding of the ;nvention will be 17 obtained by reEerence to the detailed description below in 18 conjunction with the followi.ng drawings, :i.n which:
19 Figure 1 is a block diagram of a modulator of the MODEM, 21 Figure 2 is a schemati.c diagram of the modulator 22 of the MODEM, 23 Figure 3 is a block diagram of the demodulator of the 24 MODEM, Figures 4A, 4B, 5A, 5B, 6 and 7 are waveform diagrams 26 used to illustrate the invention, and 27 Figure 8 is a block di.agram of a processor controlled 28 embodiment of the demodulator of the MODEM.
29 Concerni.ng first the modulator, a block schematic oE
which is shown i.n Figure 1, serial data i.s received vi.a input 31 path 1, and is applied -to a demultiplexer and Gray coder 2. ~ere 32 the serial data bits are separated ;.nto two data streams, one 33 stream conta;.n;.ng all oE the even bits and one stream containing 34 all of the odd b;.ts of the received data. In the preferred embod;.ment, where the input data rate is 300 b:i.-ts per second, the 36 resu:lt;.ng b:i.t rat:e ;.n each of the two data streams would be 150 37 b;.ts per second. r~he two data streams are adjusted in t:i.me, 3~ e.g. by :i.ntroduc:ing a de].ay ;.n one stream, ;n order to time align 39 _ ~ _ ~ 3~

01 the bits in each oE the streams, i.e~ make them synchronous.
02 Each pair of synchronous bi.ts, one from each of the data strearns 03 is considered as a two parallel b:it symbol. Each of the two bit 04 symbols thus can have a value of between 0 and 3, as shown .in 05 columns VALUÆ and A in Table 1 below.

07 VALUEPHASE A E~ C D

09 1 ~/2 01 01 010 011

2 7~ 10 11 110 111 11 3 3~/2 11 10 100 101 12 Colurnn A in Table 1 shows a sequence of two bit symbols 13 prior to Gray coding; column B shows the same symbol values aEter 14 Gray cod;.ng. AS is well known, Gray cod:ing separates the values oE groups of codes, so that in case of noise, only one bit error 16 will occur instead oE two.
17 The symbols are now applied to an adder 3, in which 18 they are added by one half and the result is multipled by 2.
19 Adder 3 may be substituted by a x2 multiplier. The function of adder 3, whichever type of unit is used, is to shift the code one 21 unlt to the left, thus provldlng the codes shown ln column C of 22 Table 1. In addltion, a phase shlft of ~/4 i.s given the 23 symbols, resulting in the octal signal values shown in column D, 24 of Table 1.
The effect of addlng the codes by one-half is to encode 26 the clock timlng, for recovery at the recelver demodulator.
27 The octal signal ls applled to a fi.rst dlfferential 28 encoder 4, from whlch it is applied to a second differential 29 encoder 5. The first differential encoder 4 is functionally provided with a modulo 8 adder 6, which adds the input octal 31 value s.i.gnal with a delayed version of its output signal, havlng 32 passed through a delay apparatus 7. The output s;.gnal of first 33 d.i.fferential encoder 4 is applied to the input of second 34 differential encoder 5, which is constructed s;.milar to difEerent.i.al encoder 4, and .i.ncluding a modulo 8 adder 6A and 36 de:Lay apparatus 7~.
37 The result;.ng octal form of dig;.tal output slgnal of 38 diEEerent;.al encoder 5 ls passed into a phase modulator 8, in

3~

01 than the input data strealn. For example, For an input data 02 stream of 300 b:its per second, and a symbol rate of 150 symbols 03 per second, the subcarrier ~E-requency can be about 1500 hertz.
04 The output signa:L o:E modlllator 8 has a 1500 hertz low 05 passed Barker sequence or other spread spectrum generating code 06 applied to it, e.g. by mixing it in multiplier 9. The purpose of 07 mixing it with a ~arker or other code periodic over the symbol 08 interval is o:E course to generate a spread spectrum :Eorm of signalO
09 The output signal o:E multiplier 9 is an 8 bit digital signal representative of a double di.:Eferentially phase coded ~ phase shifted sequence of symbols phase modulated on a 12 subcarrier signal having a frequency much higher than the bit 13 rate of the binary symbols. This outpu-t signal is applied to a 14 digital to analog converter and low pass filter 10 where it is converted into analog form and is smoothed. The analog signal 16 output of filter 10 can now be applied to a high frequency radio 17 transmitter, e.g. of single sideband type for transmission.
18 While modulator 8 and multiplier 9 have been shown as 19 separate elements, it is preferred that both modulation and mixing with the Barker code should be done by means of a memory 21 such as a PROM. For this implementation, the PROM stores 8 22 spread spectrum signal symbols which are addressed by the octal 23 number output from the second differential encoder 5. By 2~ selec-ting a subcarrier Erquency of 1500 hertz which results in an integral number (10) of subcarrier cycles per symbol, the PROM
26 storage requirement is minimized. For the data and subcarrier 27 rates referred to above, it is preferred that a sample rate of 28 8.1 kilohertz should be used, giving 54 samples per symbolO This 29 sample rate is chosen to meet Nyquist rate requirements, assuming a 4.05 kilohertz signal requirement to be passed into a 3 31 kilohertz bandwidth standard h:igh frequency channel.
32 It i.s preferred that the Barker or other appropriate 33 code used should actually be one which is fi:Ltered so as to be 3~ hand-limited. Since the normal Barker code provides side bands theoret.ically reaching to i.nFinity, it is preferred that a Hamming 36 weighted E:i.ltered Barker sequence should be used, limiting the 37 bandwidth to about 1500 hertz. This will prevent aliasing as 33 well as limi.ting the time oE each value to avoid intersymbol 01 interEerence.
02 Due to amplitude modulation by the Barker sequence, the 03 phase modu:Lated subcarr:ier has a spectrum consisting of replica 04 of the baseband spectrum spaced at 150 hertz apart. The 05 modulator output :is an 8 PSK signal., which is equivalent to 4 PSI<
06 signal r i.n terms of phase noise marg.i.n slrlce the least 07 si.gn;.ficant bi.t in each octal d:lgit .i.s desi.gned to be high at all 08 t;.mes (i.. e~ see column D, Table 1).
09 It should be noted that i.f only a single differenti.al encoder had been used, Doppler and/or transmitter oscillator 11 center frequency ofEset would resu:lt in a translati.on of the 12 original baseband spectrum after s:ignal recovery at the rece.iver 13 equipment. This would cause a constant phase offset i.n the 14 receiver decis.ion signal vector at the demodulator. For this reason the second difEerential encoder 5 is used, wh;.ch removes 16 the constant phase offset in the signal vector.
17 A preferred form of the modulator is shown in Figure 18 2. A 300 bit per second serial digital signal preferably of NRZ
19 binary form is assumed to be received at an RS232 protocol port, and is converted by ci.rcu:i.try outside th;.s invent.ion to TTL
21 level, which is carried on lead 15. The signal is appl.ied to the 22 D input of flip-flops 16 and 17. Both of flip-flops 16 and 17 23 are clocked at 150 hertz, with opposite phase. Consequently each 24 second bi.t passes through flip-flop 16 to fl:ip-flop 18, which is clocked ;.n synchronism wi-th flip flop 17. The result is 26 separation of the odd and even bits and delay of one bit in 27 flip-flop 16, thus synchronizing pairs of bits in the two data 28 streams (one passing through flip-flop 18 and one passing through 29 flip-flop 17). The Q outputs of flip-flops 17 and 18 are applied to corresponding inputs of EXCLUSIVE ~R gate 19 and applied to 31 three bit modulo 8 adder 20 wi-th the Q output of flip-flop 18. A
32 third i.nput of three input adder 20 i.s connected to ~SV through 33 resistor 21, wh;.ch provides a 1 bi.t .i.n the least significant 34 posi-t:ion.
The Eunct:i.on of adding a third bit to the two Gray 36 coded b;.ts .i.n the least signif;.cant b;.t pos;.tion input to 3 b;.t 37 adder 20 ;.s equ.i.valent to adding the Gray coded ;.nput signal by 38 one-haLf ancl mult:ipLy;.ng the result by two. For example, each of 01 the values of colurnn B in Table 1 is convertec3 to the values in 02 column ~, which has a decimal value of twice the value of column 03 B as a result of shi.fting the B column bits one column to the 0~ l.eEt and adding a 1 in the least signiicant b:i.t colurnn.
05 The signal at each output termi.nal of adder 20 is 06 passed through a 1 bi.t delay elerne.nt provided by fllp-flops 22, 07 23 and 24 respectively, the outputs of which are connected to the 08 second of the three inputs Al r A2 and A3 of adder 20. The 09 resulting sum Outpllt signals of adder 20 are applied to the Bl, B2 and B3 inputs of a second modulo 8, 3 bit adder 25. The 11 signals at the outputs of adder 25 are passed through 12 corresponding 1 b;.-t delay elements provided by fl:ip-flops 26, 27 13 and 28, the outputs of which are applied to the Al, A2 and A3 1~ second inputs of adder 25.
The function of adder 20 with delay element flip-flops 16 22, 23 and 24 ;.s to provide the function of differential encoder 17 24, in which the delay output signal of the adder is summed with 18 the input signal to the adder. The second d.ifferential encoding 19 ls performed in a simi.lar fashion by adder 25 with delay element fl.ip-flops 26, 27 and 28.
21 The resulti.ng octal output signal of adder 25 is 22 appli.ed to the rnost si.gnificant bit address inputs A6-A8 of a 23 ROM 29. The amplitude values of a band limited Barker sequence 24 or code are stored in the ROM, which is addressed by the octal code output signal oE adder 25.
26 The least significant 6 bi.ts of the Barker code address 27 are input to ROM 29 via inputs A0-A5. The values of the s;.gnal 28 applied thereto are generated by a crystal oscillator 30, shown 29 si.mply as oscillator 30, but in actual realization providing a signal which is divided down ;.n frequency ~Erom high frequency 31 oscillator to a 8100 hertz rate on lead 31, and is applied to a 32 ~ bi.t counter 32 which Eeeds counter 32A. Counter 32A is a 33 2 b;.t courlter operating from the most significant blt output of 34 counter 32. The combined outputs of counters 32 and 32A (,5~) are applied to address inputs A0-A5 of ROM 29.
36 The most sigiEicant b;.t o:E counter 32A .i.s clock pulses 37 at 150 hertz. These are appl.i.ed to the clock input of f:Lip-flop 38 l6 wh;.le the .i.nverted vers.i.on is appli.ed to flip-flops 17, 18, 01 22, 23, 24, 26, 27 and 28.
02 The output signal Erom ROM 29, an 8 bit siynal, is 03 applied to edge triggered octal flip-Elop 35, in which the bit 04 signal transitlons are aliyned. The 8 bit output oE flip-flop 35 05 is applied to digital to analog converter 36 in which the signal 06 is converted into analog Eorm, and is then applied to PCM
07 reconstruction fi~lter 37 in which i-t is smoothed. The output 08 signal oE PCM filter 37 is applied through a transEormer 38 in 09 which it i9 converted into balanced or difEerential form: it is then impedance corrected by series resistors 39 and 40, Erom 11 which it is applied to output terminals 41 Eor application to a 12 high Erequency radio transmitter for transmission.
13 Figure 3 shows a block diagram of the demodulator of 14 the MODEM. After reception by a high frequency analog receiver, the signal, distorted by multipath and detuning error is passed 16 through a low pass Eilter 42 to remove aliasing energy which is 17 above, preferably 3.5 kilohertz, and is then applied to the input 18 of analog-to-digital converter 43, which is supplied with an 8.1 19 kilohertz clock signal~ The analog-to-digital conver-ter 43 digitizes the recovered spread spectrwn signal into 8 bit 21 samples, which are applied to a pair of matched filters 44 and 22 45. Matched filter 44 is matched to the in-phase component of 23 input signal while matched filter 45 is matched to the quadrature 24 component. The matched Eilters can be transversal Eilters, and should be matched to a passband version of the Barker sequence or 26 other pseudo noise code imbedded in the input signal r wi th the 27 center Erequenc~ at 1500 hert~ (to match the subcarrier Erequency 28 in the modulator). The output signals of each matched filter is 29 comprised of the autocorrelation Eunction of the Barker or other sequence modulating the subcarrier.
31 Figure 4A is a waveform diagram showing a single pulse 32 at the output oE either matched Eilter which is undistorted by 33 multipath distorion. Figure 4B shows a similar signal but having 34 been distortecl by multipath. A plurality oE peaks is in evidence, as would he expected due to the signal arriving at 36 diEEerent times having passed along difEerent time path lengths.
37 The output oE each EiLter thereEore is a series oE pulses whose 38 envelope is the approximate ionospheric impulse response, and 39 whose phase contains the transmitted information. With the bi-t ~0 ,"~ _ 9 _ 01 rate and sampling rate descr:ibed, der~lodulat:ion successfully takes 02 place when the characteri.stics of the ionosphere as defined by 03 the i.mpulse response is substanti.ally unchanged in over three 04 consecutive symbol intervals and the multipath spread of the 05 propagat:ion modes are less then 6.6 milliseconds~ Both of these 06 condit;.ons are usually satisfied i.n most cases for which this 07 MODEM finds applicati.on.
08 The output signals o the matched filters are now 09 applied to a first differenti.al decoder 46, the output signals oE
which are in-phase and quadrature :representations oE the square 11 of the autocorrelat;.on Euncti.on. The differential decoder can be 12 i.mplemented in a variety of ways. In the structure shown i.n 13 block 46, the output of each matched filter i.s multiplied with a 14 54 sample delayed representation of .i.tself in multipliers 47 and ~8, and the outputs of each of the filters .is multiplied with a 16 54 sample delayed version of output of the opposite matched 17 Eilter in multipliers 49 and 50~ the delay circuits being shown 18 as references 51 and 52. The outputs of multipliers 47 and 48 19 are added in adder 53 whi.le the output of mul-tiplier 50 is subtracted from the output of multiplier 49 i.n subtractor 54.
21 The resulting in-phase square of the autocorrelat.ion function is 22 obtained on signal path 55 and the equivalent quadrature signal 23 is obtained on signal path 56.
24 The representative in-phase and quadrature auto correlation squared functions for a non-frequency-shifted and 26 non-multipath-distorted signal are shown in the upper and lower 27 waveform diagrams of Figure 5~. The upper and lower waveform 28 diagrams of Figure 5B respectively show in-phase and yuadrature 29 auto-correlation funct;.ons of a multi.path distorted signal.
The signals sti.ll contain a constant phase rotation 31 caused by frequency offset, and the bit timing has not yet been 32 recovered. Th;.s is performed as noted below. The 33 autocorrelat;.on squared signals are applied to low pass filters 3~ 57 and 58, wh:lch have ;.mpulse response corresponding to a rectangular pulse of durat.i.on equal to the symbol period, i.e~
36 6.6 msec. The autocorrelat;.on squared functions are also applled :37 to f:i.lters 59 and 60 whose :i.mpulse responses are the derivati.ves 38 oE those oE filters 57 and 58.

~ 3~

01 The output siynals of fiLters 57 and 58 are 02 di~erent:i.ally decoded i.n difEerential decoder 61 i.n a manner 03 identical to that described earlier w.ith re~erence to 04 different.ial decoder 46, to provide output s.ignals to samplers 62 05 and 63 respectively. The signals represent the odd data stream 06 and even data stream dec:i.sion variable signals respectively.
07 The output s:i.gnals of f:llters 57 and 59 are multi.plied 08 ;.n multiplier 64 while the output signals of filters 58 and 09 60 are multiplied in multi.plier 65. The resulting output signals are added in adder 66, and the sum signal .is averaged i.n averager 11 67.
12 The output signal of averager 67 is shown :in F.igure 6.
13 The signal input to averager 67 is a phase error signal which is 14 the derivative of the magnitude of the signal vector ormed by the outputs of filters 57 and 58. The consistent negative 16 transitions in this signal which occurs at a rate of 150 hertz 17 signi.fy the correct bit sampling instants. The averager 67 18 reduces the effect of random noise.
19 The noise reduced derivative signal .is applied to a negative transition extraction circui-t 68 which detects the 21 occurrence of the negative transiti.ons in the aforenoted 22 derlvative signal and will be discussed further below. The 23 output signal is applied to samplers 62 and 63, whose outputs are 24 representative of the decisi.on variables. The sign bits of these 2's complement digi-tal outputs are the original transmitted bit 26 pairs. These bi.t pairs are applied to inputs of a multiplexer 27 69, with the timi.ng signals output from the negative 28 transitionextraction circui.t 68. Since the output signal of 29 sampler 62 is representative of the value of the odd bit, at 150 hertz, and the output signal of the sampler 63 is representative 31 of the value of -the even bit at the same bit rate, multiplexer 69 32 interleaves them, providing an output signal which is the 33 reconstituted data signal originally transmitted at 300 bits per 34 second.
The output s;.gnal frequency of negative transition 36 extract;.on circu:it 68 is multipl.i.ed by two i.n multipl.ier 70 to 37 prov;.de a 300 b.l.t per second cLock.
38 The negati.ve transition extraction circuit detects 01 negative transi-tions of the input signal thereto (~h;.ch may be 02 seen ;n Figure 6) ancl which occur once each 5~ samples~ The 03 c;.rcuit thus counts 54 and senses for another negat;.ve 04 transi~ion. After several de~ections, ;.t is likely that the 05 correct bit recovery transition has been detected and thls can be 06 used as the correct t;.m;.ng~ If ~he input signal fades, after 07 missing the negative transi~ion, the 54 sample time considerati.on 08 should be stopped, and an or.iginal negative trans;.tion searched 09 for. It should be noted that due to multipath fading, the position of the negat.ive t-ransit:ion can shift and a w:indow period 11 for detection should be allowed for.
12 An 8.1 kilohertz clock is preEerred to be used since 54 13 samples oE each symbol at a rate of 150 symbols per second 14 results in the 8.1 kilohertz rate.
I-t is preferred that the demodulator should be 16 implemented digitallyO A block d:iagram for realizing a digital 17 implementation is shown ln Figure 8. The received analog signal 18 is i.nput into an analog interface 71 which contains an 19 anti-alaising low pass filter and an 8 bit analog-to-digital converter as described earlier.
21 The resulting ou~put signal is applied to a dlgital 22 processor 72. Processor 72 perEorms the complex matched 23 filtering and different;.al decod;.ng operat;.ons accordlng to the 24 algorithm described earlier. The matched filter co-efficients can be stored in a ROM (read only memory). Preferably the 26 circuit processes the signal in a t:ime division multiplexed 27 manner. After matched filtering and difEerential decoding in 28 processor 72, the time multiplexed signals are applied to 29 processor 73 which provldes box car f;.ltering followed by d.ifferenti.al decoding, as described wi.th reEerence to Figure 3.
31 The resulting output signal ;.s appl;.ed to a dec:ision and bit time 32 recovery circuit 74 which performs the function of samplers 62 33 and 63, averager 67, negative transition extractor 68, 34 multiplexer 69 and mul.tiplier 70~ The output signals of circuits 74 are the data and clock s.i.gnals. A digital signal processor 36 controller 75 can be used to generate al:L the system clocks as 37 we.ll as the control words or m;.crocodes required for the 38 processors 72 and 73 and circuit 74.

3 ~

01 It :i.s expected that the demodulator described can be 02 implemented .in many difEerent forms in additlon to those noted 03 above using the structure and functi.ons described. The digltal 04 -Eorm preferably should have a time mult:iplexed realizat.ion, 05 although this is not essential.
06 A person skilled in the art understanding this 07 invention may now conceive of other embodiments or var:iations and 08 des.ign, using the principles descr.ibed herewith. All are 09 considered to be with:i.n the spheL-e and scope of th.is invent;.on as deE.ined in the claims appended hereto.

:Ll - 13 -

Claims

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A MODEM comprising:
(a) means for phase shifting input binary pair symbols by .pi./N, for an N-PSK system, where N is a positive integer, (b) means for twice differentially phase encoding the phase shifted symbols, (c) means for phase modulating a subcarrier signal having a frequency much higher than the input binary pair symbols, by the differentially phase encoded symbols, and (d) means for converting the phase modulated subcarrier signal to a spread spectrum output signal for transmission.

2. A MODEM comprising:
(a) means for adding input binary pair symbols corresponding to data to be transmitted by one-half to obtain octal binary symbols, (b) means for differentially phase encoding the octal binary symbols twice sequentially, (c) means for phase modulating a carrier signal having a frequency much higher than the octal binary symbols by the octal binary symbols, and (d) means for mixing the phase modulated carrier signal with a predetermined coded sequence to obtain a spread spectrum output signal.

3. A MODEM as defined in claim 1 further including a D/A connected for receiving the output signal and providing an analog form of output signal for application to a transmitter.

4. A MODEM as defined in claim 2 or 3 including means for receiving a digital signal, means for separating odd and even bits of the digital signal into separate bit streams, and means for time shifting one of the bit streams to align the timing of pairs of bits in both bit streams to provide said input binary pair symbols.

5. A MODEM as defined in claim 2 or 3 including means for receiving a digital signal, means for separating odd and even bits of the digital signal into separate bit streams, means for time shifting one of the bit streams, and means for Gray coding the pairs of bits to provide said input binary pair symbols.

6. A MODEM comprising:
(a) means for receiving a digital signal having a first bit rate, (b) means for separating the odd and even bits of the digital signal into separate bit streams having a second bit rate half the first bit rate, (c) means for time shifting one of the bit streams to time align pairs of bits of the bit streams, each pair defining a symbol, (d) means for phase shifting the symbols by .pi./N, for an N-PSK system, where N is a positive integer, (e) means for twice differentially phase encoding the phase shifted symbols to provide symbols defined by binary octal digits at the second bit rate, and (f) means for phase modulating a predetermined coded sequence amplitude modulated subcarrier having a frequency much higher than the second bit rate, to provide a spread spectrum digital output signal.

7. A MODEM as defined in claim 6 further including means for converting the digital output signal to an analog form of spread spectrum signal for presentation to a high frequency transmitter.

8. A MODEM as defined in claim 6 in which the converting means is a digital-to-analog converter followed by a smoothing filter.

9. A MODEM as defined in claim 6, 7 or 8 further including a Gray code encoder for receiving an input signal, encoding it, and providing said digital signal having a first bit rate.

10. A MODEM as defined in claim 6, 7 or 8 including a memory having Barker code values stored therein, means for addressing the memory at locations defined by said octal digits, and means for advancing the addresses in said memory during each octal code address interval to obtain adjacent Barker code values at a rate defined by the Nyquist sampling frequency.

11. A MODEM as defined in claim 5, 6 or 8, and a Gray code encoder for receiving an input signal, encoding it, and providing said digital signal having a first bit rate, and further including a memory having Barker code values stored therein, means for addressing the memory at locations defined by said octal digits, and means for advancing the addresses in said memory during each octal code address interval to obtain adjacent Barker code values at a rate defined by the Nyquist sampling frequency.

12. A MODEM comprising:
(a) means for separating the odd and even bits of a digital input signal into odd and even bit stream having corresponding time aligned pairs of bits, having a predetermined bit rate, (b) means for Gray coding said pairs of bits, (c) means for phase rotating the Gray coded bit pairs by .pi./N, for an N-PSK system, where N is a positive integer, (d) first differential encoding means for differentially encoding the phase rotated bit pairs comprised of means for adding an output signal of the differential encoding means with the phase rotated bit pairs in a modulo 8 adder, (d) second differential encoding means for further differentially encoding the bit pairs comprised of means for adding an output signal of the second differential encoding means with the output signal of the first differential encoding means in a second modulo 8 adder, to provide an octal digital signal, (e) a memory having a pseudo noise code identical to a type imbedded in the input signal stored therein, (f) means for sequencing the addresses in the memory during each octal address interval at a frequency much higher than the predetermined bit rate, to provide a memory output signal comprised of digital values defining a spread spectrum signal, and (g) means for converting the digital spread spectrum signal to an analog form of spread spectrum signal.

13. A MODEM as defined in claim 12 in which the pseudo noise code is band limited to the edges of a single HF radio channel.

14. A MODEM as defined in claim 12 or 13 in which the digital input signal has a bit rate of about 300 baud, and the frequency of sequencing of the memory addresses is about 8100 hertz.

15. A MODEM as defined in claim 12 or 13 in which the digital input signal has a bit rate of about 300 baud, and the bandwidth of the analog form of spread spectrum signal is about 3 kilohertz.

16. A MODEM comprising:
(a) means for receiving a digital spread spectrum signal comprised of double differentially phase encoded .pi./4 phase shifted pairs of binary bits phase modulated on a subcarrier signal having a frequency much higher than the bit rate of the binary symbols, (b) a pair of matched filters for coherently detecting the digital spread spectrum signal, one matched to the in-phase component of the spread spectrum signal and one matched to its quadrature component, to provide in-phase and quadrature autocorrelation functions of the spread spectrum digital code amplitude modulating on the subcarrier signal, (c) means for differentially decoding the autocorrelation functions to provide in-phase and quadrature digital words comprised of the square of the autocorrelation functions devoid of the subcarrier signal, (d) means for passing the in-phase and quadrature digital words through low pass filters having impulse response corresponding to a rectanular pulse of width equal to the symbol period and also through differentiating filters, to provide four signals corresponding to the filtered in-phase and quadrature digital words and the derivatives of the filtered in-phase and quadrature digital words, (e) means for differential decoding said two filtered signals to provide a decision variable signal representative of the polarity of each bit of an odd bit data stream, a decision variable signal representative of the polarity of each bit of an even bit data stream, (f) means for operating on said four signals to provide a phase error signal, (g) means for detecting each negative transition of the phase error signal and forming a first clock signal, (h) means for sampling each of the decision varible signals at a time related to each said detected negative transition, (i) means for multiplexing the samples of the decision variable signals to form an output data stream, and (j) means for multiplying the rate of the first clock signal to provide an output clock signal.

17. A MODEM as defined in claim 16 also including means for receiving a baseband analog spread spectrum signal of predetermined form from a radio receiver, and for converting said signal to said digital spread spectrum signal.

18. A MODEM as defined in claim 16 or 17 including digital processing means comprised of a microprocessor and memory for multiplex processing the digital spread spectrum signal, and forming the matched filters, differential decoding means, low pass filters, detecting means, sampling means and multiplex means, the filter coefficients being retained in said memory.

19. A MODEM as defined in claim 1, 2 or 6 in which the subcarrier frequency is an integral multiple of the symbol rate.

20. A MODEM as defined in claim 2 or 6, in which the predetermined coded sequence is a Barker sequence.

21. A MODEM as defined in claim 12 or 13, in which the pseudo noise code is a Barker code.