CA1177981A - Page card circuit for electronic key telephone system - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE

A page card circuit for the key service unit of an electronic key telephone system comprised a plurality of zone circuit means, each including a passive port means oper-ative to receive a service signal and, in response thereto, to generate at least one signal indicating its status to all active port means to which it is connected and to provide a communication path either to a predetermined group of station card circuits or to a speaker outside of the system.

Description

:~ ~7~9~1 Cross-Reference To Related Applications The invention which is the subject matter of the present application is advantageously employed with the inventions dis-closed and claimed in Canadian patent application Serial No.
319,744 entitled COMPVTER CONTROLLED KEY TELEPHONE STATION SET
filed on January 16, 1979, in the name of Frank A. Coviello and in Canadian patent application Serial No. 304,660 entitled COMMUNICATION CIRCUIT filed on June 2, 1978, in the names of Alan Bloch, Frank A. Coviello, Ira Guzik and Candido Puebla.

Background of the Invention In various known key telephone systems, the implementa-tion of the many available services or features required addi-tional circuits in each station set and additional cond ctors running from each station set to the key service unit(KSU).
It is not uncommon to have as many as 50 pairs of conductors connecting each station set to the KSU. Consequently, the time, 1 ~7~81 effort and cost of installing, modifying or moving such key telephone sets has become excessive.

Some attempts have been made to overcome these problems by implementing key telephone service features by means of signal multiplexing techniques, thus achieving substantial reductions in the number of conductor pairs required for conn-ection of each key telephone set to the KSU. Although this approach has alleviated the cost and space problems somewhat, it has been only moderately successful. As before, the addi-tion of telephone services or features required circuit modi-fications in the KSU and in the station sets. Also, such signal multiplexing systems frequently employ a common control circuit to supervise signalling and control for all of the station sets. Thus, failure of the common control circuit causes the entire system to fail.

Summary of the Invention The present invention is embodied in and carried out by an electronic key telephone system in which telephone services or features are implemented by switching in the key service unit in response to signals received from the station sets, and signals received by the station sets from the key service unit control energization of visual indicators and connection of internal circuitry in the station sets. The key service unit includes a distributed space-division matrix with active and passive ports, and has distributed time-division multiplexed control with interleaved duplex signalling between the key service unit and the station sets. All system options are effected in the key service unit. Each station set is connected to the key service unit by only four conductors, ~hich form two voice communication channels. The duplex signalling and the 1~7'~9~1 power transmission to each station set are both accomplished cver ~ phantom pair lncorporatlng the four conductors which form the voice communication channels.

Brief Description of the Drawing The present invention may be better understood by reading the written description thereof with reference to the accompanying drawing, of which:
Figure 1 is a block diagram of a first preferred embod-iment of applicants' electronic key telephone system;
Figure 2 is a block diagram of a second preferred embodiment of applicants' electronic key telephone system;
Figure 3 is a block diagram of the station card circuit which is a component of applicants' electronic key telephone system;
Figure 4 is a schematic wiring diagram of a section of the station card circuit shown in Figure 3;
Figure 5 is a block diagram of the line card circuit ~: which is a component of applicants' electronic key telephone system;
Figure 6 is a block diagram of the tone generator card clrcuit which is a component of applicants' electronic key telephone systems;
: Figure 7 is a block diagram of the link card circuit which is a component of applicants' electronic key telephone system as shown in Figure 2;
Figure 8 is a block diagram of the register card circuit which is a component of applicants' electronic key telephone system as shown in Figure 2;
Figure 9 is a partially schematic, partially block diagram of the page card circuit which is an optional component of applicants' electronic key telephone systems; and 1 lL'7~9~1 Figure 10 is a schematic diagram of the internal con-ference card circuit which is an optional component of appli-cants' electronic key telephone system as shown in Figure 1.
FIG. 11 illustrates the connection of a key telephone station set of this invention to a key service unit by means of four conductors thereby providing two communication paths and providing data signalling to and from the key service unit and the key telephone station set. FIG. 11 also functionally illustrates the means by which the communication paths and the logic circuitry are controlled in the key telephone station set.
FIGs. 12A and 12B illustrate the data format by which information is transmitted from the key service unit station set logic circuit associated with each key telephone station set.
Periodic messages are transmitted in which time is divided into a series of words, each one of the words being associated with a control function or a particular key on the key telephone set.
During certain time elements of the word, signals are applied from the key service unit to the station set; during certain other time elements of the word pulse signals are transmitted from the key telephone set to the key service unit.
FIG. 13 shows the diagram of the stored program digital computer (microcomputer) residing in the key telephone set, being a hardware illustration of the computer.
FIG. 14 shows a switch matrix for generating and trans-mitting information to the computer regarding the status of each of 32 switches arranged in eight columns and four rows.
FIG. lS shows an indicating circuit arrangement whereby seven columns and four rows of indicators are controlled by driver circuits responsive to outputs of the computer in the key telephone set.

1~L7~9~

FIG. 16 shows a key arrangement of eight columns and four rows in which the first column is designated "zero." The arxangement, in the form of a matrix, indicates the correspon-dence between the words of the multiplexed data transmitted between each telephone set in the key service unit and the physical switch matrix residing in the telephone set.
FIG. 17 illustrates the computer controlled electrical circuits used to connect the telephone handset and speakerphone of the two audio frequency communication paths.

Description of the Preferred Embodiments Applicants' electronic key telephone system (EKTS) incorporates the novel concept of a distributed space-division matrix formed by active and passive ports. An active port is defined as one which has the ability to seize a passive port, but cannot be seized by any port. A passive port is defined as one which has the ability to be seized by an active port, but cannot itself seize any port. In applicants' system, any active port can seize any passive port to which it is connected. Any active port may be connected to any passive port by means of backplane wiring in the cabinet of the key service unit. The sequence of events involved in the seizing of a passive port by an active port are as follows: (1) interrogating the passive port by the active port to determine its status (seized or not seized); if the interrogated passive port is not seized, (2) closing a talk signal path from the active port to the passive port; (3) signalling from the active port to the passive port that it has been seized; and (4) signalling from the passive port to all other active ports to which it is connected that 1 !l779131 it has been seized. If, unon interrogation of the passive Dort by the active port, it is found that the passive oort has been seized, the interrogating active port will not be able to seize the passive ~ort except in the special case of an active port which is capable of pre-emptively seizing the passive port, i.e., in soite of the passive port having already been seized bv another active port.
Referring specifically to the first preferrede~hx~ment of applicants' EKTS shown in Figure 1, the system includes a variable number of electronic key telephone sets 100-1, ....
100-N the details of which are set forth in cross-referenced application Serial No. 319,744. The key service unit KSU-l is formed by a variable number of station cards 200-1, .....
200-N equal to the number of station sets; a variable number of line cards 300-1, ..., 300-R; an optional page card 400, a tone generator card 500, and an optional conference card 600.
Power is provided to KSU-l by a power supvly (not shown) gener-ating outputs of ~25 volts DC, -25 volts DC, and -5 volts DC, and ~ower is provided to each station set 100-1, ... , 100-N
through its associated station card 200-1, ...., 200-N via the quad-wire connection, which is described in detail in cross-referenced application Serial No. 304,660. Each station card 200 has an arra~ of active ports A and a number of passive ports P. In this embodiment, each station card active port A is oon-nected either to a passi~e port P in another station card 200, or to the passive port P in a line card 300, or to a passive port P in the page card 400, or to the passive port P in the in-ternal conference card 600. Each page card ~ne out~ut is oon-nected to the page inputs of one of four gr~ups of station cards ~t.t'779t~3~

200. Tone generator card 500 provides the station cards 200 with audible and visual iDdicator signals for tra~smission to the station sets 100. In this embodiment, all internal calling is accomplished without dialing by actuation of a single station set pushbutton or key to establish a direct conDection through the associated station card and the backplane wiring to another station card and its associated station set. This embodiment employs a non-blocking matrix arrangement that assures connection to the desired internal station set regardless of the amount of traffic on the system.(if that station set is not busy).

Referring specifically to the second preferred embodiment of applicants' EKTS shown in Figure 2, the system includes a variable number of electronic key telephone sets 100-1, ....
100-N as in the system of Figure 1. The key service unit KSU-2 is formed by a variable number of station cards 200, a variable number of line cards 300, a variable number of register cards 600, a variable number of link cards 700, a tone generator card 500, and (optionally) a page card 400. System power is provided as in the embodiment of Figure 1, Each station card 200 has an array of active ports A and a number of passive ports P. In this embodiment, each station card active port A is connected either to the passive port P in a llne card 300, or to the passive port P in a link card 700, or to a passive port P of one other station card 200, or to a passive port P in the page card 400. Each link card actlve port A is connected either to the passive port P of a line card 300, or to a passive port P in a station card 200, or to a passive port P in the page card 400.
Each page cardzone output is connected to the page inputs of one of four groups of station cards 200. Tone generator card 500 provides audible and visual indicator signals to the station cards 200, the line cards 300, and the link cards 700 779~1 for transmission to the station sets 100 and to the CØ line, as may be appropriate. In this embodiment, most internal calling is accomplished by dialing from a station set 100 through the associated station card 200 and a link card 700 to another station card 200 and its associated station set.
However, each station card does have a hotline connection from one active port A through the backplane wiring to a passive port P in one other station card. It i8 also possible to seize a CØ line which does not have its line card~s passive port P
connected to an active port A of a particular station card by having that station card seize a link card and then seize that C.~. line via the link card.

In both embodiments, there is an absolute minimum of common equipment, and so the systems are never burdened with more circuitry or hardware than is actually needed for any given installation. Each system also has the capability of allowing two groups of users to be separated by lines and stations so that one group has CØ lines that do not appear at stations in the other group. This configuration has application when two or more departments or business entities in the same location wish to be serviced by the same key telephone system.
System installation requires a minimum of time and expense.
Because all system options are accomplished in the KSU, rather than in the station sets, the installer is not required to open the station sets during installation or when implementin~ new ~ervices or features. The wiring from the KSU to the station sets is accomplished with standard 4-wire non-twisted 22 AWG
wire, which may be run for distances over 3,000 feet, and is connected by modular plugs and jacks. All of these advantages are yielded by the use of a solid state, distributed space div-ision matrix with time-division distributed control. Specifi-i:l77~

call~, all of the logic functions for a given station are per-formed by the station set circuit and the associated station card circuit. Thus, a logic failure in one station card cir-cuit will affect onlv the associated station, and repair or replacement of the failed station card circuit may be effected without interrupting or interferinq with service on any other line.
Referring specifically to Figue 3, the station card circuit 200 shown there includes transformers 202 and 204, which are connected to the A path (conductors 206 and 208) and the B path (conductors 210 and 212), respectively. The phantom path is connected from the center-tapped windings of transformers 202 and 204 to the data transceiver 214, which is fully described in co-pending patent application Serial No.
319,744 and Serial No. 304,660. The data received from the associated station set circuit 100 via the phantom pair is fed in a continuous stream from the data transceiver 214 to the microcomputer 216, which decodes the data. The microcomputer 216 is preferably the Part No. R6500/1 single-chip micro-computer system manufactured by Rockwell International Cbrpora-tion. When the data received from the associated station set 100 includes a word having a bit which is indicative that a oarticular button has been depressed by the user of thestation set, the microcomputer 216 generates the outputs necessary to implement the service or feature associated with that button.
For example, if a C.O. line is to be seized, an appropriate output is fed from output terminal A5 of microcomputer 216 to the current ~enerator 218, which is a digital-to-analogconver-ter formed by four operational amplifiers with their output terminals t~es so as to sum their respective outputs. In response, the current generator 218 ~enerates a predetermined lt77~

DC output current (1.6 ma) ~hich ls superimposed UpOD any 6ignal received from the station set on the A path fed through transformer 202 and DC blocking capacitance 220. Both the out-put of current generator 218 and the signal received via the A
path are transmitted to the crosspoint array 222, which consists of a number of NOSFETs, each having its source electrode conn-ected either to an associated line card circuit, or to a link card circuit, or to a page card circuit, or to another station card circuit, or to a conference card circuit, all of the drain electrodes being connected in common to t~e outputs of current generator 218 and trans`former 202. Each of the gate electrodes of the MOSFETs is connected to an associated crosspoint latch in the array of crosspoint latches 224, ~hich consists of demul-tiplexers formed by three eight-bit latches (CD4099BE). The array 224 receives three continuous data streams from micro-computer 216; latch command data, which is issued to all of the crosspoint latches and consists of a one bit command (0 or 1);
write enable strobe data, which identifies which of the eight-bit latches is to receive the latch command data; and address data which identifies with a three-bit address that latch in each package which is to receive the latch command data. Nhen the proper conjunction of inputs causes one of the crosspoint latches 224 to close, the associated MOSFET crosspoint in array 222 is biased conductive to close the audio path from A-pair 206, 20~ through transformer 202, DC blocking capacitance 220 and the drain and source electrodes of the conductive MOSFET
in array 222. A dial disable circuit 226 formed by a saturating operational amplifier recei~es inputs from only those cross-point latches 224 associated with crosspoints which are conn-3~ ected to line cards; those input~ are indicative of the statusof those latches, and when any such latch is closed, circuit 1~77g~1 226 responds by terminating the dial disable output signal which is normally fed to negative impedance circuit 228 and to function multiplexer 230. Removal of the dial disable signal activates the negative impedance 228 from an open circuit condition to a first level of -600 ohms so as to match the impedance in the station card 200 to the impedance to which connection has been made via the conductive MOSPET
crosspoint. The function multiplexer 230, formed by a tree of analog gates (a sing}e CD4051BE) which receives a four-bit address from the microcomputer 216, also receives a number of simultaneous inputs includin~ the presence or absence of a dial disable signal, the presence or absence of a hands-free disable signal, and slow-flashing and quick-flashing visual indicator signals. These simultaneous inputs are time-division multiplexed to form the input to terminal B7 of microcomputer 216, and are thus available for inclusion in the data stream output at terminal D3 to the data transceiver 214. The array of digital crosspoints 232 are, like the function multiplexer 230, formed by a tree of analog gates (also a single CD4051BE) which receives a four-bit address from the microcomputer 216, and also receives a series of simultaneous lnputs in the form of voltages indicative of the status (seizable, not seizable, etc) of the passive ports to which the crosspoints 222 are connected. Each of the analog crosspoints 222 is thus paired with one of the digital crosspoints 232 to form an active port. Tile simultan-eous inputs to digital crosspoints 232 are time-division multi-plexed and output to the voltage discriminator 234 formed by three analog-to-digital converters which provide a three-bit message to the microcomputer 216 at terminals BO,B1 and B6.
Viewing the inputs to these terminals at any point in time, if none of the three voltage reference levels of discriminator 234 1~ 7 ~

is exceeded by the signal voltage (+2v, Ov, -2v or -4v) sampled by digital crosspoint 232, then logic 0 appears at each of the terminals B0, Bl and B6, ~ndicating to the microcomputer 216 that the passive port being interrogated at that point in time is seizable and its assoclated visual indicators in the station sets are off. If the first voltage reference level is exceeded, a logic 1 appears at B6 and logic 0 appears at B0 and B1, in-dicating that the passive port being interrogated at that point in time is seizable, but its associated visual indicators are 10 OD, indicating that the station card incorporating the inter-rogated passive port is in use on its A-pair. If the second voltage reference level is exceeded, a logic 1 appears at B6 and B0 and a logic 0 appears at B1, indicating that the passive port being interrogated at that point in time is not seizable, except by an active port with a pre-emptive seize capabilitY, and its associated visual indicators are on. If the third vol-tage level is exceeded, a logic 1 appears at 80, B1 and B6, indicating that the passive port being interrogated at that point in time is not seizable by any active port, i.e., it has been pre-emptively seized, and its associated visual indicators are on. If the passive port of a line card being interrogated at any point in time indicates that it is either receiving an incoming call on the associated CØ line, or is on HOLD, i.e., when the voltage signal input to data crosspoints 232 alternate between Ov and +2v, this flashing signal will be sampled by the associated digital crosspoint in array 232and will be passed through voltage discriminator 234 to terminal B6 as a series of logic ls alternating with a series of logic Os at the rate and duty cycle of the flashing signal being sampled. All of this information is employed by the microprocessor 216 to determine whether to signal the current generator 218 to send signal cur-~7~g81 rent on the audio path via a conduct~ve ~OSFET crosspoint to a passive port, and to signal the station sets from terminal D3 via data transceiver 214 as to the status of all the interroga-ted passive ports.

If and only if a requested telephone service or feature is indicated as being ~vailable upon interrogation of the rele-vant passive port, signal current will be generated by the active port to advise the passive port of its seizure and the desired service. Specifically, the current generator 218 can receive any one of four command signals from microcomputer 216 in response to data received at terminal A0. Absent any command signal, the output from current generator 218 is nil (0 ma). A
seize signal may appear at terminal A5, causing a seize current ~1.6 ma) to flow from current generator 218 on the audio path and through a conductive MOSFET crosspoint to the passive port to which that crosspoint is connected. That passive port is thus informed that it has been seized, and it responds by gen-erating a voltage signal which is transmitted to all of the active ports to which the passive port is connected to indicate to those active ports that it has been seized. A conference signal may appear at terminal A6, causing a double seize current (3.2 ma) to flow from current generator 218 to signal seizure of two passive ports, e.g., conferencing two incoming C~O. lines.
The seized passive ports respond by each generating a voltage signal indicative of seizure. The conference signal from ter-- minal A6 of microcomputer 216 is also input to negative imped-ance 228 to adjust its value to -200 ohms so as to match the impedance of the two conferenced lines to which the station card has been connected through the seized passive ports. A flash signal may appear at terminal A7 of microcomputer 216, causing 1~ 7`7~ ~1 a flash current (6.4 ma) to flow from curreDt generator 218 and break the loop current on a seized CØ line while continuing to hold that line. Hold and privacy release signals may appear at terminal A4 of microcomputer 216, causing either a hold cur-rent pulse (14 ma) of brief duration to be generated, or a pri-vacy release current pulse (14 ma) to be generated as long as the privacy release button in the associated station set is depressed. In response to the aforementioned signals currents from current generator 218, the KSU circuit incorporating the receiving passive port implements the requested service indica-ted by the signal current level, and the receiving passive port generates a voltage signal indicative of its seizure.
Each station card 200 includes one or more passive ports, viz., a hotline B-port 238, a link B-port 240, or a page input to B-port switching circuit 246. The term "B-port"
refers only to station card passive ports, which provide access to the B-pair communication channel. In the system shown in Figure 1, the station cards require no link B-ports 240, since there are no links. If the optional paging and background music features are eliminated? the PAGE and BGM input circuits in B-port switching circuit 246 may be eliminated. There are multiple connections to the hotline B-port from one active port in each of the other station cards in this system. In the system shown in Figure 2, each station card has a link B-port which may be seized by a link card circuit. The hotline B-port is connected to one active port iD only one other station card 200; if a system is desired in which all internal calling is to be accomplished through the link cards, the hotline B-port may be eliminated. As in the system of Figure 1, if the optional paging and background ~usic features are eliminated, the PAGE

1 !L7~9~1 and BGM input circuits ~n B-port switching circuit 246 may be eliminated. These B-port circuits are shown in detail in Fig-ure 4. The hotline B-port 238 comprises a transformer 250 for isolating the DC curreDt sig~als, which are received from the active ports to which transformer 250 is connected via the HLB
A~ALOG conductor, from the VOICE or AUDIO PATH. A resistor 252 is connected across the DC signal-current-receiving winding of transformer 250 for the purpose of providing a shunt path past that winding so as to minimize transients lnduced in the other winding by the DC current signals, and an impedance-matching resistance 254 of equal value is connected across the other winding. A signal current sensor circuit comprises tran-sistor 256, which is biased by -9v. applied through resistor 260 to its base, which is also connected to the anode of diode 258, the cathode of which is grounded. The collector is conn-ected through parallel resistor 262 and capacitor 264 to -9v., and the emitter is connected through resistor 252 and its parallel winding of transformer 250 to the HLB ANALOG conductor.
A seize signal current (1.6 ma) is detected as an increase in the voltage across resistor 262, which causes voltage compar-ator 266 to generate a HL SEIZE 2 signal which i9 transmitted to input terminal B5 of microcomputer 216. A latch command is then generated in the data stream from terminal D5,causing the pertinent one of function latches 236 (Figure 3) to close and thereby issue the HL CONTROL 2 signal (logic 1) to digital-to-analog converter 261 in hotline B-port 238. In response, the D/A converter 261 generated an output which is applied through resistor 263 to voltage follower 269, which generates a ~C
signal voltage indicating seizure (-2v.) which is transmitted to the digital crosspoint(s) of the active ports to which hot-line B-port 238 is connected. The microcomputer 216 further ~ 1~77 ~ ~

responds to the ~L SEIZE 2 or 3 signals by simultaneously gener-ating a SPLASH TONE ENABLE signal at terminal A1, thereby triggering splash tone control circuit 294 which then turns on JCT FET 293 for about 1 second to pass the steady SPLASH TONE
signal received from tone generator circuit 500 to the AUDIO
PATH, thereby signalling the called party that there is an incoming call. The SPLASH TONE ENABLE signal is also applied as an input to inverting OR gate 290, which responds by turning off JCT FET 289 to block any PAGE or BGM transmission. The microcomputer 216 responds to the depression of the appropriate buttons at the called party's station set by generating the HL
B ENABLE signal at terminal Dl, which turns on MOSFET 2~8 in seize control circuit 242 and is also applied as an input to inverting OR gates 290 and 286 in B-port switching circuit 246, thereby turning off both JCT FET 289 and MOSFET 287 to block PAGE and BG~ transmissions, and causing inverter 285 to turn on MOSFET 284 in the VOICE or AUDIO PATH. Thus, a path is closed for the transmission of voice signals via transformer 250, MOSFET 268, attenuator 244 formed by a resistive pi network and MOSFET 284 through DC blockin~ capacitor 248 and trans-i'ormer 204 to the B-pair communication channel comprising con-ductors 210 and 212.

With a seized DC signal voltage (-2v.) at the output of voltage follower 269, the hotline B-port 238 may be pre-emptively seized by an active port having that ability. If a pre-emptive seize current signal (3.~ ma) is received by hotline B-port 238, voltage comparator 263 generates a ~L SEIZE 3 signal which is fed to function multiplexer 230. A latch command is then generated in the data stream from terminal D5, causing the per-tinent one of the array of function latches 236 (Figure 3) to issue the HL CONTROL 3 signal to digital-to-analog converter 257.

J ~77~

In response, the D/A converter 257 generates an output which is applied through resistor 259 to voltage follower 269, which gen-erates a DC signal voltage indicating pre-emptive seizure (-4v.).
If the user of the associated station set 100 is utilizing the A-pair communication channel, the micro~omputer will generate a HL CONTROL 1 signal (logic 1) at terminal DO, thereby causing digital-to-analog converter 265 to generate an output through resistor 267 which causes voltage iollower 26~ to generate a DC signal voltage (Ov.) indicating that the hotline B-port ~38 is seizable and that the associated visual indicator in the call-ing party's station set is to beli~ If each of the signals HL
CONTROL 1,2,3 is a logic 0, tbe voltage follower 269 will gen-erate a DC signal voltage (+2v.) indicating that the hotline B-port 238 is seizable and that the associated visual indicator in the calling party's station set is not to be lit.
The link B-port 240 comprises an isolating transformer 270 with DC shunt resistor 272 connected across the DC signal current-receiving winding, and an impedance-matching resistor 274 connected across the other windlng. A combination current sensor and voltage sender clrcuit ls formed by transistor 275, operational amplifier 276, and the parallel-connected resistor 277 and capacitor 278. A DC current signal received on the LINK conductor from an active port is sensed as an increase in voltage across resistor 277, which in turn causes comparator 279 to generate a LINK SEIZE signal which is applied to terminal B2 of microcomputer 216. If the call is received handsfree at the called speakerphone, the microcomputer 216 also gen-erates a SPLASH TONE ENABLE signal at terminal A1 in response to the LINK SEIZE signal, thereby triggering splash tone control circuit 294 which then turns on JCT FET 293 for about 1 second to pass the steady SPLASH TONE signal to the AUDIO PATH. The 1~ 77 ~ ~ 1 SPLASH TONE ENABLE signal is also applied as an input to in-verting OR gate 290, which responds by turning off JCT FET 289 to block any PAGE or B&M transmission. If tbe seizing link ~ends DC signal current (3.2 ma) indicating an intercom ringing call, i.e., one which is to be answered via the handset hybrid circuit instead of the speakerphone at the called station, then voltage comparator 280 will also generate an output, which is fed to terminal B3 of microcomputer 216 as an ICU RING CALL
signal. In response, the microcomputer 216 generates a latch command at terminal D5 instead of a SPLASH TONE ENABLE signal at terminal A1. The latch command is fed to the function lat-ches 236 (Figure 3) along with address data and write enable st.obe data. Function latches 236 are formed by one eight-bit latch (CD4099BE) which acts as a demultiplexer of the three streams of received data in the same manner as crosspoint latches 224. In response to the aforementioned latch command, an ICM RING TONE ENABLE signal is generated and fed to B-port switching circuit 246 (1) to turn on JCT FETs 288 and 296 to allow passage of ICM RING TONE to the called party through normally-conductive ~OSFET 287 and to the calling party through transformer 270 in the link B-port 240, and ~2~ to turn off JCT
FET 289 through inverting OR gate 290 to block any PAGE or BG!l transmission.

Upon termination of either the SPLASH TONE ENABLE sig-nal or the ICM RING TONE ENABLE signal, a LINK ENABLE signal is generated at terminal D2 of microcomputer 216 to turn on ~OSFET 283 in seize control circuit 242. The LINK ENABLE sig-nal is also applied as an input to inverting OR gate 286 in B-port switching circuit 246, thereby turning on MOSFET 287 and causing ~nverter 285 to turn on UOSFET 284. Thus,a path is closed for the transmission of YOiCe signals ~ia transformer 1'~

li779E11 270, ~OSFET 283, atteDuator 244, and ~OSFET 284 to the B-pair communication channel. The LINK SEIZE signal is also applied to the positive input terminal of operational amplifier 276 ' connected as a voltage follower with its negative input and its output tied to the emitter and base, respectively, of transistor causing its emitter to 275 become more positive.
Thus, a DC voltage signal (-2v.) indicating seizure is generated at the emitter of transistor 275 and is applied through resistor 272 and its parallel winding of transformer 270 to the LINK
conductor for transmission to the link.

If a call coming in to link B-port 240 is answered at an alternate station set by dialing the called station set extension number with aprefix code number, the alternate station set is connected to the 6eizing link through tbe link B-port 240 of the called station set. Under these conditions, the seizing link will generate a call 6teal DC current signal (3.2 ma) which causes comparator 281 to generate on output which is fed to terminal B4 as a CALL STEAL signal in response to which the microcomputer 216 prevents user access to the B-pair communication channel of the called station set. The CALL STEAL signal is also applied to the call steal timer circuit 282 to reset it. The call steal timer circuit starts to run for a predetermined period of time (e.g., 30 seconds) whenever it receives a LINK SEIZE signal, and while it is running it biases the positive input terminal of operational amplifier 27~ so as to a.llow the generation of a DC voltage signal at the emitter of transistor 275 indicating seizure of the link B-port, thereby enabling the c~ll from the link to be "stolen" by pre-emptively seizing the link B-port 240 via an active port in an alternate station set. The call steal timer ~ 779E31 circuit is also reset by the LINK ENABLE signal from terminal D2 of the microcomputer 216 so as to prevent an answered call from being "stolen", thereby preserving the called user's pri-vacy.
The PAGE and BGM signals are received from the page and tone cards, respectively, and are controlled by JCT FETS 291 and 292, respectively, which are normally conductive when PA OE
ENABLE and BGM ENABLE signals are applied to their respective gate electrodes. These enabling signals are generated by func-tion latches array 236 in response to latch commands issued atterminal D5 of microcomputer 216 in response to data received at terminal A0 from the associated station set 100. A combin-ation on/off/volume switch in the station set 100 controls the generation of the BGM ENABLE signal by the associated station circuit 200; when the switch is off, the signal will not be generated, and when the switch is on, the signal will be gen-erated. The PAGE ENABLE signal will normally be generated in each station circuit 200, but will be terminated upon seizure of the page card through a link card or directly from the station card in response to requests from the station set.
CO AUDIBLE is a signal which is continuously generated within the ERTS on the tone card 500 ~Figure 6) for trans-mission to the internal speaker in the station set upon receipt of a C.O. AUDIBLE ENABLE signal at the gate electrode of JCT FET
295. These enabling signals are also received from the tone card 500 in response to INCOMING CALL ENABLE signals generated by the various line cards 300 (Figure 5) in response to a ringing signal from the Central Office.

The program listing which follows on pages 23-46 is the se~uence of instructions stored in microcomputer 216 of each ~7 ~J~i station card 200 (Figure 3). Each RO~ address (LOC) with machine operation code (CODE) followed by the assembly language instruction of the program is included in the listing. The assembly language instructions are explained in detail in the manufacturer's Data Sheet entitled "Part No. R6500/1 Microcom-puter System", Document No. 29000D51, Revislon 2, dated October 1978 and published by the Rockwell International Corporation.
The Symbol Table on pp. 47-48 includes four columns of program symbols on each page, with the value of each symbol listed at the right side of each symbol.

~7~9~

LARGE SYSTEM 2/28/79 BELOW 2K...... ~.PAGE 0001 LINE # LOC CODE LINE
0002 0000 *-$0800 0003 0800 FUNMUX ~$0002 0004 0800 HFENAB ~$0003 0005 0800 LNKMUX -$0005 0006 0800 MUX=$002E
0007 0800 WD0-$0006 0008 0800 WDI~$0007 0009 0800 WD2-$0008 0010 0800 WD3-$0009 00]1 0800 WD4-$000A
0012 0800 WD5'$000B
0013 0800 WD6-$000C

0015 0800 WD8-$000E
0016 0800 WD9-$000F
0017 0800 WD10-$0010 0018 0800 WD11-$0011 0019 0800 WD12-$0012 0020 0800 WD13e$0013 0021 0800 WD14~$0014 0022 0800 WD15~$0015 0023 0800 WD16~$0016 0024 0800 WD17~$0017 0025 0800 WD18~$0018 0026 0800 WDI9-$0019 0027 0800 WD20-$00IA
0028 0800 WD21-$001B
0029 0800 WD22~$001C
0030 0800 WD23-$001D
0031 0800 WD24-$001E
0032 0800 WD25~$00 lF
0033 0800 WD26~$0020 0034 0800 WD27-$0021 0035 0800 WD28=$0022 0036 0800 WD29~$0023 0037 0800 WD30~$0024 0038 0800 WD31-$0025 0039 0800 KYHOLD ~ WD7 0042 0800 KYANS ~ WD]9 0043 0800 KYPA OE ~ WD30 0044 0~00 RYCONT ~ WD27 0046 0800 KYSPU ~ WD3 0048 0800 KYHKSW ~ WD0 0049 0800 STUS 1 - $0031 0050 0800 STUS-$0026 0051 0800 INDX5-$0028 0052 0800 INDX4~$0027 0053 0800 FNMXl-$0029 0054 0800 TTMR-$002A
0055 0800 INDXl-$002B
0056 0800 INDX2-$002C

1:t7'796~:1 LARGE SYSTEM 2f28/79 BELOW 2~!........ PAGE 0002 LINE # LOC CODE LINE
0057 0800 CURSTAe$002D
0058 0800 PT32A~$80 0059 0800 DIPT3A-$81 0060 0800 PT32B'$82 0061 0800 DIPT3B'$83 0062 0800 PT22A-$CI
0063 0800 DIPT2A-$C3 0064 0800 PT22B-$CO
0065 0800 DIPT2B-$C2 0066 0800 ULTCH-$C7 0067 0800 LLTCH-$C6 0068 0800 UPCT-$C5 0069 0800 LOWCT-$C4 0070 0800 LDLTCH-$C5 0071 0800 TlCT-$CI
0072 0800 CLINTl~$CO
0073 0800 TIFL.$CD
0074 0800 INTBT'$CE
0075 0800 ARC~$CB
0076 0800 PRC-$CC
0077 0800 MSCTR -$32 ;MASTER LOOP COUNTER
0078 0800 D8 PWON CLD ; CLEARS DECIMAL MODE
0079 0801 A2 3F RESET LDX #$3F

0081 0804 A9 00 ZROLP LDA #$00 0082 0806 95 00 STA $00,X

0085 080B E8 INX ;X'0 0086 080C 86 2B STX INDXl ;SET UP INDEX POINTERS
0087 080E A9 40 LDA #$40 ;FOR INDIRECT MODE
0088 0810 85 2C STA INDXl+l 0089 0812 BD 01 09 RSTLP LDA SUPTBL,X
0090 0815 BC 02 09 LDY SUPTBL+l,X
009i 0818 91 2B STA (INDXl),Y;WRITE PORT CONTROL BITS
0092 08lA E8 INX

0094 081C E0 18 CPX #ENDTBL-SUPTBL+l,ALL DONE?
0095 08lE DO F2 BNE RSTLP

0097 0821 A9 40 LDA #$40 ; SETS RELEASE REQ. TO INIT.
XPOINTS

0100 0828 A9 08 LDA #$08 0102 082C 85 80 STA PT32A ; SYNC PVLSE HIGH
0103 082E A2 00 LDX #$00 0104 0830 ; ZERO X REGESTER (WD CTR) 0106 0833 A9 F7 LDA #$F7 0108 0837 85 80 STA PT32A ; SYNC PULSE LOW
0109 0839 20 86 08 JSR SYLPl ;WAIT FOR "1"
0110 083C A9 7F SYCTl LDA #$7F

1~177~

LARGE SYSTEM 2/28/79 BELOW 2K!........ PAGE 0003 LINE # LOC CODE LINE

0113 0843 20 B6 08 JSR SYLPI jWAIT FOR "2"

0117 084E 29 FC AND #$FC

0123 085B A9 02 LDA #$2 0124 085D 85 2A STA TTMR ;REPAIR TTMR
0125 085F A9 90 LDA #$90 0126 0861 AO 00 LDY #$00 0130 086C A9 F7 OUTHI LDA #$F7 ;SIGNAL GOES TO -5V (DATA I
LEVEL) 0134 0873 A9 08 OUTLD LDA #$08 ;SIGNAL GOES TO GND (DATA 0 LEVEL) 0136 0877 DO F7 BNE OUTHIO ;BRANCH ALWAYS
0137 0879 A9 99 INITDL LDA #<DIALsTi**INsERT VECTOR LO ADDR**

0139 087C A9 08 LDA #>DIALST;**INSERT VECTOR HI ADDR**

0143 0883 A9 EE LDA #$EE ;IRQ ON NEG. TRANS

0145 0887 A5 CD INTEA LDA TIFL ;CLEARS INT FLAG REG
0146 0889 A9 82 LDA #$82 ;SETS CAI INT.ENABLE

0149 088E A9 A6 INITRP LDA#<RESPST ;**INSERT VECTOR LO ADDR**

0151 0891 A9 08 LDA #>RESPST;**INSERT VECTOR HI ADDR**

0153 0896 6C 27 00 DINT JMP (INDX4) 0155 089A A9 FE LDA #$FE ;INDEXED TO START HERE FOR DIAL

0]57 089E 85 80 STA PT32A

0159 08A2 A5 Cl INTRTN LDA TICT ;CLEARS IFR

0163 08A7 46 26 LSR STUS ;INDEX HERE FOR RESPONSE

0165 08AA 26 26 ROL STUS ;SET LSB STUS
0166 08AC D0 F4 BNE INTRTN ;BRANCH ALWAYS
~' L~

1~779131 LARGE SYSTEM 2/28/79 BELOW 2K!........ PAGE 0004 LINE # LOC CODE LINE
0167 08AE A9 00 TIP5T LDA #$00 0]69 08B2 A9 C8 LDA #$C8 0171 08B6 A9 40 SYLPI LDA #$40 ;GET LSB
0172 08B8 A0 02 LDY #$2 ;GET MSB
0173 08BA 24 CD SYLP2 BIT TIFL ;WAIT FOR TIMEO~T

0175 08BE 84 C7 STLTCH STY ULTCH ;SET UPPER LATCH

0181 08C8 A9 01 LDA #$01 ; SET LSB

0188 08D4 AO 09 DLYQ LDY#$09 ;TIME DELAY OF 72 CYCLES

0190 08D8 A0 07 DLY2 LDY #$07 ;TIME DELAY OF S7 CYCLES

0199 08E8 C9 03 CMP #$3 0201 08EC C9 01 CMP #$01 ;START OF T3?
0202 08EE F0 07 BEQ T2P5T ;SET LATCH~2*T
0203 08F0 A9 81 TIT LDA #$81 0204 08F2 AO 00 LDY #$00 0206 08F7 A9 77 T2P5T LDA #$77 ;SET UP 2-05$Q@ELouT
0207 08F9 A0 01 LDY #$01 0209 08FE FO ADSTB .BYT $F0 ;STROBE ADDI
0210 08FF E8 .BYT $E8 ; ADD2 0211 0900 D8 .BYT $D8 ; ADD3 0212 0901 7F SUPTBL .BYT $7F
0213 0902 CE .BYT <INTBT ;CLEAR INT. ENAB.REG
0214 0903 40 .BYT $40 0215 0904 CB .BYT <ARC jINITIALIZE AXIL CONTROL REG.
0216 0905 EF .BYT $EF
0217 0906 CC .BYT<PRC ;INITIALIZE PERIF.CONTROL
REGISTER
0218 0907 48 .BYT $48 0219 0908 C6 .BYT<LLTCH ;TIMER COUNTDOWN IN HEX(MICRO
SEC) 0220 0909 00 .BYT $0~
0221 090A C5 .BYT <LDLTCH;TIMER HIGH BYTE

LARGE SYSTEM 2/28/79 BELOW 2K!........ PAGE 0005 LINE # LOC CODE LINE
0222 O90B FF .BYT $FF
0223 090C C3 . BYT <DIPT2A ;SET OUTPUTS
0224 090D FF .BYT $FF
0225 090E C2 .BYT <DIPT2B
0226 090F FF .BYT $FF
0227 0910 81 .BYT <DIPT3A
0228 0911 C8 . BYT $C8 0229 0912 Cl .BYT <PT22A ;INITIALIZE MUX LINES
0230 0913 D8 .BYT $D8 0231 0914 C0 .BYT <PT22B ;INITIALIZE MUX AND ENABLE
LINES
0232 0915 03 .BYT $03 0233 0916 80 .BYT <PT32A ;INITIALIZE CURRENT GEN. &

0234 0917 DD .BYT $DD
0235 0918 CO ENDTBL .BYT <PT22B

0237 091C EO IF CPX #$1F ;WD31-WDO

0240 0922 B9 93 09 LDA ATBLI,Y

0246 092C 29 07 AND #$7 ;MASK MUX BITS
0247 092E AO 00 LDY #$0 ;SET UP Y FOR TABLE LOOKUP
0248 0930 24 2E BIT MUX ;PREPARE TO COMPUTE Y INDEX
0249 0932 70 03 BV~ ADD2 0253 0938 19 FE 08 ADDI ORA ADSTB,Y
0254 093B 85 Cl STA PT22A

0256 0940 B5 06 LDA WD0,X

0261 094D A9 7F CTUI LDA #$7F

0269 0962 A9 7F CTU2 LDA #$7F

0273 0969 B0 IA BCS INCT ;BRANCH IF INT. OCCURRED
0274 096B 20 97 09 JSR TCTR3 jTEST FOR RESP. CTR~3 ?
0275 096E FO 05 BE~ CTU4 jBRANCH IF - 3 0276 0970 A9 F8 LDA #$F8 ;ZERO CTR.

1~7~7~1 LARGE SYSTEM 2/28/79 BELOW 2R!........ PAGE 0006 LINE # LOC CODE LINE

0278 0975 46 26 CTU4 LSR STUS ;RESET INTI FLAG

0281 097A E0 lF CPX #$1F

0288 098A C9 07 CMP #$07 ;TEST SERVICED BIT
0289 098C F0 E7 BEQ CTU4 ;BRANCH IF SERVICED
0290 098E F6 06 INC WD0,X ;INCREMENT RESPONCE CTR.

0292 0993 B8 ATBLl .BYT CP24 0293 0994 A8 .BYT CP22 0294 0995 98 .BYT CP20 0295 0996 78 .BYT CP16 0296 0997 .FILE LSSUB/I
0297 0997 B5 06 TCTR3 LDA WD0,X ;TEST RESPONSE COUNTER~3?
0298 0999 29 07 CTR3 AND #$7 0299 099B C9 03 CMP #$3 0301 099E 35 06 BITCLR AND WD0,X ;CLEAR BITS IN WD0 INDEXED
0302 09A0 95 06 BITOP STA WD0,X

0304 09A3 15 06 BITSET ORA WD0,X ;SET BITS
0305 O9A5 DO F9 BNE BITOP ;BRANCH ALWAYS
0306 09A7 ; CONTROL FUNCTION LATCHES

0310 09AD 49 02 EOR #$2 0312 O9B1 49 02 EOR #$2 0315 09B6 ; SET OR CLEAR DATA LINE

0317 09B8 09 20 ORA #$20 0320 09BE 29 DF AND #$DF

0323 09C3 . FILE LCOSEZ/l 0324 09C3 DELAY-$002F
0325 O9C3 A4 26 COSZ LDY STUS ;TEST RELEASE BIT
0326 09C5 30 2F BMI TNOF ;BRANCH TO TURN OFF

0328 O9CA F0 41 BEQ TNON ;'3 0329 09CC C9 01 CMP #$01 0331 09D0 B5 06 LDA WDO,X

1~7798:1 LARGE SYSTEM 2/28/79 BELOW 2R!........ PAGE 0007 LINE # LOC CODE LINE
0332 O9D2 29 20 AND #$20 0334 O9D6 98 SRRBIT TYA ;SET REL REQ BIT CTR-I
0335 09D7 09 40 ORA #$40 0337 O9DB B5 06 COSZO LDA WDO,X ;TEST I HOLD PROTECT BIT

0340 OOEO A5 82 IHPI LDA PT32B ;FORCE DO INTO CARRY
034} O9E2 4A LSR A

0343 O9E5 A9 BF LDA #$8F ;CLEAR I HOLD PROTECT BIT

0349 O9F2 A9 B7 LDA #$B7 ;RESET I HOLD
0350 O9F4 DO Fl BNE IHP
0351 O9F6 20 97 09 TNOF JSR TCTR3 ;TEST RESP. CTR-3?

0353 O9FB A9 04 LDA #S04 ;SET SERV BIT, &TRIG BIT
0354 OgFD 20 A3 09 JSR BITSET
0355 OAOO A9 DF ARCOS LDA #$DF ;RESET I SEIZE

0357 OA05 98 TYA ;RESET CONF BIT + DIAL ENA REQ
0358 OA06 29 D7 AND #$D7 0360 OAOA ; OPEN CROSS POINTS

0362 OAOD 98 TNON TYA ;GET STATUS
0363 OAOE 29 04 AND #$04 ;TEST OFF HOOK BIT

0365 OA12 A9 04 STSER LDA #$04 0366 OA14 20 A3 09 JSR BITSET ;SET SERVICED BIT

0369 OAIB A5 82 LDA PT32B ;TEST Dl 0371 OAIE BO CA BCS EXIT5 ;DI-I BUSY
0372 OA20 20 EC OA CLSXPT JSR IOFF ;TURN OFF IGEN
0373 OA23 20 4E OA JSR CLOSEX ;TOGGLE CRSPT ENB
0374 OA26 98 TYA ;GET STATUS
0375 OA27 29 20 AND #$20 0376 OA29 FO OF BEQ SCBT,BRA CONF BIT NOT SET
0377 OA2B B5 06 LDA WDO,X
0378 OA2D 29 08 AND #$08 0379 OA2F FO B9 BEQ EXIT5;RIVERSIDE
0380 OA31 98 TYA ;RESET DIAL ENAB REQ BIT
0381 OA32 29 F7 AND #$F7 0383 OA36 A9 40 LDA ff$40 ;CONF ON
0384 OA38 DO 02 BNE COSZI ;BRANCH ALWAYS
0385 OA3A A9 20 SCBT LDA #$20 ;SEIZE ON ONLY

3.~ 9l~3~

LARGE SYSTEM 2/28/79 BELOW 2K!........ PAGE 0008 LINE # LOC CODE LINE
0387 OA3F 98 TYA ;SET CONF. BIT ~ DIAL ENA REQ
+ SEIZE BIT
0388 OA40 09 38 ORA #$38 0390 OA44 A9 20 LDA #$20 jSET I SEIZE BIT
0391 OA46 15 06 ORA WDO,X
0392 OA48 29 F7 AND #$F7 jCLEAR I HOLD BIT
0393 OA4A 95 06 STA WDO,X

0395 OA4E A5 CO CLOSEX LDA PT22B ;SET XPT
0396 OA50 09 20 ORA #$20 0398 OA54 A5 Cl SXPT LDA PT22A ;READ MUX DATA
0399 OA56 49 38 EOR #$38 0400 OA58 29 38 ASXPT AND #$38 ;INVERT SELECT BITS

04Q5 OA5E BO OB BCS ROLOVR ;TEST FOR ENAB6 0407 OA61 45 Cl EOR PT22A ;TOGGLE ÆNAB
0408 OA63 85 Cl STA PT22A

0410 OA66 45 Cl EOR PT22A
0411 OA68 85 Cl STA PT22A
0412 OA6A 6a RTS
0413 OA6B A9 40 ROLOVR LDA #$40 ;SET ENAB6 MASK

0421 OA78 .FILE LPRREL/I
0422 OA78 TMPI -$29 r 0423 OA78 A5 2D RESPRT LDA CURSTA ;RESTORE PREVIOUS CURRENT VALUE
0424 OA7A 48IIPORT PHA ;SAVE UPDATED CURRENT VALUE
0425 OA7B A9 OF LDA #$0F ;RESET CURRENT GENERATOR

0427 Oa7F 85 80 STA PT32A
0428 OA81 68 PLA ;SET UPDATED CURRENT VALUE

0431 OA86 60 RTS ;END ISOLATE I PORT ROUTINE
0432 OA87 04 XREF .BYT WD4-WDO
0433 OA88 05 .BYT WD5-WDO
0434 OA89 06 .BYT WD6-WDO
0435 OA8A 08 .BYT WD8-WDO
0436 OA8B 09 .BYT WD9-WDO
0437 OA8C OA .BYT WDIO-WDO
0438 OA8D OC .BYT WD12-WDO
0439 OA8E OD .BYT WD13-WDO
0440 OA8F OE .BYT WD14-WDO
0441 OA90 10 .BYT WD16-WDO

1~t77~

LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0009 LINE # LOC ~ CODE LINE
0442 OA9] 11 .BYT WD17-WDO
0443 OA92 12 .BYT WD18-WDO
0444 OA93 14 .BYT WD20-WDO
0445 OA94 15 .BYT WD21-WDO
0446 OA95 16 .BYT WD22-WDO
0447 OA96 18 .BYT WD24-WDO
0448 OA97 19 .BYT ND25-WDO
0449 OA98 IA .BYT WD26-WDO
0450 OA99 IC .BYT WD28-WDO
0451 OA9A lD .BYT WD29-WDO
0452 OA9B IE .BYT WD30-WDO
0453 OA9C ; PRIVACY RELEASE RTN

0456 OA9C 24 11 PREL BIT KYPREL ;TEST PR TIMER BIT
0457 OA9E 70 36 BYS PTOUT ;BRANCH ON PR TIMER TIMEOUT

0459 OM 3 DO 4C BNE PTSTR ;BRA ON CTR NOT EQ~. TO 3 046] OM7 29 20 AND #$20 ;ISOLATE SEIZE BIT

0463 OM B 4A LSR A ;SHIFT SEIZE BIT TO HOLD BIT
POSITION

0465 OAAF A5 11 LDA KYPREL ;SET PREL TIMER START BIT
0466 OABI 09 24 ORA #$24 ;SET SERVIOE D BIT+TIMER START0467 OAB3 85 11 PSTH3 STA KYPREL
0468 OAB5 AO 09 LDY #$09 0472 OABC CO 09 PSIHLD CPY #$09 0474 OACO BE 87 OA PSTHO LDX XREF,Y
0475 OAC3 B5 06 LDA WDO,X
0476 OAC5 29 20 AND #$20 ;IF I SEIZE BIT SET
0477 OAC7 FO 07 BEQ PSTH2 ;SET IHOLD PROTECT ~ IHOLD BITS

0479 OACB A9 48 LDA #$48 0483 OAD3 68 PSTHl PLA
0484 OAD4 AA TAX ;RESTORE X

0487 OAD8 29 07 AND #$7 ;MASK CTR BITS
0488 OADA DO 10 BNE IOFF ;BRANCH ON CTR20 0489 OADC 20 78 OA JSR RESPRT ;GO TO RESTORE PORT ROUTINE
0490 OADF A9 9F LDA #$9F ;ZERO PR TIMER ST+TINEOUT

0493 OAE6 A9 AO LDA #$AO
0494 OAE8 99 06 00 STA WDO,Y

0496 OAEC A9 00 IOFF LDA #$0 ;TURN OFF ALL CURRENT GENERATORS

1~77981 LARGE SYSTEM 2/2B/79 BELOW 2K!... PAGE 0010 LINE # LOC CODE LINE

0498 OAFI A5 11 PTSTR LDA KYPREL ;TEST PREL TIMER START BIT
0499 OAF3 29 20 AND #$20 0501 OAF7 A9 67 LDA #$67 ;SET PRSB,PRTB,SB,RC=3 0502 OAF9 AO 15 LDY #$15 ;SERVICE 2ND HALF CO SEIZE

0504 OAFD .FILE LHLDSR/I
0505 OAFD ; HOLD SERVICE ROUTINE

0508 OAFD 24 02 HSRTN BIT FUNMUX ;TEST FUNMUX BIT 6 0512 OB04 29 20 AND #$20 0515 OBO9 09 03 ORA #$3 0517 OBOD 24 OD DSSHLD BIT KYHOLD ;TEST HOLD TIMER BIT
0518 OBOF 70 14 BVS HTOUT ;BRA ON HOLD TIMER TIMEOUT

0520 OB14 DO IB BNE HTSTR ;BRA ON CTR NOT EQU. TO 3 0521 OB16 A9 10 LDA $$10 ;TURN ON I HOLD

0523 OBlB 98 TYA ;SET HOLD TIMER START BIT
0524 OBlC 09 24 ORA #$24 ;SET SERVICED BIT
0525 OBIE AO 09 LDY #$09 0529 OB28 A9 9F LDA #$9F
0530 OB2A 20 9E 09 JSR BITCLR ;ZERO HOLD TIMERS
0531 OB2D 20 EE OF JSR RELRQ ;SET RELEASE REQUEST BIT

0533 OB31 A5 OD HTSTR LDA KYHOLD ;TEST HOLD TIMER START BIT
0534 OB33 29 20 AND #$20 0536 OB37 A9 67 LDA #$67 ;SET HTSB,HTTB,SB,RC-3 0537 OB39 AO 15 LDY #$15 ;SERVICE 2ND HALF CO SEIZE

0539 OB3E .FILE LRELDL/I

0541 OB3E A9 FA RELDL LDA #$FA
0542 OB40 85 Cl STA PT22A
0543 OB42 A9 7F LDA #$7F

0546 OB48 26 26 ROL STUS ;WORD2 RELEASE~DIAL ENA

0549 OB4D B5 06 TRSB LDA WDO,X ;TEST RELEASE SERVICED BIT
0550 OB4F 29 20 AND #$20 055] OB51 FO 18 BEQ TRRB ;BRANCH IT BIT=O

..._ ~ ~7 ,t9~1 LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0011 LINE # LOC CODE LINE
0552 OB53 A9 DF LDA #$DF

0555 OB5B A9 04 TOHB LDA #$04 ;TEST OFF HOOK BIT

0558 OB60 FO 06 BEQ SRL ;IF ON HK, SET RELEASE LINE

0562 OB6B 24 26 TRRB BIT STUS ;TESTS RELEASE REQUEST BIT
0563 OB6D 50 lE BVC TDLEA ;BRANCH ON BIT ~ O

0565 OB71 29 8F AND #$8F ;RESET REL REQ.
0566 OB73 09 80 ORA #$80 ;SET RELEASE BIT

0568 OB77 B5 06 LDA WDO,X ;SET REL SERV BIT
0569 OB79 09 40 ORA #$40 0570 OB7B 29 7F AND #$7F ;RESET DIAL ENA BIT
0571 OB7D 95 06 STA WDO,X
0572 OB7F AO 04 LDY #$04 ;SET RELEASE LINE

0576 OB89 70 08 BVS SDE8 ;SET DIAL ENABLE BIT

0578 OB8D A5 26 TDLEA LDA STUS ;TEST DIAL ENA REQ
0579 OB8F 29 08 AND #$08 0581 OB93 ;LDA FUNMUX, TEST DIAL DISABLE FEEDBACK
0582 OB93 :BMI OUT ;BRANCH ID DIAL DISABLE=I
0583 OB93 A9 80 SDEB LDA #$80 ;SET DIAL ENA BIT

0586 OB9A 29 04 AND #$4 0592 OBA4 09 04 ORA #$4 0597 OBAE 09 20 ORA #$20 0600 OBB4 29 DF AND #$DF

0602 OBB8 A9 F8 LDA #$F8 0603 OBBA 25 C] AND PT22A
0604 OBBC 85 Cl STA PT22A
0605 OBBE A9 10 LDA #$10 1~77~

LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0012 LINE # LOC CODE LINE
0607 OBC3 .FILE LHNFRE/I
0608 OBC3 ;*************************************
0609 OBC3 ;* HANFRE-HANDS FREE SUBROUTINE *
0610 OBC3 ;* *
0611 OBC3 ;*************************************

0617 OBC9 A9 04 HFRl LDA #$04 0619 OBCE 29 08 AND #$08 ;TEST SPU ON BIT

0621 OBD2 A5 31 LDA STUSl 0622 OBD4 09 08 ORA #$08 0624 OBD8 A5 31 SPOFF LDA STUSl 0625 OBDA 29 P7 AND #$F7 0626 OBDC 09 02 EXFRE ORA #$02 0627 OBDE 85 31 STA STUSl 0629 OBEl .FILE LHOTLI/l 0630 OBE] PAGEWD=$17 0631 OBEl A4 26 HTLINE LDY STUS ;TEST RELEASE BIT
0632 OBE3 30 22 BMI HTNOF ;BRANCH TO TURN OFF
0633 OBR5 B5 06 LDA WDO,X ;TEST TRIG BIT
0634 OBE7 29 40 AND #$40 0636 OBEB 20 97 09 JSR TCTR3 ;RESPONSE COUNTER =3?
0637 OBEE C9 02 CNP #$02 0639 OBF2 A5 OD LDA KYHOLD;FORCE CTR=3 0640 OBF4 09 03 ORA #$3 0642 OBF8 20 FE OB OPENXP JSR CPTOPN;OPEN CROSSPOINT FOR RESPLASH

0644 OBFE 20 EC OA CPTOPN JSR IOFF ;TURN OFF CVRRENT GEN
0645 OCOI ; OPEN CROSS POINTS
0646 -OCOI 20 BC 09 JSR CDL ;SET D EQU O
0647 OC04 4C 54 OA JMP SXPT ;OPEN XPT
0648 OC07 20 5F OC HTNOF JSR PAGEON;OPEN CROSSPT SUBROUTINE
0649 OCOA A9 F7 LDA #$F7 ;RESET I HOLD BIT

0652 OCIO 29 CF AND #$CF ;RESET CONF BITIHTLINE SEIZE BIT

0654 OC14 B5 06 LDA WDO,X ;TEST CTR
0655 OC16 09 40 ORA #$40 0656 OC18 A8 TAY ;HOLD WDO,X IN Y
0657 OCl9 29 07 AND #$7 0658 OClB FO 14 BEQ HTONFl 0659 OC]D 98 TYA
0660 OClE DO OF BNE HTONF2;BRANCH ALWAYS

1~779191 LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 00]3 LINE # LOC CODE LINE
0662 0C22 30 05 BMI NOHFO ;TEST SPU ON LED
0663 OC24 98 TYA ;GET STATUS
0664 OC25 29 04 AND #$04 ;TEST OFF HOOK BIT

0666 0C29 A9 04 NOHFO LDA #$04 0667 OC2B 15 06 NOHFl ORA WD0,X
0668 OC2D 29 BF AND #$BF ;DEFETE PRESELECT
0669 OC2F 95 06 HTONF2STA WD0,X

0671 0C34 A9 02 HSTSERLDA #$02 0672 0C36 25 82 AND PT32B ;TEST D2 0674 OC3A 98 TYA ;TEST CONF BIT
0675 OC3B 29 20 AND #$20 0677 OC3F 20 4E OA HCLSXPJSR CLOSEX ;COLSE XPT

0679 0C45 A9 20 LDA #$20 ;TURN ON SEIZE CURRENT

0681 OC4A 98 TYA ;SET CONF BIT+HTLILE SEIZE BIT
0682 OC4B 09 30 ORA #$30 0684 OC4F A9 84 HCONF LDA #$84 ;SET I HOLD BIT TO SET THE FLASHERS
RATE
0685 0C51 D0 D8 BNE NOHFl ;BRANCH ALWAYS
0686 OC53 EO 17 PAGEOF CPX #PAGEWD
0687 OC55 DO 14 BNE PNOTl 0688 0C57 AO 01 LDY #$1 0690 0C5C 4C 6B 0C JMP PNOTl 0692 0C6~ E0 17 CPX #PAGEWD
0693 0C64 D0 05 BNE PNOTl 0694 0C66 A0 01 LDY #$01 0696 OC6B A4 26 PNOTl LDY STUS

0698 OC6E .FILE LGLAMP/l 0699 OC6E B5 06 LAMP LDA WD0,X ;LOOK AT I HOLD BIT
0700 OC70 29 08 AND #$08 0701 OC72 F0 OB BEQ LAMPl 0703 0C76 29 02 AND #$2 ;TEST QUICK FLASH

0705 OC7A A9 7F SHORTILDA #$7F

0707 OC7F 24 82 LAMPl BIT PT32B
0708 0C81 50 F7 BVC SHORTl 0709 0C83 A9 80 LONG LDA #$80 0711 OC88 .FILE LHOKSW/l 0712 0C88 BYPTMR=$0004 0714 OC8A 29 07 AND #$7 0716 OC8E C9 03 CMP #$3 "

3.~7~

LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0014 LINE # LOC CODE LINE
0717 OC90 FO 01 BEQ HKl 0719 OC93 A9 04 HKI LDA #$04 0722 OC9A 29 10 AND #$10 ;CHECK ON CRADEL BIT

0726 OCAl 29 EF AND #$EF

0728 OCA5 AS 31 LDA STUS]
0729 OCA7 09 10 ORA #$10 0733 OCAE 29 10 AND #$10 0736 OCB5 09 10 ORA #$10 0738 OCB7 85 ]9 STA KYHFRE

0740 OCBB 29 EP AND #$EF
0741 OCBD 09 03 HK4 ORA #$03 0742 OCBF 85 3] STA STUSI

0744 OCC2 .FILE LTMFLS/I
0745 OCC2 FLSHTM~$0030 0746 OCC2 FTIME=$0028;DELAY= I SECOND PRECISELY
0747 OCC2 20 97 09 TMFLS JSR TCTR3 ;TEST CTR=3 0749 OCC7 A9 04 LDA #4 ;SET SERVIR D BIT

0751 OCCC A9 28 LDA #FTIME ;SET TIMER

0753 OCDO A5 80 LDA PT32A ;TURN ON FLASH CURRENT
0754 OCD2 29 20 AND #$20 ISOLATE SEIZE BIT
0755 OCD4 85 2D STA CURSTA ;PLACE IN CURSTA
0756 OCD6 OA ASL A ;SHIFT S-BIT TO FLASH POSITION

0758 OCD8 20 7A OA JSR IIPORT ;GO TO UPDATE PORT

0765 OCE5 4C 78 OA TMFOUT JMP RESPRT ;RETRIEVE PRIEVIOUS CURR
0766 OCE8 .FILE LAUTLK
0767 OCE8 LNKCTR ~ $2F
0768 OCE8 A4 26 LAUTLR LDY STUS ;TEST REL REQ
0769 OCEA 30 27 B~I AREL ;BRANCH IF SET
0770 OCEC 20 97 09 JSR TCTR3 ;TEST RESPONSE COUNTER

~..t~779~

LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0015 LINE # LOC CODE LINE
0772 OCFI C9 01 CMP #$1 ;CTR=]?

0775 OCF6 98 ALKO TYA ;SET REL REQ BIT
0776 OCF7 09 40 ORA #$40 0778 OCFB B5 06 ALKI LDA WDO,X jTEST ACTIVE LINE FLAG

0780 OCFF 20 97 09 NEWMUX JSR TCTR3 ;ISOLATE CTR BITS
0781 OD02 C9 01 CMP #$1 0782 OD04 DO 01 BNE LNMXl 0784 OD07 E6 05 LNMXl INC LNKMUX

0787 ODOC E9 04 SBC #$4 0789 OD10 85 05 STA LNKMUX ;NOTE A-O

0791 OD13 A5 07 AREL LDA WDl ;RESET LINK REQUEST BIT
0792 OD15 29 BF AND #$BF
0793 OD17 85 07 STA WDl 0794 ODI9 20 EC OA JSR IOFF ;TURN OFF CURRENT GEN
0795 ODIC 20 BC 09 JSR CDL ;~PEN CROSSPOINTS
0796 ODlF 20 5F OD JSR ASXPTO ;TICKLE XPT ENABLE
0797 OD22 B5 06 LDA WDO,X
0798 OD24 10 EC BPL AEXIT ;TEST ACTIVE LINE FLAG
0799 OD26 29 07 AND #$7 0800 OD28 95 06 STA WDO,X
0801 OD2A 10 D3 BPL NEWMUX ;BRANCH ALWAYS

0803 OD2D 29 04 AND #$4 ;TEST OFF HOOK BIT
0804 OD2F FO El BEQ AEXIT
0805 OD31 A5 82 LDA PT32B ;TEST D2 0807 OD34 BO C5 BCS ALKI ;BRANCH ON D2-]

0810 OD3A C9 06 CMP #$06 0813 OD3P A9 00 AUTI LDA #$00 0815 OD43 20 B6 09 JSR SDL ;SET DATA LINE'I
0816 OD46 20 5F OD JSR ASXPTO ;TICKEL XPT ENABLE
0817 OD49 A9 10 LDA #$10 ;SET DIAL ENABLE REQ

0819 OD4E A9 20 LDA #$20 ;TURN ON SEIZE CURRENT

0821 OD53 A9 84 LDA #$84 0822 OD55 20 A3 09 JSR BITSET ;SET SERVICED BIT & ACTIVE LINE
FLAG
0823 OD58 A9 40 LDA #$40 ;SET LINK REQUEST BIT

~ ~7'7 9 ~3 LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0016 LINE # LOC CODE LINE

0828 OD5F ; SUBROUTINE

0830 OD5F A5 Cl ASXPTO LDA PT22A ;SAVE PRESENT PORT STATUS

0833 OD64 B9 6E OD LDA ATBL,Y ;GET MnX CONTROL PATTERN

0839 OD6E ; ACTIVATION TABLE

0841 OD6E 27 ATBL .BYT $27 ;CP24 0842 OD6F 25 .BYT $25 :CP22 0843 OD70 23 .BYT $23 ;CP20 0844 OD71 ]7 .BYT $17 ;CP]6 0845 OD72 .FILE LNIKMT/1 0846 OD72 20 97 09 LMIKMT JSR TCTR3 ;TEST CTR

0848 OD77 A9 04 LDA #$4 ;SET SERVICED BIT

0850 OD7C 30 10 BMI MLOFF ;BRANCH IF MUTE LED ON
0851 OD7E 09 80 ORA #$80 ;TURN ON MVTE LED
0852 OD80 95 06 STA WDO,X
0853 OD82 26 06 MUTE ROL WDO ;MUTE MIC

0857 OD88 24 08 BYPTST BIT WD2 ;TEST BYPASS SWITCH
0858 OD8A 30 F6 BMI MUTE ;BRANCH IF BYPASS SWITCH CLOSED
0859 OD8C 10 05 BPL LIVE ;BRANCH IF BYPASS SWITCH OPEN
0860 OD8E A9 7F MLOFF LDA #$7F ;TURN OFF MUTE LED

0862 OD93 26 06 LIVE ROL WDO ;LIVE MIC

0864 OD96 90 ED BCC LIVEO ;BRANCH ALWAYS
0865 OD98 .FILE LGWSRF/I

0867 OD98 CALL ~DELY-]

0869 OD98 DENB 'RELDL-1 0871 OD98 HNDFRI ~DELY-1 ;SPKR-PHONE CONTROL WORD
0872 OD98 HOLD ~HSRTN-1 0873 OD98 FLASH .TMFLS-1 0874 OD98 HNDFR2 ~HANFRE-I ;SPKR-PHONE ON/OFF KEY

0876 OD98 ANS 'DELY-1 0879 OD98 PAGE ~HTLINE-1 1~779~31 LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0017 LINE # LOC CODE LINE
0882 OD98 SEEZI =COSZ-I
0883 OD98 SEEZ2 =COSZ-I
0884 OD98 SEEZ3 =COSZ-l 0885 OD98 SEEZ4 =COSZ-I
0886 OD98 SEEZ5 =COSZ-I
0887 OD98 SEEZ6 =COSZ-I
0888 OD98 SEEZ7 =COSZ-I
0889 OD98 SEEZ8 =COSZ-I
0890 OD98 SEEZ9 =COSZ-I
0891 OD98 SEEZIO ~COSZ-I
0892 OD98 SEEZII =COSZ-I
0893 OD98 SEEZ12 =COSZ-I
0894 OD98 SEEZ13 =COSZ-I
0895 OD98 SEEZ14 =DELY-I
0896 OD98 SEEZ15 =LMIKMT-I
0896 OD98 SEEZ16 =COSZ-I
0898 OD98 SEEZ17 =COSZ-I
0899 OD98 SEEZ18 =DELY-I
0900 OD98 SEEZI9 =COSZ-I
0901 OD98 SEEZ20 =COSZ-I
0902 OD98 SEEZ21 =COSZ-I
0903 OD98 SEEZ22 =PAGE-I
0904 OD98 SEEZ23 =LAUTLK-I
0905 OD98 CPI =$00 0906 OD98 CP2 =$08 0907 OD98 CP3 =$10 0908 OD98 CP4 =$18 0909 OD98 CP5 =$20 0910 OD98 CP6 =$28 0911 OD98 CP7 =$30 0912 OD98 CP8 =$38 0913 OD98 CP9 =$40 0914 OD98 CPIO =$48 0915 OD98 CPII =$50 0916 OD98 CP12 =$58 0917 OD98 CP13 =$60 0918 OD98 CP14 =$68 0919 OD98 CP15 =$70 0920 OD98 CP16 ~$78 0921 OD98 CP17 -$80 0922 OD98 CP18 =$88 0923 OD98 CPI9 =$90 0924 OD98 CP20 =$98 0925 OD98 CP21 =$AO
0926 OD98 CP22 =$A8 0927 OD98 CP23 =$BO
0928 OD98 CP24 =$B8 0929 OD98 87 WDFDL .BYT <CTRLI ;WD O
0930 OD99 3D .BYT <DENB ;WD I
0931 OD9A 9C .BYT <MKENB ;WD 2 0932 OD9B 9C .BYT <HNDFRI ;WD 3 0933 OD9C C2 .BYT <SEEZO
0934 OD9D C2 .BYT <SEEZI
0935 OD9E C2 .BYT <SEEZ2 0936 OD9F FC .BYT <HOLD ;WD 7 1~7-~9~3~

LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0018 LINE # LOC CODE LINE
0937 ODAO C2 .BYT <SEEZ3 0938 ODAI C2 .BYT <SEEZ4 0939 ODA2 C2 .BYT <SEEZ5 jCONVERT WD 10 0940 ODA3 9B .BYT <PRREL ; WD 1]
0941 ODA4 C2 .BYT <SEEZ6 0942 ODA5 C2 .BYT <SEEZ7 0943 ODA6 C2 .BYT <SEEZ8 ;CONVERT WD 14 0944 ODA7 Cl .BYT <FLASH ; WD 15 0945 ODA8 C2 .BYT <SEEZ9 0946 ODA9 C2 .BYT <SEEZ10 0947 ODAA C2 .BYT <SEEZll ;CONVERT WD 18 0948 ODAB C2 .BYT <HNDFR2 ; WD 19 0949 ODAC C2 .BYT <SEEZ12 0950 ODAD C2 .BYT <SEEZ13 0951 nDAE 9C .BYT <SEEZ14 0952 ODAP 71 .BYT <SEEZ15 ;PAGE WD 23 0953 ODBO C2 .BYT <SEEZ16 0954 ODBl C2 .BYT <SEEZ17 0955 ODB2 9C .BYT <SEEZ18 0956 ODB3 C2 .BYT <SEEZl9 ;CNVT / MEET ME WD 27 0957 ODB4 C2 .BYT <SEEZ20 0958 ODB5 C2 .BYT <SEEZ21 0959 ODB6 DF .BYT <SEEZ22 0960 ODB7 E7 .BYT <SEEZ23 ; WORD 31 0961 ODB8 04 WDFDU .BYT >CTRLl-8; WD O
0962 ODB9 03 .BYT >DENB-8 ; WD 1 0963 ODBA 01 .BYT >MRENB-8; WD 2 0964 ODBB 11 .BYT >HNDFRl-8+CP3 ; WD 3 0965 ODBC 21 .BYT >SEEZO-8+CP5 0966 ODBD 31 .BYT >SEEZl-8+CP7 0967 ODBE ~1 .BYT >SEEZ2-8 0968 ODBF 2A .BYT >HOLD-8+CP6; WD7 0969 ODCO 39 .BYT >SEEZ3-8+CP8 0970 ODCI 49 .BYT ~SEEZ4-8+CP10 0971 ODC2 01 .BYT >SEEZ5-8; CONVERT WD 10 0972 ODC3 42 .BYT >PRREL-8+CP9 ; WD 11 0973 ODC4 51 .BYT >SEEZ6-8+CPll 0974 ODC5 61 .BYT >SEEZ7-8+CP13 0975 ODC6 01 .BYT >SEEZ8-8 ; CONVERT WD 14 0976 ODC7 5C .BYT >FLASH-8+CP12 ; WD 15 0977 ODC8 69 .BYT >SEEZ9-8+CP14 0978 ODC9 81 .BYT >SEEZ10-8+CP17 0979 OD~A 01 .BYT >SEEZll-8 ; CONVERT WD 18 0980 ODCB 73 .BYT >HNDFR2-8+CP15 ; WD 19 0981 ODCC 89 .BYT >SEEZ12-8+CP18 0982 ODCD 69 .BYT >SEEZ13-8+CP14 0983 ODCE 79 .BYT >SEEZ14-8+CP16 0984 ODCF 95 .BYT >SEEZ15-8+CPl9 ; PAGE WD 23 0985 ODDO 01 .BYT >SEEZ16-8+CPl 0986 ODDl 89 .BYT >SEEZ17-8+CP18 0987 ODD2 Bl .BYT >SEEZ18-8+CP23 0988 ODD3 09 .BYT >SEEZ19-8+CP2 ; CNVT / MEET ME WD 27 0989 ODD4 19 .BYT >SEEZ20-8+CP4 0990 ODD5 Al .BYT >SEEZ21-8+CP21 0991 ODD6 2B .BYT >SEEZ22-8+CP6 1~7, ~
LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0019 LINE # LOC CODE LINE
0992 ODD7 04 .BYT >SEEZ23-8 ; WORD 31 0993 ODD8 BD B8 OD WSRF LDA WDFDU,X ;FETCH UPPER ADD. BYTE
0994 ODDB 85 2E STA MUX ;SAVE CP. CODE
0995 ODDD 29 07 AND #$7 ;MASK OUT ADDRESS DATA
0996 ODDF 09 08 ORA #$8 ;SET ADDRESS BIT All 0997 ODEl 48 PHA ;SET UPPER VECTOR
0998 ODE2 BD 98 OD LDA WDFDL,X ;FETCH LOWER ADDRESS BYTE0999 ODE5 48 PHA ;SET LOWER VECTOR

1001 ODE7 .FILE LBPORT/l 1002 ODE7 BPTRAM - $01 1003 ODE7 TEMP - $00 1004 ODE7 WDO '$0006 1006 ODE9 29 30 AND #$30 1007 ODEB FO 37 BEQ IDI ;TEST HL SEIZE BIT

1009 ODEF 29 IC AND #$1C ;TEST LINK BITS (STEAL,ST,RT) 1010 ODFI C9 18 CMP #$18 1015 ODFA C9 10 CMP #$10 1019 OE02 A9 00 BPI LDA #$00 1022 OE07 C9 04 FIND CMP #$04 ;IS IT STEAL?
1023 OEO9 FO IC BEQ STEAL ;YES, DO STEAL ROUTINE
1024 OEOB C9 14 CM #$14 ;IS IT RING?
1025 OEOD FO 33 BEQ RT ;YES, DO RT ROUTINE
1026 OEOF C9 IC CMP #$1C ;IS IT H.F. CALL?
1027 OElI FO 17 BEQ ST ; DO SPLASH TONE ROUTINE
1028 OE13 A5 01 IDLE LDA BPTRAM ;GET CONTROL WORD (WDO) 1029 OE15 29 08 AND #$08 ;TEST HF SERVICE BIT
1030 OE17 FO OB BEQ IDI ;IF NOT SET CONT.

1032 OEIB 29 C7 AND #$C7 ;CLEAR B LINK CONTROL BITS
1033 OEID 85 01 STA BPTRAM ;RESET SERVICE BIT

1036 OE22 66 19 ROR WDI9 ;HF LED OFF

1039 OE2A A5 01 ST LDA BPTRAM ;IF NONE OF THE ABOVE IT IS ST
1040 OE2C 29 08 AND #$08 ;SET ST SERVIOE BIT
1041 OE2E DO F4 BNE IDI ;SERVICE BIT SET RETURN

1043 OE32 09 08 ORA #$08 1044 OE34 85 01 STA BPTRAM ;SET SERVICE BIT
1045 OE36 A9 04 LDA #$4 1~77~

LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0020 LINE # LOC CODE LINE

1049 OE3E 66 19 ROR WD 19 ;TURN ON HF LED
1050 OE40 30 23 BMI BPORTI ;BRANCH ALWAYS

1052 OE44 29 10 AND #$10 1053 OE46 DO OB BNE RTI ;BRANCH IF SERVICE BIT SET

1056 OE4D 09 10 ORA #$10 ]057 OE4F 85 01 STA BPTRAM ;SET RT SERVICE BIT
1058 OE51 DO 12 BNE BPORTI ;BRANCH ALWAYS

1060 OE55 29 10 AND #$10 106] OE57 DO OC BNE BPORTI ;OFHR THAN CONT.
1062 OE59 20 39 OF JSR RINGRS ;RESET RT ENA

1064 OE5E 09 04 ORA #$04 1066 OE62 20 Cl OF JSR SPPI
1067 OE65 ;***********************
1068 OE65 AO 07 BPORTI LDY #$07 ;SET FUNMUX CYCLE CTR
1069 OE67 A9 FF LDA #$FF

1071 OE6B A5 CO LDA PT22B ;TOGGLE FUNMUX SELECT
1072 OE6D 29 7F AND #$7F

1075 OE72 A5 82 BPT3 LDA PT32B ;READ ONE FUNMUX BIT

1077 OE 75 26 02 ROL FUNMUX ;SHIFT RESULTS INTO FUNMUX

1080 OE7A C6 Cl DEC PT22A
1081 OE7C DO F4 BNE BPT3 ;BRANCH ALWAYS

1083 OE7F 09 80 ORA #$80 ;RESTORE PT22B

1085 OE83 A5 82 LDA PT32B ;READ CONF KEY SELECT
1086 OE85 A8 TAY ;SAVE HL SEIZE BIT
1087 OE86 29 04 AND #$4 1091 OE8C 29 10 AND #$10 ;ISOLATE HF ENABLE

1094 OE91 29 EF AND #$EF

]096 OE94 FO 02 BEQ BPT5 ;MOVE CONF STRAP TO FUNMUX
1097 OE96 09 10 ORA #$10 1099 OE9A 98 TYA ;GET PT32B
1100 OE9B 29 20 AND ~$20 ;TEST HL SEIZE BIT

~.~

1~77~

LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0021 LINE # LOC CODE LINE

1103 OEAl A8 TAY

1105 OEA5 FO 48 BEQ BPTl 1106 OEA7 C9 07 CMP #$07 1109 OEAD A5 19 TSPUEN LDA KYHFRE ;TEST SPV LAMP

1111 OEBI 20 04 OF JSR SCONTl ;CONTI-I
1112 OEB4 4C 11 OF JMP SCONT2 ;CONT2-1 1114 OEB9 C9 07 CMP #$07 1116 OEBD 20 04 OF JSR SCONTI ;CONTI'I
1117 OECO 20 2B OF JSR CCONT2 ;CONT2-0 1120 OEC7 26 19 ROL KYHFRE ;HANDS FREE LED OFF

1124 OECE 29 38 AND #$38 ;CLEAR BPORT RAM

1126 OED2 A5 CO LDA PT22B ;CLEAR LINK B ENAB
1127 OED4 29 FD AND #$FD

1130 OEDB 20 OA OF BPT2 JSR CCONTI ;CONTleO
1131 OEDE 20 2B OF JSR CCONT2 ;CONT2'0 1133 OEE4 20 2B OF SPUOFF JSR CCONT2 ;CONT2-0 1135 OEE9 29 10 AND #$10 ;TEST OFF HOOK BIT
1136 OEEB FO lD BEQ CCONTl ;FOR FAST FLASH USE OFFHK
1137 OEED DO 15 BNE SCONTI ;TURN LED OFF IF HANSET AND SP
ON HK
1138 OEEF 98 BPTl TYA
1139 OEFO 09 04 ORA #$4 ;SET SERVI OE D BIT

1141 OEF4 A9 02 LDA #$2 ;SET HL ENAB.

1143 OEF9 20 DF OF JSR LTON ;TURN ON HANDS FREE LED

1145 OEFF A5 02 OFFHK LDA FUNMUX ;CONTI~O
1146 OFOI 4A LSR A ;TEST SLOW FLASH BIT
1147 OF02 DO 06 BNE CCONTI ;LED ON

1150 OF04 ; BPORT SUBROUTINES

1152 OF04 A5 CO SCONTI LDA PT22B ;SET DO
1153 OF06 09 01 ORA #$]

1155 OFOA A5 CO CCONTI LDA PT22B ;CLEAR DO
1156 OFOC 29 FE AND #$FE

~.~

1~l77~
LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0022 LINE # LOC CODE LINE

]158 OF10 60 WAIT RTS
1159 OFlI AO 02 SCONT2 LDY #$2 ;POINT TO CONT2 1160 OP13 20 B6 09 SCONT JSR SDL ;SET D-l 1161 OF16 84 00 CONT STY TEMP ;ENTRY POINT FOR FUNMUX WRITE
1162 OF18 A5 Cl LDA PT22A ;ADDRESS FUNNUX
1163 OFlA 29 F8 AND #$F8 1165 OFIE 85 Cl STA PT22A
1166 OF20 A5 CO LDA PT22B ;STROBE WES4 NOT
1167 OF22 49 10 EOR #$10 1169 OF26 49 10 EOR #$10 1172 OF2B AO 02 CCONT2 LDY #$2 ;POINT TO CONT2 1173 OF2D 20 BC 09 CCONT JSR CDL ;CLEAR D

1176 OF35 09 04 ORA #$04 1177 OF37 DO 04 BNE RING ;BRANCH ALWAYS

1179 OF3B 29 FB AND #$FB

1182 OF40 .FILE SUPR/I
1183 OF40 ; SVPR- SWITCH SUB FOR HF,HS ~ BPORT
1184 OF40 ;~ =5~ =-=e~ e=~

1187 OF40 EA . SHSH NOP

1189 OF43 29 03 AND #$03 1193 OF4A C9 02 CMP #$02 1195 OF4E C9 07 CMP #$07 1197 OF52 C9 03 CMP #$03 1199 OF56 C9 OF CMP #$0F

1201 OF5A C9 13 CMP #$13 1203 OF5E C9 IF CMP #$1F

1205 OF62 C9 17 CMP #$17 1207 OF66 C9 IB CMP #$1B

1209 OF6A C9 OA CMP #$0A

1211 OF6E C9 12 CMP #$12 ~7~9~31 LARGE SYSTEM 2/28/79 BELOW 2K!... PAGE 0023 LINE # LOC CODE LINE
12]2 OF70 FO lC BEQ 012 1213 OF72 C9 11 CMP #$11 1215 OF76 C9 01 CMP #$01 1217 OF7A C9 IA CMP #$1A

1219 OF7E C9 05 CMP #$05 1221 OF82 C9 15 CMP #$15 ]233 OF9E 20 D9 OF OIB JSR LTOFF

1244 OFBB;************************************

1246 OFBD 09 08 ORA #$08 1253 OFC9 29 F7 AND #$F7 1256 OFCF 29 F7 AND #$F7 1~7~9~1 LARGE SYSTEM 2/28/79 BELOW 2KI... PAGE 0024 LINE # LOC CODE LINE

1270 OFE5 A9 04 OFK LDA #$04 1272 OFE9 A9 FB ONHK LDA #$FB

1274 OFEE A9 40 RELRQ LDA #$40 1281 OFFA .END LMAINL/I

ERRORS ~ 0000 <0000>

1~7 ~

SYMBOL TABLE
SYMBOL VALUE

~7~81 SYMBOL TABLE
SYMBOL VALUE

SEEZ11 O9C2 SEEZ12 O9C2 SEEZ13 09C2 SEEæ14 O99C

SYBYl 08CE SYCT1 083C SYLP1 0~86 SYLP2 08BA
SYNC 0825 SYNClA 0852 SYNC2 0858 SYNC5 0866 SYNCA 0982 TlCT OOC1 TlP5T 08AE TIT 08FO

WSRF ODD8 XREF oA87 ZROLP 0804 END OF ASSEMBLY

, 1~77~81 Referring specifically to the circuit shown in Figure 5, each line card 300 includes a single passive port which is connected to one active port of each of a variable number of station cards 200 in the system of Figure 1, and also to an active port in each of the link cards in the system of Figure

2. The passive port receives DC signal currents from the conn-ected active ports through the shunt resistor 304 and through the DC signal current-receiving winding of transformer 302, and current sensing circuits 306 generate either a SEIZE, FLASH, or HOLD/PRRL (privacy release~ signals depending upon whether the DC signal current is 1.6ma, 6.4ma, or 7-14ma. The SEIZE signal causes the seize relay control circuit 310 to energize the winding of seize relay 312, causing the ga~ged armatures to disconnect from load resistor 314 and establish connections to the tip T and ring R of the CO line. The SEIZE
signal simultaneously triggers timer circuit 319 which activ-ates a clamping circuit 321 for about 1 second in order to limit the noise and ringing signal coming in from the CO line. With the line seized, dialing may be accomplished at the station set by either dual-tone, multi-frequency tDTMF) signal generators or by an outpulse generator. DTMF dial signals are transmitted through transformer 302, music-on-hold interface circuit 322, bi-directional amplifier 320, transformer 318, and seize relay 312 to the CO line. Outpulse dialing is accomplished by pulse-modulating the SEIZE signal so as to cause the seize relay 312 to modulate the loop current as a function of the pulses gener-ated at the station set.

The SEIZE signal is also fed to the voltage sender 324, which responds by generating a DC signal voltage (-2v.) indi-cating seizure of the line card passive port. If the seized COline is put on hold by transmission of a 14 ma DC current pulse 1~779~31 from the seizing port, a current sensing circuit 306 generates a HOLD signal pulse which causes hold condition sensing circuit 308 to generate a constant output which activates the MOH
interface circuit 322 to pass the MOH SOURCE signal received via the tone card 500 to the held CO line. Because the analog crosspoint in the previously seizing active port is now open, no signal current will flow to current sensing circuits 306, and the MOH SOURCE will not be heard at the associated station set. The output of the hold condition sensing circuit 308 is also fed to an input of AND gate 332, which receives a second input from inverter 328 in response to the termination of the SEIZE signal, and a third input F-FLASH which is received from the tone card 500. The output of AND gate 332 consequently fluctuates in synchronism with the F-FLASH SIGNAL, as does the output of voltage sender 324, thereby signalling the digital crosspoints of every connected active port that the CO line is on hold and may be seized by any connected active port. A
PRRL signal pulse from one of the current sensing circuits 306 in response to a 7-14ma DC signal current pulse from the seizing active port will cause hold condition sensing circuit 308 to generate a constant output, so that the ~OH interface circuit 322 will be activated and one input will be provided to AND
circuit 332. The SEIZE signal is simultaneously terminated by de-activation of the DC current signal generator in the seizing active port, causing inverter 328 to provide another input to AND circuit 332. Thus, voltage sender 324 ceases to generate a seized voltage signal (-2v.) and begins to generate an output which fluctuates between Ov. and -2v. at the F-FLASH rate.
Therefore, other station sets 190 in the system are informed 0 that they may also make connection to the CO line.

1~7~7~

When a FLASH signal is generated by one of current sensing circuits 306 in response to a flash DC current signal (6.4 ma), the flash switch control circuit 326 responds by de-activating seize relay control circuit 310 for about 1 second, thereby breaking the connection of seize relay 312 to the CO line for that period of time. The SEIZE signa]. is not interrupted, however. Thus, loop current is broken to dis-connect the outside party's circuit from the CO line while retaining the line for another call. If the EKTS is employed behind a PBX which requires it, this line card circuit is modified by breaking the controlling connection from flash switch control circuit 326 to the seize relay control circuit 310, and by adding a relay 316 which has its armature con-nected directly to the upper armature of seize relay 312. In this revised circuit, the generation of the FLASH signal will not affect the seize relay control circuit 310, leaving the seize relay 312 energized to connect transformer 318 to the PBX line, but the flash switch control circuit 326 will cause relay 316 to connect the conductor T to circuit ground during FLASH. As in the first embodiment of this circuit, the SEIZE
signal is not terminated. ~hus, loop current is broken to disconnect the other party's circuit from the PBX line while retaining the line in order to place another call.
In the case of an incoming call, the ringing signal from the central office will cause ring detection circuit 328 to activate incoming ring indicator circuit 330, which then generates an INCOMING CALL ENABLE signal ~hich is fed to tone card 500, and a logic 1 input signal to AND gate 330. Since there i~ no SEIZE signal, the output of inverter 328 is also logic 1. Thus, the S-FLASH signal will pass through AN~ gate 330 to modulate the output of voltage sender 324 to provide an i~77981 indication of the incoming call to the digital crosspoints of the connected active ports, any one of which may seize the passive port of the line card circuit and thereby seize the associated CO line.

Referring specifically to the circuit shown in Figure 6, tone generator card 500 comprises a 64 hz osclllator circuit 502 which provides a square wave to the countdown combiner and driver circuits 504, and these in turn generate a Q-FLASH
(I-hold) signal, an F-FLASH (hold) signal, and an S-FLASH
(incoming call) signal. The Q-FLASH and S-FLASH signals are fed to the function multiplexer 230 of station card circuit 200 (Figure 3) to be sampled, the samples being serially trans-mitted to microcomputer 216 for possible inclusion in the data transmitted to the associated station set 100. The S-FLASH
and F-FLASH signals are fed to line card 300. The countdown combiner and driver circuits 504 also provide driver signals to the driver circuits 506, 508, 510 and 512, which also receive the output of combiner circuit 514, which mixes the outputs of the 400 hz oscillator circuit 516 and the 470 hz oscillator circuit 518. These oscillator outputs are also fed to driver circuits 520 and 522, respectively, which ~enerate DIAL TONE
and SPLASH TONE, respectively. DIAL TONE is fed only to the register card circuit(s) 800, and SPLASH TONE is fed only to the station cards 200.

Driver circuit 506 produces CO AUDIBLE tone at the rate of 1 second on, 1 second off, 1 second on, 3 seconds off, and is fed to the station cards 200 and page card 400. Driver circuit 508 produces ICM RING TONE at two isolated outputs at the rate of 1 second on, 3 seconds off, and is fed only to the station cards 200. Driver circuit 510 produces BUSY TONE at the rate ~ ~ 77~

of 0.5 second on, 0.5 second off, and is fed only to the link card circuit(s) 70~. Driver circuit 512 produces REORDER TONE
at the rate of 0.125 second on, 0.125 second off. The outputs of driver circuits508, 510, 512 and 520 are all employed in internal link functions, and may be eliminated in a system which has no link circuits 700.

The split ringing and gating circuit 524 receives the INCO~ING CALL ENABLE signals which the line cards 300 generate when an incoming call is detected, and in response generates several CO AUDIBLE ENABLE signals, any one or more of which can be transmitted through backplane wiring to any station card 200 or group of station cards 200. For example, if an INCOMING
CALL ENABLE signal is received from line card 1, 2 or 3, a CO
AUDIBLE ENABLE signal is sent from output COEGPA via the back-plane to a predetermined group of station cards 200. The following outputs COEGPB, C, D, E, F and G are similarly assoc-iated with line cards 4-6, 7-9, 10-12, 13-15, 16-18 and 19-21, respectively. Output COE 1-14 is associated with line cards 1-14, and a CO AUDIBLE ENABLE signal will be provided via the backplane to all of the station cards 200 connected to this output. Output COE 15-18/19 is slmilarly associated with line cards 15-18/19, and COE 15-19/21 is similarly associated with line cards 15-19/21. This arrangement provides great flexi-bility in the distribution of the CO AUDIBLE tone, e.g., en-abling direct signalling to predetermined small groups of station sets behind PB~ that there is an incoming call from one of a small group of CO lines, and facilitating the pre-vention of such direct signalling on those incoming calls that are received at an attendant's station for forwarding to the called party.

~ 7 ~ ~1 A station set 100 designated by backplane wiring controls the night ring control circuit 526. As in all station sets, the BGM ENABLE signal is generated in response to turn-on of the BGM control switch. Due to the connection of the BGM ENABLE signal output from the station card 200 associated with the designated station set 100 to the night ring control circuit 526, turn-on of the BGM control switch at the station set enables generation of the NR ENABLE signal upon receipt of a logic level signal from the split ringing and gating circuit 524 in response to any INCOMING CALL ENABLE signal. The NR
ENABLE signal is fed to page card 400 to broadcast CO AUDIBLE
TONE as an all-page transmission. The optional MOH interface circuit 528 distributes the MOH SOURCE signal to all line cards selected to receive it through the backplane wiring. The optional BGM interface circuit 530 distributes the BG~ S~URCE
signal to all station sets selected to receive it through the backplane wiring, except when it receives a BG~ DISABLE signal from the page card 400.

Referring specifically to Figure 7, the link card circuit shown there includes a single passive port and multiple active ports. The passive port comprises current detector cir-cuit 702, which includes a DC current signal blocking trans-former in the ANALOG LINK path and is constructed in a manner similar to the current detector circuit in hotline B-port 238 in station card 200 (Figure 4). The sensed DC signal current from aD active port of a seizing station card 200 will cause the current detector 702 to generate an output voltage which is fed tG a series of voltage comparators 722, 724, 726, and 728 which will be successively trig~ered in response to sensed DC
signal currents of 1.6 ma, 3.2 ma, 6.4 ma, and a 14 ma pulse (50 milliseconds), respectively, which cause the voltage output 1.~'7~9~1 of current sensor 702 to increase to successively higher levels. In response to a DC signal current indicating seizure (1.6 ma) received from a station card active port on the ANALOG
LINK input to current sensor 702, a LINK DXP DC voltage signal (-2v.) will be generated by comparator 722 and sent to all station cards 200 which are also connected to the ANALOG LINK in-put to current sensor 702. Simultaneously, comparator 722 applies a SEIZE signal to request logic circuit 744, which in turn generates a LINK REQUEST signal which is sent to the register card(s) 600. If the register or registers are in use, no LINK
CONNECT signal will be returned. In a system with more than one register card 600, only one can be in the ready status, and the other(s) will all be either in use, i.e., connected to a link circuit 700, or in standby status. The ready register becomes connected in response to the LINK REQUEST signal, and sends a LINK CONNECT signal to connect logic circuit 742, and a LINK DATA ENABLE signal and a LOAD ADDRESS signal to AND
gate 740, which responds by enabling the tens latches 748 and the units latches 752. The connecting register will then send back an 8-bit address, four bits to tens latches 748 and four bits to units latches 752, representing either a decimal 98 or 99 which identifies the connected register (in a two-register system) to which a register crosspoint REG 1 or REG 2 is tQ be closed. The binary-to-decimal converter circuits 712 and 714 decode the binary outputs of level shifters 750 and 74~, re-spectively, so that B/D converter 714 provides an input to AND logic circuit 710 representative of the first register-identifying digit (9) and B/D converter 712 provides an input to AND logic circuit 710 representative of the second register-identifying digit (8 or 9). These two inputs will cause A~Dlogic circuit 710 to generate either a REG 1 GATE signal or a REG 2 GATE signal to close ~ither the REG 1 crosspoint to a 1~7~79~1 first register or the REG 2 crosspoint to a second register.
Dial tone is now passed from tone card 500 via the connected register 600 through the closed REG crosspoint and over the ANALOG LINK BYPASS to indicate to the caller that he may now send dial signals to identify that passive port which he wishes to seize. Either DTMF or outpulse dial signals will be trans-mitted via the ANALOG LINK BYPASS around current sensor 702, and current sender 704 through the closed REG crosspoint to the connected register 600, which decodes the dial signals, puts them in binary form, and decides whether or not the number is valid. If the number is not valid, e.g., there is no passive port to which the dialed number has been assigned, the REORDER
TONE irom tone card 500 is sent via the connected register 600 over the ANALOG LINK path through a designated internal cross-point 706, which is closed in response to a reorder crosspoint address (97) sent by the register 600 to the latches 748, 752, which have been re-enabled by AND gate 740 to receive the re-order crosspoint address, which replaces the invalid address.
This new address displaces the register-identifying address (97 or 98) and thereby causes the REG crosspoint to the register to re-open. Also, a REORDER signal is sent to start kick-off log~c circuit 716, which generates a 20 millisecond pulse si~-nal TKO after a predetermined period of time (e.g., about 8 seconds), in response to which the current detection circuit 702 causes the LINK DXP output of comparator 722 to go to +2v.
ior 20 milliseconds, which causes the seizing active port to cease transmission of its DC seize current signal. As a result, the LINK DXP signal goes to +2v. to indicate that the link is idle, and the SEIZE signal to request logic circuit 744 is ter-minated, causing termination of the LINK REQUEST signal. Thecaller may release and reseize the link before kick-off occurs.

1~7~g~1 If the called number is valid, the register 60~ gener-ates a LOAD ~ODE signal in addition to the previously-generated LINK DATA ENABLE and LOAD ADDRESS signals to cause AND gate 738 to enable the mode latches 736 and the current mode latches 754.
The register is preferably designed to recognize the following number groups as valid and to issue the oppositely-listed current mode signals and address data:

Current Called Numbers Mode Signal Link_Data lOs Link Data Uni~
10 30 -89 decimal O binary 3-8 binary 0-9 130 -189 decimal 1 binary 3-8 binary 0-9 230 -289 decimal 2 binary 3-8 binary 0-9 917 - 930 decimal 9 binary 1-3 binary 0-9 991- 996 decimal 9 binary 9 binary 1-6 Thus, a dialled number 56 will cause a logic level signal rep-rese~tative of a decimal O generated in the register to be sent by the register to the first input to the current mode latches 754 via the first link data units line, thereby providing a SEIZE signal to mode control circuit 730. The absence of a pre-fix number indicates that an internal call is being made and canbe answered handsfree. The first address digit is a binary-coded 5 which is fed to tens latches 748, and the second address digit is a binary-coded 6 which is fed to the units latches 752. As another example, a dialled number 148 will cause the register to send a logic level signal representative of a decimal l generated in the register to the second input to the current mode latches 754 via the second link data units line, thereby providing an ICM RING signal to mode control circuit 730. The prefix number l indicates that an internal call is being made and must be answered via the called party's handset.
The first and second address digits are a binary-coded 4 and binary-coded 8, which are fed to the tens latches 748 and units latches 752, respectively. A third example is the case of a dialled number 265, which will cause the register to send a logic level signal representative of a decimal 2 generated in the register to the third input to the current mode latches 754 via the third link data units line, thereby providing a STEAL signal to mode control circuit 730. The prefix number 2 indicates that the caller is effecting a "call steal", i.e.
answering a call that is coming in at another station set, some-times referred to as alternate-point answering. In this case, the address data (binary-coded 6 and binary-coded 5) identifies the station set to which the incoming call is directed. The pre-fix number 9, when dialled before the numbers 17 through 30, in-dicates that the caller wishes to seize a CO line through one of the active ports comprising the paired CO crosspoints labelled LINES 17-30 ANLG and LINES 17-30 DXP, and causes the register to send a logic level signal representative of a decimal 9 ~enerated in the register to the fourth input to the current mode latches 754 via the fourth link data units line, causing a CO signal to be sent to mode control circult 730. The prefix 9, when dialled before the numbers 91 through 96, indicates that the caller wishes to seize oDe of the passive ports in the page card 400 via one of the group of active ports comprising the sin-gle line internal crosspoints 706 labelled PAGE 1, 2, 3, 4 and 5 and ALL PAGE. As before, the register sends a logic level signal representative of a decimal 9 generated in the register to the fourth input to the current mqde latches 754, which in turn provide a PAGE signal to mode control circuit 730. There may also be a special single-digit number such as 0 which is frequently dialled, e.g., to reach the operator at an attended station iD the system. The register(s) will interpret the 0 as requesting transmission of a two-digit address (90) which ~.~ 779~il1 will cause the link to close the internal crosspoint labelled OPR to the operator's station.

The mode latches 736 receive a single input signal pulse from the register at their second input simultaneously with the logic level input to current mode latches 754, causing a constant, inverted output ~ to be fed to called station response timer 734 which in turn activates busy test logic circuit 732 for a predetermined period of time (e.g., 2.5 seconds). During this time period, if no CALL BUSY signal is received from the DXP detection circuit 718, busy test logic circuit 732 will generate no output, but at the end of the time period it will generate a CSSE (called station send enable) signal, thus enabling current sender (mode) control logic circuit 730 to generate a control voltage output to current sender 704. Then, in response to inputs either from the voltage comparators 724, 726 or 728 or from current mode latclles 754, mode control logic circuit 730 will alter its normal DC output (+8v.). In response to a logic level SEIZE, IC~I RING, CO/PAGE
or STEAL input signal from current mode lat~bes 754, mode control logic circuit 730 will generate a DC voltage output of +7.2v., +6.5v., +7.2v., or +6.5v., respectively, which will in turn cause current sender 704 to generate a DC output current of 1.6 ma, 3.2 ma, 1.6 ma, or 3.2 ma, respectively, which is trans-mitted via a closed crosspoint in arrays 706, 708 to the passive port to be seized. If the passive port is in the page card 400, or is the link B-port 240 of a station card 200, the DC voltage signal indicating seizure (-2v.) or, in the case of the station card, pre-emptive seizure (-4v.), will be sent back to the link 700 over the single conductor on which the DC signal current effecting sei~ure Sl.6 ma) is sent to the page card or link B-port, and will pass through the closed crosspoint (one of the ~17'Y~i group from PAGE 1, 2, 3, 4, 5, ALL PAGE, and STA 30 through STA ~9) on the STA COMNON DRAIN conductor to DXP detection circuit 718 during the time period in which the busy test logic circuit 732 is activated. In response to either -2v. or -4v., which indicate a seized or pre-emptively seized passive port, respectively, the CALL BUSY signal will be generated by the DXP
detection circuit 718, in response to which the reset logic circuit 720 clears the address latches 748, 752 and the busy test logic circuit 732 generates a BUSY TONE ENABLE signal,w'lich starts the kick-off logic circuit 716 and is fed as an input to AND logic circuit 710. The address latches 748, 752 now hold the 00 address, which is the address of the BUSY TONE crosspoint.
In response to this address and the BUSY TONE ENABLE signal,the AND logic circuit closes the BUSY TONE crosspoint to pass the busy signal from the tone card via the ANALOG LINK path to the caller's station card 200 and thence to associated station set 100. The caller must then either release the link before gen-eration of a TKO signal pulse and then reseize it or another link, or he will be kicked off the link upon generation of the TKO signal by logic circuit 716. Upon either release or kick-off, the SEIZE signal to request and connect logic circuits 744 and 742 will be terminated, causing initiation of the LINK RE-SET signal to reset logic circuit 720, which responds by issuing both MODE REG RESET and ADDR REG RESET signals to latches 736, 754 and 748, 752 respectively. The address latches 748, 752 have already been cleared in response to the CALL BUSY signal to the reset logic circuit 720.

If a line card 300 is seized through a pair of cross-points 708, e.g., the pair labelled LINE 17 ANLG ~nd LINE 17 DXP, the DC voltage signal from the line card passive port is received via the latter (DXP) crosspoint and fed via the COM~
DRAIN LINE DPX connected from all the drain electrodes of the 1~779~1 digital crosspoints labelled LINES 17-30 DXP to the DXP detec-tion circuit 718, which responds in the same manner as it does to the DC voltage signals received from the link B-port of a st`tion card over the STA COM~O~ DRAIN conductor, as previously described.

If the passive port seized by link 700 is in a line card 300, it is possible for the calling party to effect multi-line conferencing (seizing of a second line card 300), flash signal-ling (breaking loop current long enough to drop the called party while retaining the line), placing the called party on hold, and privacy release,all in response to DC current signals to the current detector 702 which will respond thereto ~y gen-erating a voltage output to voltage comparators 724, 726 and 728 as described earlier herein. 1hose voltage comparators provide their outputs to mode control logic circuit 730, which responds when enabled by the CSSE signal to cause current sender 704 to generate a DC signal current at the same level as the DC
signal current received by current detector 702.

Upon termination of a completed call, internal or external, the calling party's station card 200 ceases to send DC signal current to the link 700, causing the output of current sensor to drop below the triggering threshold of voltage comparator 722. Thus the LINK DXP signal goes to +2v., indicating that the link is again seizable, and the SEIZE signalt~ request logic circuit 744 is terminated. The register has previously been disconnected in response to signal T2 from mode latches 736, which overrides the SEIZE signal from comparator 722.
The LINK RESET signal is now generated to cause reset logic circuit 720 to generate MODE REG RESET and ADDR REG RESET to clear all of the latches 736, 748, 752, and 754.

1~ 7 7 ~ ~

Referring specifically to Figure 8, the register cir-cuit 600 shown there may be connected to any number of link circuits 700, e.g., four, as shown, any one of which can send a LINK REQUEST signal to link search circuit 628, which responds to that signal by sending a CO~ON LINK REQUEST signal to reg-ister control timing circuit 626. If it is not in the ready status, circuit 626 will not send SEARCH PULSES, which have the same width (2 milliseconds) and frequency (250 hz) as the output of clock generator 610, to circuit 628, and the register's tri-state buffers 630, 632, 63~ and 636 will not be enabled to pass data to the link. If it is in the ready status, circuit 626 will send SEARCH PULSES to the link search circuit 628, which responds by sending a constant logic level ENABLE signal to tri-state buffer 630 and by transmitting a logic level LI~K
CONNECT signal to the specific link identified by the data out-put from link search circuit 628 to the buffer 630. A LINK
FOUND signal is also sent to timing circuit 626, which responds by sending an ENABLE signal to tri-state buffers 632, 634 and 636. Buffer 632 then provides a logic level LINK DATA ENABLE
signal to the specific link identified by the data output from link search circuit 628, and buffer 634 sends a LOAD ADDR signal to all the link clrcuits in the system. to which its two outputs are commonly connected. Timing circuit 626 then sends a SEND
REG ADDR signal to output logic circuit 622, causing it to feed the register's stored two-digit address, (97 or 98) to the - output tri-state buffer 636, the first digit being sent in four-bit binary code to the link data tens inputs, and the second digit being sent in the same code to the link data units inputs.

The timing circuit 626 then sends the SEND REG MODE signal to output logic 622 and subsequently terminates the ENABLE signal to buffers 632, 634 and 636 and seDds (1) the DIAL TONE &

1.~7 7 g ~

DIALING signal to the register reset and time-out circuit 606 to enable it to generate an output and ~2) the inverse of that signal to LED 642 to energize it. ~eanwhile, the link 700 closes the REG crosspoint, through which its ANALOG L~NK BYPASS
conductor is connected to the analog decoupling and current de-tect circuit 602, which normally receives the DIAL TONE ENABLE
signal from register reset and time out circuit 606, and con-sequently allows its DIAL T~NE input ~rom tone card 500 to pass through the link 700 to the seizing station card 200 and its associated station set 100. Dial signals may now be received by the register 600 from the station set 100 via the station card 200 and link card 700. Both dual-tone multi-frequency (DTMF) dial signals and dial pulse train signals are received by analog decoupling and current detection circuit 602, which incorporates a transformer with one winding connected to the link circuit(s3 700 in the system, and the other winding conn-ected to the tone filtering and decoding circuit 612. The current detector may be constructed in a manner similar to the current detector in the hotline B-port of station card 200 (Figure 4). DTMF signals are converted into four-bit binary toDe data by the decoder ~12, and th~t data is ied to an up counter 614 which, in response to a PRESET 6ignal generated by control logic 608 in response to the TDV (Tone Data Valid) signal from decoder 612, is enabled to hold each dialed digit for trans-mission to the binary-to-decimal decoder 616 in the same sequence in which the binary-coded digits were received. The digit assign-ment control logic 608 is normally in a waiting state, and is enabled either by the TDV signal from decoder 612 when DTMF
dial signals are received, or by the B signal (inter-digit - 30 time signal) from outpulse filter 604 when dial pulse train signals are received. Then, the logic circuit 608, under i~ ~ 7 ~

the timing control of clock 610, causes the first digit to be received by the B/D decoder 616 from counter 614. While it is held in the B/D decoder 616, the first digit is tested for val-idity by the control logic 608. If the first digit is a 0, 1, 2 or 9 (prefix code numbers), it is not passed to invalid dial-ing trap circuit 620, but is held in function latch 618. If the first digit is not a 0, 1, 2 or 9, it is passed to trap circuit 620 in the form of a logic level signal on one of ten conductors representing decimal numbers 0 through 9 in response to a control logic 608 signal to trap circuit 620, which in turn generates the SEND REORDER ADDR to output logic 622. This command is executed by sending the reorder address (97) stored in hardwired memory 624 through buffer 636, which has again received an ENABLE signal from control timer 626 in response to the SEND REORDER ADDRESS signal, to the link address latches 748, 752 in response to the SEND MODE and SEND ADDR signals sent in sequence to the output logic 622. The control timer then resets itself, and sends the RESET IDLE signal to link search circuit .628. As the control timer 626 goes through these steps, it causes status indicator LED 644 to be momen-tarily energized, followed by constant energization of LED 638 until the register status is changed by data received from another register in the system.

The control logic 608 will cause each digit in a dialed number to be passed in sequence to B/D decoder 616 for validity testing, and the sequence of events described above will be carried out in response to any invalid digit.

If the dialingnumber is valid, trap 620 sends a DIALING
DONE signal to register control timing circuit 626, which responds by again sending an ENABLE signal to buffers 632, 634 and 636, and then providing the SEND MODE signal to output 1.~779~1 logic 622 to cause transmission of the logic level output repre-sentative of a 0, 1, 2 or 9 from function latch 618 via the appropriate one of the link data units paths through buffer 636 to the connected links' inputs to current mode latches 754.
Simultaneously, a pulse is sent by output logic 622 via a pre-determined link data tone path through buffer 636 to the conn-ected links' inputs to mode latches 736. Register control timing circuit then transmits a SEND ADDR signal to output logic 622, causing the address held in counter 614 to be sent through output logic 622 and buffer 636 to the link address latches 748, 752. The register control timer 626 then sends a RESET IDLE
signal to link search circuit 628, which in turn terminates the ENABLE signal to buffer 630, which responds by terminating the LINK CONNECT signal to link connect logic 742.

When the dialed signals received through the link are current pulse trains, the current detector 602 generates corresponding digital logic level voltage pulses which are pas-sed through pulse filter 604 to counter 614, which counts the pulses and holds the digits represented thereby ~n four-bit binary code for transmission to the B/D decoder 616 in the same sequence in which the digits' respective pulse trains were received, and in the same manner as described above in the case of DTMF dial signals.

The pulse filter circuit 604 generates four logic level voltage outputs A, B, C and D which are fed to reset and time out circuit 606 along with the TDV (tone data valid) signal from tone decoder 612. The DIAL T~NE ENABLE signal is generated only when the A, B, D and TDV signals are logic Os and C is logic 1. Signal A is the filtered off-hook signall which goes high after receipt of the first dialed pulse and then goes low ~7~

during each pulse. Signal B is the inter-digit time signal, which is high bE~æen each pulse train and low during each pulse train. Signal C is the inverse of signal A, i.e., it is a vol- _ tage duplicate of the dialed current pulse trains. Signal D
is the on-hook terminate signal, which is a logic 0 generated when the caller's station set is on-hook, and thereby resets the register. The TDV signal is normally low, and goes high during each valid DTMF signal received. The signals A, B and TDV are all utilized to trigger reset and time-out circuit 606 after it has been enabled to issue an output by the DIAL
TONE & DIALING signal from control timer 626. Specifically, signal A triggers the timer 606 which measures the time from its receipt of the SEND REG MODE signal from control timer 626 until the receipt of the first dialed signal (DTMF or pulse trains). If this time period exceeds a predetermined maximum (e.g., 10 seconds), the circuit 606 will cause the control logic circuit 608 to send a signal to the trap circuit 620, which responds by issuing the SEND REORDER ADDR signal. The sequence of events described earlier will ensue. The B signal triggers the timer 606 which measures the period between dialed pulse trains. If that period exceeds a predetermined maximum (e.g., 10 seconds), the circuit 606 causes generatlon of the SEND REORDER ADDR in the manner described above. Signal C has only the function of combining with signals A, B, D and TDV to cause the circuit 606 to generate the DIAL TONE ENABLE signal.
Signal D also causes the termination of the SEND REORDER ADDR
signal by causing circuit 606 to terminate the signal it sent to control logic 608 in response to signal A. The TDV signal triggers the timer 606 which measures the period between the termination of each DTMF signal and the initiation of the following DTMF signal. If that period exceeds a predetermined ~ 7~

maximum (e.g., 2 seconds), the circuit 606 generation of the SEND REORDER ADDR signal as described above.

The register control timer 626 is connected to at least one other register, with which it exchanges data indicating register status. Specifically, if the register shown in the drawing is in the ready status, the SEARCH ENABLE OUT signal is present, and the S~ARCH ENABLE IN signal from the other register is absent, indicating that it is in the standby status.
The inverse is also true, i.e., if the register sho~n is in the standby status, the SEARCH ENABLE OUT signal is absent, and the SEARCH ENABLE IN signal from the other register is present, indicating that it is in the ready status. If the register shown is sending mode or address data to a link, the DATA LINK
ENABLE OUT signal is present and will prevent the other register from sending mode or address data. If the other register is sending mode or address data to a link, the DATA LINK ENABLE IN
signal is present, and will prevent the register shown in the drawing from sending mode or address data. This mutual exclu-sion feature is necessary because of the common data output connections of all registers to all links. This complete signalling arrangement causes the registers to share their workload approximately equally, since the register which is idle while the other is functioning and will handle the next link request.

Referring specifically to Figure 9, the page card circuit shown there includes five passive ports, one in each of zone 1, æone 2, zone 3 and zone 4 circuits and one in the all-call circuit. In the several zone circuits, each of which is iden-tical to the zone 1 circuit shown in detail, a DC current sig-nal-blocking transformer 402 has a shunt resistor 404 across -~77~81 one winding, both being connected to current sensor circuit 408, which is constructed in the same manner as the combination current sensor-voltage sender in the link B-port (Figure 4), and responds to a DC seize current (1.6 ma) received from an active port of a station card 200 or link card 700 to generate two voltages,one to the associated crosspoint(s) in the link card (s) 700, and another as an input to voltage sender 410, which in turn generates a DC voltage signal (-2v.) indicating seizure to all of the station cards 200 to which the output of voltage sender 410 is connected. A paging message can then be transmitted from the seizing station card 200 or link card 700 through transformer 402, volume-controlling variable resistor 406, resistor 412, normally-conductive MOSFET 414, and amplifier 416 to the group of station cards selected to form zone 1, each of which receives the paging message as the PAGE input to the B-port switching circuit 246. OR gate 422 also has received the voltage output of current sensor circuit 408 as an input which causes generation of the BG~.5 DISABLE signal, which is fed to the BGM interface circuit 530 on the tone card 500 (Figure 6) ~ 20 to interrupt the transmission of background music until the ; page card passive port is no longer seized. ln the station card 200 associated with the station set 100 ~rom which paging is initiated, the PAGE ENABLE signal to JCT FET 291 in the B-port switching circuit 246 (Figure 4) is terminated for as long as the page button is depressed in the station set 100, so as to block transmission of the paging message to the originator's station set.

When the all-call passive port is seized by a DC current signal (1.6 ma) from an active port of a station card 200, current sensor 430 ~identical to 408) generates one output voltage to the associated crosspoint in the link 700 cards, and 1~779~31 another voltage which causes generation of a DC voltage signal (-2v.) by voltage sender 432, both voltages indicating seizure of the all-call circuit to all the station cards 200 and link cards 700 to which it is connected, and also causes generation of the BGM DISABLE signal by OR gate 422. The output of voltage sender 432 is fed as an input to OR gate 440, causing it to render MOSFET 414 (and its counterparts in zone circuits 444, 446, and 448) non-conductive. Thus, an all-call page will pre-empt a page to any single zone. The all-call page message is received from the seizing station card 200 and transmitted through transformer 424, normally-conductive ~50SFET 434, and resistor 438 to all of the zone circuits, which receive and transmit the message to the station cards 200 in their respective zones, e.g.,in the zone 1 circuit through resistor 420 to the input of amplifier 416, the output of which is fed to the station cards 200 in zone 1.

When the NR ENABLE signal is received from the night ring control circuit 526 on tone card 500 (Figure 6), it is fed as an input to OR gate 440, to inverter 436, and to JCT
FET 442. Consequently, any paging message is blocked because MOSFET 414 and its counterparts are all driven non-conductive by the output of OR gate 440, and the MOSFET 434 in the all-call circuit is driven non-conductive by the output of inverter 436.
The CO AUDIBLE TONE is passed through JCT FET 442 and resistor 438 to all of the zone circuits (1~ until the incoming call is answered, thereby terminating the NR ENABLE signal as a result of termination of the INCOMING CALL ENABLE to the tone card 500 because of termination of ringing detection in the line card circuit 300, or (2) until the caller terminates the call before it is answered, thereby causing the same sequence of signal termination as in (1) above.

117~381 Referring specifically to ~igure 10, the conference card circuit 600 shown there consists of a passive port which is of essentially the same construction as the hotline B-port 238 (Figure 4), the differences being that it does not provide an outgoing communication path and, when seized, causes the DC
output of voltage comparator 618 to go from l2v. to 0v. Thus, the conference card circuit 600 acts only as a meeting point for internal conferences, i.e., it is a passive port which enables connection of all active ports which are connected to it to each other. Once this circuit is seized by a first caller, who has prevlously requested (e.g., by paging or by intercom call) several other system users whose station sets 100 and station ca~ds 200 have this feature to meet him by actuating the conference button or key in each of their station sets, the visual indicators associated with the conference buttons will be energized in response to the 0v. DC output voltage from voltage comparator 618, indicating that the con-ference card circuit is in use. Thus, anyone whose station set 100 and station card 200 has this feature, but who has not been requested to join the conference, will be aware that the con-ference card circuit is in use and that he should not use this feature. However, any such uninvited system user can ~oin in a conference, since any number of station cards 200 can seize the conference card circuit simultaneously. There is no ~ro-vision for exclusion, except by selection of the station sets 100 and station cards 200 which are to bave this feature.
The four wire arrangement used in the preferred arrange-ment of the key telephone system is illustrated in FIG. ll, which shows in block diagram form the general aspects of any four-wire path. Four conductors, 1,2 and 3,4 are shown connect-9~31 ing a station circuit 10 and a key telephone station set 20.
Each conductor pair is terminated by a transformer. Trans-formers Tl and T2 terminate the conductor pair 1,2 and con-ductor pair 3,4 in key telephone set 20; transformers T3 and T4 terminate conductor pair 1,2 and conductor pair 3,4 in station circuit 10.
Each transformer has a center tap connection on the transformer winding connected to the conductor pair. Center tap connections are located at the telephone station set 20 (Cl and C2) and at the station circuit 10 (C3 and C4). A
"phantom circuit" is created via the center tap connections Cl and C2, through the conductors 1, 2, 3, 4, to the center taps C3 and C4 or transformers T3 and T4. This arrangement creates a virtual third pair, known as a phantom pair, because in a closed circuit connected to center taps C3 and C4 of T3 and T4 and to center taps Cl and C2 of T1 and T2, the current applied at a center tap point will divide at the center tap connection, flow over two conductors, and be received in recombined form at the center tap at the other end.
Connected to both conductor pairs 1,2 and 3,4 at each end is circuitry neaessary to create a complete communication channel. For example, at the key telephone station set 20, circuit pairs 1,2 and 3,4 are inductively coupled by transformers Tl and T2 to a function control network 30, controlled by a programmed digital computer 40. The function control network 30 provides a communication path to the telephone handset hybrid network 31 or to the speakerphone 32 of the key telephone station set 20. Connected to the side opposite pair 1,2 of transformer T3 in station circuit 10, is a conductor pair 5,6 for connection to a central office line. Connected to the KSU side of trans-former T4 is a conductor pair 7,8 which may be connected via switching circuits in the control unit to other key telephone set conductor pairs. Thus, two independent voice paths via the four conductors 1,2,3,4 are provided in the circuit arrangement shown in FIG. 11.
Superimposed upon the voice paths such as Pl are means for supplying power from the key service unit to the telephone set 20 via the phantom pair comprising the center tap connections C3, C4 through the balanced conductors 1,2,3,4 to the center tap connections Cl and C2 of transformers Tl and T2. D.C.
voltage sources 110, 112, each of voltage El, are connected in series with resistors Rl and R2 to center tap connections C3 and C4. Digital data signals from the station circuit 10 are superimposed on the phantom pair with the D.C. level supplied by voltage sources 110, 112 by modulator 114.
In telephone station set 20, receiver circuit 150 responds to the D.C. voltage pulses appearing between center-tap connections Cl and C2 of transformers Tl and T2 and produces a data signal proportional to the data modulated by modulator circuit 114 in station circuit 10. The output from receiver 150 is applied to digital computer 40 in the station set 20 for controlling function control network 30 and switch and indicator unit 50 within the station circuit 20.
An A.C. high impedance element 600 is connected in series with voltage regulator 500 and constant current sink 300 to provide a circuit terminating phantom line 1,2 and 3,4 so as to substantially eliminate reflections on the line 1,2 and 3,4.
Data is transmitted from the station set 20 to the station circuit 10 over conductors 1,2,3,4 by applying data pulses to modulator 200, which switches a resistor 201 in and out of parallel connection with the phantom circuit connected 1~7798~

to center taps Cl and C2, the current of which is being supplied by the station circuit 10. Because constant current sink 300 draws constant current from the closed circuit, and because resistor 201 is switched in and out of parallel connection with the constant current sink, current modulation in synchronism with the station set 20 data signals is applied on conductors 1,2,3,4.
The current pulses are sensed at the station circuit 10 by receiver 400 by comparing the voltages across resistors Rl and R2 which are proportional to current changes through them.
The data produced by receiver 400 is in response to the current modulation imposed by modulator 200 in station set 20. Data signals received by receiver 400 are then applied to logic circuits within the central switching and control unit 1010 of key service unit 1000 to provide information with respect to the status of different switches of key telephone set 20. For example, the data being supplied by digital computer 40 within the station set 20 to modulator 200 includes the status of different line keys in the station set or the status of an indicator, the status of a hold key or privacy release key, etc.
Power is supplied from the station circuit 10 to the station set 20 by applying D.C. current from the D.C. sources 110, 112 via the phantom circuit to station set 20 where it flows through voltage regulator 500. Voltage regulator 500 divides and regulates the D.C. voltage supplied via the phantom circuit and applies the divided and regulated voltage levels to circuits within the station set 20.
FIGS. 12A and 12B illustrate a preferred format for the data pulses which are applied to conductors 1,2,3,4 by the station circuit 10 and the key telephone set 20. Each period of time T, typically 20.4 milliseconds, is divided into thirty-four 1:~77981 600 microsecond segments. The first word, called the "Oth" word, is used as a synchronizing interval by the station set 20 digital computer to determine the start of the periodic word sequence of "message." The next 33 time segments, or words, are used in sending and receiving data between station circuit 10 and telephone set 20.
Each word is divided into five intervals. Although in general the intervals may be divided equally in time for each word, the preferred format in the key telephone system in which the invention is used requires that the third, fourth and fifth intervals each to be equal in time length, L, while the first interval is specified to be of l/2 L time length. The second time interval is specified to be of 3/2 L time length. Time length L is specified to be 120 microseconds, so as a result, time intervals one through five, when summed, equal SL for a total of 600 microseconds. The data from the station circuit 10 to the station set 20 is applied during the first two of the intervals. Data returning from the station set 20 is applied during interval four. Intervals three and five remain idle.
Each word is designated to correspond to a particular function or line of the station circuit 20. The key service unit 1000 logic circuitry 1011 then scans each function once every 20.4 milliseconds and applies information via the data path to the station set 20 during the first and/or second interva~
of a word. The digital computer 40 in the station set 20 receives the data and uses it to control corresponding functions, such as connection of a speakerphone, or physical equipment, such as an indicator, in the station set. Current pulse information regarding the status of a particular function or element is transmitted during the fourth interval of each ~ .~7798~
word from the station set 20 via the four conductor 1, 2, 3, 4 phantom circuit and is received in the station circuit 10 for use by the central switching and control circuit 1010 in making logic decisions for controlling the various elements and/or functions of station set 20.
FIG. 12A illustrates how information pulses from station circuit 10 to station set 20 are applied. The first voltage pulse in time slot "1" (e.g., T 1 1 ~ T 2 1 ....T33 1) is always present, thereby allowing digital computer 40 in station set 20 to determine exactly when a new word is beginning. In any word the station circuit 10 applies a "1" pulse during the time interval "2" by maintaining the voltage pulse high. That is, as illustrated for "Word 2" of FIG. 12A, the voltage pulse extends from T2 1 through T2 2 without returning to zero. In any word, the station circuit 10 applies a "0" pulse during the time slot "2" by removing the voltage pulse existing during the time slot "1". FIG. 12A illustrates how a "0" pulse is applied during Word 1 and Word 33, where during the intervals Tl 2 and T33 2 no voltage pulse is applied.
FIG. 12B illustrates how current pulses from the station set 20 are impressed on the phantom circuit conductors 1,2,3,4 for reception by station circuit 10 logic circuitry. A current pulse applied during the fourth interval of a word, as in Word 1 of FIG. 12B, indicates that a "1" is being transmitted from station set 20 to control unit 10. The absence of a current pulse applied during the fourth interval of a word, as in word 33 of FIG. 12B, indicates that a "0" is being transmitted from station set 20 to station circuit 10.
In the key telephone system in which this invention is used each particular word of the time period T is used to provide 1~779~1 information for the control of and/ox status of line keys, indicators, hold keys, speakerphone circuit, etc. Although thirty-four words are shown in this speci~ication for purposes of demonstrating the preferred embodiment of the data format of the key telephone system, any number of words may be used to corres-pond with the number of keys, indicators, and auxiliary circuits existing in a particular key telephone system.
Another feature of the data format used in the key telephone system relates to the manner in which information as to the status of the hookswitch and dial pulsing of the telephone station set 20 is transmitted to the key service unit 1000. As illustrated in FIG. 12B, during each word, short wldth current pulses during time interval two, are transmitted from the telephone station set 20 over the phantom circuit of conductors 1,2,3,4 to the key service unit 1000, whenever the hookswitch is closed. Time interval two is selected in the preferred em-bodiment of the invention so that the frequently occurring hook-switch current pulses are generated during the long time interval two of each word, which is 3/2 L of the time length. This design facilitates reception of the hookswitch pulses in the key service unit, because the relatively short hookswitch pulses do not overlap the ends of the time interval. A hookswitch signal is applied from the station set 20 under two conditions: (1) when the status of the telephone station set is "on-hook" (on-hook status occurs when the hookswitch is open and the speakerphone is not in operation) or (2) when a dial pulse from a rotary dial (or an electronic dial which generates dial pulses) associated with the telephone station set is generated.
Thus, when the station set has an "on-hook" condition, current pulses during the second interval of each word are transmitted and continue to be transmitted until the on-hook status is terminated (by the handset being taken "off-hook" or by the speakerphone being turned on). During dial pulse signal-ling, the current pulses are applied during the second interval of each word during, but only during, the generation of each dial pulse. The time period for each word of the data format, illustrated in FIG. 12A, is sufficiently short with respect to the length of a dial pulse that many "hookswitch" current pulses are transmitted, one each during each of the words of the data format. The presence or absence of current pulses received by the key service unit 1000 in the second time interval indicate that a dial pulse is being transmitted from the key telephone set.
Thus, the data format of the key telephone system, in combination with the four wire communication circuits, allows telephone station sets adapted for dial pulse signalling or tele-phone station sets adapted for frequency signalling to be connected to the key service unit by means of the communication circuit. Frequency signals are applied over one of the communication channels 1,2 or 3,4 while dial pulse signals are transmitted over the four conductor phantom circuits 1,2,3,4 by means of the data format as discussed above.
FIG. 13 illustrates the digital computer 40, indicated in block diagram form in FIG. 11, and the external connections to the microcomputer.
The preferred embodiment of the microcomputer in the key telephone set 40 illustrated in FIG. 13 is the model PPS-4/1 MM77 single circuit microcomputer system manufactured by Rockwell International Corporation and described in Document No. 29410-N42, Revision 1, July 1976, published by the Micro-electronic Device Division of Rockwell International Corporation.

1~7~9~1 Microcomputer 40 receives data from receiver 150 (FIG. 11) on the "INT ~" lead, and applies signals to modulator 200 (FIG. 11) on the "Data 0" lead. Leads DI/00 to DI/09 and leads RI/01 to RI/04 are used to access the switch matrix and indicator matrix, schematically illustrated as key/indicator array 50 and the function control network 30, schematically illustrated in FIG. 11. Voltage input on lead VDD of microcom-puter 40 is provided via a tap (not illustrated) fxom voltage regulator 500. Other leads on the microcomputer 40 illustrated in FIG. 13 are either not used or are not essential to the understanding of how the microcomputer functions to control the operation of the key telephone station set 20, in the key telephone system.
FIG. 14 illustrates a switch matrix used in the key telephone set of this invention which is periodically monitored by the microcomputer 40. The switches are arranged in eight columns and four rows. The switches in columns one through seven are preferably non-locking switches; that is, when the keys associated with the switches are depressed, the switches only close while the keys are being pushed. Locking switches could, of course, be used in another embodiment of the telephone set of this invention. Switches in columns one through seven are arranged on a key panel 50 as illustrated in FIG. 11. Switches in columns 1 through 7 are associated with central office lines and various functions which are incorporated in the key tele-phone set of this invention as indicated in FIG. 16. The switches in column 0 are not connected to the seven-by-four key panel 50 on the face of the key telephone instrument (FIG. 11).
The switches in column 0, may be locking switches, or may be non-locking, depending on their use, as will be explained in detailbelow.

1~779~3~

The switch matrix of FIG. 14 is arranged to conform to the data format illustrated in FIGS. 12A and 12B. Of the thirty-three words available for transmission of information between the key telephone station set and the key service unit, thirty-two of the words are associated with one of the switches in the eight by four switch matrix. The additional word i5 used for control purposes as will be explained below. The function of the switch matrix of FIG. 14 is to present a signal to the microcOmputer 40 in the key telephone set which can be recognized and transmitted to the key service unit as a request for a particular kind of service associated with one of the switches in the matrix.
During the word associated with switch S4, the micro-computer monitors the voltages on inputs designated as RI/01 and DI/01 to determine if switch S4 has been depressed. The status of switch S4 is determined by microcomputer 40 during word 4, by applying a positive 7.5 volt strobe pulse on lead DI/01 while enabling lead RI/01. If switch S4 is open, a -7.5 volt signal appears at point P4, because no current path exists to drop the -7.5 volts of source E across the parallel resistors R301 and R201. If switch S4 is closed and a ~7.5 volt pulse on DI/01 is applied, the volta~e at point P4 is approximately t7.5 volts because the -7.5 volts of source E and the ~7.5 volt pulse of DI/01 is dropped across resistors R201 and R301. Thus, during word 4, if switch S4 is closed, a ~7.5 volt signal is applied on lead RI/01 and is sensed by microcomputer 40 for transmission of a pulse during time segment 4 of word four, as will be explained in detail below. During word five, a ~7.5 volt pulse on lead DI/01 remains, but lead RI/02 is enabled to sense whether or not the ~7.5 volt pulse appears at point P5.

1~77~1 All switches are sequentially sensed periodically according to the format of FIG. 12. According to the above described switch sensing scheme, microcomputer 40 can obtain input information regarding the status of line and function switches of the key telephone set for processing and transmission to the key service unit.
FIG. 15 illustrates the LED matrix used to indicate the status o each of the functions associated with switches of column 1 through 7 and rows l through 4. Light Emitting Diodes (LEDs) are used in the preferred embodiment of this invention because of their extremely low power requirements, but other embodiments of the visual indicator matrix could possibly employ small light bulbs or equivalent devices. If it is desired to illuminate, for example, the indicator associated with switch 4 (i.e., a key marked C.O. Line l-see FIG. 16) the LED of column "A" and row "W" of FIG. 15 is illuminated during, but only during, word 4 of the data format. For example, the microcomputer receives information from the key service unit that C.O. line l is active, and that the indicator associated with that line is to be illuminated. During word 4, a pulse is received during the second time segment (e.g., T2 4~ FIG. 12A). The microcomputer responds by generating pulses on leads RI/05 and DI/01. These pulses from the microcomputer, each of ~7.5 volts in value are transformed by isolating circuits lO0 and llO to be -7.5 volts on lead A and -12.6 volts on lead W. Application of these voltages to LED 1 of FIG. 15 causes current to flow through it for the duration of word 4.
It should be noted that even though LED l is pulsed only during word 4, the period T of the data format assures that it is illuminated once each period, or once each 20.4 milli-seconds or approximately fifty times each second. To the human 1~7798~

eye, the indicator appears to be steadily lit, even though in reality it is being pulsed for only about 600 microseconds out of a period of 20.4 milliseconds. It is seen that the,method and apparatus of illuminating switch or key indicators of the key telephone set yields tremendous economies of power, because each indicator need not be continuously powered, yet to the human eye, the indicator appears to be continuously illuminated.
FIG. 16 illustrates the functions assigned to each of the switches of the switch matrix illustrated in FIG. 14.
Assignment of functions to switches is easily changed, because the key of column 1 and row 4 ~word 4) may be assigned to any central office line connected to the key service unit. Likewise, the key of column 1, row 4 (word 7) could be assigned a function other than the "hold" function indicated in FIG. 16. For example, if it were desired to designate the key or switch of column 6, row 3 as the "hold" key, all that would be required would be to lable key 26 as hold, remove the label from the key 7 and designate word 26 of the data format to be associated with the hold function. Each of the functions designated in FIG. 16 will be described in detail below for an illustrative operation of the key telephone set of this invention.
FIG. 17 illustrates the function control network 30 (see FIG. 11) which controls the handset hybrid network 31, speakerphone 32, and dial 33. In normal use, the key telephone set 20 of this invention connects its handset hybrid network 31 (hereinafter "handset") via the "A" path or conductors 1,2 through the key service unit switching and control unit to a central office line designated by one of the CØ keys illustratec in FIGS. 14 and 16. Path "B" is used ordinarily when an incoming call is being received by the key telephone set from another key 1~7791 8~

telephone set in the key telephone system. An intercom call is received and answered at the key telephone set via path "B" to speakerphone 32 where the key telephone set user may receive the caller's voice over built-in speaker 320 and transmit the user's voice via microphone 321, both of which are components of speakerphone 32.
In normal operation (handset 31 connected to "A" path) the microcOmputer 40 outputs a pulse on lead DI/08 which is connected to the "C" input of integrated circuit MC 14042 B (manufactured by the National Semiconductor Corporation), hereinafter designated the "latch" circuit. When a pulse is present on DI/08, the voltage state at RI/01 - RI/04 is transferred and held at outputs 0-3 of the latch circuit (Q & Q). No input on lead C via microcomputer lead DI/08 causes the Q3 output lead to be low, and the Q3 output lead to be high from this latch circuit. A high output on Q3 causes field effect transistors FET 1 and FET 2 to conduct, thereby connecting handset 31 to the "A" path and speakerphone 32 to the "B" path. Field effect transistors FET 3 and FET 4 are turned off because the output on lead Q3 is low.
When the key telephone set user desires to use the built-in speakerphone 32, he may depress his speakerphone on/off key (see FIG. 16, key 10) which, as explained below in the description of the operation of the key telephone set, causes a +7.5 input pulse on RI/04 at the time of the pulse on DI/08 from microcomputer 40, which causes Q3 to be low and Q3 to be high.
When Q3 is low, FET 1 and FET 2 are cut off, disconnecting hand-set 31 from the "A" path and speakerphone 3Z from the "B" path.
Simultaneously, when Q3 is high, FET 3 and FET 4 are turned on, connecting points P4 and P5, and P6 and P7, with the result 11 77 ~ ~1 that handset 31 is connected to the "B" path, speakerphone 32 is connected to the "A" path.
The key telephone set of this invention may be used interchangeably with dial pulse signalling dials (as indicated in FIG. 17 by circuit 33) or with frequency signalling dials (as indicated in FIG. 17 by circuit 33'). Frequency dial signals are applied over path "A" in the same manner as prior art telephones. The dial pulses are applied, not via paths "A" or "B," but as a sequence of "hookswitch" pulses transmitted to the key service unit to be reconstituted as central office dial pulse signals or to be used internally for intercom signalling.
The dial pulse signalling circuit 33 is controlled via an output from microcomputer 40 via the latch circuit which continuously applies an enabling voltage to transistor T33 during a certain time after the telephone handset has been picked up or after the speakerphone has been enabled, etc.
As shown in FIG. 17,during the make period of breaker 35 (normal operation when no signalling is being con-ducted), if transistor T33 is conducting (i.e. the dial is enabled via latch output Ql), input A of "OR" gate 01 will be driven to -7.5V. Input B of OR gate 01 will also be at -7.5 V
due to the "off hook" status of station set hookswitch H.S. Thus, no output signal is applied to the microcomputer via lead INT 1 and no hookswitch pulses are applied to the KSU in the words of the data message.
During a dial break period (e.g., breaker 35 is open) input A of OR gate 01 is driven to +7.5 V via resistor R901;
thus the output of OR gate 01 will be at +7.5 V. The high voltage applied to microcomputer input lead INT 1 via the output of OR gate 01 causes the microcomputer to transmit hookswitch signal pulses during each word of the message as long as the 1~ 7 7 ~ ~

dial pulse breaker 35 is open. Of course if the handset is on hook, the hookswitch HS is open, a high output via input B of OR gate 01 is applied to lead INT 1, and the microcomputer continually transmits hookswitch pulses to the KSU.
As indicated previously, a hookswitch signal during interval two of each word is applied from the microco~puter 40 via the phantom circuit to the key service unit under two conditions: (1) when the status of the telephone station set is "on hook" (when a hookswitch HS is open and the speakerphone is not operational) or (2) when a dial pulse from a rotary dial is generated. When the user picks up the handset, the hookswitch HS closes and hookswitch pulses are terminated, except during dialing, when pulses are generated by periodically opening a switch, in the same manner as the hookswitch is opened when the handset is "on hook."
Background music is applied to the speaker 320 of the key telephone set from the key service unit via the "B" path.
When the switch 1 of the switching matrix illustrated in FIG. 16 is depressed, the microcomputer 40 sends a signal in word 1 of the data format to the key service unit indicating that back-ground music is desired at the key telephone set, whereupon the key service unit applies background music to path "B" of the key telephone set requesting music, and applies a pulse in time segment 2 of word 1 indicating to the microcomputer that the music bypass circuit of FIG. 17 is to be activated. When the Q2 of latch circuit is high, the music signal on path B is applied directly to the speaker 320, yet the microphone 321 is rendered inactive because of the low signal on Q2 to the Bypass lead connected to the gate FET 6.

3~

1~7~

The program listing of Table I which follows is stored in microcomputer 40 of the preferred embodiment o,f this invention. The ROM address with machine operation code, and the assembly language listing of the program is included in Table I. The assembly language instructions are explained in detail in the manufacturer's publication, "MM77 System Product Description," Document No. 29410-N42, July 1976, published by Rockwell International Corporation, pp. 5-8.

~77981 TABLE I - PROGRAM LISTING
COLUMN I COLUMN II
Machine Code Instruction Code Machine Code Instruction Code (address, (assembly (address, (assembly command) language) ~ommand) language) ORG #080 0040 17 SYST LB #7 0080 00 LTOF NOP

0044 00 NOP 0084 OA EOB #2 0061 Cl T WASYN 00A1 2B SKBF

004C Cl T WASYN 008C 4F LAI #F

0063 03 INTOH 0OA3 OA EOB #2 0051 Cl T WASYN 0091 40 LAI #0 0068 B3 TM Dll 00A8 74 XAS
0054 48 LAI #8 0094 50 L
004A 74 XAS 008A OA EOB #2 0079 40 LAI # 0 00BC 7A XAB
007C 10 LBL #50 009E 00 NOP
005E OD 00AF 41 LAI #l 0057 09 EOB #1 008B 5C X
: 004B 5C X 0085 49 LAI #9 : 0071 11 LBL 51 00B8 50 L

004E 09 EOB #1 00A7 6F AISK #F
0067 5C X 0093 CB T #GO4 0064 12 LBL #52 0092 3C TL SRTl 0074 09 EOB #1 009A 00 NOP
005A 5C X 00AD 3C TL SRTl 0076 7E A 00BB 4E CTAU LAI #E
007B 13 LBL #53 009D 5C X

0077 18 CB #8 009B 4D LAI #D
00gB 7B IOA 008D 5C X

0073 71 ROS 0099 4B LAI #B

0056 10 LB #8 00AB 54 006B 49 LAI #9 0095 47 LAI #7 006A 40 LAI #0 00B5 C4 T CTAU

1~7~g8~
TABLE I - PROGRAM LISTING (cont.) COLUMN I COLUMN II
Machine Code Instruction Code Machine Code Instruction Code ~address, (assembly (address (assembly command) language) command) language) 0075 00 NOP 0OBA OE EOB #6 007A 3A TL SRTO OOBD 40 A13 LAI #0 007F Cl T WASYN 009F 3E TL WASYN
005F 9A TM D4 008F Cl 004F FF T SYST 00C0 03 SRT1 INTOH ' WORDS 1-STOP 00E0 FF T SRTl 047 41 LAI #1 00D0 04 INTIL

COLUMN III COLUMN IV
Machine Code Instruction Code Machine Code Instruction Code (address, (assembly (address, (assembly command) language) command) language) 00E1 61 AISK #1 010A 73 OX

00D8 OA SRT 3 EOB #2 0132 7A XAB
00CC 5C X 0139 41 LAI #l 00D1 71 ROS 012F 49 LAI #9 00F9 FF 0138 6F AISK #F

00D7 04 INTIL 0113 3C TL SRTl 00E2 61 AISK #1 0112 00 NOP
00F1 3E TLSYST 0129 3C TL SRTl 00DC OE EOB#6 011A 07 ONNR SAG

00E4 7A XAB 012E OA EOB #2 00E9 39 TL OFLT 011B OA EOB #2 00F6 4F OFNR LAI #F 0119 7A XAB
00FB 00 NOP 012C OD EOB #5 00EE OA EOB#2 012B OD EOB #5 ~77~

TABLE I (cont.) COLUMN III COLUMN IV
Machine Code Instruction Code Machine Code Instruction Code (address, (assembly (address, tassembly command) language) command) language) 00DB OA EOB #2 012A 4F NRl LAI #F

00E6 73 OX 0160 OE EOB #6 00D9 7A XAB 0148 2B SKBF #4 00EC OD EOB #5 0144 3A TL NRON

00EB OD EOB #5 0161 07 SAG

00F5 00 IBU NOP 014C 40 LAI #0 00FD 13 LB #3 0163 OE EOB #6 00FF 71 ROS 0168 OE EOB #6 00CF 38 TL LOFl 014A 73 OX
00C3 38 TL LONl 00Cl FF

0120 OA EOB #2 0172 7A XAB
0110 76 LBA 0179 41 LAI #l 0108 2B SKBF #4 017C 7E A

3:0 0102 E5 016F 49 LAI #9 010C 40 LAI #0 0162 77 COM

0123 OA EOB #2 0178 6F AISK #F

0128 OA EOB #2 014E 27 RB 4 COLUMN V COLUMN VI
Machine Code Instruction Code Machine Code Instruction Code (address, (assembly ~ (address, (assembly command) language) command) language) 0152 00 NOP 01BB 4F NROF LAI #F

0176 79 XAX 018D OE EOB #6 015D 00 NOP 0183 OE EOB #6 1~77~

TABLE I ~cont.) COLUMN V COLUMN VI
Machine Code Instruction Code Machine Code Instruction Code (address, (assembly (address, tassembly command) language) command) language) 016E OE EOB #6 0199 7A XAB

015B OE EOB #6 0196 70 SOS

016C 00 NOP 0lBA CE T G023 0156 00 NOP 01C0 10 LONl LBL #10 013D 14 LB #4 01C2 07 SAG

011F 10 LBL #10 01D8 14 LB #4 0107 AB TM D6 01C6 40 LAI #0 0180 00 OFL NOP 01E8 10 LBL #10 0188 5C X 01E5 41 GO 14 LAI #l 0184 OE EOB #6 01F2 7E A

01A1 2B SKBF #4 01FC 49 LAI #9 018C 4F LAI#F 01D7 50 L

01A3 OE EOB#6 01C5 7B IOA
0191 40 LAI#0 01E2 6F AISK #F
01A8 74 XAS 01Fl EC T GO 16 018A OE EOB #6 01DC 00 NOP

01B9 70 SOS 01D3 Fl GO 16 T GO 17 01AF 41 LAl #1 01D2 79 XAX
0197 7E A 01E9 14 LB #4 0185 49 LAI #9 01DA 70 SOS
01A2 74 XAS 01ED 10 LBL #10 1~779S~

TABLE I (cont.) COLUMN V COLUMN VI
Machine Code Instruction Code Machine Code Instruction Code (address, tassembly (address, (assembly command) language) command) language) 018E 7B IOA 0lEE 00 LOFI NOP
01A7 6F AISK #F 01F7 00 NOP

0189 27 RB 4 01CD 10 LBL#10 01A9 C3 01D9 3B TL NRl 0lEC D5 01D6 4F LAI #F
0lEB 00 NOP

01EA 14 LB #4 COLUMN VII COLUMN VIII
Machine Code Instruction Code Machine Code Instruction Code ~address, (assembly (address, (assembly comma~d) language) command) language) 0lAC 73 OX 064D 5C INCB

01AB 7A XAB 0673 30 SKBEI #8 01B5 00 NOP 0656 46 All LAI #6 01FA 40 LAI #0 066A 54 01FD 74 XAS 0675 30 SKBEI #C

01FF 10 LBL #10 067D E9 T A11 01DF 09 067E 47 A12 LAI #7 0lCF 00 NOP 067F S4 XNSK
01C7 00 NOP 065F Cl T A12 01Cl DA 0643 C4 03EO 19 LB #9 07C0 00 D20 NOP

0640 49 SET LAI #9 07E1 00 D14 NOP

0650 10 LB #0 07D8 00 D12 NOP
0648 48 Al LAI #8 07CC 00 Dll NOP

0642 F7 T Al 07E3 00 D 9 NOP

1~77981 TABLE I - (Cont.) _OLUMN VII COLUMN VIII
Machine Code Instruction Code Machine Code Instruction Code (address, (assembly (address, (assembly command~ language)command) language) 0661 09 EOB #1 07D1 00 D 8 NOP
0670 48 A2 LAI #8 07E8 00 D 7 NOP

0646 OB EOB #3 07E5 00 D 4 NOP
0663 40 A3 LAI #0 07F2 00 D 3 NOP

064A 30 SKBEI #4 0679 41 A4 LAI #l 0657 30 SKBEI #8 0662 42 A5 LAI #2 064E 30 SKBEI #C

0649 43 A6 LAI #3 0669 OD EOB #5 0674 44 A8 LAI #4 067B 30 SKBEI #4 0677 45 A9 LAI #5 1 1 77 ~
In summary, the electronic ~ey telephone systems and the various component circuits thereof disclosed herein provide a high degree of reliability owing to the distribution of control on a station-by-station basis and implementation of the control of each station by means of a stored-program digital micro-computer with non-volatile program storage. A high degree of flexibility is also provided by the removable microcomputer, which may be either replaced by another microcomputer ~ith a different program, or reprogrammed and re-inserted into the station card circuit 200, in order to implement different or additional telephone services. The program set forth herein on pages 21 through 44 will enable the station card 2~0, in cooperation with the various other system circuits 100-700, to provide the various telephone services and features listed hereunder:
1. Handsfree talkback on intercom calls to another station set: the called party can answer from across his desk or across the room without touching the telephone. A
volume switch is provided to control the volume of transmissions received handsfree without affecting the volume setting for background music.
2. Handsfree origination for both internal and Central Office line calls: by depressing a handsfree key, and then depressing either the key for the desired internal station, or the key for a C.O. line, the caller can both dial a call and then con-duct a handsfree conversation by means of a speakerphone built into the station set without ever lifting the handset.
3. ~ulti-line conferencing: the caller can establish a first C.O. line call, put it on hold, establish a second C.O. line call, put it on hold, and then depress both C.O. line keys to establish a conference between the caller and the two outside parties.

4. Busy station d~.s?lay: ~-^vidod at all station sets to allou 1~7~9Bl a caller to know what stations, C.O. lines, etc. are busy before placing a call.

5. ~usic-on-hold: provided to any outside party on a held C.O. line.

6. Background music: provided to system users at their station sets, which have an on/off/volume control switch to enable a user to control the level of background music without affecting the volume setting for the handsfree feature.

7. Simultaneous call haDdling: the systems allow two simultan-eous calls to be on any station set at the same time, one on the handset and one on the speakerphone, without having to place either call on hold.

8. Automatic privacy: no action needs to be taken by a station set user to ensure privacy, but he may release the privacy feature to allow other station set users to have access to the called C.O. line.

9. Paging: the systems provide for paging to as many as five zones, plus all-call paging to all zones, each accessed by different dial codes. Also, each station set has a paging key that may be used to access any one of the zones or all-call directly, without dlaling.

10. Meet-me conference: lnternal group conferences may be held by having each conferee depress a conference key on his station set, which connects each of the conferees' station sets to every other conferee's station set.

11. I-hold signalling: the visual indicator on the line(s) which a user has put on hold flashes in a distinctive manner to identify those lines.

12. Hotlines(s): each station set can reach one or more other station sets directly, without dialing, by depressing a hotline key. Access to a hotline-connected station set is guaranteed, even if it is in use.

1~7798~

13. Single key intercom operation: an intercom key on the station set may be depressed to seize the first available link and register, by means of which a caller may dial an internal call. Intercom calling may be conducted handsfree by the caller and the called party, and may continue for unlimited periods of time without tying up registers. For privacy, or if in an environment with a high ambient noise level, the caller or the called party may switch the call to his handset by picking up his handset.

14. Access to lines that do not appear at the telephone: in a non-square system, or a system having private lines, a user may dial into a line that does not appear at his station set by depressing the intercom key and dialing a pre-determined number.

15. Handsfree mute: by depresæing a mute key in the station set, the user can disable the microphone which is normally operative in the handsfree mode. Thus, handsfree calls can be placed in a monitor-only mode. A caller may also establish privacy to talk to someone at his location without the called party overhearing. A second depression of the mute key re-enables the microphone.

16. Do not disturb: by depressing a DND key in the station set, it is made to appear busy to all internal calls. A sub-sequent depression of this key restores the station set to normal availability.

17. Alternate point answering (call steal): an internal call may be answered from another telephone using the intercom key to seize a link and register, and then dialing 2 followed by the number of the telephone to which the call is directed. If the call is a handsfree voice call, it may be intercepted in this manner only within about 30 seconds after it has been 11~7~
received. If the call is an ICM RING call, it may be inter-cepted in this manner for as long as the caller is ringing.
The advantages of the present invention, as well as certain changes and modifications to the disclosed embodiments thereof, will be readily apparent to those skilled in the art.
It is the applicant's intention to cover all those changes and modifications which could be made to the embodiments of the invention herein chosen for the purposes of the disclosure without departing from the spirit and scope of the invention.

Claims (5)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A page card circuit for the key service unit of an elec-tronic key telephone system, comprising a plurality of zone circuit means, each including a passive port means operative to receive a service signal and, in response thereto, to generate at least one signal indicating its status to all active port means to which it is connected and to provide a communication path either to a predetermined group of station card circuits or to a speaker outside of the system.

2. The page card circuit according to claim 1, wherein each of said plurality of zone circuit means further comprises means for generating a background music disabling signal for transmission to all station card circuits and external speakers in its zone to block background music during seizure of each zone circuit means.

3. The page card circuit according to claim 1, further com-prising an all-call circuit means comprising:
(1) a passive port means operative to receive a service signal and, in response thereto, to generate at least one signal indicating its status to all active port means to which it is connected, and to provide a communications path through said plurality of zone circuit means to each of the groups of station card circuits or external speakers to which said zone circuit means are connected; and (2) inhibiting circuit means operative, in response to seizure of said passive port means of said all-call circuit means, to block all zone page messages during an all-call page.

4. The page card circuit according to claim 2, wherein said all-call circuit means further comprises means for genera-ting a background music disabling signal for transmission to all station card circuits and external speakers to block background music during seizure of said all-call circuit means.

5. The page card circuit according to claim 3, wherein said all-call circuit means further comprises circuit means for receiving a tone signal and operative, in response to a night ring enabling signal, to pass said tone signal as an all-call page message to each of the groups of station card circuits or external speakers to which said zone circuit means are connected.